From 6277490381cb030ec23610259c18ede739f386fb Mon Sep 17 00:00:00 2001 From: R Date: Sun, 27 Mar 2022 01:28:14 -0700 Subject: [PATCH 1/3] arm64: dts: apple: t6000: Add eFuses node Signed-off-by: R --- arch/arm64/boot/dts/apple/t6001.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/apple/t6001.dtsi index 1bff451448b8a9..8cf4d15ff9d6ee 100644 --- a/arch/arm64/boot/dts/apple/t6001.dtsi +++ b/arch/arm64/boot/dts/apple/t6001.dtsi @@ -969,6 +969,13 @@ }; }; + efuse@2922bc000 { + compatible = "apple,t6000-efuses", "apple,efuses"; + reg = <0x2 0x922bc000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + }; + dwc3_0_dart_0: iommu@702f00000 { compatible = "apple,t6000-dart"; reg = <0x7 0x02f00000 0x0 0x4000>; From e971943ab2b0a005ece2071503081fc1437a614c Mon Sep 17 00:00:00 2001 From: R Date: Sun, 27 Mar 2022 03:09:01 -0700 Subject: [PATCH 2/3] atcphy: Fix bug Signed-off-by: R --- drivers/phy/apple/atc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/apple/atc.c b/drivers/phy/apple/atc.c index dc5488897e001c..0b70668d9149cb 100644 --- a/drivers/phy/apple/atc.c +++ b/drivers/phy/apple/atc.c @@ -1069,7 +1069,7 @@ static int atcphy_load_fuses(struct apple_atcphy *atcphy) ret = nvmem_cell_read_variable_le_u32( atcphy->dev, "cio3pll_dll_start_capcode_workaround", &atcphy->fuses.cio3pll_dll_start_capcode[1]); - if (ret == ENOENT) { + if (ret == -ENOENT) { atcphy->quirks.t8103_cio3pll_workaround = false; goto success; } From 7ee315306d1a3b0da8cf2a53e7f55889d0e7f034 Mon Sep 17 00:00:00 2001 From: R Date: Sun, 27 Mar 2022 03:30:30 -0700 Subject: [PATCH 3/3] arm64: dts: apple: t6000: Add ATCPHY node Signed-off-by: R --- arch/arm64/boot/dts/apple/t6001.dtsi | 340 ++++++++++++++++++ .../arm64/boot/dts/apple/t600x-j314-j316.dtsi | 47 +++ 2 files changed, 387 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/apple/t6001.dtsi index 8cf4d15ff9d6ee..f99f6892c75aa7 100644 --- a/arch/arm64/boot/dts/apple/t6001.dtsi +++ b/arch/arm64/boot/dts/apple/t6001.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include / { @@ -974,6 +975,185 @@ reg = <0x2 0x922bc000 0x0 0x2000>; #address-cells = <1>; #size-cells = <1>; + atcphy0_auspll_rodco_bias_adjust: efuse@a10,22 { + reg = <0xa10 4>; + bits = <22 3>; + }; + + atcphy0_auspll_rodco_encap: efuse@a10,25 { + reg = <0xa10 4>; + bits = <25 2>; + }; + + atcphy0_auspll_dtc_vreg_adjust: efuse@a10,27 { + reg = <0xa10 4>; + bits = <27 3>; + }; + + atcphy0_auspll_fracn_dll_start_capcode: efuse@a10,30 { + reg = <0xa10 4>; + bits = <30 2>; + }; + + atcphy0_aus_cmn_shm_vreg_trim: efuse@a14,0 { + reg = <0xa14 4>; + bits = <0 5>; + }; + + atcphy0_cio3pll_dco_coarsebin0: efuse@a14,5 { + reg = <0xa14 4>; + bits = <5 6>; + }; + + atcphy0_cio3pll_dco_coarsebin1: efuse@a14,11 { + reg = <0xa14 4>; + bits = <11 6>; + }; + + atcphy0_cio3pll_dll_start_capcode: efuse@a14,17 { + reg = <0xa14 4>; + bits = <17 2>; + }; + + atcphy0_cio3pll_dtc_vreg_adjust: efuse@a14,19 { + reg = <0xa14 4>; + bits = <19 3>; + }; + + atcphy1_auspll_rodco_bias_adjust: efuse@a18,0 { + reg = <0xa18 4>; + bits = <0 3>; + }; + + atcphy1_auspll_rodco_encap: efuse@a18,3 { + reg = <0xa18 4>; + bits = <3 2>; + }; + + atcphy1_auspll_dtc_vreg_adjust: efuse@a18,5 { + reg = <0xa18 4>; + bits = <5 3>; + }; + + atcphy1_auspll_fracn_dll_start_capcode: efuse@a18,8 { + reg = <0xa18 4>; + bits = <8 2>; + }; + + atcphy1_aus_cmn_shm_vreg_trim: efuse@a18,10 { + reg = <0xa18 4>; + bits = <10 5>; + }; + + atcphy1_cio3pll_dco_coarsebin0: efuse@a18,15 { + reg = <0xa18 4>; + bits = <15 6>; + }; + + atcphy1_cio3pll_dco_coarsebin1: efuse@a18,21 { + reg = <0xa18 4>; + bits = <21 6>; + }; + + atcphy1_cio3pll_dll_start_capcode: efuse@a18,27 { + reg = <0xa18 4>; + bits = <27 2>; + }; + + atcphy1_cio3pll_dtc_vreg_adjust: efuse@a18,29 { + reg = <0xa18 4>; + bits = <29 3>; + }; + + atcphy2_auspll_rodco_bias_adjust: efuse@a1c,10 { + reg = <0xa1c 4>; + bits = <10 3>; + }; + + atcphy2_auspll_rodco_encap: efuse@a1c,13 { + reg = <0xa1c 4>; + bits = <13 2>; + }; + + atcphy2_auspll_dtc_vreg_adjust: efuse@a1c,15 { + reg = <0xa1c 4>; + bits = <15 3>; + }; + + atcphy2_auspll_fracn_dll_start_capcode: efuse@a1c,18 { + reg = <0xa1c 4>; + bits = <18 2>; + }; + + atcphy2_aus_cmn_shm_vreg_trim: efuse@a1c,20 { + reg = <0xa1c 4>; + bits = <20 5>; + }; + + atcphy2_cio3pll_dco_coarsebin0: efuse@a1c,25 { + reg = <0xa1c 4>; + bits = <25 6>; + }; + + atcphy2_cio3pll_dco_coarsebin1: efuse@a1c,31 { + reg = <0xa1c 8>; + bits = <31 6>; + }; + + atcphy2_cio3pll_dll_start_capcode: efuse@a20,5 { + reg = <0xa20 4>; + bits = <5 2>; + }; + + atcphy2_cio3pll_dtc_vreg_adjust: efuse@a20,7 { + reg = <0xa20 4>; + bits = <7 3>; + }; + + atcphy3_auspll_rodco_bias_adjust: efuse@a20,20 { + reg = <0xa20 4>; + bits = <20 3>; + }; + + atcphy3_auspll_rodco_encap: efuse@a20,23 { + reg = <0xa20 4>; + bits = <23 2>; + }; + + atcphy3_auspll_dtc_vreg_adjust: efuse@a20,25 { + reg = <0xa20 4>; + bits = <25 3>; + }; + + atcphy3_auspll_fracn_dll_start_capcode: efuse@a20,28 { + reg = <0xa20 4>; + bits = <28 2>; + }; + + atcphy3_aus_cmn_shm_vreg_trim: efuse@a20,30 { + reg = <0xa20 8>; + bits = <30 5>; + }; + + atcphy3_cio3pll_dco_coarsebin0: efuse@a24,3 { + reg = <0xa24 4>; + bits = <3 6>; + }; + + atcphy3_cio3pll_dco_coarsebin1: efuse@a24,9 { + reg = <0xa24 4>; + bits = <9 6>; + }; + + atcphy3_cio3pll_dll_start_capcode: efuse@a24,15 { + reg = <0xa24 4>; + bits = <15 2>; + }; + + atcphy3_cio3pll_dtc_vreg_adjust: efuse@a24,17 { + reg = <0xa24 4>; + bits = <17 3>; + }; }; dwc3_0_dart_0: iommu@702f00000 { @@ -1004,6 +1184,46 @@ role-switch-default-mode = "host"; iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>; power-domains = <&ps_atc0_usb>; + resets = <&atcphy0>; + phys = <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + }; + + atcphy0: phy@703000000 { + compatible = "apple,t8103-atcphy"; + reg = <0x7 0x03000000 0x0 0x50000>, + <0x7 0x00000000 0x0 0x4000>, + <0x7 0x02a90000 0x0 0x4000>, + <0x7 0x02a84000 0x0 0x4000>; + reg-names = "core", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells = <1>; + #reset-cells = <0>; + + nvmem-cells = <&atcphy0_aus_cmn_shm_vreg_trim>, + <&atcphy0_auspll_rodco_encap>, + <&atcphy0_auspll_rodco_bias_adjust>, + <&atcphy0_auspll_fracn_dll_start_capcode>, + <&atcphy0_auspll_dtc_vreg_adjust>, + <&atcphy0_cio3pll_dco_coarsebin0>, + <&atcphy0_cio3pll_dco_coarsebin1>, + <&atcphy0_cio3pll_dll_start_capcode>, + <&atcphy0_cio3pll_dtc_vreg_adjust>; + nvmem-cell-names = "aus_cmn_shm_vreg_trim", + "auspll_rodco_encap", + "auspll_rodco_bias_adjust", + "auspll_fracn_dll_start_capcode", + "auspll_dtc_vreg_adjust", + "cio3pll_dco_coarsebin0", + "cio3pll_dco_coarsebin1", + "cio3pll_dll_start_capcode", + "cio3pll_dtc_vreg_adjust"; + + orientation-switch; + mode-switch; + accessory; // TODO: this sounds wrong but is required for the mux + power-domains = <&ps_atc0_usb>; }; dwc3_1_dart_0: iommu@b02f00000 { @@ -1034,6 +1254,46 @@ role-switch-default-mode = "host"; iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>; power-domains = <&ps_atc1_usb>; + resets = <&atcphy1>; + phys = <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + }; + + atcphy1: phy@b03000000 { + compatible = "apple,t8103-atcphy"; + reg = <0xb 0x03000000 0x0 0x50000>, + <0xb 0x00000000 0x0 0x4000>, + <0xb 0x02a90000 0x0 0x4000>, + <0xb 0x02a84000 0x0 0x4000>; + reg-names = "core", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells = <1>; + #reset-cells = <0>; + + nvmem-cells = <&atcphy1_aus_cmn_shm_vreg_trim>, + <&atcphy1_auspll_rodco_encap>, + <&atcphy1_auspll_rodco_bias_adjust>, + <&atcphy1_auspll_fracn_dll_start_capcode>, + <&atcphy1_auspll_dtc_vreg_adjust>, + <&atcphy1_cio3pll_dco_coarsebin0>, + <&atcphy1_cio3pll_dco_coarsebin1>, + <&atcphy1_cio3pll_dll_start_capcode>, + <&atcphy1_cio3pll_dtc_vreg_adjust>; + nvmem-cell-names = "aus_cmn_shm_vreg_trim", + "auspll_rodco_encap", + "auspll_rodco_bias_adjust", + "auspll_fracn_dll_start_capcode", + "auspll_dtc_vreg_adjust", + "cio3pll_dco_coarsebin0", + "cio3pll_dco_coarsebin1", + "cio3pll_dll_start_capcode", + "cio3pll_dtc_vreg_adjust"; + + orientation-switch; + mode-switch; + accessory; // TODO: this sounds wrong but is required for the mux + power-domains = <&ps_atc1_usb>; }; dwc3_2_dart_0: iommu@f02f00000 { @@ -1064,6 +1324,46 @@ role-switch-default-mode = "host"; iommus = <&dwc3_2_dart_0 0>, <&dwc3_2_dart_1 1>; power-domains = <&ps_atc2_usb>; + resets = <&atcphy2>; + phys = <&atcphy2 PHY_TYPE_USB2>, <&atcphy2 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + }; + + atcphy2: phy@f03000000 { + compatible = "apple,t8103-atcphy"; + reg = <0xf 0x03000000 0x0 0x50000>, + <0xf 0x00000000 0x0 0x4000>, + <0xf 0x02a90000 0x0 0x4000>, + <0xf 0x02a84000 0x0 0x4000>; + reg-names = "core", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells = <1>; + #reset-cells = <0>; + + nvmem-cells = <&atcphy2_aus_cmn_shm_vreg_trim>, + <&atcphy2_auspll_rodco_encap>, + <&atcphy2_auspll_rodco_bias_adjust>, + <&atcphy2_auspll_fracn_dll_start_capcode>, + <&atcphy2_auspll_dtc_vreg_adjust>, + <&atcphy2_cio3pll_dco_coarsebin0>, + <&atcphy2_cio3pll_dco_coarsebin1>, + <&atcphy2_cio3pll_dll_start_capcode>, + <&atcphy2_cio3pll_dtc_vreg_adjust>; + nvmem-cell-names = "aus_cmn_shm_vreg_trim", + "auspll_rodco_encap", + "auspll_rodco_bias_adjust", + "auspll_fracn_dll_start_capcode", + "auspll_dtc_vreg_adjust", + "cio3pll_dco_coarsebin0", + "cio3pll_dco_coarsebin1", + "cio3pll_dll_start_capcode", + "cio3pll_dtc_vreg_adjust"; + + orientation-switch; + mode-switch; + accessory; // TODO: this sounds wrong but is required for the mux + power-domains = <&ps_atc2_usb>; }; dwc3_3_dart_0: iommu@1302f00000 { @@ -1094,6 +1394,46 @@ role-switch-default-mode = "host"; iommus = <&dwc3_3_dart_0 0>, <&dwc3_3_dart_1 1>; power-domains = <&ps_atc3_usb>; + resets = <&atcphy3>; + phys = <&atcphy3 PHY_TYPE_USB2>, <&atcphy3 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + }; + + atcphy3: phy@1303000000 { + compatible = "apple,t8103-atcphy"; + reg = <0x13 0x03000000 0x0 0x50000>, + <0x13 0x00000000 0x0 0x4000>, + <0x13 0x02a90000 0x0 0x4000>, + <0x13 0x02a84000 0x0 0x4000>; + reg-names = "core", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells = <1>; + #reset-cells = <0>; + + nvmem-cells = <&atcphy3_aus_cmn_shm_vreg_trim>, + <&atcphy3_auspll_rodco_encap>, + <&atcphy3_auspll_rodco_bias_adjust>, + <&atcphy3_auspll_fracn_dll_start_capcode>, + <&atcphy3_auspll_dtc_vreg_adjust>, + <&atcphy3_cio3pll_dco_coarsebin0>, + <&atcphy3_cio3pll_dco_coarsebin1>, + <&atcphy3_cio3pll_dll_start_capcode>, + <&atcphy3_cio3pll_dtc_vreg_adjust>; + nvmem-cell-names = "aus_cmn_shm_vreg_trim", + "auspll_rodco_encap", + "auspll_rodco_bias_adjust", + "auspll_fracn_dll_start_capcode", + "auspll_dtc_vreg_adjust", + "cio3pll_dco_coarsebin0", + "cio3pll_dco_coarsebin1", + "cio3pll_dll_start_capcode", + "cio3pll_dtc_vreg_adjust"; + + orientation-switch; + mode-switch; + accessory; // TODO: this sounds wrong but is required for the mux + power-domains = <&ps_atc3_usb>; }; dart_sio_0: iommu@39b004000 { diff --git a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi index 67d41472f6eb23..7faca52fb61031 100644 --- a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi @@ -13,6 +13,10 @@ aliases { serial0 = &serial0; wifi0 = &wifi0; + atcphy0 = &atcphy0; + atcphy1 = &atcphy1; + atcphy2 = &atcphy2; + atcphy3 = &atcphy3; }; chosen { @@ -65,6 +69,12 @@ remote-endpoint = <&typec0_usb_hs>; }; }; + port@1 { + reg = <1>; + typec0_con_ss: endpoint { + remote-endpoint = <&typec0_usb_ss>; + }; + }; }; }; }; @@ -91,6 +101,12 @@ remote-endpoint = <&typec1_usb_hs>; }; }; + port@1 { + reg = <1>; + typec1_con_ss: endpoint { + remote-endpoint = <&typec1_usb_ss>; + }; + }; }; }; }; @@ -117,6 +133,12 @@ remote-endpoint = <&typec2_usb_hs>; }; }; + port@1 { + reg = <1>; + typec2_con_ss: endpoint { + remote-endpoint = <&typec2_usb_ss>; + }; + }; }; }; }; @@ -281,6 +303,31 @@ }; }; +/* Type-C PHYs */ +&atcphy0 { + port { + typec0_usb_ss: endpoint { + remote-endpoint = <&typec0_con_ss>; + }; + }; +}; + +&atcphy1 { + port { + typec1_usb_ss: endpoint { + remote-endpoint = <&typec1_con_ss>; + }; + }; +}; + +&atcphy2 { + port { + typec2_usb_ss: endpoint { + remote-endpoint = <&typec2_con_ss>; + }; + }; +}; + /* ATC3 is used for DisplayPort -> HDMI only */ &dwc3_3_dart_0 { status = "disabled";