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Merge pull request #8 from DatumSystems/brmcc-driver
BRMCC Driver
2 parents 4b89d62 + 3ce9285 commit b7287c7

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1 file changed

+23
-22
lines changed

1 file changed

+23
-22
lines changed

drivers/uio/uio_dsi_mcc.c

Lines changed: 23 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -32,14 +32,17 @@
3232
#include <linux/of_platform.h>
3333
#include <linux/of_address.h>
3434

35+
#define RX_nTX_FLAG 0x80000000
36+
#define INTERRUPT_DISABLE 0x40000000
37+
#define RESET_RQST_CM4_TO_CA7 0x20000000
38+
#define RESET_RQST_CA7_TO_CM4 0x10000000
39+
3540
#define HWSPNLCK_TIMEOUT 1000 /* usec */
3641
#define DRIVER_NAME "uio_dsi_mcc"
3742

3843
struct uio_dsi_mcc_ctl {
39-
void __iomem *mcctx_ctl;
4044
void __iomem *mcctx_rd;
4145
void __iomem *mcctx_wr;
42-
void __iomem *mccrx_ctl;
4346
void __iomem *mccrx_rd;
4447
void __iomem *mccrx_wr;
4548
} __attribute__((packed));
@@ -112,13 +115,13 @@ static int uio_dsi_mcc_irqcontrol(struct uio_info *dev_info, s32 control)
112115
* 1 = disable cm4 rx interrupt and update rx rd offset if operation is rx
113116
* 0 = toggle cm4 tx interrupt and update tx wr offset if opeartion is tx
114117
* 1 = update tx wr offset only, no cm4 interrupt toggle.
115-
* 1 bit 1 = reset tx offsets (only if operation is tx)
116-
* 0 = nop
118+
* 1 bit 1 = reset request from CM4 to CA7
119+
* 1 bit 1 = reset reuest from CA& to CM4
117120
* 13 bits : spare
118121
* LSB: 16 bits : new tx or rx offset
119122
*/
120123

121-
if (control & 0x80000000) {
124+
if (control & RX_nTX_FLAG) {
122125
hwlock = priv->hwlock_rx;
123126
/* rx interrupt control*/
124127
if (hwlock) {
@@ -133,7 +136,7 @@ static int uio_dsi_mcc_irqcontrol(struct uio_info *dev_info, s32 control)
133136
/* update rd offset*/
134137
iowrite32(control & 0x0000ffff, priv->ctl.mccrx_rd);
135138
/* Clear rx interrupt if requested*/
136-
if (control & 0x40000000) {
139+
if (control & INTERRUPT_DISABLE) {
137140
if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
138141
disable_irq_nosync(dev_info->irq);
139142
} else {
@@ -153,16 +156,16 @@ static int uio_dsi_mcc_irqcontrol(struct uio_info *dev_info, s32 control)
153156
goto hwunlock;
154157
}
155158
}
156-
if (control & 0x20000000) // reset buffers
157-
{
158-
iowrite32(0x20000000, priv->ctl.mcctx_ctl);
159-
iowrite32(0x00000000, priv->ctl.mcctx_wr);
160-
iowrite32(0x00000000, priv->ctl.mcctx_rd);
159+
if (control & RESET_RQST_CA7_TO_CM4) {
160+
printk("uio-tx_brmcc: reset offsets\n");
161+
// reset buffers / CM4 reset reqeust flag
162+
iowrite32(RESET_RQST_CA7_TO_CM4, priv->ctl.mcctx_wr);
161163
} else {
162164
iowrite32(control & 0x0000ffff, priv->ctl.mcctx_wr);
165+
//printk("uio-tx_brmcc: update mcctx_wr=%d\n", ioread32( priv->ctl.mcctx_wr));
163166
}
164167
/* Set tx interrupt if requested */
165-
if (!(control & 0x40000000)) {
168+
if (!(control & INTERRUPT_DISABLE)) {
166169
// toggle irq pin for CM4
167170
gpiod_set_value(priv->tx_irq_gpio, 1);
168171
gpiod_set_value(priv->tx_irq_gpio, 0);
@@ -284,6 +287,7 @@ static int uio_dsi_mcc_probe(struct platform_device *pdev)
284287
dev_err(dev, "missing tx irq gpio\n");
285288
return -EINVAL;
286289
}
290+
gpiod_set_value(priv->tx_irq_gpio, 0);
287291
}
288292

289293
/* mcc-rx irq gpio */
@@ -343,18 +347,14 @@ static int uio_dsi_mcc_probe(struct platform_device *pdev)
343347
if (!strcmp(uiomem->name, "mcc-ctl")) {
344348
uiomem->internal_addr =
345349
ioremap_wc(uiomem->addr, uiomem->size);
346-
priv->ctl.mcctx_ctl =
347-
uiomem->internal_addr + 0 * sizeof(u32);
348350
priv->ctl.mcctx_rd =
349-
uiomem->internal_addr + 1 * sizeof(u32);
351+
uiomem->internal_addr + 0 * sizeof(u32);
350352
priv->ctl.mcctx_wr =
351-
uiomem->internal_addr + 2 * sizeof(u32);
352-
priv->ctl.mccrx_ctl =
353-
uiomem->internal_addr + 3 * sizeof(u32);
353+
uiomem->internal_addr + 1 * sizeof(u32);
354354
priv->ctl.mccrx_rd =
355-
uiomem->internal_addr + 4 * sizeof(u32);
355+
uiomem->internal_addr + 2 * sizeof(u32);
356356
priv->ctl.mccrx_wr =
357-
uiomem->internal_addr + 5 * sizeof(u32);
357+
uiomem->internal_addr + 3 * sizeof(u32);
358358
}
359359

360360
dev_dbg(dev,
@@ -448,8 +448,8 @@ int uio_dsi_mcc_tx_offsets(void *priv, int *rd_offset, int *wr_offset)
448448
ret = -1;
449449
goto hwunlock;
450450
}
451-
*rd_offset = ioread32(p->ctl.mcctx_rd);
452-
*wr_offset = ioread32(p->ctl.mcctx_wr);
451+
*rd_offset = ioread32(p->ctl.mcctx_rd) & 0xffff;
452+
*wr_offset = ioread32(p->ctl.mcctx_wr) & 0xffff;
453453

454454
hwunlock:
455455
if (hwlock)
@@ -514,5 +514,6 @@ module_platform_driver(uio_dsi_mcc);
514514

515515
MODULE_AUTHOR("Mark Carlin");
516516
MODULE_DESCRIPTION("Userspace I/O MCC platform driver with IRQ handling");
517+
MODULE_VERSION("0.0.1");
517518
MODULE_LICENSE("GPL v2");
518519
MODULE_ALIAS("platform:" DRIVER_NAME);

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