From 1c6d5b11ff435aa9bf6806a0395590287fa796d5 Mon Sep 17 00:00:00 2001 From: Oseltamivir Date: Wed, 29 Apr 2026 14:23:44 -0700 Subject: [PATCH 1/4] SGL DSV4 MI355x --- benchmarks/single_node/dsv4_fp8_mi355x.sh | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/benchmarks/single_node/dsv4_fp8_mi355x.sh b/benchmarks/single_node/dsv4_fp8_mi355x.sh index 971b18b6a..2bd9ac30d 100755 --- a/benchmarks/single_node/dsv4_fp8_mi355x.sh +++ b/benchmarks/single_node/dsv4_fp8_mi355x.sh @@ -17,6 +17,31 @@ fi hf download "$MODEL" +# Overlay sglang from the amd/deepseek_v4 branch on top of whatever the +# rocm/sgl-dev:deepseek-v4-mi35x image ships with. The image's sglang is +# moving fast and we want a reproducible pin per benchmark run. Bump +# SGL_PR_SHA when the branch advances. +SGL_PR_SHA="18afbf151a2992b06a089191769b299629ed73dd" +SGL_PR_DIR="/tmp/sglang-amd-dsv4" + +if [ ! -d "$SGL_PR_DIR/.git" ]; then + git clone --filter=blob:none https://github.com/sgl-project/sglang.git "$SGL_PR_DIR" +fi +( + cd "$SGL_PR_DIR" + git fetch --depth=1 origin "$SGL_PR_SHA" 2>/dev/null \ + || git fetch --depth=1 origin amd/deepseek_v4 + git checkout --force "$SGL_PR_SHA" + test "$(git rev-parse HEAD)" = "$SGL_PR_SHA" + + # Reinstall just the Python package; the image already has the ROCm + # kernel deps (aiter, triton, tilelang, torch) at versions matched to + # this branch, so --no-deps avoids pip resolving them against PyPI. + pip install --no-build-isolation --no-deps --force-reinstall -e python/ +) + +python3 -c "import sglang; print(f'sglang {sglang.__version__} from {sglang.__path__[0]}')" + # Transformers in the container doesn't recognize the `deepseek_v4` model_type. # PR #23608's fallback in hf_transformers_utils.get_config tries to handle this # by writing a patched config to /tmp, but in practice isn't catching the error From 6ebe53d8723e725b1e40d75f752fdeb8d1b25985 Mon Sep 17 00:00:00 2001 From: Oseltamivir Date: Wed, 29 Apr 2026 14:38:24 -0700 Subject: [PATCH 2/4] Bump dsv4-fp8-mi355x-sglang image, add FP4 sglang variant Switch the FP8 entry to rocm/sgl-dev:rocm720-deepseek-v4-mi35x (Apr 28 ROCm 7.2.0 image), aligned with the amd/deepseek_v4 SHA pinned by the overlay in dsv4_fp8_mi355x.sh. Add dsv4_fp4_mi355x_sglang.sh + dsv4-fp4-mi355x-sglang config entry, mirroring the branch's run_dsv4.sh FP4 path: SGLANG_DSV4_FP4_EXPERTS=True, SGLANG_FORCE_TRITON_MOE_FP8=0, model deepseek-ai/DeepSeek-V4-Pro. --- .github/configs/amd-master.yaml | 25 ++- .../single_node/dsv4_fp4_mi355x_sglang.sh | 147 ++++++++++++++++++ 2 files changed, 171 insertions(+), 1 deletion(-) create mode 100755 benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh diff --git a/.github/configs/amd-master.yaml b/.github/configs/amd-master.yaml index 1faf3682b..3a34a9c60 100644 --- a/.github/configs/amd-master.yaml +++ b/.github/configs/amd-master.yaml @@ -1497,7 +1497,7 @@ dsr1-fp4-mi355x-sglang-disagg-mtp: - "DECODE_MTP_SIZE=1" dsv4-fp8-mi355x-sglang: - image: rocm/sgl-dev:deepseek-v4-mi35x + image: rocm/sgl-dev:rocm720-deepseek-v4-mi35x model: sgl-project/DeepSeek-V4-Pro-FP8 model-prefix: dsv4 runner: mi355x @@ -1514,6 +1514,29 @@ dsv4-fp8-mi355x-sglang: search-space: - { tp: 8, conc-start: 4, conc-end: 64 } +# FP4-experts variant of dsv4-fp8-mi355x-sglang. Same image and sglang overlay +# (amd/deepseek_v4 branch pinned at runtime by dsv4_fp4_mi355x_sglang.sh); +# differs only in SGLANG_DSV4_FP4_EXPERTS=True / SGLANG_FORCE_TRITON_MOE_FP8=0 +# and uses the bf16 DeepSeek-V4-Pro checkpoint (FP4 quantization is applied +# at expert-runtime by sglang). +dsv4-fp4-mi355x-sglang: + image: rocm/sgl-dev:rocm720-deepseek-v4-mi35x + model: deepseek-ai/DeepSeek-V4-Pro + model-prefix: dsv4 + runner: mi355x + precision: fp4 + framework: sglang + multinode: false + seq-len-configs: + - isl: 1024 + osl: 1024 + search-space: + - { tp: 8, conc-start: 4, conc-end: 64 } + - isl: 8192 + osl: 1024 + search-space: + - { tp: 8, conc-start: 4, conc-end: 64 } + # vLLM with AITER MLA decode for DSv4 on MI355X (vllm-project/vllm#40889, # stacked on #40871). Uses the ATOM MI355X image (ROCm 7.2.2, aiter with # MLA decode, MI355X GPU detection); vLLM is rebuilt from the PR branch diff --git a/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh new file mode 100755 index 000000000..0e09ab2ec --- /dev/null +++ b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh @@ -0,0 +1,147 @@ +#!/usr/bin/env bash + +source "$(dirname "$0")/../benchmark_lib.sh" + +check_env_vars \ + MODEL \ + TP \ + CONC \ + ISL \ + OSL \ + RANDOM_RANGE_RATIO \ + RESULT_FILENAME + +if [[ -n "$SLURM_JOB_ID" ]]; then + echo "JOB $SLURM_JOB_ID running on $SLURMD_NODENAME" +fi + +hf download "$MODEL" + +# Overlay sglang from the amd/deepseek_v4 branch on top of whatever the +# rocm/sgl-dev:rocm720-deepseek-v4-mi35x image ships with. The image's sglang +# is moving fast and we want a reproducible pin per benchmark run. Bump +# SGL_PR_SHA when the branch advances. +SGL_PR_SHA="18afbf151a2992b06a089191769b299629ed73dd" +SGL_PR_DIR="/tmp/sglang-amd-dsv4" + +if [ ! -d "$SGL_PR_DIR/.git" ]; then + git clone --filter=blob:none https://github.com/sgl-project/sglang.git "$SGL_PR_DIR" +fi +( + cd "$SGL_PR_DIR" + git fetch --depth=1 origin "$SGL_PR_SHA" 2>/dev/null \ + || git fetch --depth=1 origin amd/deepseek_v4 + git checkout --force "$SGL_PR_SHA" + test "$(git rev-parse HEAD)" = "$SGL_PR_SHA" + + # Reinstall just the Python package; the image already has the ROCm + # kernel deps (aiter, triton, tilelang, torch) at versions matched to + # this branch, so --no-deps avoids pip resolving them against PyPI. + pip install --no-build-isolation --no-deps --force-reinstall -e python/ +) + +python3 -c "import sglang; print(f'sglang {sglang.__version__} from {sglang.__path__[0]}')" + +# Transformers in the container doesn't recognize the `deepseek_v4` model_type. +# PR #23608's fallback in hf_transformers_utils.get_config tries to handle this +# by writing a patched config to /tmp, but in practice isn't catching the error +# in this image. Patch the cached config.json directly instead: set model_type +# to `deepseek_v3` so AutoConfig.from_pretrained succeeds, and keep +# architectures=['DeepseekV4ForCausalLM'] so SGLang dispatches to its native +# DSv4 model class (python/sglang/srt/models/deepseek_v4.py). +python3 << PYEOF +import json +from huggingface_hub import hf_hub_download +path = hf_hub_download(repo_id="$MODEL", filename="config.json") +with open(path) as f: + config = json.load(f) +if config.get("model_type") == "deepseek_v4": + config["model_type"] = "deepseek_v3" + with open(path, "w") as f: + json.dump(config, f, indent=2) + print(f"Patched {path}: model_type deepseek_v4 -> deepseek_v3") +else: + print(f"No patch needed: model_type is {config.get('model_type')!r}") +PYEOF + +# DSv4-specific SGLang env vars (from sgl-project/sglang#23608). FP4-experts +# path mirrors python/run_dsv4.sh on the amd/deepseek_v4 branch: +# SGLANG_DSV4_FP4_EXPERTS=True -> route experts through the FP4 kernels +# SGLANG_FORCE_TRITON_MOE_FP8=0 -> required to apply swiglu_limit clamp in +# fused_moe_triton on the FP4 path +export SGLANG_OPT_USE_FUSED_COMPRESS=false +export SGLANG_OPT_USE_OLD_COMPRESSOR=true +export SGLANG_OPT_USE_TILELANG_SWA_PREPARE=false +export SGLANG_OPT_USE_JIT_KERNEL_FUSED_TOPK=false +export SGLANG_OPT_USE_FUSED_HASH_TOPK=false +export SGLANG_HACK_FLASHMLA_BACKEND=torch +export SGLANG_OPT_DEEPGEMM_HC_PRENORM=false +export SGLANG_OPT_USE_TILELANG_MHC_PRE=false +export SGLANG_OPT_USE_TILELANG_MHC_POST=false +export SGLANG_ENABLE_THINKING=1 +export SGLANG_USE_AITER=1 +export SGLANG_USE_ROCM700A=1 +export SGLANG_TOPK_TRANSFORM_512_TORCH=1 +export SGLANG_FP8_PAGED_MQA_LOGITS_TORCH=1 +export SGLANG_DSV4_FP4_EXPERTS=True +export SGLANG_OPT_DPSK_V4_RADIX=0 +export SGLANG_OPT_USE_OVERLAP_STORE_CACHE=false +export SGLANG_OPT_USE_FUSED_STORE_CACHE=false +export SGLANG_FORCE_TRITON_MOE_FP8=0 + +SERVER_LOG=/workspace/server.log +PORT=${PORT:-8888} + +EVAL_CONTEXT_ARGS="" +if [ "${EVAL_ONLY}" = "true" ]; then + setup_eval_context + EVAL_CONTEXT_ARGS="--context-length $EVAL_MAX_MODEL_LEN" +fi +# Start GPU monitoring (power, temperature, clocks every second) +start_gpu_monitor + +python3 -m sglang.launch_server \ + --model-path $MODEL \ + --host=0.0.0.0 \ + --port $PORT \ + --tensor-parallel-size $TP \ + --dp $TP \ + --enable-dp-attention \ + --trust-remote-code \ + --disable-radix-cache \ + --attention-backend compressed \ + --max-running-request 256 \ + --page-size 256 \ + --chunked-prefill-size 8192 \ + --disable-shared-experts-fusion \ + --disable-cuda-graph \ + --tool-call-parser deepseekv4 \ + --reasoning-parser deepseek-v4 \ + --watchdog-timeout 1800 $EVAL_CONTEXT_ARGS > $SERVER_LOG 2>&1 & + +SERVER_PID=$! + +# Wait for server to be ready +wait_for_server_ready --port "$PORT" --server-log "$SERVER_LOG" --server-pid "$SERVER_PID" + +run_benchmark_serving \ + --model "$MODEL" \ + --port "$PORT" \ + --backend vllm \ + --input-len "$ISL" \ + --output-len "$OSL" \ + --random-range-ratio "$RANDOM_RANGE_RATIO" \ + --num-prompts "$((CONC * 10))" \ + --max-concurrency "$CONC" \ + --result-filename "$RESULT_FILENAME" \ + --result-dir /workspace/ + +# After throughput, run evaluation only if RUN_EVAL is true +if [ "${RUN_EVAL}" = "true" ]; then + run_eval --framework lm-eval --port "$PORT" + append_lm_eval_summary +fi + +# Stop GPU monitoring +stop_gpu_monitor +set +x From c5a49ee25965d947cf70c769e32bf8c628362582 Mon Sep 17 00:00:00 2001 From: Oseltamivir Date: Wed, 29 Apr 2026 14:49:52 -0700 Subject: [PATCH 3/4] Align with branch run_dsv4.sh after FP4 Models commit; switch FP8 model Match the env vars in dsv4_fp{8,4}_mi355x.sh to the amd/deepseek_v4 branch's python/run_dsv4.sh at SHA 18afbf15: - Add SGLANG_REASONING_EFFORT=max to both scripts (was missing). - Set SGLANG_FORCE_TRITON_MOE_FP8=0 in the FP8 script. The FP4 Models integration commit (sgl-project/sglang@33de1e64, Apr 28) made this the gating switch for aiter MoE dispatch on both paths. Our FP8 script predates the flip (#1134) and was still pinning 1, which forced the triton MoE fallback. Switch dsv4-fp8-mi355x-sglang to deepseek-ai/DeepSeek-V4-Pro to match the canonical checkpoint loaded by every other DSv4 entry and by run_dsv4.sh. Drop the duplicate dsv4-fp8-mi355x-sglang perf-changelog stub left in the worktree (#1160 entry already exists earlier in the file); replace with a real entry covering this PR's image bump, env-var alignment, model swap, and new FP4 variant. --- .github/configs/amd-master.yaml | 2 +- benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh | 11 +++++++---- benchmarks/single_node/dsv4_fp8_mi355x.sh | 9 +++++++-- perf-changelog.yaml | 12 ++++++++++++ 4 files changed, 27 insertions(+), 7 deletions(-) diff --git a/.github/configs/amd-master.yaml b/.github/configs/amd-master.yaml index 3a34a9c60..418c07e3e 100644 --- a/.github/configs/amd-master.yaml +++ b/.github/configs/amd-master.yaml @@ -1498,7 +1498,7 @@ dsr1-fp4-mi355x-sglang-disagg-mtp: dsv4-fp8-mi355x-sglang: image: rocm/sgl-dev:rocm720-deepseek-v4-mi35x - model: sgl-project/DeepSeek-V4-Pro-FP8 + model: deepseek-ai/DeepSeek-V4-Pro model-prefix: dsv4 runner: mi355x precision: fp8 diff --git a/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh index 0e09ab2ec..439d1db12 100755 --- a/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh +++ b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh @@ -64,11 +64,14 @@ else: print(f"No patch needed: model_type is {config.get('model_type')!r}") PYEOF -# DSv4-specific SGLang env vars (from sgl-project/sglang#23608). FP4-experts -# path mirrors python/run_dsv4.sh on the amd/deepseek_v4 branch: +# DSv4 FP4-experts path. Mirrors the active path of python/run_dsv4.sh on +# the amd/deepseek_v4 branch at SGL_PR_SHA: # SGLANG_DSV4_FP4_EXPERTS=True -> route experts through the FP4 kernels -# SGLANG_FORCE_TRITON_MOE_FP8=0 -> required to apply swiglu_limit clamp in -# fused_moe_triton on the FP4 path +# SGLANG_FORCE_TRITON_MOE_FP8=0 -> dispatch MoE through aiter (gating +# switch added in commit 33de1e64); +# also enables swiglu_limit clamp in the +# triton MoE fallback path. +export SGLANG_REASONING_EFFORT=max export SGLANG_OPT_USE_FUSED_COMPRESS=false export SGLANG_OPT_USE_OLD_COMPRESSOR=true export SGLANG_OPT_USE_TILELANG_SWA_PREPARE=false diff --git a/benchmarks/single_node/dsv4_fp8_mi355x.sh b/benchmarks/single_node/dsv4_fp8_mi355x.sh index 2bd9ac30d..f53b27bee 100755 --- a/benchmarks/single_node/dsv4_fp8_mi355x.sh +++ b/benchmarks/single_node/dsv4_fp8_mi355x.sh @@ -64,7 +64,12 @@ else: print(f"No patch needed: model_type is {config.get('model_type')!r}") PYEOF -# DSv4-specific SGLang env vars (from sgl-project/sglang#23608) +# DSv4-specific SGLang env vars. Mirrors python/run_dsv4.sh on the +# amd/deepseek_v4 branch (commented FP8 path) at SGL_PR_SHA. The branch's +# FP4 Models integration commit (33de1e64) flipped SGLANG_FORCE_TRITON_MOE_FP8 +# from 1 to 0; with it set to 0, FP8 MoE dispatches through aiter (shuffled +# weights + aiter fused_moe) instead of the triton MoE fallback. +export SGLANG_REASONING_EFFORT=max export SGLANG_OPT_USE_FUSED_COMPRESS=false export SGLANG_OPT_USE_OLD_COMPRESSOR=true export SGLANG_OPT_USE_TILELANG_SWA_PREPARE=false @@ -83,7 +88,7 @@ export SGLANG_DSV4_FP4_EXPERTS=false export SGLANG_OPT_DPSK_V4_RADIX=0 export SGLANG_OPT_USE_OVERLAP_STORE_CACHE=false export SGLANG_OPT_USE_FUSED_STORE_CACHE=false -export SGLANG_FORCE_TRITON_MOE_FP8=1 +export SGLANG_FORCE_TRITON_MOE_FP8=0 SERVER_LOG=/workspace/server.log PORT=${PORT:-8888} diff --git a/perf-changelog.yaml b/perf-changelog.yaml index 422d5347f..34560c4f0 100644 --- a/perf-changelog.yaml +++ b/perf-changelog.yaml @@ -2006,3 +2006,15 @@ - "Change image to vllm/vllm-openai:v0.20.0-cu130" - "Use Mega MoE for DEP configs" pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/1221 + +- config-keys: + - dsv4-fp8-mi355x-sglang + - dsv4-fp4-mi355x-sglang + description: + - "Pin sglang at runtime to amd/deepseek_v4 branch SHA 18afbf15 via clone+reinstall in the benchmark scripts" + - "Bump dsv4-fp8-mi355x-sglang image to rocm/sgl-dev:rocm720-deepseek-v4-mi35x" + - "Switch dsv4-fp8-mi355x-sglang model from sgl-project/DeepSeek-V4-Pro-FP8 to deepseek-ai/DeepSeek-V4-Pro" + - "Set SGLANG_FORCE_TRITON_MOE_FP8=0 in dsv4_fp8_mi355x.sh so FP8 MoE dispatches through aiter (matches branch run_dsv4.sh after FP4 Models commit 33de1e64)" + - "Add SGLANG_REASONING_EFFORT=max to both scripts" + - "Add dsv4-fp4-mi355x-sglang variant: SGLANG_DSV4_FP4_EXPERTS=True, SGLANG_FORCE_TRITON_MOE_FP8=0, model deepseek-ai/DeepSeek-V4-Pro" + pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/1231 From 4a573fd2dbcafb55036197e14b0ec984073b2e55 Mon Sep 17 00:00:00 2001 From: Oseltamivir Date: Wed, 29 Apr 2026 15:58:55 -0700 Subject: [PATCH 4/4] Roll back to rocm700 image to dodge symmetric-memory crash rocm720-deepseek-v4-mi35x crashes on global_tokens.fill_(0) inside _dp_gather_via_all_reduce during forward_idle: torch.AcceleratorError: HIP error: invalid configuration argument File ".../layers/dp_attention.py", line 454, in _dp_gather_via_all_reduce global_tokens.fill_(0) global_tokens comes from get_global_dp_buffer(), which allocates inside use_symmetric_memory(). The SGLANG_USE_ROCM700A workaround only swaps the cuda-graph default padding mode to SUM_LEN; with --disable-cuda-graph we take the eager path and still allocate via symmetric memory, hitting the RCCL symmetric-memory bug the workaround was created for. Switch both dsv4-fp{8,4}-mi355x-sglang entries to v0.5.10.post1-rocm700-mi35x-20260428 (Apr 28 ROCm 7.0.0a tag) to keep the sglang overlay perf changes shippable. Revisit rocm720 once the WA is extended to cover eager mode or RCCL symm-mem lands. --- .github/configs/amd-master.yaml | 4 ++-- benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh | 9 ++++++--- benchmarks/single_node/dsv4_fp8_mi355x.sh | 9 ++++++--- perf-changelog.yaml | 2 +- 4 files changed, 15 insertions(+), 9 deletions(-) diff --git a/.github/configs/amd-master.yaml b/.github/configs/amd-master.yaml index 418c07e3e..3c6c7e815 100644 --- a/.github/configs/amd-master.yaml +++ b/.github/configs/amd-master.yaml @@ -1497,7 +1497,7 @@ dsr1-fp4-mi355x-sglang-disagg-mtp: - "DECODE_MTP_SIZE=1" dsv4-fp8-mi355x-sglang: - image: rocm/sgl-dev:rocm720-deepseek-v4-mi35x + image: rocm/sgl-dev:v0.5.10.post1-rocm700-mi35x-20260428 model: deepseek-ai/DeepSeek-V4-Pro model-prefix: dsv4 runner: mi355x @@ -1520,7 +1520,7 @@ dsv4-fp8-mi355x-sglang: # and uses the bf16 DeepSeek-V4-Pro checkpoint (FP4 quantization is applied # at expert-runtime by sglang). dsv4-fp4-mi355x-sglang: - image: rocm/sgl-dev:rocm720-deepseek-v4-mi35x + image: rocm/sgl-dev:v0.5.10.post1-rocm700-mi35x-20260428 model: deepseek-ai/DeepSeek-V4-Pro model-prefix: dsv4 runner: mi355x diff --git a/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh index 439d1db12..e6ed57b5c 100755 --- a/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh +++ b/benchmarks/single_node/dsv4_fp4_mi355x_sglang.sh @@ -18,9 +18,12 @@ fi hf download "$MODEL" # Overlay sglang from the amd/deepseek_v4 branch on top of whatever the -# rocm/sgl-dev:rocm720-deepseek-v4-mi35x image ships with. The image's sglang -# is moving fast and we want a reproducible pin per benchmark run. Bump -# SGL_PR_SHA when the branch advances. +# rocm/sgl-dev:v0.5.10.post1-rocm700-mi35x-20260428 image ships with. We +# stay on the rocm700 (ROCm 7.0.0a) line because rocm720 hit +# hipErrorInvalidConfiguration on use_symmetric_memory-allocated dp_attention +# buffers (RCCL symmetric-memory bug; SGLANG_USE_ROCM700A WA only covers the +# cuda-graph path, not eager mode that we use via --disable-cuda-graph). +# Bump SGL_PR_SHA when the branch advances. SGL_PR_SHA="18afbf151a2992b06a089191769b299629ed73dd" SGL_PR_DIR="/tmp/sglang-amd-dsv4" diff --git a/benchmarks/single_node/dsv4_fp8_mi355x.sh b/benchmarks/single_node/dsv4_fp8_mi355x.sh index f53b27bee..afb6d0fef 100755 --- a/benchmarks/single_node/dsv4_fp8_mi355x.sh +++ b/benchmarks/single_node/dsv4_fp8_mi355x.sh @@ -18,9 +18,12 @@ fi hf download "$MODEL" # Overlay sglang from the amd/deepseek_v4 branch on top of whatever the -# rocm/sgl-dev:deepseek-v4-mi35x image ships with. The image's sglang is -# moving fast and we want a reproducible pin per benchmark run. Bump -# SGL_PR_SHA when the branch advances. +# rocm/sgl-dev:v0.5.10.post1-rocm700-mi35x-20260428 image ships with. We +# stay on the rocm700 (ROCm 7.0.0a) line because rocm720 hit +# hipErrorInvalidConfiguration on use_symmetric_memory-allocated dp_attention +# buffers (RCCL symmetric-memory bug; SGLANG_USE_ROCM700A WA only covers the +# cuda-graph path, not eager mode that we use via --disable-cuda-graph). +# Bump SGL_PR_SHA when the branch advances. SGL_PR_SHA="18afbf151a2992b06a089191769b299629ed73dd" SGL_PR_DIR="/tmp/sglang-amd-dsv4" diff --git a/perf-changelog.yaml b/perf-changelog.yaml index 34560c4f0..85bca5bd0 100644 --- a/perf-changelog.yaml +++ b/perf-changelog.yaml @@ -2012,7 +2012,7 @@ - dsv4-fp4-mi355x-sglang description: - "Pin sglang at runtime to amd/deepseek_v4 branch SHA 18afbf15 via clone+reinstall in the benchmark scripts" - - "Bump dsv4-fp8-mi355x-sglang image to rocm/sgl-dev:rocm720-deepseek-v4-mi35x" + - "Bump dsv4-fp8-mi355x-sglang image to rocm/sgl-dev:v0.5.10.post1-rocm700-mi35x-20260428" - "Switch dsv4-fp8-mi355x-sglang model from sgl-project/DeepSeek-V4-Pro-FP8 to deepseek-ai/DeepSeek-V4-Pro" - "Set SGLANG_FORCE_TRITON_MOE_FP8=0 in dsv4_fp8_mi355x.sh so FP8 MoE dispatches through aiter (matches branch run_dsv4.sh after FP4 Models commit 33de1e64)" - "Add SGLANG_REASONING_EFFORT=max to both scripts"