From 40e7c08ffdb1b2d28f744f15649dfcf02f6ca6af Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 28 Sep 2021 12:00:18 +0200 Subject: [PATCH 1/4] Add Changelog --- document/core/appendix/changes.rst | 45 ++++++++++++++++--- .../core/appendix/gen-index-instructions.py | 4 +- document/core/appendix/index-instructions.rst | 4 +- document/core/syntax/instructions.rst | 19 ++++---- document/core/util/macros.def | 1 - 5 files changed, 53 insertions(+), 20 deletions(-) diff --git a/document/core/appendix/changes.rst b/document/core/appendix/changes.rst index 9488c188..13e1ad97 100644 --- a/document/core/appendix/changes.rst +++ b/document/core/appendix/changes.rst @@ -104,17 +104,52 @@ Added instructions that modify ranges of memory or table entries [#proposal-reft * Active data and element segments boundaries are no longer checked at compile time but may trap instead +.. index:: instructions, SIMD, value type, vector type + +Vector instructions +................... + +Added vector type and instructions that manipulate multiple numeric values in parallel (also known as _SIMD_, single instruction multiple data) [#proposal-vectype]_ + +* New :ref:`value type `: |V128| + +* New :ref:`memory instructions `: :math:`\K{v128.}\LOAD{}\!N\!\K{x}\!M\!\K{\_}\sx`, :math:`\K{v128.}\LOAD{}N\K{\_zero}`, :math:`\K{v128.}\LOAD{}N\K{\_splat}`, :math:`\K{v128.}\LOAD{}N\K{\_lane}`, :math:`\K{v128.}\STORE{}N\K{\_lane}` + +* New constant :ref:`vector instruction `: :math:`\K{v128.}\VCONST` + +* New unary :ref:`vector instructions `: :math:`\K{v128.not}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.abs}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.neg}`, :math:`\K{i8x16.popcnt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.abs}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.neg}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.sqrt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ceil}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.floor}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.trunc}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.nearest}` + +* New binary :ref:`vector instructions `: :math:`\K{v128.and}`, :math:`\K{v128.andnot}`, :math:`\K{v128.or}`, :math:`\K{v128.xor}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.add}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.sub}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.mul}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.add\_sat\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.sub\_sat\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.min\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.max\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.shl}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.shr\_}\sx`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.add}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.extmul\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i16x8.q15mulr\_sat\_s}`, :math:`\K{i32x4.dot\_i16x8\_s}`, :math:`\K{i16x8.extadd\_pairwise\_i8x16\_}\sx`, :math:`\K{i32x4.extadd\_pairwise\_i16x8\_}\sx`, :math:`\K{i8x16.avgr\_u}`, :math:`\K{i16x8.avgr\_u}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.sub}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.mul}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.div}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.min}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.max}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.pmin}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.pmax}` + +* New ternary :ref:`vector instruction `: :math:`\K{v128.bitselect}` + +* New test :ref:`vector instructions `: :math:`\K{v128.any\_true}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.all\_true}` + +* New relational :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.lt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.gt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.le\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ge\_}\sx`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.lt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.gt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.le}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ge}` + +* New lane :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extract\_lane\_}\sx^?`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.replace\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.extract\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.replace\_lane}` + +* New conversion :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extend\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f32x4\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f64x2\_}\sx\K{\_zero}`, :math:`\K{f32x4.convert\_i32x4\_}\sx`, :math:`\K{f32x4.demote\_f64x2\_zero}`, :math:`\K{f64x2.convert\_low\_i32x4\_}\sx`, :math:`\K{f64x2.promote\_low\_f32x4}` + +* New reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}`, :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` + +* New injection/projection :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.bitmask}` + + .. [#proposal-signext] - https://github.com/WebAssembly/spec/tree/master/proposals/sign-extension-ops/ + https://github.com/WebAssembly/spec/tree/main/proposals/sign-extension-ops/ .. [#proposal-cvtsat] - https://github.com/WebAssembly/spec/tree/master/proposals/nontrapping-float-to-int-conversion/ + https://github.com/WebAssembly/spec/tree/main/proposals/nontrapping-float-to-int-conversion/ .. [#proposal-multivalue] - https://github.com/WebAssembly/spec/tree/master/proposals/multi-value/ + https://github.com/WebAssembly/spec/tree/main/proposals/multi-value/ .. [#proposal-reftype] - https://github.com/WebAssembly/spec/tree/master/proposals/reference-types/ + https://github.com/WebAssembly/spec/tree/main/proposals/reference-types/ .. [#proposal-bulk] - https://github.com/WebAssembly/spec/tree/master/proposals/bulk-memory-operations/ + https://github.com/WebAssembly/spec/tree/main/proposals/bulk-memory-operations/ + +.. [#proposal-vectype] + https://github.com/WebAssembly/spec/tree/main/proposals/simd/ diff --git a/document/core/appendix/gen-index-instructions.py b/document/core/appendix/gen-index-instructions.py index cb427bcc..9e8dbb8c 100755 --- a/document/core/appendix/gen-index-instructions.py +++ b/document/core/appendix/gen-index-instructions.py @@ -569,8 +569,8 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F64X2.\VPMAX', r'\hex{FD}~~\hex{F7}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fpmax'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_s}', r'\hex{FD}~~\hex{F8}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\TRUNC\K{\_sat\_f32x4\_u}', r'\hex{FD}~~\hex{F9}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_s}', r'\hex{FD}~~\hex{FA}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), - Instruction(r'\F32X4.\CONVERT\K{\_i32x4\_u}', r'\hex{FD}~~\hex{FB}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), + Instruction(r'\F32X4.\VCONVERT\K{\_i32x4\_s}', r'\hex{FD}~~\hex{FA}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), + Instruction(r'\F32X4.\VCONVERT\K{\_i32x4\_u}', r'\hex{FD}~~\hex{FB}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_u'), Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}', r'\hex{FD}~~\hex{FC}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_s'), Instruction(r'\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}', r'\hex{FD}~~\hex{FD}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-trunc_sat_u'), Instruction(r'\F64X2.\VCONVERT\K{\_low\_i32x4\_s}', r'\hex{FD}~~\hex{FE}', r'[\V128] \to [\V128]', r'valid-vcvtop', r'exec-vcvtop', r'op-convert_s'), diff --git a/document/core/appendix/index-instructions.rst b/document/core/appendix/index-instructions.rst index 9f4a4ec3..0c43fe0f 100644 --- a/document/core/appendix/index-instructions.rst +++ b/document/core/appendix/index-instructions.rst @@ -517,8 +517,8 @@ Instruction Binary Opcode T :math:`\F64X2.\VPMAX` :math:`\hex{FD}~~\hex{F7}` :math:`[\V128~\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_s}` :math:`\hex{FD}~~\hex{F8}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\TRUNC\K{\_sat\_f32x4\_u}` :math:`\hex{FD}~~\hex{F9}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` -:math:`\F32X4.\CONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VCONVERT\K{\_i32x4\_s}` :math:`\hex{FD}~~\hex{FA}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` +:math:`\F32X4.\VCONVERT\K{\_i32x4\_u}` :math:`\hex{FD}~~\hex{FB}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_s\_zero}` :math:`\hex{FD}~~\hex{FC}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\I32X4.\VTRUNC\K{\_sat\_f64x2\_u\_zero}` :math:`\hex{FD}~~\hex{FD}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` :math:`\F64X2.\VCONVERT\K{\_low\_i32x4\_s}` :math:`\hex{FD}~~\hex{FE}` :math:`[\V128] \to [\V128]` :ref:`validation ` :ref:`execution `, :ref:`operator ` diff --git a/document/core/syntax/instructions.rst b/document/core/syntax/instructions.rst index 2096f12f..5b869b33 100644 --- a/document/core/syntax/instructions.rst +++ b/document/core/syntax/instructions.rst @@ -268,7 +268,7 @@ Vector instructions (also known as *SIMD* instructions, single data multiple val \K{i32x4.}\VTRUNC\K{\_sat\_f64x2\_}\sx\K{\_zero} \\&&|& \K{f32x4.}\VCONVERT\K{\_i32x4\_}\sx ~|~ \K{f32x4.}\VDEMOTE\K{\_f64x2\_zero} \\&&|& - \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}sx ~|~ + \K{f64x2.}\VCONVERT\K{\_low\_i32x4\_}\sx ~|~ \K{f64x2.}\VPROMOTE\K{\_low\_f32x4} \\&&|& \dots \\ \production{vector bitwise unary operator} & \vvunop &::=& @@ -312,8 +312,7 @@ Vector instructions (also known as *SIMD* instructions, single data multiple val \K{sub\_sat\_}\sx \\ \production{vector integer shift operator} & \vishiftop &::=& \K{shl} ~|~ - \K{shr\_s} ~|~ - \K{shr\_u} \\ + \K{shr\_}\sx \\ \production{vector floating-point unary operator} & \vfunop &::=& \K{abs} ~|~ \K{neg} ~|~ @@ -542,7 +541,7 @@ Instructions in this group are concerned with linear :ref:`memory `. \begin{array}{llcl} \production{memory immediate} & \memarg &::=& \{ \OFFSET~\u32, \ALIGN~\u32 \} \\ - \production{lane width} & \lanewidth &::=& + \production{lane width} & \X{ww} &::=& 8 ~|~ 16 ~|~ 32 ~|~ 64 \\ \production{instruction} & \instr &::=& \dots \\&&|& @@ -558,14 +557,14 @@ Instructions in this group are concerned with linear :ref:`memory `. \K{i}\X{nn}\K{.}\STORE\K{8}~\memarg ~|~ \K{i}\X{nn}\K{.}\STORE\K{16}~\memarg ~|~ \K{i64.}\STORE\K{32}~\memarg \\&&|& - \K{v128.}\LOAD\K{8x8}\_\sx~\memarg ~|~ - \K{v128.}\LOAD\K{16x4}\_\sx~\memarg ~|~ - \K{v128.}\LOAD\K{32x2}\_\sx~\memarg \\&&|& - \K{v128.}\LOAD\lanewidth\K{\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\K{8x8\_}\sx~\memarg ~|~ + \K{v128.}\LOAD\K{16x4\_}\sx~\memarg ~|~ + \K{v128.}\LOAD\K{32x2\_}\sx~\memarg \\&&|& \K{v128.}\LOAD\K{32\_zero}~\memarg ~|~ \K{v128.}\LOAD\K{64\_zero}~\memarg \\&&|& - \K{v128.}\LOAD\lanewidth\K{\_lane}~\memarg~\laneidx ~|~ - \K{v128.}\STORE\lanewidth\K{\_lane}~\memarg~\laneidx \\&&|& + \K{v128.}\LOAD\X{ww}\K{\_splat}~\memarg \\&&|& + \K{v128.}\LOAD\X{ww}\K{\_lane}~\memarg~\laneidx ~|~ + \K{v128.}\STORE\X{ww}\K{\_lane}~\memarg~\laneidx \\&&|& \MEMORYSIZE \\&&|& \MEMORYGROW \\&&|& \MEMORYFILL \\&&|& diff --git a/document/core/util/macros.def b/document/core/util/macros.def index 3a544809..f6a26fba 100644 --- a/document/core/util/macros.def +++ b/document/core/util/macros.def @@ -535,7 +535,6 @@ .. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}} .. |half| mathdef:: \xref{syntax/instructions}{syntax-half}{\X{half}} .. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}} -.. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}} .. |blocktype| mathdef:: \xref{syntax/instructions}{syntax-blocktype}{\X{blocktype}} From 507c4629581ed9f8e554a553356ef5a74b7eac14 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Tue, 28 Sep 2021 19:51:23 +0200 Subject: [PATCH 2/4] Comments --- document/core/appendix/changes.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/document/core/appendix/changes.rst b/document/core/appendix/changes.rst index 13e1ad97..b063ace7 100644 --- a/document/core/appendix/changes.rst +++ b/document/core/appendix/changes.rst @@ -109,11 +109,11 @@ Added instructions that modify ranges of memory or table entries [#proposal-reft Vector instructions ................... -Added vector type and instructions that manipulate multiple numeric values in parallel (also known as _SIMD_, single instruction multiple data) [#proposal-vectype]_ +Added vector type and instructions that manipulate multiple numeric values in parallel (also known as *SIMD*, single instruction multiple data) [#proposal-vectype]_ * New :ref:`value type `: |V128| -* New :ref:`memory instructions `: :math:`\K{v128.}\LOAD{}\!N\!\K{x}\!M\!\K{\_}\sx`, :math:`\K{v128.}\LOAD{}N\K{\_zero}`, :math:`\K{v128.}\LOAD{}N\K{\_splat}`, :math:`\K{v128.}\LOAD{}N\K{\_lane}`, :math:`\K{v128.}\STORE{}N\K{\_lane}` +* New :ref:`memory instructions `: :math:`\K{v128.}\LOAD`, :math:`\K{v128.}\LOAD{}\!N\!\K{x}\!M\!\K{\_}\sx`, :math:`\K{v128.}\LOAD{}N\K{\_zero}`, :math:`\K{v128.}\LOAD{}N\K{\_splat}`, :math:`\K{v128.}\LOAD{}N\K{\_lane}`, :math:`\K{v128.}\STORE`, :math:`\K{v128.}\STORE{}N\K{\_lane}` * New constant :ref:`vector instruction `: :math:`\K{v128.}\VCONST` From f8d4e739f186625497abb9272bda30d3825aefca Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 29 Sep 2021 09:11:50 +0200 Subject: [PATCH 3/4] Split narrow --- document/core/appendix/changes.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/document/core/appendix/changes.rst b/document/core/appendix/changes.rst index b063ace7..b3a2a59c 100644 --- a/document/core/appendix/changes.rst +++ b/document/core/appendix/changes.rst @@ -131,7 +131,9 @@ Added vector type and instructions that manipulate multiple numeric values in pa * New conversion :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extend\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f32x4\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f64x2\_}\sx\K{\_zero}`, :math:`\K{f32x4.convert\_i32x4\_}\sx`, :math:`\K{f32x4.demote\_f64x2\_zero}`, :math:`\K{f64x2.convert\_low\_i32x4\_}\sx`, :math:`\K{f64x2.promote\_low\_f32x4}` -* New reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}`, :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` +* New binary conversion :ref:`vector instructions `: :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` + +* New reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}` * New injection/projection :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.bitmask}` From d665f49bc5659f64c175dae77422b842c32b08e8 Mon Sep 17 00:00:00 2001 From: Andreas Rossberg Date: Wed, 29 Sep 2021 09:17:32 +0200 Subject: [PATCH 4/4] Regroup instructions --- document/core/appendix/changes.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/document/core/appendix/changes.rst b/document/core/appendix/changes.rst index b3a2a59c..66303ba2 100644 --- a/document/core/appendix/changes.rst +++ b/document/core/appendix/changes.rst @@ -127,13 +127,13 @@ Added vector type and instructions that manipulate multiple numeric values in pa * New relational :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.lt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.gt\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.le\_}\sx`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.ge\_}\sx`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.eq}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ne}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.lt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.gt}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.le}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.ge}` -* New lane :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extract\_lane\_}\sx^?`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.replace\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.extract\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.replace\_lane}` +* New conversion :ref:`vector instructions `::math:`\K{i32x4.trunc\_sat\_f32x4\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f64x2\_}\sx\K{\_zero}`, :math:`\K{f32x4.convert\_i32x4\_}\sx`, :math:`\K{f32x4.demote\_f64x2\_zero}`, :math:`\K{f64x2.convert\_low\_i32x4\_}\sx`, :math:`\K{f64x2.promote\_low\_f32x4}` -* New conversion :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extend\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f32x4\_}\sx`, :math:`\K{i32x4.trunc\_sat\_f64x2\_}\sx\K{\_zero}`, :math:`\K{f32x4.convert\_i32x4\_}\sx`, :math:`\K{f32x4.demote\_f64x2\_zero}`, :math:`\K{f64x2.convert\_low\_i32x4\_}\sx`, :math:`\K{f64x2.promote\_low\_f32x4}` +* New lane access :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extract\_lane\_}\sx^?`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.replace\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.extract\_lane}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.replace\_lane}` -* New binary conversion :ref:`vector instructions `: :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` +* New lane splitting/combining :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.extend\_}\half\K{\_i}\!N'\!\K{x}\!M'\!\K{\_}\sx`, :math:`\K{i8x16.narrow\_i16x8\_}\sx`, :math:`\K{i16x8.narrow\_i32x4\_}\sx` -* New reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}` +* New byte reordering :ref:`vector instructions `: :math:`\K{i8x16.shuffle}`, :math:`\K{i8x16.swizzle}` * New injection/projection :ref:`vector instructions `: :math:`\K{i}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{f}\!N\!\K{x}\!M\!\K{.splat}`, :math:`\K{i}\!N\!\K{x}\!M\!\K{.bitmask}`