From f297e412195ece4c4b18daa5bb61021ac4f4a640 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 12 Dec 2019 16:22:39 -0800 Subject: [PATCH 1/5] imxrt:gpio Support readback on OUT GPIO imxrt:gpio ran through nxstyle --- arch/arm/src/imxrt/imxrt_gpio.c | 66 ++++++++++++++++++++++++++------- 1 file changed, 52 insertions(+), 14 deletions(-) diff --git a/arch/arm/src/imxrt/imxrt_gpio.c b/arch/arm/src/imxrt/imxrt_gpio.c index 35951e3e78099..fe103d4f5c91b 100644 --- a/arch/arm/src/imxrt/imxrt_gpio.c +++ b/arch/arm/src/imxrt/imxrt_gpio.c @@ -102,7 +102,8 @@ static const uint8_t g_gpio1_padmux[IMXRT_GPIO_NPINS] = IMXRT_PADMUX_GPIO_AD_B1_15_INDEX /* GPIO1 Pin 31 */ }; -#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x)) +#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT106x)) static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] = { IMXRT_PADMUX_GPIO_B0_00_INDEX, /* GPIO2 Pin 0 */ @@ -185,7 +186,8 @@ static const uint8_t g_gpio2_padmux[IMXRT_GPIO_NPINS] = # error "Unrecognised IMXRT family member" #endif -#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x)) +#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT106x)) static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] = { IMXRT_PADMUX_GPIO_SD_B1_00_INDEX, /* GPIO3 Pin 0 */ @@ -265,7 +267,8 @@ static const uint8_t g_gpio3_padmux[IMXRT_GPIO_NPINS] = }; #endif -#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x)) +#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT106x)) static const uint8_t g_gpio4_padmux[IMXRT_GPIO_NPINS] = { IMXRT_PADMUX_GPIO_EMC_00_INDEX, /* GPIO4 Pin 0 */ @@ -350,7 +353,8 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] = g_gpio1_padmux, /* GPIO1 */ g_gpio2_padmux, /* GPIO2 */ g_gpio3_padmux, /* GPIO3 */ -#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x)) +#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT106x)) g_gpio4_padmux, /* GPIO4 */ #else NULL, /* GPIO4 doesn't exist on 102x */ @@ -365,9 +369,9 @@ static FAR const uint8_t *g_gpio_padmux[IMXRT_GPIO_NPORTS + 1] = NULL /* End of list */ }; -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ /* Look-up table that maps GPIO1..GPIOn indexes into GPIO register base addresses */ @@ -381,7 +385,8 @@ uintptr_t g_gpio_base[IMXRT_GPIO_NPORTS] = , IMXRT_GPIO3_BASE #endif #if IMXRT_GPIO_NPORTS > 3 -#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || defined(CONFIG_ARCH_FAMILY_IMXRT106x)) +#if (defined(CONFIG_ARCH_FAMILY_IMXRT105x) || \ + defined(CONFIG_ARCH_FAMILY_IMXRT106x)) , IMXRT_GPIO4_BASE #else , 0 @@ -419,6 +424,7 @@ static uintptr_t imxrt_padmux_address(unsigned int index) { return (IMXRT_PAD1MUX_OFFSET(index - IMXRT_PADMUX_GPIO_SPI_B0_00_INDEX)); } + #endif if (index >= IMXRT_PADMUX_WAKEUP_INDEX) { @@ -439,6 +445,7 @@ static uintptr_t imxrt_padctl_address(unsigned int index) { return (IMXRT_PAD1CTL_OFFSET(index - IMXRT_PADCTL_GPIO_SPI_B0_00_INDEX)); } + #endif if (index >= IMXRT_PADCTL_WAKEUP_INDEX) { @@ -492,6 +499,19 @@ static void imxrt_gpio_setoutput(int port, int pin, bool value) putreg32(regval, regaddr); } +/**************************************************************************** + * Name: imxrt_gpio_getpin_status + ****************************************************************************/ + +static inline bool imxrt_gpio_get_pinstatus(int port, int pin) +{ + uintptr_t regaddr = IMXRT_GPIO_PSR(port); + uint32_t regval; + + regval = getreg32(regaddr); + return ((regval & GPIO_PIN(pin)) != 0); +} + /**************************************************************************** * Name: imxrt_gpio_getinput ****************************************************************************/ @@ -546,6 +566,7 @@ static inline int imxrt_gpio_select(int port, int pin) regaddr |= gpr * sizeof(uint32_t); modifyreg32(regaddr, clearbits, setbits); } + #endif return OK; } @@ -562,6 +583,7 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset) iomux_pinset_t ioset; uintptr_t regaddr; unsigned int index; + uint32_t sion = 0; DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS); @@ -582,8 +604,15 @@ static int imxrt_gpio_configinput(gpio_pinset_t pinset) { return -EINVAL; } + regaddr = imxrt_padmux_address(index); - putreg32(PADMUX_MUXMODE_ALT5, regaddr); + + if ((pinset & GPIO_OUTPUT) == GPIO_OUTPUT) + { + sion |= (pinset & GPIO_SION_MASK) ? PADMUX_SION : 0; + } + + putreg32(PADMUX_MUXMODE_ALT5 | sion, regaddr); imxrt_gpio_select(port, pin); @@ -742,13 +771,13 @@ int imxrt_config_gpio(gpio_pinset_t pinset) return ret; } -/************************************************************************************ +/**************************************************************************** * Name: imxrt_gpio_write * * Description: * Write one or zero to the selected GPIO pin * - ************************************************************************************/ + ****************************************************************************/ void imxrt_gpio_write(gpio_pinset_t pinset, bool value) { @@ -763,13 +792,13 @@ void imxrt_gpio_write(gpio_pinset_t pinset, bool value) leave_critical_section(flags); } -/************************************************************************************ +/**************************************************************************** * Name: imxrt_gpio_read * * Description: * Read one or zero from the selected GPIO pin * - ************************************************************************************/ + ****************************************************************************/ bool imxrt_gpio_read(gpio_pinset_t pinset) { @@ -781,7 +810,16 @@ bool imxrt_gpio_read(gpio_pinset_t pinset) DEBUGASSERT((unsigned int)port < IMXRT_GPIO_NPORTS); flags = enter_critical_section(); - value = imxrt_gpio_getinput(port, pin); - leave_critical_section(flags); + if ((pinset & (GPIO_OUTPUT | GPIO_SION_ENABLE)) == + (GPIO_OUTPUT | GPIO_SION_ENABLE)) + { + value = imxrt_gpio_get_pinstatus(port, pin); + } + else + { + value = imxrt_gpio_getinput(port, pin); + } + + leave_critical_section(flags); return value; } From 9ebeaa1d53680afed84670480d2c0c0a18340b53 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 12 Dec 2019 16:23:38 -0800 Subject: [PATCH 2/5] imxrt:lpi2c imxrt_lpi2c_reset uses GPIO with SION Reworked imxrt_lpi2c_reset to use GPIO because the IO can not be mapped from a peripheral to a GPIO with simple bit logic. --- arch/arm/src/imxrt/imxrt_lpi2c.c | 199 ++++++++++++++++--------------- 1 file changed, 102 insertions(+), 97 deletions(-) diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 03f4b85d77d94..11a523a1c1676 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -130,16 +130,6 @@ #define LPI2C_MASTER 1 #define LPI2C_SLAVE 2 -#define MKI2C_OUTPUT(p) (((p) & GPIO_PADMUX_MASK) | \ - IOMUX_OPENDRAIN | IOMUX_DRIVE_33OHM | \ - IOMUX_SLEW_SLOW | (5 << GPIO_ALT_SHIFT) | \ - IOMUX_PULL_NONE | GPIO_OUTPUT_ONE) - -#define MKI2C_INPUT(p) (((p) & GPIO_PADMUX_MASK) | \ - IOMUX_DRIVE_HIZ | IOMUX_SLEW_SLOW | \ - IOMUX_CMOS_INPUT | (5 << GPIO_ALT_SHIFT) | \ - IOMUX_PULL_NONE) - /**************************************************************************** * Private Types ****************************************************************************/ @@ -186,8 +176,12 @@ struct imxrt_lpi2c_config_s uint16_t busy_idle; /* LPI2C Bus Idle Timeout */ uint8_t filtscl; /* Glitch Filter for SCL pin */ uint8_t filtsda; /* Glitch Filter for SDA pin */ - uint32_t scl_pin; /* GPIO configuration for SCL as SCL */ - uint32_t sda_pin; /* GPIO configuration for SDA as SDA */ + uint32_t scl_pin; /* Peripheral configuration for SCL as SCL */ + uint32_t sda_pin; /* Peripheral configuration for SDA as SDA */ +#if defined(CONFIG_I2C_RESET) + uint32_t reset_scl_pin; /* GPIO configuration for SCL as SCL */ + uint32_t reset_sda_pin; /* GPIO configuration for SDA as SDA */ +#endif uint8_t mode; /* Master or Slave mode */ #ifndef CONFIG_I2C_POLLED uint32_t irq; /* Event IRQ */ @@ -318,136 +312,152 @@ static const struct i2c_ops_s imxrt_lpi2c_ops = #ifdef CONFIG_IMXRT_LPI2C1 static const struct imxrt_lpi2c_config_s imxrt_lpi2c1_config = { - .base = IMXRT_LPI2C1_BASE, - .busy_idle = CONFIG_LPI2C1_BUSYIDLE, - .filtscl = CONFIG_LPI2C1_FILTSCL, - .filtsda = CONFIG_LPI2C1_FILTSDA, - .scl_pin = GPIO_LPI2C1_SCL, - .sda_pin = GPIO_LPI2C1_SDA, + .base = IMXRT_LPI2C1_BASE, + .busy_idle = CONFIG_LPI2C1_BUSYIDLE, + .filtscl = CONFIG_LPI2C1_FILTSCL, + .filtsda = CONFIG_LPI2C1_FILTSDA, + .scl_pin = GPIO_LPI2C1_SCL, + .sda_pin = GPIO_LPI2C1_SDA, +#if defined(CONFIG_I2C_RESET) + .reset_scl_pin = GPIO_LPI2C1_SCL_RESET, + .reset_sda_pin = GPIO_LPI2C1_SDA_RESET, +#endif #ifndef CONFIG_I2C_SLAVE - .mode = LPI2C_MASTER, + .mode = LPI2C_MASTER, #else - .mode = LPI2C_SLAVE, + .mode = LPI2C_SLAVE, #endif #ifndef CONFIG_I2C_POLLED - .irq = IMXRT_IRQ_LPI2C1, + .irq = IMXRT_IRQ_LPI2C1, #endif }; static struct imxrt_lpi2c_priv_s imxrt_lpi2c1_priv = { - .ops = &imxrt_lpi2c_ops, - .config = &imxrt_lpi2c1_config, - .refs = 0, - .intstate = INTSTATE_IDLE, - .msgc = 0, - .msgv = NULL, - .ptr = NULL, - .dcnt = 0, - .flags = 0, - .status = 0 + .ops = &imxrt_lpi2c_ops, + .config = &imxrt_lpi2c1_config, + .refs = 0, + .intstate = INTSTATE_IDLE, + .msgc = 0, + .msgv = NULL, + .ptr = NULL, + .dcnt = 0, + .flags = 0, + .status = 0 }; #endif #ifdef CONFIG_IMXRT_LPI2C2 static const struct imxrt_lpi2c_config_s imxrt_lpi2c2_config = { - .base = IMXRT_LPI2C2_BASE, - .busy_idle = CONFIG_LPI2C2_BUSYIDLE, - .filtscl = CONFIG_LPI2C2_FILTSCL, - .filtsda = CONFIG_LPI2C2_FILTSDA, - .scl_pin = GPIO_LPI2C2_SCL, - .sda_pin = GPIO_LPI2C2_SDA, + .base = IMXRT_LPI2C2_BASE, + .busy_idle = CONFIG_LPI2C2_BUSYIDLE, + .filtscl = CONFIG_LPI2C2_FILTSCL, + .filtsda = CONFIG_LPI2C2_FILTSDA, + .scl_pin = GPIO_LPI2C2_SCL, + .sda_pin = GPIO_LPI2C2_SDA, +#if defined(CONFIG_I2C_RESET) + .reset_scl_pin = GPIO_LPI2C2_SCL_RESET, + .reset_sda_pin = GPIO_LPI2C2_SDA_RESET, +#endif #ifndef CONFIG_I2C_SLAVE - .mode = LPI2C_MASTER, + .mode = LPI2C_MASTER, #else - .mode = LPI2C_SLAVE, + .mode = LPI2C_SLAVE, #endif #ifndef CONFIG_I2C_POLLED - .irq = IMXRT_IRQ_LPI2C2, + .irq = IMXRT_IRQ_LPI2C2, #endif }; static struct imxrt_lpi2c_priv_s imxrt_lpi2c2_priv = { - .ops = &imxrt_lpi2c_ops, - .config = &imxrt_lpi2c2_config, - .refs = 0, - .intstate = INTSTATE_IDLE, - .msgc = 0, - .msgv = NULL, - .ptr = NULL, - .dcnt = 0, - .flags = 0, - .status = 0 + .ops = &imxrt_lpi2c_ops, + .config = &imxrt_lpi2c2_config, + .refs = 0, + .intstate = INTSTATE_IDLE, + .msgc = 0, + .msgv = NULL, + .ptr = NULL, + .dcnt = 0, + .flags = 0, + .status = 0 }; #endif #ifdef CONFIG_IMXRT_LPI2C3 static const struct imxrt_lpi2c_config_s imxrt_lpi2c3_config = { - .base = IMXRT_LPI2C3_BASE, - .busy_idle = CONFIG_LPI2C3_BUSYIDLE, - .filtscl = CONFIG_LPI2C3_FILTSCL, - .filtsda = CONFIG_LPI2C3_FILTSDA, - .scl_pin = GPIO_LPI2C3_SCL, - .sda_pin = GPIO_LPI2C3_SDA, + .base = IMXRT_LPI2C3_BASE, + .busy_idle = CONFIG_LPI2C3_BUSYIDLE, + .filtscl = CONFIG_LPI2C3_FILTSCL, + .filtsda = CONFIG_LPI2C3_FILTSDA, + .scl_pin = GPIO_LPI2C3_SCL, + .sda_pin = GPIO_LPI2C3_SDA, +#if defined(CONFIG_I2C_RESET) + .reset_scl_pin = GPIO_LPI2C3_SCL_RESET, + .reset_sda_pin = GPIO_LPI2C3_SDA_RESET, +#endif #ifndef CONFIG_I2C_SLAVE - .mode = LPI2C_MASTER, + .mode = LPI2C_MASTER, #else - .mode = LPI2C_SLAVE, + .mode = LPI2C_SLAVE, #endif #ifndef CONFIG_I2C_POLLED - .irq = IMXRT_IRQ_LPI2C3, + .irq = IMXRT_IRQ_LPI2C3, #endif }; static struct imxrt_lpi2c_priv_s imxrt_lpi2c3_priv = { - .ops = &imxrt_lpi2c_ops, - .config = &imxrt_lpi2c3_config, - .refs = 0, - .intstate = INTSTATE_IDLE, - .msgc = 0, - .msgv = NULL, - .ptr = NULL, - .dcnt = 0, - .flags = 0, - .status = 0 + .ops = &imxrt_lpi2c_ops, + .config = &imxrt_lpi2c3_config, + .refs = 0, + .intstate = INTSTATE_IDLE, + .msgc = 0, + .msgv = NULL, + .ptr = NULL, + .dcnt = 0, + .flags = 0, + .status = 0 }; #endif #ifdef CONFIG_IMXRT_LPI2C4 static const struct imxrt_lpi2c_config_s imxrt_lpi2c4_config = { - .base = IMXRT_LPI2C4_BASE, - .busy_idle = CONFIG_LPI2C4_BUSYIDLE, - .filtscl = CONFIG_LPI2C4_FILTSCL, - .filtsda = CONFIG_LPI2C4_FILTSDA, - .scl_pin = GPIO_LPI2C4_SCL, - .sda_pin = GPIO_LPI2C4_SDA, + .base = IMXRT_LPI2C4_BASE, + .busy_idle = CONFIG_LPI2C4_BUSYIDLE, + .filtscl = CONFIG_LPI2C4_FILTSCL, + .filtsda = CONFIG_LPI2C4_FILTSDA, + .scl_pin = GPIO_LPI2C4_SCL, + .sda_pin = GPIO_LPI2C4_SDA, +#if defined(CONFIG_I2C_RESET) + .reset_scl_pin = GPIO_LPI2C4_SCL_RESET, + .reset_sda_pin = GPIO_LPI2C4_SDA_RESET, +#endif #ifndef CONFIG_I2C_SLAVE - .mode = LPI2C_MASTER, + .mode = LPI2C_MASTER, #else - .mode = LPI2C_SLAVE, + .mode = LPI2C_SLAVE, #endif #ifndef CONFIG_I2C_POLLED - .irq = IMXRT_IRQ_LPI2C4, + .irq = IMXRT_IRQ_LPI2C4, #endif }; static struct imxrt_lpi2c_priv_s imxrt_lpi2c4_priv = { - .ops = &imxrt_lpi2c_ops, - .config = &imxrt_lpi2c4_config, - .refs = 0, - .intstate = INTSTATE_IDLE, - .msgc = 0, - .msgv = NULL, - .ptr = NULL, - .dcnt = 0, - .flags = 0, - .status = 0 + .ops = &imxrt_lpi2c_ops, + .config = &imxrt_lpi2c4_config, + .refs = 0, + .intstate = INTSTATE_IDLE, + .msgc = 0, + .msgv = NULL, + .ptr = NULL, + .dcnt = 0, + .flags = 0, + .status = 0 }; #endif @@ -1298,8 +1308,8 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) { if (priv->msgc > 0 && priv->msgv != NULL) { - priv->ptr = priv->msgv->buffer; - priv->dcnt = priv->msgv->length; + priv->ptr = priv->msgv->buffer; + priv->dcnt = priv->msgv->length; priv->flags = priv->msgv->flags; if ((priv->msgv->flags & I2C_M_NOSTART) == 0) @@ -1754,8 +1764,8 @@ static int imxrt_lpi2c_reset(FAR struct i2c_master_s *dev) /* Use GPIO configuration to un-wedge the bus */ - scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin); - sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin); + scl_gpio = priv->config->reset_scl_pin | GPIO_SION_ENABLE; + sda_gpio = priv->config->reset_sda_pin | GPIO_SION_ENABLE; imxrt_config_gpio(scl_gpio); imxrt_config_gpio(sda_gpio); @@ -1818,11 +1828,6 @@ static int imxrt_lpi2c_reset(FAR struct i2c_master_s *dev) imxrt_gpio_write(sda_gpio, 1); up_udelay(10); - /* Revert the GPIO configuration. */ - - sda_gpio = MKI2C_INPUT(sda_gpio); - scl_gpio = MKI2C_INPUT(scl_gpio); - imxrt_config_gpio(sda_gpio); imxrt_config_gpio(scl_gpio); From 0050ba9ac7e4cfef2b3a0f7a8d8b03c9774447ed Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 12 Dec 2019 16:27:21 -0800 Subject: [PATCH 3/5] imxrt:lpi2c ensure that on an error status reflects it. After an error the STOP detect was overwriting the previous error status. --- arch/arm/src/imxrt/imxrt_lpi2c.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 11a523a1c1676..2a90c165e8141 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -1364,6 +1364,10 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) #ifndef CONFIG_I2C_POLLED if (priv->intstate == INTSTATE_WAITING) { + /* Update Status once at the end */ + + priv->status = status; + /* inform the thread that transfer is complete * and wake it up */ @@ -1372,6 +1376,7 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) priv->intstate = INTSTATE_DONE; } #else + priv->status = status; priv->intstate = INTSTATE_DONE; #endif /* Mark that this transaction stopped */ @@ -1412,6 +1417,10 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) #ifndef CONFIG_I2C_POLLED if (priv->intstate == INTSTATE_WAITING) { + /* Update Status once at the end */ + + priv->status = status; + /* inform the thread that transfer is complete * and wake it up */ @@ -1420,11 +1429,11 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) priv->intstate = INTSTATE_DONE; } #else + priv->status = status; priv->intstate = INTSTATE_DONE; #endif } - priv->status = status; return OK; } From 3dcd238d5e81b7f2ba987e32d5623cd1d89aa446 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 12 Dec 2019 16:29:42 -0800 Subject: [PATCH 4/5] imxrt:lpi2c Fix interrupt storm on failed write. The SDF was not acked if ther was an error on the last write. --- arch/arm/src/imxrt/imxrt_lpi2c.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 2a90c165e8141..20c0f8032fd4a 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -1245,11 +1245,17 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) imxrt_lpi2c_tracenew(priv, status); - /* Continue with either sending or reading data */ + /* After an error we can get an SDF */ + + if (priv->intstate == INTSTATE_DONE && (status & LPI2C_MSR_SDF) != 0) + { + imxrt_lpi2c_traceevent(priv, I2CEVENT_STOP, 0); + imxrt_lpi2c_putreg(priv, IMXRT_LPI2C_MSR_OFFSET, LPI2C_MSR_SDF); + } /* Check if there is more bytes to send */ - if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0) + else if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0) { if (priv->dcnt > 0) { From 9b7afcdfe51bff99c35780d8cd1389ace8fc9318 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 13 Dec 2019 14:06:49 -0800 Subject: [PATCH 5/5] imxrt106x:pinout add ALT 8 GPIO_GPT2_COMPARE3 & fix GPIO_GPT1_CAPTURE[1|2] --- arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h b/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h index 2e00ddbf6fdf9..add5479e97742 100644 --- a/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h +++ b/arch/arm/src/imxrt/hardware/rt106x/imxrt106x_pinmux.h @@ -521,9 +521,9 @@ /* General Purpose Timer (GPT) */ #define GPIO_GPT1_CAPTURE1_1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_24_INDEX)) -#define GPIO_GPT1_CAPTURE1_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_05_INDEX)) +#define GPIO_GPT1_CAPTURE1_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_05_INDEX)) #define GPIO_GPT1_CAPTURE2_1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_23_INDEX)) -#define GPIO_GPT1_CAPTURE2_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_06_INDEX)) +#define GPIO_GPT1_CAPTURE2_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_06_INDEX)) #define GPIO_GPT1_CLK_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_13_INDEX)) #define GPIO_GPT1_COMPARE1_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_35_INDEX)) #define GPIO_GPT1_COMPARE2_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_36_INDEX)) @@ -534,6 +534,7 @@ #define GPIO_GPT2_CLK_1 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_09_INDEX)) #define GPIO_GPT2_COMPARE2_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_07_INDEX)) #define GPIO_GPT2_COMPARE3_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_08_INDEX)) +#define GPIO_GPT2_COMPARE3_2 (GPIO_PERIPH | GPIO_ALT8 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_07_INDEX)) /* JTAG */