From ebbc4315fcc4cb8ac71e88dd2096279bbf45146f Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Tue, 5 Nov 2024 15:51:28 -0600 Subject: [PATCH 01/46] feat:add port for cygnet (STM32L433) --- ports/stm/boards/STM32L433_boot.ld | 38 ++++ ports/stm/boards/STM32L433_default.ld | 33 ++++ ports/stm/boards/STM32L4R5_default.ld | 2 +- ports/stm/boards/cygnet/board.c | 75 ++++++++ ports/stm/boards/cygnet/board.h | 12 ++ ports/stm/boards/cygnet/mpconfigboard.h | 47 +++++ ports/stm/boards/cygnet/mpconfigboard.mk | 58 ++++++ ports/stm/boards/cygnet/pins.c | 108 +++++++++++ .../stm/boards/cygnet/tests/analog_output.py | 85 +++++++++ .../stm/boards/cygnet/tests/board_voltage.py | 146 +++++++++++++++ ports/stm/boards/cygnet/tests/button.py | 22 +++ ports/stm/boards/cygnet/tests/enable_3v3.py | 35 ++++ ports/stm/boards/cygnet/tests/i2c_scan.py | 20 +++ ports/stm/boards/cygnet/tests/pwnio.py | 17 ++ .../cygnet/tests/spi_bme680_smoke_test.py | 58 ++++++ ports/stm/boards/cygnet/tests/uart.py | 37 ++++ ports/stm/boards/cygnet/tests/urandom.py | 10 ++ ports/stm/common-hal/microcontroller/Pin.c | 2 + ports/stm/packages/LQFP48.c | 63 +++++++ ports/stm/peripherals/periph.h | 29 +-- ports/stm/peripherals/pins.h | 23 +-- ports/stm/peripherals/stm32l4/clocks.c | 12 ++ .../peripherals/stm32l4/stm32l433xx/clocks.h | 49 +++++ .../peripherals/stm32l4/stm32l433xx/gpio.c | 27 +++ .../peripherals/stm32l4/stm32l433xx/periph.c | 167 ++++++++++++++++++ .../peripherals/stm32l4/stm32l433xx/periph.h | 56 ++++++ .../peripherals/stm32l4/stm32l433xx/pins.c | 95 ++++++++++ .../peripherals/stm32l4/stm32l433xx/pins.h | 107 +++++++++++ ports/stm/supervisor/internal_flash.c | 15 +- ports/stm/supervisor/internal_flash.h | 8 +- ports/stm/supervisor/usb.c | 6 +- 31 files changed, 1434 insertions(+), 28 deletions(-) create mode 100644 ports/stm/boards/STM32L433_boot.ld create mode 100644 ports/stm/boards/STM32L433_default.ld create mode 100644 ports/stm/boards/cygnet/board.c create mode 100644 ports/stm/boards/cygnet/board.h create mode 100644 ports/stm/boards/cygnet/mpconfigboard.h create mode 100644 ports/stm/boards/cygnet/mpconfigboard.mk create mode 100644 ports/stm/boards/cygnet/pins.c create mode 100644 ports/stm/boards/cygnet/tests/analog_output.py create mode 100644 ports/stm/boards/cygnet/tests/board_voltage.py create mode 100644 ports/stm/boards/cygnet/tests/button.py create mode 100644 ports/stm/boards/cygnet/tests/enable_3v3.py create mode 100644 ports/stm/boards/cygnet/tests/i2c_scan.py create mode 100644 ports/stm/boards/cygnet/tests/pwnio.py create mode 100644 ports/stm/boards/cygnet/tests/spi_bme680_smoke_test.py create mode 100644 ports/stm/boards/cygnet/tests/uart.py create mode 100644 ports/stm/boards/cygnet/tests/urandom.py create mode 100644 ports/stm/packages/LQFP48.c create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/periph.c create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/periph.h create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/pins.c create mode 100644 ports/stm/peripherals/stm32l4/stm32l433xx/pins.h diff --git a/ports/stm/boards/STM32L433_boot.ld b/ports/stm/boards/STM32L433_boot.ld new file mode 100644 index 0000000000000..8169eadebe11d --- /dev/null +++ b/ports/stm/boards/STM32L433_boot.ld @@ -0,0 +1,38 @@ +/* + GNU linker script for STM32L433 with bootloader +*/ + +/* Specify the memory areas */ +/* +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 4K + FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 156K-64K-4K + FLASH_FS (rw) : ORIGIN = 0x08027000, LENGTH = 88K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K +} +*/ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 1024K-128K-64K-4K /* For now, limit to 1MB so that bank switching is still possible. */ + FLASH_FS (rw) : ORIGIN = 0x08100000, LENGTH = 1024K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K +} + + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 24K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/STM32L433_default.ld b/ports/stm/boards/STM32L433_default.ld new file mode 100644 index 0000000000000..23454521bb9f8 --- /dev/null +++ b/ports/stm/boards/STM32L433_default.ld @@ -0,0 +1,33 @@ +/* + GNU linker script for STM32L433 with filesystem +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ + /* + FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 60K + FLASH_FS (rw) : ORIGIN = 0x08010000, LENGTH = 60K + */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 4K + FLASH_FS (rw) : ORIGIN = 0x08004000, LENGTH = 60K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 24K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +/* ensure the firmware is within bounds */ +ASSERT ( (ORIGIN(FLASH_FIRMWARE) + LENGTH(FLASH_FIRMWARE)) <= (ORIGIN(FLASH)+LENGTH(FLASH)), "FLASH_FIRMWARE out of bounds" ); diff --git a/ports/stm/boards/STM32L4R5_default.ld b/ports/stm/boards/STM32L4R5_default.ld index 1bffcee04ed65..b58db53b37696 100644 --- a/ports/stm/boards/STM32L4R5_default.ld +++ b/ports/stm/boards/STM32L4R5_default.ld @@ -16,7 +16,7 @@ MEMORY _minimum_stack_size = 24K; _minimum_heap_size = 16K; -/* Define tho top end of the stack. The stack is full descending so begins just +/* Define the top end of the stack. The stack is full descending so begins just above last byte of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ _estack = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/cygnet/board.c b/ports/stm/boards/cygnet/board.c new file mode 100644 index 0000000000000..80875e8375841 --- /dev/null +++ b/ports/stm/boards/cygnet/board.c @@ -0,0 +1,75 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "supervisor/board.h" +#include "mpconfigboard.h" + +#include "stm32l4xx.h" +#include "stm32l433xx.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/digitalio/Direction.h" +#include "shared-bindings/digitalio/DriveMode.h" +#include "board.h" + +digitalio_digitalinout_obj_t power_pin = { .base.type = &digitalio_digitalinout_type }; +digitalio_digitalinout_obj_t discharge_pin = { .base.type = &digitalio_digitalinout_type }; + +void initialize_discharge_pin(void) { + + /* Initialize the 3V3 discharge to be OFF and the output power to be ON */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + + + common_hal_digitalio_digitalinout_construct(&power_pin, &pin_PE04); + common_hal_digitalio_digitalinout_construct(&discharge_pin, &pin_PE06); + common_hal_digitalio_digitalinout_never_reset(&power_pin); + common_hal_digitalio_digitalinout_never_reset(&discharge_pin); + + GPIO_InitTypeDef GPIO_InitStruct; + /* Set the DISCHARGE pin and the USB_DETECT pin to FLOAT */ + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Pin = GPIO_PIN_6; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); /* PE6 DISCHRG */ + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); /* PC6 is USB_DETECT */ + + /* Turn on the 3V3 regulator */ + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + GPIO_InitStruct.Pin = GPIO_PIN_4; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_SET); + +} + +void board_init(void) { + // enable the debugger while sleeping. Todo move somewhere more central (kind of generally useful in a debug build) + SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); + + // Set tick interrupt priority, default HAL value is intentionally invalid + // Without this, USB does not function. + HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); + + __HAL_RCC_GPIOE_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + GPIO_InitStruct.Pin = GPIO_PIN_2; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET); + HAL_Delay(50); + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET); +} + +void reset_board(void) { + initialize_discharge_pin(); +} + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/stm/boards/cygnet/board.h b/ports/stm/boards/cygnet/board.h new file mode 100644 index 0000000000000..ce199359ba496 --- /dev/null +++ b/ports/stm/boards/cygnet/board.h @@ -0,0 +1,12 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "common-hal/digitalio/DigitalInOut.h" + +extern digitalio_digitalinout_obj_t power_pin; +extern digitalio_digitalinout_obj_t discharge_pin; diff --git a/ports/stm/boards/cygnet/mpconfigboard.h b/ports/stm/boards/cygnet/mpconfigboard.h new file mode 100644 index 0000000000000..f3b1fcc2eb72c --- /dev/null +++ b/ports/stm/boards/cygnet/mpconfigboard.h @@ -0,0 +1,47 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Blues Wireless Contributors. +// +// SPDX-License-Identifier: MIT + +#pragma once + +// Micropython setup + +#define MICROPY_HW_BOARD_NAME "Cygnet" +#define MICROPY_HW_MCU_NAME "STM32L433CCT6" + +#define MICROPY_PY_SYS_PLATFORM MICROPY_HW_BOARD_NAME + +#define STM32L433XX +#define BOARD_CYGNET + +#define LSE_VALUE ((uint32_t)32768) +#define BOARD_HAS_LOW_SPEED_CRYSTAL (1) +#define BOARD_HAS_HIGH_SPEED_CRYSTAL (0) + +// Increase drive strength of 32kHz external crystal, in line with calculations specified in ST AN2867 sections 3.3, 3.4, and STM32L4 datasheet DS12023 Table 58. LSE oscillator characteristics. +// The drive strength RCC_LSEDRIVE_LOW is marginal for the 32kHz crystal oscillator stability, and RCC_LSEDRIVE_MEDIUMLOW meets the calculated drive strength with a small margin for parasitic capacitance. +#define BOARD_LSE_DRIVE_LEVEL RCC_LSEDRIVE_MEDIUMLOW + +// Bootloader only +#ifdef UF2_BOOTLOADER_ENABLED + #define BOARD_VTOR_DEFER (1) // Leave VTOR relocation to bootloader +#endif + +#define BOARD_NO_VBUS_SENSE (1) +#define BOARD_NO_USB_OTG_ID_SENSE (1) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +#define DEFAULT_SPI_BUS_SS (&pin_PB08) +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB05) +#define DEFAULT_SPI_BUS_MISO (&pin_PB06) + +#define DEFAULT_UART_BUS_RX (&pin_PA10) +#define DEFAULT_UART_BUS_TX (&pin_PA09) + +#define CYGNET_DISCHARGE_3V3 (&pin_PH01) +#define CYGNET_ENABLE_3V3 (&pin_PH00) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk new file mode 100644 index 0000000000000..fa0516a5a3aad --- /dev/null +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -0,0 +1,58 @@ +USB_VID = 0x30A4 +USB_PID = 0x03 +USB_PRODUCT = "Cygnet" +USB_MANUFACTURER = "Blues Inc." + +MCU_SERIES = L4 +MCU_VARIANT = STM32L433xx +MCU_PACKAGE = LQFP48 + +LD_COMMON = boards/common_default.ld +LD_DEFAULT = boards/STM32L433_default.ld +# UF2 boot option +LD_BOOT = boards/STM32L433_boot.ld +UF2_OFFSET = 0x8010000 +UF2_BOOTLOADER ?= 1 +CIRCUITPY_BUILD_EXTENSIONS = bin,uf2 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +CIRCUITPY_ALARM = 0 +CIRCUITPY_ANALOGIO = 1 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_AUDIOBUSIO_I2SOUT = 0 +CIRCUITPY_AUDIOBUSIO_PDMIN = 0 +CIRCUITPY_AUDIOPWMIO = 0 +CIRCUITPY_BITBANGIO = 1 +CIRCUITPY_BLEIO = 0 +CIRCUITPY_BLEIO_HCI = 0 +CIRCUITPY_BUSDEVICE = 0 +CIRCUITPY_BUSIO = 1 +CIRCUITPY_CANIO = 0 +CIRCUITPY_DIGITALIO = 1 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_ENABLE_MPY_NATIVE = 1 +CIRCUITPY_I2CTARGET = 0 +CIRCUITPY_KEYPAD = 0 +CIRCUITPY_MICROCONTROLLER = 1 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_OS = 1 +CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_PULSEIO = 1 +CIRCUITPY_PWMIO = 1 +CIRCUITPY_RANDOM = 1 +CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 +CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_RTC = 1 +CIRCUITPY_SDCARDIO = 0 +CIRCUITPY_STORAGE = 1 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_UDB_CDC = 1 +CIRCUITPY_ULAB = 1 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_USB_MSC = 1 +CIRCUITPY_USB_VENDOR = 1 diff --git a/ports/stm/boards/cygnet/pins.c b/ports/stm/boards/cygnet/pins.c new file mode 100644 index 0000000000000..ed392adc75d31 --- /dev/null +++ b/ports/stm/boards/cygnet/pins.c @@ -0,0 +1,108 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +// +// SPDX-License-Identifier: MIT + +#include "py/objtuple.h" +#include "shared-bindings/board/__init__.h" +#include "board.h" + +// extended pins +static const mp_rom_map_elem_t board_module_carrier_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PE01) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_EN), MP_ROM_PTR(&pin_PH00) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB14) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, +}; + +MP_DEFINE_CONST_DICT(board_module_carrier, board_module_carrier_table); + +MP_DEFINE_CONST_OBJ_TYPE( + carrier_type, + MP_QSTR_Ext, + MP_TYPE_FLAG_NONE, + locals_dict, &board_module_carrier + ); + + +// Core Feather Pins +static const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + { MP_ROM_QSTR(MP_QSTR_ext), MP_ROM_PTR(&carrier_type) }, + + { MP_ROM_QSTR(MP_QSTR_ENABLE_3V3), &power_pin }, + { MP_ROM_QSTR(MP_QSTR_DISCHARGE_3V3), &discharge_pin }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_USR), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB02) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PE01) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB04) }, // ADC, PWM, DAC2 output also + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, // PWM + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, // PWM + + { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA04) }, // D10 + { MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_PA05) }, // D13 + + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA09) }, // ADC, PWM + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA10) }, // PWM + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/cygnet/tests/analog_output.py b/ports/stm/boards/cygnet/tests/analog_output.py new file mode 100644 index 0000000000000..6af931e65d6fa --- /dev/null +++ b/ports/stm/boards/cygnet/tests/analog_output.py @@ -0,0 +1,85 @@ +import board +import analogio +import digitalio + + +def test_dac_analog(p_in, p_out): + print(f"Running dac analog test with pin {p_in} as input and {p_out} as output\n") + pin_in = analogio.AnalogIn(p_in) + pin_out = analogio.AnalogOut(p_out) + + for v in range(0, 65536, 4096): + pin_out.value = v + print(f"Value {v} read as {pin_in.value}") + + pin_in.deinit() + pin_out.deinit() + + +def test_dac_digital(p_in, p_out): + print(f"Running dac digital test with pin {p_in} as input and {p_out} as output") + pin_in = digitalio.DigitalInOut(p_in) + pin_out = analogio.AnalogOut(p_out) + + for v in range(0, 65536, 4096): + pin_out.value = v + print(f"Value {v} read as {pin_in.value}") + + pin_in.deinit() + pin_out.deinit() + + +def test_dual(pair1, pair2): + # verifies that the DACs can be set independently + print(f"Running pair test\n") + pin1_in = analogio.AnalogIn(pair1[0]) + pin1_out = analogio.AnalogOut(pair1[1]) + pin2_in = analogio.AnalogIn(pair2[0]) + pin2_out = analogio.AnalogOut(pair2[1]) + + for v in range(0, 65536, 4096): + v2 = 65535 - v + pin1_out.value = v + pin2_out.value = v2 + print(f"Pair1: Value {v} read as {pin1_in.value}") + print(f"Pair2: Value {v2} read as {pin2_in.value}") + + pin1_in.deinit() + pin1_out.deinit() + pin2_in.deinit() + pin2_out.deinit() + + +def test_analog_hilo(p_in, p_out): + print(f"Running analog hilo test with pin {p_in} as input and {p_out} as output") + pin_in = analogio.AnalogIn(p_in) + pin_out = digitalio.DigitalInOut(p_out) + pin_out.switch_to_output() + + for v in (False, True, False, True): + pin_out.value = v + print(f"Value {v} read as {pin_in.value}") + + pin_in.deinit() + pin_out.deinit() + + +def test_pair(pair): + # FIXME: test_analog_hilo works fine alone, but fails when the other dac functions are executed + test_analog_hilo(*pair) + test_dac_analog(*pair) + test_dac_digital(*pair) + + +def main(): + pair1 = (board.A3, board.DAC1) + pair2 = (board.A2, board.DAC2) + print("running DAC1 tests") + test_pair(pair1) + print("running DAC2 tests") + test_pair(pair2) + print("running dual DAC tests") + test_dual(pair1, pair2) + + +main() diff --git a/ports/stm/boards/cygnet/tests/board_voltage.py b/ports/stm/boards/cygnet/tests/board_voltage.py new file mode 100644 index 0000000000000..2cb0ad4cc0f87 --- /dev/null +++ b/ports/stm/boards/cygnet/tests/board_voltage.py @@ -0,0 +1,146 @@ +# SPDX-FileCopyrightText: 2018 Shawn Hymel for Adafruit Industries +# +# SPDX-License-Identifier: MIT + +print("pins test") + +""" +`adafruit_boardtest.boardtest_gpio` +==================================================== +Toggles all available GPIO on a board. Verify their operation with an LED, +multimeter, another microcontroller, etc. + +Run this script as its own main.py to individually run the test, or compile +with mpy-cross and call from separate test script. + +* Author(s): Shawn Hymel for Adafruit Industries + +Implementation Notes +-------------------- + +**Software and Dependencies:** + +* Adafruit CircuitPython firmware for the supported boards: + https://github.com/adafruit/circuitpython/releases + +""" + +import time + +import board +import digitalio +import supervisor + +__version__ = "0.0.0-auto.0" +__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_BoardTest.git" + +# Constants +LED_ON_DELAY_TIME = 0.2 # Seconds +LED_OFF_DELAY_TIME = 0.2 # Seconds +LED_PIN_NAMES = ["L", "LED", "RED_LED", "GREEN_LED", "BLUE_LED"] + +# Test result strings +PASS = "PASS" +FAIL = "FAIL" +NA = "N/A" + + +# Determine if given value is a number +def _is_number(val): + try: + float(val) + return True + except ValueError: + return False + + +# Release pins +def _deinit_pins(gpios): + for g in gpios: + g.deinit() + + +# Toggle IO pins while waiting for answer +def _toggle_wait(pin_gpios): + timestamp = time.monotonic() + led_state = False + failed = [] + for pg in pin_gpios: + (pin, gpio) = pg + print("Is pin %s toggling? [y/n]" % pin) + done = False + while not done: + if led_state: + if time.monotonic() > timestamp + LED_ON_DELAY_TIME: + led_state = False + timestamp = time.monotonic() + else: + if time.monotonic() > timestamp + LED_OFF_DELAY_TIME: + led_state = True + timestamp = time.monotonic() + + gpio.value = led_state + if supervisor.runtime.serial_bytes_available: + answer = input() + if bool(answer == "y"): + done = True + elif bool(answer == "n"): + failed += pin + done = True + return failed + + +def buildPin(pin): + gpio = digitalio.DigitalInOut(pin) + return gpio + + +def run_test(pins): + """ + Toggles all available GPIO on and off repeatedly. + + :param list[str] pins: list of pins to run the test on + :return: tuple(str, list[str]): test result followed by list of pins tested + """ + + # Create a list of analog GPIO pins + analog_pins = [p for p in pins if p[0] == "A" and _is_number(p[1])] + + # Create a list of digital GPIO + digital_pins = [p for p in pins if p[0] == "D" and _is_number(p[1])] + + # Toggle LEDs if we find any + gpio_pins = analog_pins + digital_pins + + if gpio_pins: + # Print out the LEDs found + print("GPIO pins found:", end=" ") + for pin in gpio_pins: + print(pin, end=" ") + print("\n") + + # Create a list of IO objects for us to toggle + gpios = [buildPin(getattr(board, p)) for p in gpio_pins] + + print("built GPIOs") + # Set all IO to output + for gpio in gpios: + gpio.direction = digitalio.Direction.OUTPUT + + # Toggle pins while waiting for user to verify LEDs blinking + result = _toggle_wait(zip(gpio_pins, gpios)) + + # Release pins + _deinit_pins(gpios) + + if result: + return FAIL, gpio_pins + + return PASS, gpio_pins + + # Else (no pins found) + print("No GPIO pins found") + return NA, [] + + +run_test([p for p in dir(board)]) diff --git a/ports/stm/boards/cygnet/tests/button.py b/ports/stm/boards/cygnet/tests/button.py new file mode 100644 index 0000000000000..4f00254ddb6dd --- /dev/null +++ b/ports/stm/boards/cygnet/tests/button.py @@ -0,0 +1,22 @@ +import board +import digitalio +import time + + +def monitor_button(pin, callback): + with digitalio.DigitalInOut(pin) as button: + newstate = not button.value # state is inverted + state = not newstate # ensure change reported to start with + while callback(newstate, newstate != state): + state = newstate + newstate = button.value + time.sleep(0.01) + + +def print_changes(state, changed): + if changed: + print(f"button pressed {state}") + return True + + +monitor_button(board.BUTTON_USR, print_changes) diff --git a/ports/stm/boards/cygnet/tests/enable_3v3.py b/ports/stm/boards/cygnet/tests/enable_3v3.py new file mode 100644 index 0000000000000..c32bbc58b80ec --- /dev/null +++ b/ports/stm/boards/cygnet/tests/enable_3v3.py @@ -0,0 +1,35 @@ +# Background: I have a Swan R5 board running circuit python +# And I import the "board" module +import board +import digitalio +import supervisor +import time + +# Scenario: Enable 3V3 pin definition +# Then the symbol "board.ENABLE_3V3" is defined +assert board.ENABLE_3V3 is not None + +# Scenario: Discharge 3V3 definition +# Then the symbol "board.DISCHARGE_3V3" is defined +assert board.DISCHARGE_3V3 is not None +# And the symbol "board.DISABLE_DISCHARGING" is defined to be "True" +assert board.DISABLE_DISCHARGING is not None and board.DISABLE_DISCHARGING == True +# And the symbol "board.ENABLE_DISCHARGING" is defined to be "False" +assert board.ENABLE_DISCHARGING is not None and board.ENABLE_DISCHARGING == False + +# Scenario: Toggle ENBLE_3V3 +# Given I have a LED connected between the 3V3 and GND pins +# And ENABLE_3V3 is configured for output +_3v3 = digitalio.DigitalInOut(board.ENABLE_3V3) +_3v3.direction = digitalio.Direction.OUTPUT +# When I run code to toggle the pin at 0.5Hz +# Then I see the LED switch on and off at 0.5Hz +print("Toggling 3V3. Press a key to stop.") + +while not supervisor.runtime.serial_bytes_available: + _3v3.value = True + time.sleep(1.0) + _3v3.value = False + time.sleep(1.0) + +print("Toggling stopped.") diff --git a/ports/stm/boards/cygnet/tests/i2c_scan.py b/ports/stm/boards/cygnet/tests/i2c_scan.py new file mode 100644 index 0000000000000..8e3ef557d136b --- /dev/null +++ b/ports/stm/boards/cygnet/tests/i2c_scan.py @@ -0,0 +1,20 @@ +import board +import busio + +i2c = busio.I2C(board.SCL, board.SDA) +count = 0 + +# Wait for I2C lock +while not i2c.try_lock(): + pass + +# Scan for devices on the I2C bus +print("Scanning I2C bus") +for x in i2c.scan(): + print(hex(x)) + count += 1 + +print("%d device(s) found on I2C bus" % count) + +# Release the I2C bus +i2c.unlock() diff --git a/ports/stm/boards/cygnet/tests/pwnio.py b/ports/stm/boards/cygnet/tests/pwnio.py new file mode 100644 index 0000000000000..71888d867b8e2 --- /dev/null +++ b/ports/stm/boards/cygnet/tests/pwnio.py @@ -0,0 +1,17 @@ +import time +import pwmio + + +def fade(pin): + led = pwmio.PWMOut(pin, frequency=5000, duty_cycle=0) + # LED setup for QT Py M0: + # led = pwmio.PWMOut(board.SCK, frequency=5000, duty_cycle=0) + + while True: + for i in range(100): + # PWM LED up and down + if i < 50: + led.duty_cycle = int(i * 2 * 65535 / 100) # Up + else: + led.duty_cycle = 65535 - int((i - 50) * 2 * 65535 / 100) # Down + time.sleep(0.01) diff --git a/ports/stm/boards/cygnet/tests/spi_bme680_smoke_test.py b/ports/stm/boards/cygnet/tests/spi_bme680_smoke_test.py new file mode 100644 index 0000000000000..01e98bfd31b27 --- /dev/null +++ b/ports/stm/boards/cygnet/tests/spi_bme680_smoke_test.py @@ -0,0 +1,58 @@ +import board +import busio +import digitalio + +cs = digitalio.DigitalInOut(board.SS) +cs.direction = digitalio.Direction.OUTPUT +cs.value = True + +BME680_SPI_REGISTER = 0x73 +BME680_CHIPID_REGISTER = 0xD0 +BME680_CHIPID = 0x61 +SPI_HERZ = 0x500000 + +spi = busio.SPI(board.SCK, MISO=board.MISO, MOSI=board.MOSI) + + +def readByte(addr): + value = -1 + while not spi.try_lock(): + pass + try: + spi.configure(baudrate=500000, phase=0, polarity=0) + + cs.value = False + result = bytearray(1) + result[0] = addr | 0x80 + spi.write(result) + spi.readinto(result) + value = result[0] + return value + finally: + spi.unlock() + cs.value = True + + +def writeByte(addr, value): + while not spi.try_lock(): + pass + try: + spi.configure(baudrate=500000, phase=0, polarity=0) + + cs.value = False + result = bytearray(2) + result[0] = addr & ~0x80 + result[1] = value + spi.write(result) + finally: + spi.unlock() + + +# put the device in the correct mode to read the ID +reg = readByte(BME680_SPI_REGISTER) +if (reg & 16) != 0: + writeByte(BME680_SPI_REGISTER, reg & ~16) + +id = readByte(BME680_CHIPID_REGISTER) + +print(f"id is {id}, expected {BME680_CHIPID}") diff --git a/ports/stm/boards/cygnet/tests/uart.py b/ports/stm/boards/cygnet/tests/uart.py new file mode 100644 index 0000000000000..a8dbc272a8998 --- /dev/null +++ b/ports/stm/boards/cygnet/tests/uart.py @@ -0,0 +1,37 @@ +import board +import busio +import digitalio +import usb_cdc +import time + +while not usb_cdc.console.in_waiting: + time.sleep(0.1) + +print("USART test") + +# For most CircuitPython boards: +led = digitalio.DigitalInOut(board.LED) +# For QT Py M0: +# led = digitalio.DigitalInOut(board.SCK) +led.direction = digitalio.Direction.OUTPUT + +uart = busio.UART(board.TX, board.RX, baudrate=9600) + +while True: + data = uart.read(32) # read up to 32 bytes + # print(data) # this is a bytearray type + + if data is not None: + led.value = True + + # convert bytearray to string + data_string = "*".join([chr(b) for b in data]) + print(data_string, end="") + + led.value = False + + if usb_cdc.console.in_waiting: + data = usb_cdc.console.read() + data_string = "*".join([chr(b) for b in data]) + print("writing " + data_string) + uart.write(data) diff --git a/ports/stm/boards/cygnet/tests/urandom.py b/ports/stm/boards/cygnet/tests/urandom.py new file mode 100644 index 0000000000000..25ff655596b1d --- /dev/null +++ b/ports/stm/boards/cygnet/tests/urandom.py @@ -0,0 +1,10 @@ +import os + + +def main(): + print("Random number test") + r = os.urandom(32) + print(f"urandom TRNG string is {r}") + + +main() diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index e0ff3f138dfc2..8a6f57f9ab63d 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -11,6 +11,8 @@ #if defined(TFBGA216) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; +#elif defined(LQFP48) +GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC}; #elif defined(LQFP144) || defined(WLCSP144) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; #elif defined(LQFP100_f4) || (LQFP100_x7) diff --git a/ports/stm/packages/LQFP48.c b/ports/stm/packages/LQFP48.c new file mode 100644 index 0000000000000..1092b8df15f52 --- /dev/null +++ b/ports/stm/packages/LQFP48.c @@ -0,0 +1,63 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +static const mp_rom_map_elem_t mcu_pin_globals_table[] = { +// Pins 1-12 + /* VBAT -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + // PC14 OSC32_IN ----------------------------------*/ + // PC15 OSC32_OUT ---------------------------------*/ + // PH0 OSC_IN -------------------------------------*/ + // PH1 OSC_OUT ------------------------------------*/ + // NRST -------------------------------------------*/ + // VSSA -------------------------------------------*/ + // VDDA -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + +// Pins 13-24 + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + // VCAP1 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 25-36 + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 37-48 + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h index 438db7938672e..4960125d90f12 100644 --- a/ports/stm/peripherals/periph.h +++ b/ports/stm/peripherals/periph.h @@ -21,11 +21,11 @@ typedef struct { } mcu_periph_obj_t; #define PERIPH(index, alt, p_pin) \ - { \ - .periph_index = index, \ - .altfn_index = alt, \ - .pin = p_pin, \ - } + { \ + .periph_index = index, \ + .altfn_index = alt, \ + .pin = p_pin, \ + } // Timer Peripheral @@ -37,12 +37,12 @@ typedef struct { } mcu_tim_pin_obj_t; #define TIM(index, alt, channel, tim_pin) \ - { \ - .tim_index = index - 1, \ - .altfn_index = alt, \ - .channel_index = channel - 1, \ - .pin = tim_pin, \ - } + { \ + .tim_index = index - 1, \ + .altfn_index = alt, \ + .channel_index = channel - 1, \ + .pin = tim_pin, \ + } // F4 Series // Access Lines @@ -84,6 +84,13 @@ typedef struct { #include "stm32l4/stm32l4r5xx/periph.h" #endif +#ifdef STM32L433xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32l4/stm32l433xx/periph.h" +#endif + #ifdef STM32F405xx #define HAS_DAC 1 #define HAS_TRNG 1 diff --git a/ports/stm/peripherals/pins.h b/ports/stm/peripherals/pins.h index 999f8172d9713..c91879939552e 100644 --- a/ports/stm/peripherals/pins.h +++ b/ports/stm/peripherals/pins.h @@ -32,24 +32,24 @@ typedef struct { // but all 3 ADCs will share the same input number per pin. // F4 family has 3 ADC max, 24 channels max. #define ADC_INPUT(mask, number) \ - .adc_unit = mask, \ - .adc_channel = number, + .adc_unit = mask, \ + .adc_channel = number, #define NO_ADC \ - .adc_unit = 0x00, \ - .adc_channel = 0x1f + .adc_unit = 0x00, \ + .adc_channel = 0x1f extern const mp_obj_type_t mcu_pin_type; // STM32 can have up to 9 ports, each restricted to 16 pins // We split the pin/port evenly, in contrast to nrf. #define PIN(p_port, p_number, p_adc) \ - { \ - { &mcu_pin_type }, \ - .port = p_port, \ - .number = p_number, \ - p_adc \ - } + { \ + { &mcu_pin_type }, \ + .port = p_port, \ + .number = p_number, \ + p_adc \ + } // Use illegal pin value to mark unassigned pins. #define NO_PIN 0xff @@ -70,6 +70,9 @@ extern const mp_obj_type_t mcu_pin_type; #ifdef STM32L4R5xx #include "stm32l4/stm32l4r5xx/pins.h" #endif +#ifdef STM32L433xx +#include "stm32l4/stm32l433xx/pins.h" +#endif #ifdef STM32F405xx #include "stm32f4/stm32f405xx/pins.h" #endif diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index a005c2bf7908f..a46c64de49637 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -11,6 +11,8 @@ // L4 Series #ifdef STM32L4R5xx #include "stm32l4/stm32l4r5xx/clocks.h" +#elif STM32L433xx +#include "stm32l4/stm32l433xx/clocks.h" #else #error Please add other MCUs here so that they are not silently ignored due to #define typos #endif @@ -44,9 +46,15 @@ void stm32_peripherals_clocks_init(void) { /** Configure the main internal regulator output voltage */ + #if STM32L4R5xx if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) { Error_Handler(); } + #elif STM32L433xx + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + #endif /* Activate PLL with MSI , stabilizied via PLL by LSE */ @@ -80,7 +88,11 @@ void stm32_peripherals_clocks_init(void) { /* AHB prescaler divider at 1 as second step */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + #ifdef STM32L4R5xx HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5)); + #elif STM32L433xx + HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4)); + #endif /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_ADC; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h b/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h new file mode 100644 index 0000000000000..b9335f7e6331d --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h @@ -0,0 +1,49 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "stm32l4xx_hal.h" + +// Chip: STM32L433 +// Line Type: Foundation Line +// Speed: 80MHz (MAX) + +// Defaults: +#ifndef CPY_CLK_VSCALE +#define CPY_CLK_VSCALE (PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) // up to 80MHz +#endif +#ifndef CPY_CLK_PLLM +#define CPY_CLK_PLLM (12) +#endif +#ifndef CPY_CLK_PLLN +#define CPY_CLK_PLLN (60) +#endif +#ifndef CPY_CLK_PLLP +#define CPY_CLK_PLLP (RCC_PLLP_DIV2) +#endif +#ifndef CPY_CLK_PLLQ +#define CPY_CLK_PLLQ (2) +#endif +#ifndef CPY_CLK_AHBDIV +#define CPY_CLK_AHBDIV (RCC_SYSCLK_DIV1) +#endif +#ifndef CPY_CLK_APB1DIV +#define CPY_CLK_APB1DIV (RCC_HCLK_DIV1) +#endif +#ifndef CPY_CLK_APB2DIV +#define CPY_CLK_APB2DIV (RCC_HCLK_DIV1) +#endif +#ifndef CPY_CLK_FLASH_LATENCY +#define CPY_CLK_FLASH_LATENCY (FLASH_LATENCY_4) +#endif +#ifndef CPY_CLK_USB_USES_AUDIOPLL +#define CPY_CLK_USB_USES_AUDIOPLL (0) +#endif + +#ifndef BOARD_HAS_HIGH_SPEED_CRYSTAL +#define BOARD_HAS_HIGH_SPEED_CRYSTAL (1) +#endif diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c b/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c new file mode 100644 index 0000000000000..d1721dda3e96d --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c @@ -0,0 +1,27 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#include "peripherals/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32_peripherals_gpio_init(void) { + // Enable all GPIO for now + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + + // Never reset pins + never_reset_pin_number(2, 14); // PC14 OSC32_IN + never_reset_pin_number(2, 15); // PC15 OSC32_OUT + never_reset_pin_number(0, 13); // PA13 SWDIO + never_reset_pin_number(0, 14); // PA14 SWCLK +} + +void stm32l4_peripherals_status_led(uint8_t led, uint8_t state) { + +} diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c new file mode 100644 index 0000000000000..193bd75620063 --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c @@ -0,0 +1,167 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" + +I2C_TypeDef *mcu_i2c_banks[I2C_BANK_ARRAY_LEN] = {I2C1, I2C2, I2C3}; + +const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN] = { + PERIPH(3, 4, &pin_PB04), + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 4, &pin_PB11), + PERIPH(2, 4, &pin_PB14), + PERIPH(3, 4, &pin_PC01), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(3, 4, &pin_PA07), + PERIPH(2, 4, &pin_PB10), + PERIPH(2, 4, &pin_PB13), + PERIPH(3, 4, &pin_PC00), +}; + +SPI_TypeDef *mcu_spi_banks[SPI_BANK_ARRAY_LEN] = {SPI1, SPI2, SPI3}; + +const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN] = { + PERIPH(1, 5, &pin_PA01), + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(3, 6, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(3, 6, &pin_PC10), + PERIPH(2, 5, &pin_PD01), + PERIPH(1, 5, &pin_PE13), +}; +const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PA12), + PERIPH(1, 5, &pin_PB05), + PERIPH(3, 6, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PC12), + PERIPH(2, 5, &pin_PD04), + PERIPH(1, 5, &pin_PE15), +}; +const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PA11), + PERIPH(1, 5, &pin_PB04), + PERIPH(3, 6, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PC11), + PERIPH(2, 5, &pin_PD03), + PERIPH(1, 5, &pin_PE14), +}; +const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(3, 6, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(3, 6, &pin_PA15), + PERIPH(1, 5, &pin_PB00), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(2, 5, &pin_PD00), + PERIPH(1, 5, &pin_PE12), +}; + +USART_TypeDef *mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false}; + +const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN] = { + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(1, 7, &pin_PB06), + PERIPH(3, 7, &pin_PB10), + PERIPH(3, 7, &pin_PC04), + PERIPH(3, 7, &pin_PC10), + PERIPH(2, 7, &pin_PD05), + PERIPH(3, 7, &pin_PD08), +}; +const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN] = { + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(2, 3, &pin_PA15), + PERIPH(1, 7, &pin_PB07), + PERIPH(3, 7, &pin_PB11), + PERIPH(3, 7, &pin_PC05), + PERIPH(3, 7, &pin_PC11), + PERIPH(2, 7, &pin_PD06), + PERIPH(3, 7, &pin_PD09), +}; + +// Timers +TIM_TypeDef *mcu_tim_banks[TIM_BANK_ARRAY_LEN] = {TIM1, TIM2, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, TIM15, TIM16, NULL}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN] = { + TIM(2, 1, 1, &pin_PA00), + TIM(2, 1, 2, &pin_PA01), + TIM(2, 1, 3, &pin_PA02), + TIM(15, 15, 1, &pin_PA02), + TIM(2, 1, 4, &pin_PA03), + TIM(15, 15, 2, &pin_PA03), + TIM(2, 1, 1, &pin_PA05), + TIM(16, 15, 1, &pin_PA06), + TIM(1, 1, 1, &pin_PA08), + TIM(1, 1, 2, &pin_PA09), + TIM(1, 1, 3, &pin_PA10), + TIM(1, 1, 4, &pin_PA11), + TIM(2, 1, 1, &pin_PA15), + TIM(2, 1, 2, &pin_PB03), + TIM(16, 15, 1, &pin_PB08), + TIM(2, 1, 3, &pin_PB10), + TIM(2, 1, 4, &pin_PB11), + TIM(15, 15, 1, &pin_PB14), + TIM(15, 15, 2, &pin_PB15), + TIM(16, 15, 1, &pin_PE00), + TIM(1, 1, 1, &pin_PE09), + TIM(1, 1, 2, &pin_PE11), + TIM(1, 1, 3, &pin_PE13), + TIM(1, 1, 4, &pin_PE14), +}; +// SDIO +// SDIO_TypeDef *mcu_sdio_banks[1] = {SDIO}; +// todo - the L4 has a SDMMC pripheral +const mcu_periph_obj_t mcu_sdio_clock_list[1] = { + PERIPH(1, 12, &pin_PC12), +}; +const mcu_periph_obj_t mcu_sdio_command_list[1] = { + PERIPH(1, 12, &pin_PD02), +}; +const mcu_periph_obj_t mcu_sdio_data0_list[1] = { + PERIPH(1, 12, &pin_PC08), +}; +const mcu_periph_obj_t mcu_sdio_data1_list[1] = { + PERIPH(1, 12, &pin_PC09), +}; +const mcu_periph_obj_t mcu_sdio_data2_list[1] = { + PERIPH(1, 12, &pin_PC10), +}; +const mcu_periph_obj_t mcu_sdio_data3_list[1] = { + PERIPH(1, 12, &pin_PC11), +}; + +// CAN +CAN_TypeDef *mcu_can_banks[] = {CAN1}; + +const mcu_periph_obj_t mcu_can_tx_list[4] = { + PERIPH(1, 10, &pin_PA12), + PERIPH(1, 10, &pin_PB09), + PERIPH(1, 10, &pin_PD01), +}; +const mcu_periph_obj_t mcu_can_rx_list[4] = { + PERIPH(1, 10, &pin_PA11), + PERIPH(1, 10, &pin_PB08), + PERIPH(1, 10, &pin_PD00), +}; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h new file mode 100644 index 0000000000000..3e45a17c811c4 --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h @@ -0,0 +1,56 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#pragma once + +// I2C +#define I2C_BANK_ARRAY_LEN 4 +#define I2C_SDA_ARRAY_LEN 16 +#define I2C_SCL_ARRAY_LEN 15 +extern I2C_TypeDef *mcu_i2c_banks[I2C_BANK_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN]; + +// SPI +#define SPI_BANK_ARRAY_LEN 3 +#define SPI_SCK_ARRAY_LEN 14 +#define SPI_MOSI_ARRAY_LEN 14 +#define SPI_MISO_ARRAY_LEN 12 +#define SPI_NSS_ARRAY_LEN 12 +extern SPI_TypeDef *mcu_spi_banks[SPI_BANK_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN]; + +// UART +#define UART_TX_ARRAY_LEN 12 +#define UART_RX_ARRAY_LEN 13 +extern USART_TypeDef *mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; +extern const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN]; +extern const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN]; + +// Timers +#define TIM_BANK_ARRAY_LEN 17 +#define TIM_PIN_ARRAY_LEN (73 - 3) +extern TIM_TypeDef *mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +extern const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +// SDIO +// extern SDIO_TypeDef *mcu_sdio_banks[1]; + +// extern const mcu_periph_obj_t mcu_sdio_clock_list[1]; +// extern const mcu_periph_obj_t mcu_sdio_command_list[1]; +// extern const mcu_periph_obj_t mcu_sdio_data0_list[1]; +// extern const mcu_periph_obj_t mcu_sdio_data1_list[1]; +// extern const mcu_periph_obj_t mcu_sdio_data2_list[1]; +// extern const mcu_periph_obj_t mcu_sdio_data3_list[1]; + +// CAN +extern CAN_TypeDef *mcu_can_banks[1]; +extern const mcu_periph_obj_t mcu_can_tx_list[4]; +extern const mcu_periph_obj_t mcu_can_rx_list[4]; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c new file mode 100644 index 0000000000000..5ff6b5aea2068 --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c @@ -0,0 +1,95 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" + +#include STM32_HAL_H + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1, 5)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1, 6)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1, 7)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1, 8)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1, 9)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1, 10)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1, 11)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1, 12)); +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1, 15)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1, 16)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1, 1)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1, 2)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1, 3)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1, 4)); +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1, 13)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1, 14)); +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); +const mcu_pin_obj_t pin_PH00 = PIN(7, 0, NO_ADC); +const mcu_pin_obj_t pin_PH01 = PIN(7, 1, NO_ADC); +const mcu_pin_obj_t pin_PH03 = PIN(7, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h new file mode 100644 index 0000000000000..fefebbe152588 --- /dev/null +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h @@ -0,0 +1,107 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2021 Blues Wireless Contributors +// +// SPDX-License-Identifier: MIT + +#pragma once + +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PH00; +extern const mcu_pin_obj_t pin_PH01; +extern const mcu_pin_obj_t pin_PH02; +extern const mcu_pin_obj_t pin_PH03; +extern const mcu_pin_obj_t pin_PH04; +extern const mcu_pin_obj_t pin_PH05; +extern const mcu_pin_obj_t pin_PH06; +extern const mcu_pin_obj_t pin_PH07; +extern const mcu_pin_obj_t pin_PH08; +extern const mcu_pin_obj_t pin_PH09; +extern const mcu_pin_obj_t pin_PH10; +extern const mcu_pin_obj_t pin_PH11; +extern const mcu_pin_obj_t pin_PH12; +extern const mcu_pin_obj_t pin_PH13; +extern const mcu_pin_obj_t pin_PH14; +extern const mcu_pin_obj_t pin_PH15; +extern const mcu_pin_obj_t pin_PI00; +extern const mcu_pin_obj_t pin_PI01; +extern const mcu_pin_obj_t pin_PI03; diff --git a/ports/stm/supervisor/internal_flash.c b/ports/stm/supervisor/internal_flash.c index 273af300a80b3..02ea9cd514f58 100644 --- a/ports/stm/supervisor/internal_flash.c +++ b/ports/stm/supervisor/internal_flash.c @@ -69,12 +69,18 @@ static const flash_layout_t flash_layout[] = { }; static uint8_t _flash_cache[0x20000] __attribute__((aligned(4))); -#elif defined(STM32L4) +#elif defined(STM32L4R5XX) static const flash_layout_t flash_layout[] = { { 0x08100000, 0x1000, 256 }, }; static uint8_t _flash_cache[0x1000] __attribute__((aligned(4))); +#elif defined(STM32L433XX) +static const flash_layout_t flash_layout[] = { + { 0x08000000, 0x2000, 128 }, +}; +static uint8_t _flash_cache[0x2000] __attribute__((aligned(4))); + #else #error Unsupported processor #endif @@ -175,8 +181,13 @@ void port_internal_flash_flush(void) { // set up for erase FLASH_EraseInitTypeDef EraseInitStruct = {}; #if CPY_STM32L4 + #if defined(STM32L4R5) EraseInitStruct.TypeErase = TYPEERASE_PAGES; - EraseInitStruct.Banks = FLASH_BANK_2; // filesystem stored in upper 1MB of flash in dual bank mode + EraseInitStruct.Banks = FLASH_BANK_2; // filesystem stored in upper 1MB of flash in dual bank mode + #elif defined(STM32L433) + EraseInitStruct.TypeErase = FLASH_TYPEERASE_MASSERASE; + EraseInitStruct.Banks = FLASH_BANK_1; + #endif #else EraseInitStruct.TypeErase = TYPEERASE_SECTORS; EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index 68704805f3399..1f0d815723ca1 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -87,9 +87,15 @@ #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08100000 #endif +#ifdef STM32L433xx +#define STM32_FLASH_SIZE 0x80000 // 256KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x19000 // 100KiB +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08026000 +#endif + #define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) #define STM32_FLASH_OFFSET 0x8000000 // All STM32 chips map to this flash location #define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick)&INTERNAL_FLASH_SYSTICK_MASK) == 2) diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 61a7d54f08b74..5601b27b0f8a2 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -29,7 +29,7 @@ static void init_usb_vbus_sense(void) { // B-peripheral session valid override enable USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; - #else + #elif !defined(STM32L433XX) USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; @@ -69,7 +69,7 @@ void init_usb_hardware(void) { GPIO_InitStruct.Pull = GPIO_NOPULL; #if CPY_STM32H7 GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; - #elif CPY_STM32F4 || CPY_STM32F7 || CPY_STM32L4 + #elif CPY_STM32F4 || CPY_STM32F7 || defined(STM32L4R5XX) GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); @@ -117,7 +117,7 @@ void init_usb_hardware(void) { #if CPY_STM32H7 HAL_PWREx_EnableUSBVoltageDetector(); __HAL_RCC_USB2_OTG_FS_CLK_ENABLE(); - #else + #elif CPY_STM32F4 || CPY_STM32F7 || defined(STM32L4R5XX) /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); #endif From fe12f2b40ff341e1fde7d515c455ced848049f4e Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Wed, 6 Nov 2024 08:52:29 -0600 Subject: [PATCH 02/46] resolve linker error --- ports/stm/Makefile | 2 +- ports/stm/boards/cygnet/mpconfigboard.mk | 2 ++ ports/stm/mpconfigport.mk | 5 ++++- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/ports/stm/Makefile b/ports/stm/Makefile index d42ebdc727612..257b37b087f95 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -165,7 +165,7 @@ endif # Need this to avoid UART linker problems. TODO: rewrite to use registered callbacks. # Does not exist for F4 and lower -ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx STM32L4R5xx)) +ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx STM32L4R5xx STM32L433xx)) SRC_STM32 += $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_hal_uart_ex.c endif diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index fa0516a5a3aad..d00337c3fa150 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -19,6 +19,8 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 +USB_NUM_ENDPOINT_PAIRS = 0 + CIRCUITPY_ALARM = 0 CIRCUITPY_ANALOGIO = 1 CIRCUITPY_AUDIOBUSIO = 0 diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 3266212962738..05fe9bf7aca1f 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -80,11 +80,14 @@ ifeq ($(MCU_SERIES),L4) CIRCUITPY_NVM ?= 0 CIRCUITPY_ROTARYIO ?= 0 CIRCUITPY_RTC ?= 1 + UF2_FAMILY_ID ?= 0x00ff6919 +endif + +ifeq ($(MCU_VARIANT),STM32L4R5xx) # todo - this varies between devices in the series # This slide deck https://www.st.com/content/ccc/resource/training/technical/product_training/98/89/c8/6c/3e/e9/49/79/STM32L4_Peripheral_USB.pdf/files/STM32L4_Peripheral_USB.pdf/jcr:content/translations/en.STM32L4_Peripheral_USB.pdf # cites 16 endpoints, 8 endpoint pairs, while section 3.39 of the L4R5 datasheet states 6 endpoint pairs. USB_NUM_ENDPOINT_PAIRS = 6 - UF2_FAMILY_ID ?= 0x00ff6919 endif CIRCUITPY_PARALLELDISPLAYBUS := 0 From 5a3f9d71b5802e616490e6ad4d1f547f975c881b Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Wed, 6 Nov 2024 18:53:01 -0600 Subject: [PATCH 03/46] update LD files for cygnet --- ports/stm/boards/STM32L433_boot.ld | 17 +++-------------- ports/stm/boards/STM32L433_default.ld | 8 ++------ ports/stm/boards/cygnet/mpconfigboard.mk | 4 ++-- 3 files changed, 7 insertions(+), 22 deletions(-) diff --git a/ports/stm/boards/STM32L433_boot.ld b/ports/stm/boards/STM32L433_boot.ld index 8169eadebe11d..161d883160c2c 100644 --- a/ports/stm/boards/STM32L433_boot.ld +++ b/ports/stm/boards/STM32L433_boot.ld @@ -3,23 +3,12 @@ */ /* Specify the memory areas */ -/* -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 4K - FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 156K-64K-4K - FLASH_FS (rw) : ORIGIN = 0x08027000, LENGTH = 88K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K -} -*/ - MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 1024K-128K-64K-4K /* For now, limit to 1MB so that bank switching is still possible. */ - FLASH_FS (rw) : ORIGIN = 0x08100000, LENGTH = 1024K + FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 192K-64K-4K /* For now, limit to 1MB so that bank switching is still possible. */ + FLASH_FS (rw) : ORIGIN = 0x08030000, LENGTH = 60K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K } diff --git a/ports/stm/boards/STM32L433_default.ld b/ports/stm/boards/STM32L433_default.ld index 23454521bb9f8..6dcc3f3938785 100644 --- a/ports/stm/boards/STM32L433_default.ld +++ b/ports/stm/boards/STM32L433_default.ld @@ -7,12 +7,8 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ - /* - FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 60K - FLASH_FS (rw) : ORIGIN = 0x08010000, LENGTH = 60K - */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 4K - FLASH_FS (rw) : ORIGIN = 0x08004000, LENGTH = 60K + FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 128K - 4K + FLASH_FS (rw) : ORIGIN = 0x08020000, LENGTH = 128K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K } diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index d00337c3fa150..b740dd1f14c9f 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -19,7 +19,7 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 -USB_NUM_ENDPOINT_PAIRS = 0 +USB_NUM_ENDPOINT_PAIRS = 8 CIRCUITPY_ALARM = 0 CIRCUITPY_ANALOGIO = 1 @@ -52,8 +52,8 @@ CIRCUITPY_RTC = 1 CIRCUITPY_SDCARDIO = 0 CIRCUITPY_STORAGE = 1 CIRCUITPY_TOUCHIO = 0 -CIRCUITPY_UDB_CDC = 1 CIRCUITPY_ULAB = 1 +CIRCUITPY_UDB_CDC = 1 CIRCUITPY_USB_HID = 0 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_MSC = 1 From dd30006f37488d8194ea4face2ca35777a56fbdd Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Thu, 7 Nov 2024 08:04:39 -0600 Subject: [PATCH 04/46] update Makefile for STM32L433 TinyUSB driver support --- ports/stm/Makefile | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/ports/stm/Makefile b/ports/stm/Makefile index 257b37b087f95..972bd66bcab9f 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -197,7 +197,11 @@ ifneq ($(CIRCUITPY_AUDIOBUSIO_PDMIN),0) endif ifneq ($(CIRCUITPY_USB),0) -SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c + ifeq ($(MCU_VARIANT_LOWER),stm32l433xx) + SRC_C += lib/tinyusb/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + else + SRC_C += lib/tinyusb/src/portable/synopsys/dwc2/dcd_dwc2.c + endif endif SRC_S = \ From 7e0c9a28c28bde233a9c218627b38b3e60186adf Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Thu, 7 Nov 2024 16:51:44 -0600 Subject: [PATCH 05/46] EOF --- ports/stm/boards/STM32L433_default.ld | 4 +- ports/stm/boards/cygnet/mpconfigboard.mk | 77 ++++++++++++++++++++---- 2 files changed, 68 insertions(+), 13 deletions(-) diff --git a/ports/stm/boards/STM32L433_default.ld b/ports/stm/boards/STM32L433_default.ld index 6dcc3f3938785..ad5f6ace22aa2 100644 --- a/ports/stm/boards/STM32L433_default.ld +++ b/ports/stm/boards/STM32L433_default.ld @@ -7,8 +7,8 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 128K - 4K - FLASH_FS (rw) : ORIGIN = 0x08020000, LENGTH = 128K + FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 192K - 4K + FLASH_FS (rw) : ORIGIN = 0x08030000, LENGTH = 64K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K } diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index b740dd1f14c9f..ff0fecb92add1 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -10,7 +10,7 @@ MCU_PACKAGE = LQFP48 LD_COMMON = boards/common_default.ld LD_DEFAULT = boards/STM32L433_default.ld # UF2 boot option -LD_BOOT = boards/STM32L433_boot.ld +#LD_BOOT = boards/STM32L433_boot.ld UF2_OFFSET = 0x8010000 UF2_BOOTLOADER ?= 1 CIRCUITPY_BUILD_EXTENSIONS = bin,uf2 @@ -21,13 +21,16 @@ CIRCUITPY_FULL_BUILD = 0 USB_NUM_ENDPOINT_PAIRS = 8 +CIRCUITPY_ROTARYIO_SOFTENCODER = 1 +CIRCUITPY_KEYPAD_DEMUX = 0 + CIRCUITPY_ALARM = 0 CIRCUITPY_ANALOGIO = 1 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOBUSIO_I2SOUT = 0 CIRCUITPY_AUDIOBUSIO_PDMIN = 0 CIRCUITPY_AUDIOPWMIO = 0 -CIRCUITPY_BITBANGIO = 1 +CIRCUITPY_BITBANGIO = 0 CIRCUITPY_BLEIO = 0 CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_BUSDEVICE = 0 @@ -35,7 +38,7 @@ CIRCUITPY_BUSIO = 1 CIRCUITPY_CANIO = 0 CIRCUITPY_DIGITALIO = 1 CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_ENABLE_MPY_NATIVE = 1 +CIRCUITPY_ENABLE_MPY_NATIVE = 0 CIRCUITPY_I2CTARGET = 0 CIRCUITPY_KEYPAD = 0 CIRCUITPY_MICROCONTROLLER = 1 @@ -43,18 +46,70 @@ CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 CIRCUITPY_OS = 1 CIRCUITPY_PIXELBUF = 0 -CIRCUITPY_PULSEIO = 1 -CIRCUITPY_PWMIO = 1 -CIRCUITPY_RANDOM = 1 +CIRCUITPY_PULSEIO = 0 +CIRCUITPY_PWMIO = 0 +CIRCUITPY_RANDOM = 0 +CIRCUITPY_RAINBOWIO = 0 CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 CIRCUITPY_RGBMATRIX = 0 -CIRCUITPY_RTC = 1 +CIRCUITPY_RTC = 0 CIRCUITPY_SDCARDIO = 0 -CIRCUITPY_STORAGE = 1 +CIRCUITPY_STORAGE = 0 +CIRCUITPY_SUPERVISOR = 1 CIRCUITPY_TOUCHIO = 0 -CIRCUITPY_ULAB = 1 +CIRCUITPY_ULAB = 0 CIRCUITPY_UDB_CDC = 1 CIRCUITPY_USB_HID = 0 CIRCUITPY_USB_MIDI = 0 -CIRCUITPY_USB_MSC = 1 -CIRCUITPY_USB_VENDOR = 1 +CIRCUITPY_USB_MSC = 0 +CIRCUITPY_USB_VENDOR = 0 + +CIRCUITPY_AESIO = 0 +CIRCUITPY_ATEXIT = 0 +CIRCUITPY_AUDIOMIXER = 0 +CIRCUITPY_AUDIOMP3 = 0 +CIRCUITPY_BINASCII = 0 +CIRCUITPY_BITMAPFILTER = 0 +CIRCUITPY_BITMAPTOOLS = 0 +CIRCUITPY_BUILTINS_POW3 = 0 +CIRCUITPY_BUSDEVICE = 0 +CIRCUITPY_COMPUTED_GOTO_SAVE_SPACE = 1 +CIRCUITPY_COUNTIO = 0 +# Not enough RAM for framebuffers +CIRCUITPY_FRAMEBUFFERIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_GETPASS = 0 +CIRCUITPY_GIFIO = 0 +CIRCUITPY_I2CTARGET = 0 +CIRCUITPY_JSON = 0 +CIRCUITPY_KEYPAD = 0 +CIRCUITPY_MSGPACK = 0 +CIRCUITPY_OS_GETENV = 0 +CIRCUITPY_PIXELMAP = 0 +CIRCUITPY_RE = 0 +CIRCUITPY_SDCARDIO = 0 +CIRCUITPY_SYNTHIO = 0 +CIRCUITPY_TOUCHIO_USE_NATIVE = 1 +CIRCUITPY_TRACEBACK = 0 +CIRCUITPY_VECTORIO = 0 +CIRCUITPY_ZLIB = 0 + +CIRCUITPY_ONEWIREIO = 0 +CIRCUITPY_SAFEMODE_PY = 0 +CIRCUITPY_USB_IDENTIFICATION = 0 +CIRCUITPY_FUTURE= 0 +CIRCUITPY_STATUS_BAR= 0 +CIRCUITPY_WIFI_RADIO_SETTABLE_MAC_ADDRESS= 0 +CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + +CIRCUITPY_TERMINALIO = 0 +RELEASE_NEEDS_CLEAN_BUILD = 0 + +SUPEROPT_GC = 0 +SUPEROPT_VM = 0 + +CIRCUITPY_LTO_PARTITION = one + +OPTIMIZATION_FLAGS = -Os From 680489a488fd6c71efcb4aeeff83dcefc37c9719 Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Fri, 8 Nov 2024 11:53:44 -0600 Subject: [PATCH 06/46] final feature toggling to fit everything in flash --- ports/stm/boards/cygnet/mpconfigboard.mk | 84 +++++++++++------------- 1 file changed, 38 insertions(+), 46 deletions(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index ff0fecb92add1..9cc06e474ba49 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -9,8 +9,6 @@ MCU_PACKAGE = LQFP48 LD_COMMON = boards/common_default.ld LD_DEFAULT = boards/STM32L433_default.ld -# UF2 boot option -#LD_BOOT = boards/STM32L433_boot.ld UF2_OFFSET = 0x8010000 UF2_BOOTLOADER ?= 1 CIRCUITPY_BUILD_EXTENSIONS = bin,uf2 @@ -21,90 +19,82 @@ CIRCUITPY_FULL_BUILD = 0 USB_NUM_ENDPOINT_PAIRS = 8 -CIRCUITPY_ROTARYIO_SOFTENCODER = 1 -CIRCUITPY_KEYPAD_DEMUX = 0 - +CIRCUITPY_AESIO = 0 CIRCUITPY_ALARM = 0 CIRCUITPY_ANALOGIO = 1 +CIRCUITPY_ATEXIT = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOBUSIO_I2SOUT = 0 CIRCUITPY_AUDIOBUSIO_PDMIN = 0 +CIRCUITPY_AUDIOMIXER = 0 +CIRCUITPY_AUDIOMP3 = 0 CIRCUITPY_AUDIOPWMIO = 0 -CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_BITBANGIO = 1 CIRCUITPY_BLEIO = 0 CIRCUITPY_BLEIO_HCI = 0 +CIRCUITPY_BINASCII = 0 +CIRCUITPY_BITMAPFILTER = 0 +CIRCUITPY_BITMAPTOOLS = 0 +CIRCUITPY_BUILTINS_POW3 = 0 CIRCUITPY_BUSDEVICE = 0 CIRCUITPY_BUSIO = 1 CIRCUITPY_CANIO = 0 +CIRCUITPY_COMPUTED_GOTO_SAVE_SPACE = 1 +CIRCUITPY_COUNTIO = 0 CIRCUITPY_DIGITALIO = 1 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_ENABLE_MPY_NATIVE = 0 +CIRCUITPY_FRAMEBUFFERIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_FUTURE= 0 +CIRCUITPY_GETPASS = 0 +CIRCUITPY_GIFIO = 0 CIRCUITPY_I2CTARGET = 0 +CIRCUITPY_JSON = 0 CIRCUITPY_KEYPAD = 0 +CIRCUITPY_KEYPAD_DEMUX = 0 +CIRCUITPY_LTO = 1 CIRCUITPY_MICROCONTROLLER = 1 +CIRCUITPY_MSGPACK = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 +CIRCUITPY_ONEWIREIO = 0 CIRCUITPY_OS = 1 CIRCUITPY_PIXELBUF = 0 -CIRCUITPY_PULSEIO = 0 -CIRCUITPY_PWMIO = 0 -CIRCUITPY_RANDOM = 0 +CIRCUITPY_PIXELMAP = 0 +CIRCUITPY_PULSEIO = 1 +CIRCUITPY_PWMIO = 1 +CIRCUITPY_RANDOM = 1 CIRCUITPY_RAINBOWIO = 0 +CIRCUITPY_RE = 0 CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 +CIRCUITPY_ROTARYIO_SOFTENCODER = 1 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_RTC = 0 +CIRCUITPY_SAFEMODE_PY = 0 CIRCUITPY_SDCARDIO = 0 +CIRCUITPY_STATUS_BAR= 0 CIRCUITPY_STORAGE = 0 CIRCUITPY_SUPERVISOR = 1 +CIRCUITPY_SYNTHIO = 0 +CIRCUITPY_TERMINALIO = 0 CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_TOUCHIO_USE_NATIVE = 1 +CIRCUITPY_TRACEBACK = 0 CIRCUITPY_ULAB = 0 CIRCUITPY_UDB_CDC = 1 CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_IDENTIFICATION = 0 CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 CIRCUITPY_USB_MSC = 0 CIRCUITPY_USB_VENDOR = 0 - -CIRCUITPY_AESIO = 0 -CIRCUITPY_ATEXIT = 0 -CIRCUITPY_AUDIOMIXER = 0 -CIRCUITPY_AUDIOMP3 = 0 -CIRCUITPY_BINASCII = 0 -CIRCUITPY_BITMAPFILTER = 0 -CIRCUITPY_BITMAPTOOLS = 0 -CIRCUITPY_BUILTINS_POW3 = 0 -CIRCUITPY_BUSDEVICE = 0 -CIRCUITPY_COMPUTED_GOTO_SAVE_SPACE = 1 -CIRCUITPY_COUNTIO = 0 -# Not enough RAM for framebuffers -CIRCUITPY_FRAMEBUFFERIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_GETPASS = 0 -CIRCUITPY_GIFIO = 0 -CIRCUITPY_I2CTARGET = 0 -CIRCUITPY_JSON = 0 -CIRCUITPY_KEYPAD = 0 -CIRCUITPY_MSGPACK = 0 -CIRCUITPY_OS_GETENV = 0 -CIRCUITPY_PIXELMAP = 0 -CIRCUITPY_RE = 0 -CIRCUITPY_SDCARDIO = 0 -CIRCUITPY_SYNTHIO = 0 -CIRCUITPY_TOUCHIO_USE_NATIVE = 1 -CIRCUITPY_TRACEBACK = 0 +CIRCUITPY_WIFI_RADIO_SETTABLE_MAC_ADDRESS= 0 CIRCUITPY_VECTORIO = 0 CIRCUITPY_ZLIB = 0 -CIRCUITPY_ONEWIREIO = 0 -CIRCUITPY_SAFEMODE_PY = 0 -CIRCUITPY_USB_IDENTIFICATION = 0 -CIRCUITPY_FUTURE= 0 -CIRCUITPY_STATUS_BAR= 0 -CIRCUITPY_WIFI_RADIO_SETTABLE_MAC_ADDRESS= 0 -CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 - MICROPY_PY_ASYNC_AWAIT = 0 -CIRCUITPY_TERMINALIO = 0 RELEASE_NEEDS_CLEAN_BUILD = 0 SUPEROPT_GC = 0 @@ -113,3 +103,5 @@ SUPEROPT_VM = 0 CIRCUITPY_LTO_PARTITION = one OPTIMIZATION_FLAGS = -Os + +CFLAGS_BOARD = -fweb -frename-registers From dd5cedf3a335bd3acb266c85eafd3fe4e117e0b7 Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Fri, 8 Nov 2024 12:44:01 -0600 Subject: [PATCH 07/46] turn off random to trim out a bit of space --- ports/stm/boards/cygnet/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index 9cc06e474ba49..21324f01243be 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -64,7 +64,7 @@ CIRCUITPY_PIXELBUF = 0 CIRCUITPY_PIXELMAP = 0 CIRCUITPY_PULSEIO = 1 CIRCUITPY_PWMIO = 1 -CIRCUITPY_RANDOM = 1 +CIRCUITPY_RANDOM = 0 CIRCUITPY_RAINBOWIO = 0 CIRCUITPY_RE = 0 CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 From 38e179f5fa3664fe46a4eaf1f28f7ee35a97753a Mon Sep 17 00:00:00 2001 From: eightycc Date: Thu, 31 Oct 2024 08:45:54 -0700 Subject: [PATCH 08/46] Bump cyw43-driver module to v1.0.4 plus to match SDK 2.0.0. --- ports/raspberrypi/lib/cyw43-driver | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/raspberrypi/lib/cyw43-driver b/ports/raspberrypi/lib/cyw43-driver index 9f6405f0b3260..faf36381bad1f 160000 --- a/ports/raspberrypi/lib/cyw43-driver +++ b/ports/raspberrypi/lib/cyw43-driver @@ -1 +1 @@ -Subproject commit 9f6405f0b3260968306d782e1c5ac275a46dc65d +Subproject commit faf36381bad1f668a30172b6336c9a970966ef4c From 8b448a34014b1e8725a760cd5339796ed4c0ffdc Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 1 Nov 2024 11:30:24 -0500 Subject: [PATCH 09/46] Add global GCC version check We can set some of them lower than 13 if necessary on a per-port basis. At least esp32 and arm ports all use 13 from what I could see. --- py/circuitpy_mpconfig.h | 16 ++++++++++++++++ py/circuitpy_mpconfig.mk | 4 ++++ 2 files changed, 20 insertions(+) diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index adb881ebac23a..eacfbfbeb77c2 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -599,3 +599,19 @@ void background_callback_run_all(void); // Enable compiler functionality. #define MICROPY_ENABLE_COMPILER (1) #define MICROPY_PY_BUILTINS_COMPILE (1) + +#ifndef CIRCUITPY_MIN_GCC_VERSION +#define CIRCUITPY_MIN_GCC_VERSION 13 +#endif + +#if defined(__GNUC__) +#if __GNUC__ < CIRCUITPY_MIN_GCC_VERSION +// (the 3 level scheme here is required to get expansion & stringization +// correct) +#define DO_PRAGMA(x) _Pragma(#x) +#define DO_ERROR_HELPER(x) DO_PRAGMA(GCC error #x) +#define DO_ERROR(x) DO_ERROR_HELPER(Minimum GCC version x \ + -- older versions are known to miscompile CircuitPython) +DO_ERROR(CIRCUITPY_MIN_GCC_VERSION); +#endif +#endif diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index e425552911929..1a831dbf314b5 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -697,6 +697,10 @@ CFLAGS += -DCIRCUITPY_TUSB_ATTR_USBRAM=$(CIRCUITPY_TUSB_ATTR_USBRAM) CIRCUITPY_SWO_TRACE ?= 0 CFLAGS += -DCIRCUITPY_SWO_TRACE=$(CIRCUITPY_SWO_TRACE) +# Check for a minimum GCC version during build (set to 0 to disable) +CIRCUITPY_MIN_GCC_VERSION ?= 13 +CFLAGS += -DCIRCUITPY_MIN_GCC_VERSION=$(CIRCUITPY_MIN_GCC_VERSION) + # Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk # $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. # This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. From af097d7f46557aac15e61a8ccddffb9057ee3f93 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 1 Nov 2024 14:22:20 -0500 Subject: [PATCH 10/46] these ports currently use older gcc versions --- ports/broadcom/Makefile | 2 ++ ports/litex/mpconfigport.mk | 1 + 2 files changed, 3 insertions(+) diff --git a/ports/broadcom/Makefile b/ports/broadcom/Makefile index 56c8c3237443e..1c640fb2f7b99 100644 --- a/ports/broadcom/Makefile +++ b/ports/broadcom/Makefile @@ -10,10 +10,12 @@ ifeq ($(CHIP_VARIANT), "bcm2711") CFLAGS += -mcpu=cortex-a72 -DBCM_VERSION=2711 CROSS_COMPILE = aarch64-none-elf- SUFFIX = 8 +CIRCUITPY_MIN_GCC_VERSION ?= 10 else ifeq ($(CHIP_VARIANT), "bcm2837") CFLAGS += -mcpu=cortex-a53 -DBCM_VERSION=2837 CROSS_COMPILE = aarch64-none-elf- SUFFIX = 8 +CIRCUITPY_MIN_GCC_VERSION ?= 10 else ifeq ($(CHIP_VARIANT), "bcm2835") CFLAGS += -mcpu=arm1176jzf-s -DBCM_VERSION=2835 CROSS_COMPILE = arm-none-eabi- diff --git a/ports/litex/mpconfigport.mk b/ports/litex/mpconfigport.mk index d8dc4eef1edcd..a93a3890bbc9a 100644 --- a/ports/litex/mpconfigport.mk +++ b/ports/litex/mpconfigport.mk @@ -31,3 +31,4 @@ CIRCUITPY_USB_HID = 1 CIRCUITPY_USB_MIDI = 1 CIRCUITPY_BUILD_EXTENSIONS ?= dfu +CIRCUITPY_MIN_GCC_VERSION ?= 8 From b0099a5ee09a60c027456690ce75cc10519a63e4 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 1 Nov 2024 15:04:11 -0500 Subject: [PATCH 11/46] Fix gcc version on broadcom again --- ports/broadcom/Makefile | 2 -- ports/broadcom/mpconfigport.mk | 6 ++++++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/ports/broadcom/Makefile b/ports/broadcom/Makefile index 1c640fb2f7b99..56c8c3237443e 100644 --- a/ports/broadcom/Makefile +++ b/ports/broadcom/Makefile @@ -10,12 +10,10 @@ ifeq ($(CHIP_VARIANT), "bcm2711") CFLAGS += -mcpu=cortex-a72 -DBCM_VERSION=2711 CROSS_COMPILE = aarch64-none-elf- SUFFIX = 8 -CIRCUITPY_MIN_GCC_VERSION ?= 10 else ifeq ($(CHIP_VARIANT), "bcm2837") CFLAGS += -mcpu=cortex-a53 -DBCM_VERSION=2837 CROSS_COMPILE = aarch64-none-elf- SUFFIX = 8 -CIRCUITPY_MIN_GCC_VERSION ?= 10 else ifeq ($(CHIP_VARIANT), "bcm2835") CFLAGS += -mcpu=arm1176jzf-s -DBCM_VERSION=2835 CROSS_COMPILE = arm-none-eabi- diff --git a/ports/broadcom/mpconfigport.mk b/ports/broadcom/mpconfigport.mk index 543e174683617..b4b3e2ebf8192 100644 --- a/ports/broadcom/mpconfigport.mk +++ b/ports/broadcom/mpconfigport.mk @@ -25,3 +25,9 @@ USB_NUM_ENDPOINT_PAIRS = 8 USB_HIGHSPEED = 1 CIRCUITPY_BUILD_EXTENSIONS ?= disk.img.zip,kernel8.img + +ifeq ($(CHIP_VARIANT), "bcm2711") +CIRCUITPY_MIN_GCC_VERSION ?= 10 +else ifeq ($(CHIP_VARIANT), "bcm2837") +CIRCUITPY_MIN_GCC_VERSION ?= 10 +endif From 925ba15292f03c1742d217a626b453b8de036d32 Mon Sep 17 00:00:00 2001 From: bablokb Date: Sat, 2 Nov 2024 10:35:41 +0000 Subject: [PATCH 12/46] use ADC_TEMPERATURE_CHANNEL_NUM instead of hard-coded channel '4' --- ports/raspberrypi/common-hal/microcontroller/Processor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/raspberrypi/common-hal/microcontroller/Processor.c b/ports/raspberrypi/common-hal/microcontroller/Processor.c index 678ceefbf92ff..139edc999d669 100644 --- a/ports/raspberrypi/common-hal/microcontroller/Processor.c +++ b/ports/raspberrypi/common-hal/microcontroller/Processor.c @@ -39,7 +39,7 @@ float common_hal_mcu_processor_get_temperature(void) { adc_init(); adc_set_temp_sensor_enabled(true); - adc_select_input(4); + adc_select_input(ADC_TEMPERATURE_CHANNEL_NUM); uint16_t value = adc_read(); adc_set_temp_sensor_enabled(false); float voltage = value * 3.3 / (1 << 12); From c5328c828fe9d0b25c8c5beb6e1d489dc5c929a8 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 1 Nov 2024 18:31:41 -0400 Subject: [PATCH 13/46] RP2350: need cache flush in microcontroller.nvm --- ports/raspberrypi/common-hal/nvm/ByteArray.c | 7 ++++ ports/raspberrypi/supervisor/internal_flash.c | 33 +++++++++++-------- ports/raspberrypi/supervisor/internal_flash.h | 4 +++ 3 files changed, 31 insertions(+), 13 deletions(-) diff --git a/ports/raspberrypi/common-hal/nvm/ByteArray.c b/ports/raspberrypi/common-hal/nvm/ByteArray.c index 541f1a34bd7cf..2905a624c29b5 100644 --- a/ports/raspberrypi/common-hal/nvm/ByteArray.c +++ b/ports/raspberrypi/common-hal/nvm/ByteArray.c @@ -12,6 +12,7 @@ #include "py/runtime.h" #include "src/rp2_common/hardware_flash/include/hardware/flash.h" #include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/internal_flash.h" extern uint32_t __flash_binary_start; static const uint32_t flash_binary_start = (uint32_t)&__flash_binary_start; @@ -28,14 +29,18 @@ static void write_page(uint32_t page_addr, uint32_t offset, uint32_t len, uint8_ if (offset == 0 && len == FLASH_PAGE_SIZE) { // disable interrupts to prevent core hang on rp2040 common_hal_mcu_disable_interrupts(); + supervisor_flash_pre_write(); flash_range_program(RMV_OFFSET(page_addr), bytes, FLASH_PAGE_SIZE); + supervisor_flash_post_write(); common_hal_mcu_enable_interrupts(); } else { uint8_t buffer[FLASH_PAGE_SIZE]; memcpy(buffer, (uint8_t *)page_addr, FLASH_PAGE_SIZE); memcpy(buffer + offset, bytes, len); common_hal_mcu_disable_interrupts(); + supervisor_flash_pre_write(); flash_range_program(RMV_OFFSET(page_addr), buffer, FLASH_PAGE_SIZE); + supervisor_flash_post_write(); common_hal_mcu_enable_interrupts(); } @@ -57,8 +62,10 @@ static void erase_and_write_sector(uint32_t address, uint32_t len, uint8_t *byte memcpy(buffer + address, bytes, len); // disable interrupts to prevent core hang on rp2040 common_hal_mcu_disable_interrupts(); + supervisor_flash_pre_write(); flash_range_erase(RMV_OFFSET(CIRCUITPY_INTERNAL_NVM_START_ADDR), FLASH_SECTOR_SIZE); flash_range_program(RMV_OFFSET(CIRCUITPY_INTERNAL_NVM_START_ADDR), buffer, FLASH_SECTOR_SIZE); + supervisor_flash_post_write(); common_hal_mcu_enable_interrupts(); } diff --git a/ports/raspberrypi/supervisor/internal_flash.c b/ports/raspberrypi/supervisor/internal_flash.c index 1b328cbc5a7bb..563795c516a9b 100644 --- a/ports/raspberrypi/supervisor/internal_flash.c +++ b/ports/raspberrypi/supervisor/internal_flash.c @@ -46,16 +46,14 @@ static uint32_t m1_rfmt; static uint32_t m1_timing; #endif -static void save_psram_settings(void) { +static void __no_inline_not_in_flash_func(save_psram_settings)(void) { #ifdef PICO_RP2350 // We're about to invalidate the XIP cache, clean it first to commit any dirty writes to PSRAM - volatile uint8_t *maintenance_ptr = (uint8_t *)XIP_MAINTENANCE_BASE; - for (int i = 1; i < 16 * 1024; i += 8) { - // Background info: https://forums.raspberrypi.com/viewtopic.php?t=378249 - maintenance_ptr[i] = 0; // Clean - __compiler_memory_barrier(); - maintenance_ptr[i - 1] = 0; // Explicitly invalidate - __compiler_memory_barrier(); + // From https://forums.raspberrypi.com/viewtopic.php?t=378249#p2263677 + // Perform clean-by-set/way on all lines + for (uint32_t i = 0; i < 2048; ++i) { + // Use the upper 16k of the maintenance space (0x1bffc000 through 0x1bffffff): + *(volatile uint8_t *)(XIP_SRAM_BASE + (XIP_MAINTENANCE_BASE - XIP_BASE) + i * 8u + 0x1u) = 0; } m1_timing = qmi_hw->m[1].timing; @@ -63,13 +61,22 @@ static void save_psram_settings(void) { #endif } -static void restore_psram_settings(void) { +static void __no_inline_not_in_flash_func(restore_psram_settings)(void) { #ifdef PICO_RP2350 qmi_hw->m[1].timing = m1_timing; qmi_hw->m[1].rfmt = m1_rfmt; + __compiler_memory_barrier(); #endif } +void supervisor_flash_pre_write(void) { + save_psram_settings(); +} + +void supervisor_flash_post_write(void) { + restore_psram_settings(); +} + void supervisor_flash_init(void) { bi_decl_if_func_used(bi_block_device( BINARY_INFO_MAKE_TAG('C', 'P'), @@ -84,9 +91,9 @@ void supervisor_flash_init(void) { // Read the RDID register to get the flash capacity. uint8_t cmd[] = {0x9f, 0, 0, 0}; uint8_t data[4]; - save_psram_settings(); + supervisor_flash_pre_write(); flash_do_cmd(cmd, data, 4); - restore_psram_settings(); + supervisor_flash_post_write(); uint8_t power_of_two = FLASH_DEFAULT_POWER_OF_TWO; // Flash must be at least 2MB (1 << 21) because we use the first 1MB for the // CircuitPython core. We validate the range because Adesto Tech flash chips @@ -116,10 +123,10 @@ void port_internal_flash_flush(void) { #if CIRCUITPY_AUDIOCORE uint32_t channel_mask = audio_dma_pause_all(); #endif - save_psram_settings(); + supervisor_flash_pre_write(); flash_range_erase(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, SECTOR_SIZE); flash_range_program(CIRCUITPY_CIRCUITPY_DRIVE_START_ADDR + _cache_lba, _cache, SECTOR_SIZE); - restore_psram_settings(); + supervisor_flash_post_write(); _cache_lba = NO_CACHE; #if CIRCUITPY_AUDIOCORE audio_dma_unpause_mask(channel_mask); diff --git a/ports/raspberrypi/supervisor/internal_flash.h b/ports/raspberrypi/supervisor/internal_flash.h index 01acbf02b4de4..a7941b17c470f 100644 --- a/ports/raspberrypi/supervisor/internal_flash.h +++ b/ports/raspberrypi/supervisor/internal_flash.h @@ -9,6 +9,10 @@ #include "mpconfigport.h" +// These must be called before and after doing a low-level flash write. +void supervisor_flash_pre_write(void); +void supervisor_flash_post_write(void); + // #define INTERNAL_FLASH_PART1_NUM_BLOCKS (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) // #define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms From 0dab8dee48893f65f238a53edae4c9b0dc75c6be Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 4 Nov 2024 09:16:29 -0600 Subject: [PATCH 14/46] Throw TypeError when json-serializing invalid types This behavior is in line with standard Python Closes: #9768 --- py/obj.c | 7 +++++++ py/obj.h | 2 ++ py/objbool.c | 3 ++- py/objdict.c | 6 ++++-- py/objfloat.c | 3 ++- py/objint.c | 3 ++- py/objlist.c | 3 ++- py/objnone.c | 3 ++- py/objstr.c | 3 ++- py/objstrunicode.c | 3 ++- py/objtuple.c | 3 ++- tests/extmod/json_dumps_extra.py | 9 +++------ 12 files changed, 32 insertions(+), 16 deletions(-) diff --git a/py/obj.c b/py/obj.c index afbc62a65fcee..a825efc3c5a8f 100644 --- a/py/obj.c +++ b/py/obj.c @@ -144,6 +144,13 @@ void mp_obj_print_helper(const mp_print_t *print, mp_obj_t o_in, mp_print_kind_t } #endif const mp_obj_type_t *type = mp_obj_get_type(o_in); + // CIRCUITPY-CHANGE: Diagnose json.dump on invalid types + #if MICROPY_PY_JSON + if (kind == PRINT_JSON && !(type->flags & MP_TYPE_FLAG_PRINT_JSON)) { + mp_raise_msg_varg(&mp_type_TypeError, + MP_ERROR_TEXT("can't convert %q to %q"), type->name, MP_QSTR_json); + } + #endif if (MP_OBJ_TYPE_HAS_SLOT(type, print)) { MP_OBJ_TYPE_GET_SLOT(type, print)((mp_print_t *)print, o_in, kind); } else { diff --git a/py/obj.h b/py/obj.h index 70fdeeebde4d6..255a00b314f5e 100644 --- a/py/obj.h +++ b/py/obj.h @@ -581,6 +581,8 @@ typedef mp_obj_t (*mp_fun_kw_t)(size_t n, const mp_obj_t *, mp_map_t *); #define MP_TYPE_FLAG_ITER_IS_CUSTOM (0x0100) #define MP_TYPE_FLAG_ITER_IS_STREAM (MP_TYPE_FLAG_ITER_IS_ITERNEXT | MP_TYPE_FLAG_ITER_IS_CUSTOM) #define MP_TYPE_FLAG_INSTANCE_TYPE (0x0200) +// CIRCUITPY-CHANGE: check for valid types in json dumps +#define MP_TYPE_FLAG_PRINT_JSON (0x0400) typedef enum { PRINT_STR = 0, diff --git a/py/objbool.c b/py/objbool.c index 5b3e3660e9510..990f52bb26fe4 100644 --- a/py/objbool.c +++ b/py/objbool.c @@ -84,11 +84,12 @@ static mp_obj_t bool_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs_ return mp_binary_op(op, MP_OBJ_NEW_SMALL_INT(value), rhs_in); } +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( // can match all numeric types mp_type_bool, MP_QSTR_bool, - MP_TYPE_FLAG_EQ_CHECKS_OTHER_TYPE, + MP_TYPE_FLAG_EQ_CHECKS_OTHER_TYPE | MP_TYPE_FLAG_PRINT_JSON, make_new, bool_make_new, print, bool_print, unary_op, bool_unary_op, diff --git a/py/objdict.c b/py/objdict.c index 96a659d36e048..7094a1c1f99f2 100644 --- a/py/objdict.c +++ b/py/objdict.c @@ -710,10 +710,11 @@ static const mp_rom_map_elem_t dict_locals_dict_table[] = { static MP_DEFINE_CONST_DICT(dict_locals_dict, dict_locals_dict_table); +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_dict, MP_QSTR_dict, - MP_TYPE_FLAG_ITER_IS_GETITER, + MP_TYPE_FLAG_ITER_IS_GETITER | MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_dict_make_new, print, dict_print, unary_op, dict_unary_op, @@ -724,10 +725,11 @@ MP_DEFINE_CONST_OBJ_TYPE( ); #if MICROPY_PY_COLLECTIONS_ORDEREDDICT +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_ordereddict, MP_QSTR_OrderedDict, - MP_TYPE_FLAG_ITER_IS_GETITER, + MP_TYPE_FLAG_ITER_IS_GETITER | MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_dict_make_new, print, dict_print, unary_op, dict_unary_op, diff --git a/py/objfloat.c b/py/objfloat.c index b3a1f692594ad..6f248cdadfc9e 100644 --- a/py/objfloat.c +++ b/py/objfloat.c @@ -186,8 +186,9 @@ static mp_obj_t float_binary_op(mp_binary_op_t op, mp_obj_t lhs_in, mp_obj_t rhs return mp_obj_float_binary_op(op, lhs_val, rhs_in); } +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( - mp_type_float, MP_QSTR_float, MP_TYPE_FLAG_EQ_NOT_REFLEXIVE | MP_TYPE_FLAG_EQ_CHECKS_OTHER_TYPE, + mp_type_float, MP_QSTR_float, MP_TYPE_FLAG_EQ_NOT_REFLEXIVE | MP_TYPE_FLAG_EQ_CHECKS_OTHER_TYPE | MP_TYPE_FLAG_PRINT_JSON, make_new, float_make_new, print, float_print, unary_op, float_unary_op, diff --git a/py/objint.c b/py/objint.c index 197625ced815c..7895f4f201ed3 100644 --- a/py/objint.c +++ b/py/objint.c @@ -588,10 +588,11 @@ static const mp_rom_map_elem_t int_locals_dict_table[] = { static MP_DEFINE_CONST_DICT(int_locals_dict, int_locals_dict_table); +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_int, MP_QSTR_int, - MP_TYPE_FLAG_NONE, + MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_int_make_new, print, mp_obj_int_print, unary_op, mp_obj_int_unary_op, diff --git a/py/objlist.c b/py/objlist.c index 475002239ca76..2c1545d877715 100644 --- a/py/objlist.c +++ b/py/objlist.c @@ -485,10 +485,11 @@ static const mp_rom_map_elem_t list_locals_dict_table[] = { static MP_DEFINE_CONST_DICT(list_locals_dict, list_locals_dict_table); +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_list, MP_QSTR_list, - MP_TYPE_FLAG_ITER_IS_GETITER, + MP_TYPE_FLAG_ITER_IS_GETITER | MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_list_make_new, print, list_print, unary_op, list_unary_op, diff --git a/py/objnone.c b/py/objnone.c index a8ce8ebfedf82..1e2016abd9fb7 100644 --- a/py/objnone.c +++ b/py/objnone.c @@ -43,10 +43,11 @@ static void none_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_ } } +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_NoneType, MP_QSTR_NoneType, - MP_TYPE_FLAG_NONE, + MP_TYPE_FLAG_PRINT_JSON, print, none_print ); diff --git a/py/objstr.c b/py/objstr.c index 0b2517197a0bd..342affb514dd4 100644 --- a/py/objstr.c +++ b/py/objstr.c @@ -2203,10 +2203,11 @@ MP_DEFINE_CONST_DICT_WITH_SIZE(mp_obj_memoryview_locals_dict, #if !MICROPY_PY_BUILTINS_STR_UNICODE static mp_obj_t mp_obj_new_str_iterator(mp_obj_t str, mp_obj_iter_buf_t *iter_buf); +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_str, MP_QSTR_str, - MP_TYPE_FLAG_NONE, + MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_str_make_new, print, str_print, binary_op, mp_obj_str_binary_op, diff --git a/py/objstrunicode.c b/py/objstrunicode.c index 203d3858e60da..a158b91236588 100644 --- a/py/objstrunicode.c +++ b/py/objstrunicode.c @@ -236,10 +236,11 @@ static mp_obj_t str_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { } } +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_str, MP_QSTR_str, - MP_TYPE_FLAG_ITER_IS_GETITER, + MP_TYPE_FLAG_ITER_IS_GETITER | MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_str_make_new, print, uni_print, unary_op, uni_unary_op, diff --git a/py/objtuple.c b/py/objtuple.c index afa80799af58e..ec1545abb84ea 100644 --- a/py/objtuple.c +++ b/py/objtuple.c @@ -232,10 +232,11 @@ static const mp_rom_map_elem_t tuple_locals_dict_table[] = { static MP_DEFINE_CONST_DICT(tuple_locals_dict, tuple_locals_dict_table); +// CIRCUITPY-CHANGE: Diagnose json.dump on invalid types MP_DEFINE_CONST_OBJ_TYPE( mp_type_tuple, MP_QSTR_tuple, - MP_TYPE_FLAG_ITER_IS_GETITER, + MP_TYPE_FLAG_ITER_IS_GETITER | MP_TYPE_FLAG_PRINT_JSON, make_new, mp_obj_tuple_make_new, print, mp_obj_tuple_print, unary_op, mp_obj_tuple_unary_op, diff --git a/tests/extmod/json_dumps_extra.py b/tests/extmod/json_dumps_extra.py index 9074416a99d93..a410b0ee0ef63 100644 --- a/tests/extmod/json_dumps_extra.py +++ b/tests/extmod/json_dumps_extra.py @@ -1,9 +1,6 @@ # test uPy json behaviour that's not valid in CPy - -try: - import json -except ImportError: - print("SKIP") - raise SystemExit +# CIRCUITPY-CHANGE: This behavior matches CPython +print("SKIP") +raise SystemExit print(json.dumps(b"1234")) From 7d6dcc2421f3bd13b38a19f2d4b7acfd02b19df9 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Sun, 3 Nov 2024 19:57:02 -0600 Subject: [PATCH 15/46] Fix `ring_waveform_loop_start` typo in frequency calculation. --- shared-module/synthio/__init__.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/shared-module/synthio/__init__.c b/shared-module/synthio/__init__.c index 630c3de86988c..f2c05cd5f74aa 100644 --- a/shared-module/synthio/__init__.c +++ b/shared-module/synthio/__init__.c @@ -196,7 +196,7 @@ static bool synth_note_into_buffer(synthio_synth_t *synth, int chan, int32_t *ou ring_waveform = note->ring_waveform_buf.buf; ring_waveform_length = note->ring_waveform_buf.len; if (note->ring_waveform_loop_start > 0 && note->ring_waveform_loop_start < ring_waveform_length) { - ring_waveform_start = note->waveform_loop_start; + ring_waveform_start = note->ring_waveform_loop_start; } if (note->ring_waveform_loop_end > ring_waveform_start && note->ring_waveform_loop_end < ring_waveform_length) { ring_waveform_length = note->ring_waveform_loop_end; From a22f4f958346e83bd1176b482c8f9b4cd20e5fa7 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Sun, 3 Nov 2024 20:00:35 -0600 Subject: [PATCH 16/46] Fix default value of `synthio.Note.amplitude` in documentation. --- shared-bindings/synthio/Note.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/shared-bindings/synthio/Note.c b/shared-bindings/synthio/Note.c index c886f106a4cfd..f7f6f54986e76 100644 --- a/shared-bindings/synthio/Note.c +++ b/shared-bindings/synthio/Note.c @@ -40,7 +40,7 @@ static const mp_arg_t note_properties[] = { //| waveform_loop_start: int = 0, //| waveform_loop_end: int = waveform_max_length, //| envelope: Optional[Envelope] = None, -//| amplitude: BlockInput = 0.0, +//| amplitude: BlockInput = 1.0, //| bend: BlockInput = 0.0, //| filter: Optional[Biquad] = None, //| ring_frequency: float = 0.0, From 1dc74d525ed9ee0c9b433515175c97e5f43b5d5a Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Sun, 3 Nov 2024 20:30:06 -0600 Subject: [PATCH 17/46] Add support for `synthio.BlockInput` on `synthio.Note.waveform_loop_start`, `synthio.Note.waveform_loop_end`, `synthio.Note.ring_waveform_loop_start`, and `synthio.Note.ring_waveform_loop_end`. --- shared-bindings/synthio/Note.c | 42 +++++++++++++++++--------------- shared-bindings/synthio/Note.h | 16 ++++++------ shared-module/synthio/Note.c | 36 ++++++++++++--------------- shared-module/synthio/Note.h | 4 +-- shared-module/synthio/__init__.c | 16 +++--------- 5 files changed, 52 insertions(+), 62 deletions(-) diff --git a/shared-bindings/synthio/Note.c b/shared-bindings/synthio/Note.c index f7f6f54986e76..60ebbff3a2ae9 100644 --- a/shared-bindings/synthio/Note.c +++ b/shared-bindings/synthio/Note.c @@ -20,15 +20,15 @@ static const mp_arg_t note_properties[] = { { MP_QSTR_amplitude, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(1) } }, { MP_QSTR_bend, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, { MP_QSTR_waveform, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, - { MP_QSTR_waveform_loop_start, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, - { MP_QSTR_waveform_loop_end, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, + { MP_QSTR_waveform_loop_start, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, + { MP_QSTR_waveform_loop_end, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, { MP_QSTR_envelope, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, { MP_QSTR_filter, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, { MP_QSTR_ring_frequency, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, { MP_QSTR_ring_bend, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, { MP_QSTR_ring_waveform, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, - { MP_QSTR_ring_waveform_loop_start, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, - { MP_QSTR_ring_waveform_loop_end, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, + { MP_QSTR_ring_waveform_loop_start, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, + { MP_QSTR_ring_waveform_loop_end, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, }; //| class Note: //| def __init__( @@ -37,8 +37,8 @@ static const mp_arg_t note_properties[] = { //| frequency: float, //| panning: BlockInput = 0.0, //| waveform: Optional[ReadableBuffer] = None, -//| waveform_loop_start: int = 0, -//| waveform_loop_end: int = waveform_max_length, +//| waveform_loop_start: BlockInput = 0, +//| waveform_loop_end: BlockInput = waveform_max_length, //| envelope: Optional[Envelope] = None, //| amplitude: BlockInput = 1.0, //| bend: BlockInput = 0.0, @@ -46,8 +46,8 @@ static const mp_arg_t note_properties[] = { //| ring_frequency: float = 0.0, //| ring_bend: float = 0.0, //| ring_waveform: Optional[ReadableBuffer] = None, -//| ring_waveform_loop_start: int = 0, -//| ring_waveform_loop_end: int = waveform_max_length, +//| ring_waveform_loop_start: BlockInput = 0, +//| ring_waveform_loop_end: BlockInput = waveform_max_length, //| ) -> None: //| """Construct a Note object, with a frequency in Hz, and optional panning, waveform, envelope, tremolo (volume change) and bend (frequency change). //| @@ -198,7 +198,9 @@ MP_PROPERTY_GETSET(synthio_note_waveform_obj, (mp_obj_t)&synthio_note_get_waveform_obj, (mp_obj_t)&synthio_note_set_waveform_obj); -//| waveform_loop_start: int + + +//| waveform_loop_start: BlockInput //| """The sample index of where to begin looping waveform data. //| //| Values outside the range ``0`` to ``waveform_max_length-1`` (inclusive) are rejected with a `ValueError`. @@ -206,13 +208,13 @@ MP_PROPERTY_GETSET(synthio_note_waveform_obj, //| Values greater than or equal to the actual waveform length are treated as 0.""" static mp_obj_t synthio_note_get_waveform_loop_start(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(common_hal_synthio_note_get_waveform_loop_start(self)); + return common_hal_synthio_note_get_waveform_loop_start(self); } MP_DEFINE_CONST_FUN_OBJ_1(synthio_note_get_waveform_loop_start_obj, synthio_note_get_waveform_loop_start); static mp_obj_t synthio_note_set_waveform_loop_start(mp_obj_t self_in, mp_obj_t arg) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_synthio_note_set_waveform_loop_start(self, mp_obj_get_int(arg)); + common_hal_synthio_note_set_waveform_loop_start(self, arg); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(synthio_note_set_waveform_loop_start_obj, synthio_note_set_waveform_loop_start); @@ -220,7 +222,7 @@ MP_PROPERTY_GETSET(synthio_note_waveform_loop_start_obj, (mp_obj_t)&synthio_note_get_waveform_loop_start_obj, (mp_obj_t)&synthio_note_set_waveform_loop_start_obj); -//| waveform_loop_end: int +//| waveform_loop_end: BlockInput //| """The sample index of where to end looping waveform data. //| //| Values outside the range ``1`` to ``waveform_max_length`` (inclusive) are rejected with a `ValueError`. @@ -231,13 +233,13 @@ MP_PROPERTY_GETSET(synthio_note_waveform_loop_start_obj, //| static mp_obj_t synthio_note_get_waveform_loop_end(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(common_hal_synthio_note_get_waveform_loop_end(self)); + return common_hal_synthio_note_get_waveform_loop_end(self); } MP_DEFINE_CONST_FUN_OBJ_1(synthio_note_get_waveform_loop_end_obj, synthio_note_get_waveform_loop_end); static mp_obj_t synthio_note_set_waveform_loop_end(mp_obj_t self_in, mp_obj_t arg) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_synthio_note_set_waveform_loop_end(self, mp_obj_get_int(arg)); + common_hal_synthio_note_set_waveform_loop_end(self, arg); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(synthio_note_set_waveform_loop_end_obj, synthio_note_set_waveform_loop_end); @@ -331,7 +333,7 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_obj, (mp_obj_t)&synthio_note_get_ring_waveform_obj, (mp_obj_t)&synthio_note_set_ring_waveform_obj); -//| ring_waveform_loop_start: int +//| ring_waveform_loop_start: BlockInput //| """The sample index of where to begin looping waveform data. //| //| Values outside the range ``0`` to ``waveform_max_length-1`` (inclusive) are rejected with a `ValueError`. @@ -339,13 +341,13 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_obj, //| Values greater than or equal to the actual waveform length are treated as 0.""" static mp_obj_t synthio_note_get_ring_waveform_loop_start(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(common_hal_synthio_note_get_ring_waveform_loop_start(self)); + return common_hal_synthio_note_get_ring_waveform_loop_start(self); } MP_DEFINE_CONST_FUN_OBJ_1(synthio_note_get_ring_waveform_loop_start_obj, synthio_note_get_ring_waveform_loop_start); static mp_obj_t synthio_note_set_ring_waveform_loop_start(mp_obj_t self_in, mp_obj_t arg) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_synthio_note_set_ring_waveform_loop_start(self, mp_obj_get_int(arg)); + common_hal_synthio_note_set_ring_waveform_loop_start(self, arg); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(synthio_note_set_ring_waveform_loop_start_obj, synthio_note_set_ring_waveform_loop_start); @@ -353,7 +355,7 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_loop_start_obj, (mp_obj_t)&synthio_note_get_ring_waveform_loop_start_obj, (mp_obj_t)&synthio_note_set_ring_waveform_loop_start_obj); -//| ring_waveform_loop_end: int +//| ring_waveform_loop_end: BlockInput //| """The sample index of where to end looping waveform data. //| //| Values outside the range ``1`` to ``waveform_max_length`` (inclusive) are rejected with a `ValueError`. @@ -364,13 +366,13 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_loop_start_obj, //| static mp_obj_t synthio_note_get_ring_waveform_loop_end(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - return mp_obj_new_int(common_hal_synthio_note_get_ring_waveform_loop_end(self)); + return common_hal_synthio_note_get_ring_waveform_loop_end(self); } MP_DEFINE_CONST_FUN_OBJ_1(synthio_note_get_ring_waveform_loop_end_obj, synthio_note_get_ring_waveform_loop_end); static mp_obj_t synthio_note_set_ring_waveform_loop_end(mp_obj_t self_in, mp_obj_t arg) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_synthio_note_set_ring_waveform_loop_end(self, mp_obj_get_int(arg)); + common_hal_synthio_note_set_ring_waveform_loop_end(self, arg); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(synthio_note_set_ring_waveform_loop_end_obj, synthio_note_set_ring_waveform_loop_end); diff --git a/shared-bindings/synthio/Note.h b/shared-bindings/synthio/Note.h index 0ee450acfe467..707b9f2e10463 100644 --- a/shared-bindings/synthio/Note.h +++ b/shared-bindings/synthio/Note.h @@ -31,11 +31,11 @@ void common_hal_synthio_note_set_bend(synthio_note_obj_t *self, mp_obj_t value); mp_obj_t common_hal_synthio_note_get_waveform_obj(synthio_note_obj_t *self); void common_hal_synthio_note_set_waveform(synthio_note_obj_t *self, mp_obj_t value); -mp_int_t common_hal_synthio_note_get_waveform_loop_start(synthio_note_obj_t *self); -void common_hal_synthio_note_set_waveform_loop_start(synthio_note_obj_t *self, mp_int_t value_in); +mp_obj_t common_hal_synthio_note_get_waveform_loop_start(synthio_note_obj_t *self); +void common_hal_synthio_note_set_waveform_loop_start(synthio_note_obj_t *self, mp_obj_t value); -mp_int_t common_hal_synthio_note_get_waveform_loop_end(synthio_note_obj_t *self); -void common_hal_synthio_note_set_waveform_loop_end(synthio_note_obj_t *self, mp_int_t value_in); +mp_obj_t common_hal_synthio_note_get_waveform_loop_end(synthio_note_obj_t *self); +void common_hal_synthio_note_set_waveform_loop_end(synthio_note_obj_t *self, mp_obj_t value); mp_float_t common_hal_synthio_note_get_ring_frequency(synthio_note_obj_t *self); void common_hal_synthio_note_set_ring_frequency(synthio_note_obj_t *self, mp_float_t value); @@ -46,11 +46,11 @@ void common_hal_synthio_note_set_ring_bend(synthio_note_obj_t *self, mp_obj_t va mp_obj_t common_hal_synthio_note_get_ring_waveform_obj(synthio_note_obj_t *self); void common_hal_synthio_note_set_ring_waveform(synthio_note_obj_t *self, mp_obj_t value); -mp_int_t common_hal_synthio_note_get_ring_waveform_loop_start(synthio_note_obj_t *self); -void common_hal_synthio_note_set_ring_waveform_loop_start(synthio_note_obj_t *self, mp_int_t value_in); +mp_obj_t common_hal_synthio_note_get_ring_waveform_loop_start(synthio_note_obj_t *self); +void common_hal_synthio_note_set_ring_waveform_loop_start(synthio_note_obj_t *self, mp_obj_t value); -mp_int_t common_hal_synthio_note_get_ring_waveform_loop_end(synthio_note_obj_t *self); -void common_hal_synthio_note_set_ring_waveform_loop_end(synthio_note_obj_t *self, mp_int_t value_in); +mp_obj_t common_hal_synthio_note_get_ring_waveform_loop_end(synthio_note_obj_t *self); +void common_hal_synthio_note_set_ring_waveform_loop_end(synthio_note_obj_t *self, mp_obj_t value); mp_obj_t common_hal_synthio_note_get_envelope_obj(synthio_note_obj_t *self); void common_hal_synthio_note_set_envelope(synthio_note_obj_t *self, mp_obj_t value); diff --git a/shared-module/synthio/Note.c b/shared-module/synthio/Note.c index 49dfbb7f429d3..0e612914ec700 100644 --- a/shared-module/synthio/Note.c +++ b/shared-module/synthio/Note.c @@ -100,22 +100,20 @@ void common_hal_synthio_note_set_waveform(synthio_note_obj_t *self, mp_obj_t wav self->waveform_obj = waveform_in; } -mp_int_t common_hal_synthio_note_get_waveform_loop_start(synthio_note_obj_t *self) { - return self->waveform_loop_start; +mp_obj_t common_hal_synthio_note_get_waveform_loop_start(synthio_note_obj_t *self) { + return self->waveform_loop_start.obj; } -void common_hal_synthio_note_set_waveform_loop_start(synthio_note_obj_t *self, mp_int_t value_in) { - mp_int_t val = mp_arg_validate_int_range(value_in, 0, SYNTHIO_WAVEFORM_SIZE - 1, MP_QSTR_waveform_loop_start); - self->waveform_loop_start = val; +void common_hal_synthio_note_set_waveform_loop_start(synthio_note_obj_t *self, mp_obj_t value_in) { + synthio_block_assign_slot(value_in, &self->waveform_loop_start, MP_QSTR_waveform_loop_start); } -mp_int_t common_hal_synthio_note_get_waveform_loop_end(synthio_note_obj_t *self) { - return self->waveform_loop_end; +mp_obj_t common_hal_synthio_note_get_waveform_loop_end(synthio_note_obj_t *self) { + return self->waveform_loop_end.obj; } -void common_hal_synthio_note_set_waveform_loop_end(synthio_note_obj_t *self, mp_int_t value_in) { - mp_int_t val = mp_arg_validate_int_range(value_in, 1, SYNTHIO_WAVEFORM_SIZE, MP_QSTR_waveform_loop_end); - self->waveform_loop_end = val; +void common_hal_synthio_note_set_waveform_loop_end(synthio_note_obj_t *self, mp_obj_t value_in) { + synthio_block_assign_slot(value_in, &self->waveform_loop_end, MP_QSTR_waveform_loop_end); } mp_obj_t common_hal_synthio_note_get_ring_waveform_obj(synthio_note_obj_t *self) { @@ -133,22 +131,20 @@ void common_hal_synthio_note_set_ring_waveform(synthio_note_obj_t *self, mp_obj_ self->ring_waveform_obj = ring_waveform_in; } -mp_int_t common_hal_synthio_note_get_ring_waveform_loop_start(synthio_note_obj_t *self) { - return self->ring_waveform_loop_start; +mp_obj_t common_hal_synthio_note_get_ring_waveform_loop_start(synthio_note_obj_t *self) { + return self->ring_waveform_loop_start.obj; } -void common_hal_synthio_note_set_ring_waveform_loop_start(synthio_note_obj_t *self, mp_int_t value_in) { - mp_int_t val = mp_arg_validate_int_range(value_in, 0, SYNTHIO_WAVEFORM_SIZE - 1, MP_QSTR_ring_waveform_loop_start); - self->ring_waveform_loop_start = val; +void common_hal_synthio_note_set_ring_waveform_loop_start(synthio_note_obj_t *self, mp_obj_t value_in) { + synthio_block_assign_slot(value_in, &self->ring_waveform_loop_start, MP_QSTR_ring_waveform_loop_start); } -mp_int_t common_hal_synthio_note_get_ring_waveform_loop_end(synthio_note_obj_t *self) { - return self->ring_waveform_loop_end; +mp_obj_t common_hal_synthio_note_get_ring_waveform_loop_end(synthio_note_obj_t *self) { + return self->ring_waveform_loop_end.obj; } -void common_hal_synthio_note_set_ring_waveform_loop_end(synthio_note_obj_t *self, mp_int_t value_in) { - mp_int_t val = mp_arg_validate_int_range(value_in, 1, SYNTHIO_WAVEFORM_SIZE, MP_QSTR_ring_waveform_loop_end); - self->ring_waveform_loop_end = val; +void common_hal_synthio_note_set_ring_waveform_loop_end(synthio_note_obj_t *self, mp_obj_t value_in) { + synthio_block_assign_slot(value_in, &self->ring_waveform_loop_end, MP_QSTR_ring_waveform_loop_end); } void synthio_note_recalculate(synthio_note_obj_t *self, int32_t sample_rate) { diff --git a/shared-module/synthio/Note.h b/shared-module/synthio/Note.h index dc4e5557fd3c9..9d9deb42ac8f3 100644 --- a/shared-module/synthio/Note.h +++ b/shared-module/synthio/Note.h @@ -28,9 +28,9 @@ typedef struct synthio_note_obj { int32_t ring_frequency_scaled, ring_frequency_bent; mp_buffer_info_t waveform_buf; - uint32_t waveform_loop_start, waveform_loop_end; + synthio_block_slot_t waveform_loop_start, waveform_loop_end; mp_buffer_info_t ring_waveform_buf; - uint32_t ring_waveform_loop_start, ring_waveform_loop_end; + synthio_block_slot_t ring_waveform_loop_start, ring_waveform_loop_end; synthio_envelope_definition_t envelope_def; } synthio_note_obj_t; diff --git a/shared-module/synthio/__init__.c b/shared-module/synthio/__init__.c index f2c05cd5f74aa..8173da3f0ce35 100644 --- a/shared-module/synthio/__init__.c +++ b/shared-module/synthio/__init__.c @@ -184,23 +184,15 @@ static bool synth_note_into_buffer(synthio_synth_t *synth, int chan, int32_t *ou if (note->waveform_buf.buf) { waveform = note->waveform_buf.buf; waveform_length = note->waveform_buf.len; - if (note->waveform_loop_start > 0 && note->waveform_loop_start < waveform_length) { - waveform_start = note->waveform_loop_start; - } - if (note->waveform_loop_end > waveform_start && note->waveform_loop_end < waveform_length) { - waveform_length = note->waveform_loop_end; - } + waveform_start = synthio_block_slot_get_limited(¬e->waveform_loop_start, 0, waveform_length - 1); + waveform_length = synthio_block_slot_get_limited(¬e->waveform_loop_end, waveform_start + 1, waveform_length); } dds_rate = synthio_frequency_convert_scaled_to_dds((uint64_t)frequency_scaled * (waveform_length - waveform_start), sample_rate); if (note->ring_frequency_scaled != 0 && note->ring_waveform_buf.buf) { ring_waveform = note->ring_waveform_buf.buf; ring_waveform_length = note->ring_waveform_buf.len; - if (note->ring_waveform_loop_start > 0 && note->ring_waveform_loop_start < ring_waveform_length) { - ring_waveform_start = note->ring_waveform_loop_start; - } - if (note->ring_waveform_loop_end > ring_waveform_start && note->ring_waveform_loop_end < ring_waveform_length) { - ring_waveform_length = note->ring_waveform_loop_end; - } + ring_waveform_start = synthio_block_slot_get_limited(¬e->ring_waveform_loop_start, 0, ring_waveform_length - 1); + ring_waveform_length = synthio_block_slot_get_limited(¬e->ring_waveform_loop_end, ring_waveform_start + 1, ring_waveform_length); ring_dds_rate = synthio_frequency_convert_scaled_to_dds((uint64_t)note->ring_frequency_bent * (ring_waveform_length - ring_waveform_start), sample_rate); uint32_t lim = ring_waveform_length << SYNTHIO_FREQUENCY_SHIFT; if (ring_dds_rate > lim / sizeof(int16_t)) { From 256faac0dd63048a7b08c0a491ce5e0858639b80 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Mon, 4 Nov 2024 08:13:17 -0600 Subject: [PATCH 18/46] Make conversion of `mp_float_t` to `uint32_t` for waveform_loop values explicit. --- shared-module/synthio/__init__.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/shared-module/synthio/__init__.c b/shared-module/synthio/__init__.c index 8173da3f0ce35..be7e036660a84 100644 --- a/shared-module/synthio/__init__.c +++ b/shared-module/synthio/__init__.c @@ -184,15 +184,15 @@ static bool synth_note_into_buffer(synthio_synth_t *synth, int chan, int32_t *ou if (note->waveform_buf.buf) { waveform = note->waveform_buf.buf; waveform_length = note->waveform_buf.len; - waveform_start = synthio_block_slot_get_limited(¬e->waveform_loop_start, 0, waveform_length - 1); - waveform_length = synthio_block_slot_get_limited(¬e->waveform_loop_end, waveform_start + 1, waveform_length); + waveform_start = (uint32_t)synthio_block_slot_get_limited(¬e->waveform_loop_start, 0, waveform_length - 1); + waveform_length = (uint32_t)synthio_block_slot_get_limited(¬e->waveform_loop_end, waveform_start + 1, waveform_length); } dds_rate = synthio_frequency_convert_scaled_to_dds((uint64_t)frequency_scaled * (waveform_length - waveform_start), sample_rate); if (note->ring_frequency_scaled != 0 && note->ring_waveform_buf.buf) { ring_waveform = note->ring_waveform_buf.buf; ring_waveform_length = note->ring_waveform_buf.len; - ring_waveform_start = synthio_block_slot_get_limited(¬e->ring_waveform_loop_start, 0, ring_waveform_length - 1); - ring_waveform_length = synthio_block_slot_get_limited(¬e->ring_waveform_loop_end, ring_waveform_start + 1, ring_waveform_length); + ring_waveform_start = (uint32_t)synthio_block_slot_get_limited(¬e->ring_waveform_loop_start, 0, ring_waveform_length - 1); + ring_waveform_length = (uint32_t)synthio_block_slot_get_limited(¬e->ring_waveform_loop_end, ring_waveform_start + 1, ring_waveform_length); ring_dds_rate = synthio_frequency_convert_scaled_to_dds((uint64_t)note->ring_frequency_bent * (ring_waveform_length - ring_waveform_start), sample_rate); uint32_t lim = ring_waveform_length << SYNTHIO_FREQUENCY_SHIFT; if (ring_dds_rate > lim / sizeof(int16_t)) { From f1153ce9ce9f6d431423d315d6c2e891ad5ffa1e Mon Sep 17 00:00:00 2001 From: Cooper Dalrymple Date: Mon, 4 Nov 2024 11:13:04 -0600 Subject: [PATCH 19/46] Update `ring_frequency` and `ring_bend` with `MP_ARG_KW_ONLY`. --- shared-bindings/synthio/Note.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/shared-bindings/synthio/Note.c b/shared-bindings/synthio/Note.c index 60ebbff3a2ae9..f46bef9f510a2 100644 --- a/shared-bindings/synthio/Note.c +++ b/shared-bindings/synthio/Note.c @@ -24,8 +24,8 @@ static const mp_arg_t note_properties[] = { { MP_QSTR_waveform_loop_end, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, { MP_QSTR_envelope, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, { MP_QSTR_filter, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, - { MP_QSTR_ring_frequency, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, - { MP_QSTR_ring_bend, MP_ARG_OBJ, {.u_obj = MP_ROM_INT(0) } }, + { MP_QSTR_ring_frequency, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, + { MP_QSTR_ring_bend, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, { MP_QSTR_ring_waveform, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_NONE } }, { MP_QSTR_ring_waveform_loop_start, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(0) } }, { MP_QSTR_ring_waveform_loop_end, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_obj = MP_ROM_INT(SYNTHIO_WAVEFORM_SIZE) } }, From 1db7b7eb353ec415069b6801b1280ee1febe688e Mon Sep 17 00:00:00 2001 From: Cooper Dalrymple Date: Mon, 4 Nov 2024 11:25:51 -0600 Subject: [PATCH 20/46] Update loop docstrings to demonstrate `BlockInput` implementation. --- shared-bindings/synthio/Note.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/shared-bindings/synthio/Note.c b/shared-bindings/synthio/Note.c index f46bef9f510a2..9e588edefd1a9 100644 --- a/shared-bindings/synthio/Note.c +++ b/shared-bindings/synthio/Note.c @@ -203,9 +203,7 @@ MP_PROPERTY_GETSET(synthio_note_waveform_obj, //| waveform_loop_start: BlockInput //| """The sample index of where to begin looping waveform data. //| -//| Values outside the range ``0`` to ``waveform_max_length-1`` (inclusive) are rejected with a `ValueError`. -//| -//| Values greater than or equal to the actual waveform length are treated as 0.""" +//| The value is limited to the range ``0`` to ``len(waveform)-1`` (inclusive).""" static mp_obj_t synthio_note_get_waveform_loop_start(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); return common_hal_synthio_note_get_waveform_loop_start(self); @@ -225,9 +223,7 @@ MP_PROPERTY_GETSET(synthio_note_waveform_loop_start_obj, //| waveform_loop_end: BlockInput //| """The sample index of where to end looping waveform data. //| -//| Values outside the range ``1`` to ``waveform_max_length`` (inclusive) are rejected with a `ValueError`. -//| -//| If the value is greater than the actual waveform length, or less than or equal to the loop start, the loop will occur at the end of the waveform. +//| The value is limited to the range ``waveform_loop_start+1`` to ``len(waveform)`` (inclusive). //| //| Use the `synthio.waveform_max_length` constant to set the loop point at the end of the wave form, no matter its length.""" //| @@ -336,9 +332,7 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_obj, //| ring_waveform_loop_start: BlockInput //| """The sample index of where to begin looping waveform data. //| -//| Values outside the range ``0`` to ``waveform_max_length-1`` (inclusive) are rejected with a `ValueError`. -//| -//| Values greater than or equal to the actual waveform length are treated as 0.""" +//| The value is limited to the range ``0`` to ``len(ring_waveform)-1`` (inclusive).""" static mp_obj_t synthio_note_get_ring_waveform_loop_start(mp_obj_t self_in) { synthio_note_obj_t *self = MP_OBJ_TO_PTR(self_in); return common_hal_synthio_note_get_ring_waveform_loop_start(self); @@ -358,9 +352,7 @@ MP_PROPERTY_GETSET(synthio_note_ring_waveform_loop_start_obj, //| ring_waveform_loop_end: BlockInput //| """The sample index of where to end looping waveform data. //| -//| Values outside the range ``1`` to ``waveform_max_length`` (inclusive) are rejected with a `ValueError`. -//| -//| If the value is greater than the actual waveform length, or less than or equal to the loop start, the loop will occur at the end of the waveform. +//| The value is limited to the range ``ring_waveform_loop_start+1`` to ``len(ring_waveform)`` (inclusive). //| //| Use the `synthio.waveform_max_length` constant to set the loop point at the end of the wave form, no matter its length.""" //| From 19f0d5ce6ea2c7b981b2c79f7515e404da627af0 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Mon, 4 Nov 2024 13:33:16 -0600 Subject: [PATCH 21/46] Updated expected results for synthesizer_note test. --- tests/circuitpython/synthesizer_note.py.exp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/circuitpython/synthesizer_note.py.exp b/tests/circuitpython/synthesizer_note.py.exp index 43d07e5e7da9c..7417a4c8a19fb 100644 --- a/tests/circuitpython/synthesizer_note.py.exp +++ b/tests/circuitpython/synthesizer_note.py.exp @@ -1,10 +1,10 @@ () [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] -(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0, waveform_loop_end=16384, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0, ring_waveform_loop_end=16384),) +(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0.0, waveform_loop_end=16384.0, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0.0, ring_waveform_loop_end=16384.0),) [-16383, -16383, -16383, -16383, 16382, 16382, 16382, 16382, 16382, -16383, -16383, -16383, -16383, -16383, 16382, 16382, 16382, 16382, 16382, -16383, -16383, -16383, -16383, -16383] -(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0, waveform_loop_end=16384, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0, ring_waveform_loop_end=16384), Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0, waveform_loop_end=16384, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0, ring_waveform_loop_end=16384)) +(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0.0, waveform_loop_end=16384.0, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0.0, ring_waveform_loop_end=16384.0), Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0.0, waveform_loop_end=16384.0, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0.0, ring_waveform_loop_end=16384.0)) [-1, -1, -1, -1, -1, -1, -1, -1, 28045, -1, -1, -1, -1, -28046, -1, -1, -1, -1, 28045, -1, -1, -1, -1, -28046] -(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0, waveform_loop_end=16384, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0, ring_waveform_loop_end=16384),) +(Note(frequency=830.6076004423605, panning=0.0, amplitude=1.0, bend=0.0, waveform=None, waveform_loop_start=0.0, waveform_loop_end=16384.0, envelope=None, filter=None, ring_frequency=0.0, ring_bend=0.0, ring_waveform=None, ring_waveform_loop_start=0.0, ring_waveform_loop_end=16384.0),) [-1, -1, -1, 28045, -1, -1, -1, -1, -1, -1, -1, -1, 28045, -1, -1, -1, -1, -28046, -1, -1, -1, -1, 28045, -1] (-5242, 5241) (-10485, 10484) From 53ab31abd0ce93461b0e9346fe58ef36ae9049c3 Mon Sep 17 00:00:00 2001 From: Bill Sideris Date: Sun, 3 Nov 2024 19:39:31 +0200 Subject: [PATCH 22/46] Reboot to normal mode upon fs wipe --- shared-module/storage/__init__.c | 1 + 1 file changed, 1 insertion(+) diff --git a/shared-module/storage/__init__.c b/shared-module/storage/__init__.c index 12486aff752f3..e64184c000bb6 100644 --- a/shared-module/storage/__init__.c +++ b/shared-module/storage/__init__.c @@ -264,6 +264,7 @@ void common_hal_storage_erase_filesystem(bool extended) { supervisor_flash_set_extended(extended); #endif (void)filesystem_init(false, true); // Force a re-format. Ignore failure. + common_hal_mcu_on_next_reset(RUNMODE_NORMAL); common_hal_mcu_reset(); // We won't actually get here, since we're resetting. } From 5e98739d0851e6055e857f5efe2df44194352463 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sun, 3 Nov 2024 09:48:35 -0600 Subject: [PATCH 23/46] Fix various issues detected by zizmor --- .github/workflows/build-board-custom.yml | 23 ++++++++++++++++++----- .github/workflows/build-boards.yml | 1 + .github/workflows/build-mpy-cross.yml | 8 ++++++-- .github/workflows/build.yml | 20 ++++++++++++++------ .github/workflows/create-website-pr.yml | 1 + .github/workflows/pre-commit.yml | 1 + 6 files changed, 41 insertions(+), 13 deletions(-) diff --git a/.github/workflows/build-board-custom.yml b/.github/workflows/build-board-custom.yml index b91ccbd2d28f3..39976cd7c1ecc 100644 --- a/.github/workflows/build-board-custom.yml +++ b/.github/workflows/build-board-custom.yml @@ -42,21 +42,29 @@ jobs: run: | git clone --filter=tree:0 https://github.com/adafruit/circuitpython.git $GITHUB_WORKSPACE - name: Checkout head / tag + env: + TAG: ${{ inputs.version == 'latest' && 'HEAD' || inputs.version }} run: | - git checkout ${{ inputs.version == 'latest' && 'HEAD' || inputs.version }} + git checkout "$TAG" - name: fork compatibility if: github.repository_owner != 'adafruit' + env: + REPO: ${{ github.repository }} run: | - git remote add fork https://github.com/${{github.repository}}.git + git remote add fork "https://github.com/$REPO.git" git fetch fork --filter=tree:0 - name: branch compatibility if: inputs.branch != 'main' && inputs.version == 'latest' && github.repository_owner == 'adafruit' + env: + BRANCH: ${{ inputs.branch }} run: | - git checkout ${{inputs.branch}} + git checkout "$BRANCH" - name: branch compatibility (fork) if: inputs.branch != '' && inputs.version == 'latest' && github.repository_owner != 'adafruit' + env: + BRANCH: ${{ inputs.branch }} run: | - git checkout -b fork-branch fork/${{inputs.branch}} + git checkout -b fork-branch "fork/$BRANCH" - name: Set up identifier if: inputs.debug || inputs.flags != '' run: | @@ -101,7 +109,12 @@ jobs: riscv64-unknown-elf-gcc --version || true mkfs.fat --version || true - name: Build board - run: make -j4 ${{ inputs.flags }} BOARD=${{ inputs.board }} DEBUG=${{ inputs.debug && '1' || '0' }} TRANSLATION=${{ inputs.language }} + env: + TRANSLATION: ${{ inputs.language }} + BOARD: ${{ inputs.board }} + FLAGS: ${{ inputs.flags }} + DEBUG: ${{ inputs.debug && '1' || '0' }} + run: make -j4 $FLAGS BOARD="$BOARD" DEBUG=$DEBUG TRANSLATION="$TRANSLATION" working-directory: ports/${{ steps.set-up-port.outputs.port }} - name: Upload artifact uses: actions/upload-artifact@v4 diff --git a/.github/workflows/build-boards.yml b/.github/workflows/build-boards.yml index be076e0789f86..7daa7ae7e322e 100644 --- a/.github/workflows/build-boards.yml +++ b/.github/workflows/build-boards.yml @@ -31,6 +31,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 diff --git a/.github/workflows/build-mpy-cross.yml b/.github/workflows/build-mpy-cross.yml index 9d94fb638ef5a..731cb8661f6d0 100644 --- a/.github/workflows/build-mpy-cross.yml +++ b/.github/workflows/build-mpy-cross.yml @@ -33,6 +33,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: @@ -57,9 +58,12 @@ jobs: run: make -C mpy-cross -j4 -f Makefile.${{ matrix.mpy-cross }} - name: Set output + env: + EX=${{ env[format('EX_{0}', matrix.mpy-cross)] || matrix.mpy-cross }} + OS=${{ env[format('OS_{0}', matrix.mpy-cross)] }}" run: | - echo >> $GITHUB_ENV "EX=${{ env[format('EX_{0}', matrix.mpy-cross)] || matrix.mpy-cross }}" - echo >> $GITHUB_ENV "OS=${{ env[format('OS_{0}', matrix.mpy-cross)] }}" + echo >> $GITHUB_ENV "EX=$EX" + echo >> $GITHUB_ENV "OS=$OS" - name: Upload artifact uses: actions/upload-artifact@v4 diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 0f8b1b7638170..7cc8d49a4efbb 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -33,6 +33,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: @@ -66,7 +67,9 @@ jobs: EXCLUDE_COMMIT: ${{ github.event.pull_request.head.sha }} - name: Set head sha (pull) if: github.event_name == 'pull_request' - run: echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> $GITHUB_ENV + env: + HEAD_SHA:${{ github.event.pull_request.head.sha }} + run: echo "HEAD_SHA=$HEAD_SHA" >> $GITHUB_ENV - name: Set base sha (pull) if: github.event_name == 'pull_request' run: git cat-file -e $SHA && echo "BASE_SHA=$SHA" >> $GITHUB_ENV || true @@ -74,7 +77,9 @@ jobs: SHA: ${{ steps.get-last-commit-with-checks.outputs.commit_sha || github.event.pull_request.base.sha }} - name: Set head sha (push) if: github.event_name == 'push' - run: echo "HEAD_SHA=${{ github.event.after }}" >> $GITHUB_ENV + env: + SHA: ${{ github.event.after }} + run: echo "HEAD_SHA=$SHA" >> $GITHUB_ENV - name: Set base sha (push) if: github.event_name == 'push' run: git cat-file -e $SHA && echo "BASE_SHA=$SHA" >> $GITHUB_ENV || true @@ -114,6 +119,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: @@ -149,9 +155,9 @@ jobs: (github.event_name == 'push' && github.ref == 'refs/heads/main' && github.repository_owner == 'adafruit') || (github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested')) run: | - [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross-macos-universal s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-${{ env.CP_VERSION }}-universal --no-progress --region us-east-1 - [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross/build-arm64/mpy-cross-arm64 s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-${{ env.CP_VERSION }}-arm64 --no-progress --region us-east-1 - [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross/build/mpy-cross s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-${{ env.CP_VERSION }}-x64 --no-progress --region us-east-1 + [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross-macos-universal s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-"${CP_VERSION}"-universal --no-progress --region us-east-1 + [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross/build-arm64/mpy-cross-arm64 s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-"${CP_VERSION}"-arm64 --no-progress --region us-east-1 + [ -z "$AWS_ACCESS_KEY_ID" ] || aws s3 cp mpy-cross/build/mpy-cross s3://adafruit-circuit-python/bin/mpy-cross/macos/mpy-cross-macos-"${CP_VERSION}"-x64 --no-progress --region us-east-1 env: AWS_PAGER: '' AWS_ACCESS_KEY_ID: ${{ secrets.AWS_ACCESS_KEY_ID }} @@ -170,6 +176,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: @@ -188,7 +195,7 @@ jobs: name: stubs path: circuitpython-stubs/dist/* - name: Test Documentation Build (HTML) - run: sphinx-build -E -W -b html -D version=${{ env.CP_VERSION }} -D release=${{ env.CP_VERSION }} . _build/html + run: sphinx-build -E -W -b html -D version="$CP_VERSION" -D release="$CP_VERSION" . _build/html - uses: actions/upload-artifact@v4 with: name: docs-html @@ -271,6 +278,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up submodules uses: ./.github/actions/deps/submodules - name: build mpy-cross diff --git a/.github/workflows/create-website-pr.yml b/.github/workflows/create-website-pr.yml index 8f4cce7691c1b..32c1792fa6c74 100644 --- a/.github/workflows/create-website-pr.yml +++ b/.github/workflows/create-website-pr.yml @@ -22,6 +22,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index b3517d748f5e7..778270dc08c8f 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -22,6 +22,7 @@ jobs: submodules: false show-progress: false fetch-depth: 1 + persist-credentials: false - name: Set up python uses: actions/setup-python@v5 with: From 47d0d185daab52d9d0e54b8f10b73473c3eb203c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 4 Nov 2024 09:54:57 -0600 Subject: [PATCH 24/46] fix yaml syntax error --- .github/workflows/build.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 7cc8d49a4efbb..7d37baebdc15d 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -68,7 +68,7 @@ jobs: - name: Set head sha (pull) if: github.event_name == 'pull_request' env: - HEAD_SHA:${{ github.event.pull_request.head.sha }} + HEAD_SHA: ${{ github.event.pull_request.head.sha }} run: echo "HEAD_SHA=$HEAD_SHA" >> $GITHUB_ENV - name: Set base sha (pull) if: github.event_name == 'pull_request' From 481b0e7cf34f95d8bc99b903f7221d165c045b76 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 4 Nov 2024 12:18:09 -0600 Subject: [PATCH 25/46] more yaml syntax fixes --- .github/workflows/build-mpy-cross.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/build-mpy-cross.yml b/.github/workflows/build-mpy-cross.yml index 731cb8661f6d0..831ad3082275b 100644 --- a/.github/workflows/build-mpy-cross.yml +++ b/.github/workflows/build-mpy-cross.yml @@ -59,8 +59,8 @@ jobs: - name: Set output env: - EX=${{ env[format('EX_{0}', matrix.mpy-cross)] || matrix.mpy-cross }} - OS=${{ env[format('OS_{0}', matrix.mpy-cross)] }}" + EX: ${{ env[format('EX_{0}', matrix.mpy-cross)] || matrix.mpy-cross }} + OS: ${{ env[format('OS_{0}', matrix.mpy-cross)] }}" run: | echo >> $GITHUB_ENV "EX=$EX" echo >> $GITHUB_ENV "OS=$OS" From f3aacf5b8920fcf0df9d059b840ade7a88131bdf Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 4 Nov 2024 18:29:46 -0600 Subject: [PATCH 26/46] mbedtls: avoid function that only exists on rp2040 rp2350 doesn't have the same RTC peripheral as the 2040 (let alone other family micros) this has the side effect of obeying a different timesource if one has been configured. --- lib/mbedtls_config/mbedtls_port.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/lib/mbedtls_config/mbedtls_port.c b/lib/mbedtls_config/mbedtls_port.c index 73929c85e81ed..b7e8ceae5de0f 100644 --- a/lib/mbedtls_config/mbedtls_port.c +++ b/lib/mbedtls_config/mbedtls_port.c @@ -27,15 +27,13 @@ #if CIRCUITPY_SSL_MBEDTLS +#include "py/runtime.h" #include "mbedtls_config.h" #include "mbedtls/entropy_poll.h" -#include "hardware/rtc.h" #include "shared/timeutils/timeutils.h" #include "shared-bindings/os/__init__.h" - -#include "hardware/rtc.h" -#include "shared/timeutils/timeutils.h" +#include "shared-bindings/time/__init__.h" extern uint8_t rosc_random_u8(size_t cycles); @@ -46,9 +44,10 @@ int mbedtls_hardware_poll(void *data, unsigned char *output, size_t len, size_t } time_t rp2_rtctime_seconds(time_t *timer) { - datetime_t t; - rtc_get_datetime(&t); - return timeutils_seconds_since_epoch(t.year, t.month, t.day, t.hour, t.min, t.sec); + mp_obj_t datetime = mp_load_attr(MP_STATE_VM(rtc_time_source), MP_QSTR_datetime); + timeutils_struct_time_t tm; + struct_time_to_tm(datetime, &tm); + return timeutils_seconds_since_epoch(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); } #endif From 5e18ba99812cf3a09d044124d43f4f5bdfa0a584 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Sun, 3 Nov 2024 18:30:19 -0600 Subject: [PATCH 27/46] Fix error with NULL sample handling in `audiofilters.Filter`. --- shared-module/audiofilters/Filter.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/shared-module/audiofilters/Filter.c b/shared-module/audiofilters/Filter.c index 86edb6cb04183..47032fd46dfe8 100644 --- a/shared-module/audiofilters/Filter.c +++ b/shared-module/audiofilters/Filter.c @@ -240,8 +240,21 @@ audioio_get_buffer_result_t audiofilters_filter_get_buffer(audiofilters_filter_o } } - // If we have a sample, filter it - if (self->sample != NULL) { + if (self->sample == NULL) { + if (self->samples_signed) { + memset(word_buffer, 0, length * (self->bits_per_sample / 8)); + } else { + // For unsigned samples set to the middle which is "quiet" + if (MP_LIKELY(self->bits_per_sample == 16)) { + memset(word_buffer, 32768, length * (self->bits_per_sample / 8)); + } else { + memset(hword_buffer, 128, length * (self->bits_per_sample / 8)); + } + } + + length = 0; + } else { + // we have a sample to play and filter // Determine how many bytes we can process to our buffer, the less of the sample we have left and our buffer remaining uint32_t n = MIN(self->sample_buffer_length, length); From 38ffdecbc6ad0755bba26eaf5da2f3e565d8ef48 Mon Sep 17 00:00:00 2001 From: dcooperdalrymple Date: Tue, 5 Nov 2024 08:41:23 -0600 Subject: [PATCH 28/46] Fix 16-bit unsigned integer silence within audio effects. --- shared-module/audiodelays/Echo.c | 5 ++++- shared-module/audiofilters/Filter.c | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/shared-module/audiodelays/Echo.c b/shared-module/audiodelays/Echo.c index 3f45162cb5e93..a0c34c6540d85 100644 --- a/shared-module/audiodelays/Echo.c +++ b/shared-module/audiodelays/Echo.c @@ -342,7 +342,10 @@ audioio_get_buffer_result_t audiodelays_echo_get_buffer(audiodelays_echo_obj_t * } else { // For unsigned samples set to the middle which is "quiet" if (MP_LIKELY(self->bits_per_sample == 16)) { - memset(word_buffer, 32768, length * (self->bits_per_sample / 8)); + uint16_t *uword_buffer = (uint16_t *)word_buffer; + while (length--) { + *uword_buffer++ = 32768; + } } else { memset(hword_buffer, 128, length * (self->bits_per_sample / 8)); } diff --git a/shared-module/audiofilters/Filter.c b/shared-module/audiofilters/Filter.c index 47032fd46dfe8..d7ee30e8ea66c 100644 --- a/shared-module/audiofilters/Filter.c +++ b/shared-module/audiofilters/Filter.c @@ -246,7 +246,10 @@ audioio_get_buffer_result_t audiofilters_filter_get_buffer(audiofilters_filter_o } else { // For unsigned samples set to the middle which is "quiet" if (MP_LIKELY(self->bits_per_sample == 16)) { - memset(word_buffer, 32768, length * (self->bits_per_sample / 8)); + uint16_t *uword_buffer = (uint16_t *)word_buffer; + while (length--) { + *uword_buffer++ = 32768; + } } else { memset(hword_buffer, 128, length * (self->bits_per_sample / 8)); } From ce3252e8cf44277079f52f853cfefcde7b52ae13 Mon Sep 17 00:00:00 2001 From: Iqbal Rifai Date: Tue, 5 Nov 2024 13:30:34 +0000 Subject: [PATCH 29/46] Translated using Weblate (Indonesian) Currently translated at 37.3% (372 of 997 strings) Translation: CircuitPython/main Translate-URL: https://hosted.weblate.org/projects/circuitpython/main/id/ --- locale/ID.po | 173 +++++++++++++++++++++++++++------------------------ 1 file changed, 92 insertions(+), 81 deletions(-) diff --git a/locale/ID.po b/locale/ID.po index 4bc03c8ccd76d..973aa69ffb742 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -6,15 +6,15 @@ msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" "POT-Creation-Date: 2021-01-04 12:55-0600\n" -"PO-Revision-Date: 2023-11-16 15:03+0000\n" -"Last-Translator: Scott Shawcroft \n" +"PO-Revision-Date: 2024-11-06 14:00+0000\n" +"Last-Translator: Iqbal Rifai \n" "Language-Team: LANGUAGE \n" "Language: ID\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=1; plural=0;\n" -"X-Generator: Weblate 5.2\n" +"X-Generator: Weblate 5.8.2\n" #: main.c msgid "" @@ -1714,15 +1714,15 @@ msgstr "Jumlah pin terlalu besar" #: ports/stm/common-hal/alarm/pin/PinAlarm.c #: ports/stm/common-hal/pulseio/PulseIn.c msgid "Pin interrupt already in use" -msgstr "" +msgstr "Pin interupsi sudah digunakan" #: shared-bindings/adafruit_bus_device/spi_device/SPIDevice.c msgid "Pin is input only" -msgstr "" +msgstr "Pin hanya input" #: ports/raspberrypi/common-hal/countio/Counter.c msgid "Pin must be on PWM Channel B" -msgstr "" +msgstr "Pin harus berada di Saluran PWM B" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format @@ -1741,11 +1741,11 @@ msgstr "Pin harus berurutan" #: ports/raspberrypi/common-hal/rotaryio/IncrementalEncoder.c msgid "Pins must be sequential GPIO pins" -msgstr "" +msgstr "Pin harus merupakan pin GPIO yang berurutan" #: ports/raspberrypi/common-hal/audiopwmio/PWMAudioOut.c msgid "Pins must share PWM slice" -msgstr "" +msgstr "Pin harus berbagi potongan PWM" #: shared-module/usb/core/Device.c msgid "Pipe error" @@ -1757,11 +1757,11 @@ msgstr "Tambahkan module apapun pada filesystem\n" #: shared-module/vectorio/Polygon.c msgid "Polygon needs at least 3 points" -msgstr "" +msgstr "Poligon membutuhkan setidaknya 3 poin" #: supervisor/shared/safe_mode.c msgid "Power dipped. Make sure you are providing enough power." -msgstr "" +msgstr "Daya menurun. Pastikan Anda menyediakan daya yang cukup." #: shared-bindings/_bleio/Adapter.c msgid "Prefix buffer must be on the heap" @@ -1779,19 +1779,19 @@ msgstr "" #: ports/raspberrypi/common-hal/rp2pio/StateMachine.c msgid "Program does IN without loading ISR" -msgstr "" +msgstr "Program melakukan IN tanpa memuat ISR" #: ports/raspberrypi/common-hal/rp2pio/StateMachine.c msgid "Program does OUT without loading OSR" -msgstr "" +msgstr "Program melakukan OUT tanpa memuat OSR" #: ports/raspberrypi/bindings/rp2pio/StateMachine.c msgid "Program size invalid" -msgstr "" +msgstr "Ukuran program tidak valid" #: ports/espressif/common-hal/espulp/ULP.c msgid "Program too long" -msgstr "" +msgstr "Program terlalu lama" #: shared-bindings/digitalio/DigitalInOut.c msgid "Pull not used when direction is output." @@ -1799,11 +1799,11 @@ msgstr "Pull tidak digunakan saat arah output." #: ports/raspberrypi/common-hal/countio/Counter.c msgid "RISE_AND_FALL not available on this chip" -msgstr "" +msgstr "RISE_AND_FALL tidak tersedia pada chip ini" #: shared-module/displayio/OnDiskBitmap.c msgid "RLE-compressed BMP not supported" -msgstr "" +msgstr "BMP-terkompresi RLE tidak didukung" #: ports/stm/common-hal/os/__init__.c msgid "RNG DeInit Error" @@ -1844,11 +1844,11 @@ msgstr "sistem file (filesystem) bersifat Read-only" #: ports/espressif/common-hal/espidf/__init__.c msgid "Received response was invalid" -msgstr "" +msgstr "Respon yang diterima tidak valid" #: supervisor/shared/bluetooth/bluetooth.c msgid "Reconnecting" -msgstr "" +msgstr "Menghubungkan kembali" #: shared-bindings/epaperdisplay/EPaperDisplay.c msgid "Refresh too soon" @@ -1856,7 +1856,7 @@ msgstr "Segarkan terlalu cepat" #: shared-bindings/canio/RemoteTransmissionRequest.c msgid "RemoteTransmissionRequests limited to 8 bytes" -msgstr "" +msgstr "RemoteTransmissionRequests dibatasi hingga 8 byte" #: shared-bindings/aesio/aes.c msgid "Requested AES mode is unsupported" @@ -1864,7 +1864,7 @@ msgstr "Mode AES yang diminta tidak didukung" #: ports/espressif/common-hal/espidf/__init__.c msgid "Requested resource not found" -msgstr "" +msgstr "Sumber yang diminta tidak ditemukan" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Right channel unsupported" @@ -1872,7 +1872,7 @@ msgstr "Channel Kanan tidak didukung" #: shared-module/jpegio/JpegDecoder.c msgid "Right format but not supported" -msgstr "" +msgstr "Format benar tapi tidak didukung" #: main.c msgid "Running in safe mode! Not running saved code.\n" @@ -1882,7 +1882,7 @@ msgstr "" #: shared-module/sdcardio/SDCard.c msgid "SD card CSD format not supported" -msgstr "" +msgstr "Kartu SD Format CSD tidak didukung" #: ports/cxd56/common-hal/sdioio/SDCard.c msgid "SDCard init" @@ -1901,7 +1901,7 @@ msgstr "" #: ports/espressif/common-hal/busio/SPI.c msgid "SPI configuration failed" -msgstr "" +msgstr "Konfigurasi SPI gagal" #: ports/stm/common-hal/busio/SPI.c msgid "SPI init error" @@ -1909,7 +1909,7 @@ msgstr "" #: ports/raspberrypi/common-hal/busio/SPI.c msgid "SPI peripheral in use" -msgstr "" +msgstr "Periferal SPI sedang digunakan" #: ports/stm/common-hal/busio/SPI.c msgid "SPI re-init" @@ -1917,12 +1917,12 @@ msgstr "" #: shared-bindings/is31fl3741/FrameBuffer.c msgid "Scale dimensions must divide by 3" -msgstr "" +msgstr "Skala dimensi harus dibagi 3" #: ports/espressif/common-hal/_bleio/Adapter.c #: ports/nordic/common-hal/_bleio/Adapter.c msgid "Scan already in progress. Stop with stop_scan." -msgstr "" +msgstr "Pemindaian sedang berjalan. Hentikan dengan stop_scan." #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1931,11 +1931,11 @@ msgstr "Serializer sedang digunakan" #: shared-bindings/ssl/SSLContext.c msgid "Server side context cannot have hostname" -msgstr "" +msgstr "Context server tidak mendukung hostname" #: ports/cxd56/common-hal/camera/Camera.c msgid "Size not supported" -msgstr "" +msgstr "Ukuran tidak didukung" #: shared-bindings/alarm/SleepMemory.c shared-bindings/memorymap/AddressRange.c #: shared-bindings/nvm/ByteArray.c @@ -1952,7 +1952,7 @@ msgstr "Potongan tidak didukung" #: ports/espressif/common-hal/socketpool/SocketPool.c #: ports/raspberrypi/common-hal/socketpool/SocketPool.c msgid "SocketPool can only be used with wifi.radio" -msgstr "" +msgstr "SocketPool hanya dapat digunakan dengan wifi.radio" #: shared-bindings/aesio/aes.c msgid "Source and destination buffers must be the same length" @@ -1960,19 +1960,19 @@ msgstr "Buffer sumber dan tujuan harus memiliki panjang yang sama" #: shared-bindings/paralleldisplaybus/ParallelBus.c msgid "Specify exactly one of data0 or data_pins" -msgstr "" +msgstr "Pilih hanya satu antara data0 atau data_pins" #: supervisor/shared/safe_mode.c msgid "Stack overflow. Increase stack size." -msgstr "" +msgstr "Stack overflow. Tambahkan ukuran stack." #: shared-bindings/alarm/time/TimeAlarm.c msgid "Supply one of monotonic_time or epoch_time" -msgstr "" +msgstr "Berikan salah satu dari monotonic_time atau epoch_time" #: shared-bindings/gnss/GNSS.c msgid "System entry must be gnss.SatelliteSystem" -msgstr "" +msgstr "Entri sistem harus berupa gnss.SatelliteSystem" #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" @@ -1980,33 +1980,36 @@ msgstr "Waktu baca suhu habis" #: supervisor/shared/safe_mode.c msgid "The `microcontroller` module was used to boot into safe mode." -msgstr "" +msgstr "Modul `microcontroller` digunakan untuk boot ke mode aman." #: py/obj.c msgid "The above exception was the direct cause of the following exception:" msgstr "" +"Pengecualian di atas adalah penyebab langsung dari pengecualian berikut:" #: shared-bindings/rgbmatrix/RGBMatrix.c msgid "The length of rgb_pins must be 6, 12, 18, 24, or 30" -msgstr "" +msgstr "Panjang rgb_pins harus 6, 12, 18, 24, atau 30" #: shared-module/audiodelays/Echo.c shared-module/audiomixer/MixerVoice.c msgid "The sample's %q does not match" -msgstr "" +msgstr "Sampel punya %q yang tidak cocok" #: supervisor/shared/safe_mode.c msgid "Third-party firmware fatal error." -msgstr "" +msgstr "Kesalahan fatal pada firmware pihak ketiga." #: shared-module/imagecapture/ParallelImageCapture.c msgid "This microcontroller does not support continuous capture." -msgstr "" +msgstr "Mikrokontroler ini tidak mendukung penangkapan berkelanjutan." #: shared-module/paralleldisplaybus/ParallelBus.c msgid "" "This microcontroller only supports data0=, not data_pins=, because it " "requires contiguous pins." msgstr "" +"Mikrokontroler ini hanya mendukung data0=, bukan data_pins=, karena " +"membutuhkan pin yang berurutan." #: shared-bindings/displayio/TileGrid.c msgid "Tile height must exactly divide bitmap height" @@ -2022,17 +2025,18 @@ msgstr "Lebar ubin harus persis membagi lebar bitmap" #: shared-bindings/alarm/time/TimeAlarm.c msgid "Time is in the past." -msgstr "" +msgstr "Waktu sudah berlalu." #: ports/espressif/common-hal/_bleio/Adapter.c #: ports/nordic/common-hal/_bleio/Adapter.c #, c-format msgid "Timeout is too long: Maximum timeout length is %d seconds" msgstr "" +"Waktu tunggu terlalu lama: Panjang maksimum waktu tunggu adalah %d detik" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Too many channels in sample" -msgstr "" +msgstr "Sampel memiliki terlalu banyak saluran" #: ports/raspberrypi/common-hal/audiobusio/I2SOut.c msgid "Too many channels in sample." @@ -2040,11 +2044,13 @@ msgstr "Terlalu banyak channel dalam sampel" #: ports/espressif/common-hal/_bleio/Characteristic.c msgid "Too many descriptors" -msgstr "" +msgstr "Terlalu banyak deskriptor" #: shared-module/displayio/__init__.c msgid "Too many display busses; forgot displayio.release_displays() ?" msgstr "" +"Terlalu banyak jalur tampilan; mungkin kamu lupa untuk panggil displayio." +"release_displays()?" #: shared-module/displayio/__init__.c msgid "Too many displays" @@ -2053,12 +2059,12 @@ msgstr "Terlalu banyak tampilan" #: ports/espressif/common-hal/_bleio/PacketBuffer.c #: ports/nordic/common-hal/_bleio/PacketBuffer.c msgid "Total data to write is larger than %q" -msgstr "" +msgstr "Total data yang akan ditulis lebih besar dari %q" #: ports/raspberrypi/common-hal/alarm/touch/TouchAlarm.c #: ports/stm/common-hal/alarm/touch/TouchAlarm.c msgid "Touch alarms not available" -msgstr "" +msgstr "Alarm sentuh tidak tersedia" #: py/obj.c msgid "Traceback (most recent call last):\n" @@ -2075,7 +2081,7 @@ msgstr "" #: ports/raspberrypi/common-hal/busio/UART.c msgid "UART peripheral in use" -msgstr "" +msgstr "Periferal UART sedang digunakan" #: ports/stm/common-hal/busio/UART.c msgid "UART re-init" @@ -2095,11 +2101,11 @@ msgstr "" #: supervisor/shared/safe_mode.c msgid "USB devices need more endpoints than are available." -msgstr "" +msgstr "Perangkat USB butuh lebih banyak endpoint daripada yang tersedia." #: supervisor/shared/safe_mode.c msgid "USB devices specify too many interface names." -msgstr "" +msgstr "Perangkat USB menggunakan terlalu banyak nama antarmuka." #: shared-module/usb_hid/Device.c msgid "USB error" @@ -2119,7 +2125,7 @@ msgstr "Nilai UUID bukan str, int atau byte buffer" #: ports/raspberrypi/common-hal/memorymap/AddressRange.c msgid "Unable to access unaligned IO register" -msgstr "" +msgstr "Tidak dapat mengakses register IO yang tidak teratur" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -2130,11 +2136,11 @@ msgstr "Tidak dapat mengalokasikan buffer untuk signed conversion" #: supervisor/shared/safe_mode.c msgid "Unable to allocate to the heap." -msgstr "" +msgstr "Tidak dapat mengalokasikan ke heap." #: ports/espressif/common-hal/busio/I2C.c msgid "Unable to create lock" -msgstr "" +msgstr "Tidak dapat membuat kunci" #: shared-module/i2cdisplaybus/I2CDisplayBus.c #: shared-module/is31fl3741/IS31FL3741.c @@ -2153,7 +2159,7 @@ msgstr "Tidak dapat membaca data palet warna" #: ports/espressif/common-hal/mdns/Server.c #: ports/raspberrypi/common-hal/mdns/Server.c msgid "Unable to start mDNS query" -msgstr "" +msgstr "Tidak dapat memulai kueri mDNS" #: shared-bindings/nvm/ByteArray.c msgid "Unable to write to nvm." @@ -2161,11 +2167,11 @@ msgstr "Tidak dapat menulis ke nvm." #: ports/raspberrypi/common-hal/memorymap/AddressRange.c msgid "Unable to write to read-only memory" -msgstr "" +msgstr "Tidak dapat menulis ke memori hanya-baca" #: shared-bindings/alarm/SleepMemory.c msgid "Unable to write to sleep_memory." -msgstr "" +msgstr "Tidak dapat menulis ke sleep_memory." #: ports/nordic/common-hal/_bleio/UUID.c msgid "Unexpected nrfx uuid type" @@ -2174,23 +2180,23 @@ msgstr "Tipe urf nrfx tak sesuai" #: ports/espressif/common-hal/_bleio/__init__.c #, c-format msgid "Unknown BLE error at %s:%d: %d" -msgstr "" +msgstr "Kesalahan BLE tidak diketahui di %s:%d: %d" #: ports/espressif/common-hal/_bleio/__init__.c #, c-format msgid "Unknown BLE error: %d" -msgstr "" +msgstr "Kesalahan BLE tidak diketahui: %d" #: ports/espressif/common-hal/max3421e/Max3421E.c #: ports/raspberrypi/common-hal/wifi/__init__.c #, c-format msgid "Unknown error code %d" -msgstr "" +msgstr "Kode kesalahan tidak diketahui %d" #: shared-bindings/wifi/Radio.c #, c-format msgid "Unknown failure %d" -msgstr "" +msgstr "Kegagalan tidak diketahui %d" #: ports/nordic/common-hal/_bleio/__init__.c #, c-format @@ -2210,17 +2216,17 @@ msgstr "Kesalahan keamanan tidak dikenal: 0x%04x" #: ports/espressif/common-hal/_bleio/__init__.c #, c-format msgid "Unknown system firmware error at %s:%d: %d" -msgstr "" +msgstr "Kesalahan firmware sistem tidak dikenal di %s:%d: %d" #: ports/nordic/common-hal/_bleio/__init__.c #, c-format msgid "Unknown system firmware error: %04x" -msgstr "" +msgstr "Kesalahan firmware sistem tidak diketahui: %04x" #: ports/espressif/common-hal/_bleio/__init__.c #, c-format msgid "Unknown system firmware error: %d" -msgstr "" +msgstr "Kesalahan firmware sistem tidak diketahui: %d" #: shared-bindings/adafruit_pixelbuf/PixelBuf.c #: shared-module/_pixelmap/PixelMap.c @@ -2250,16 +2256,16 @@ msgstr "Format tidak didukung" #: shared-bindings/hashlib/__init__.c msgid "Unsupported hash algorithm" -msgstr "" +msgstr "Algoritma hash tidak didukung" #: ports/espressif/common-hal/socketpool/Socket.c msgid "Unsupported socket type" -msgstr "" +msgstr "Jenis soket tidak didukung" #: ports/espressif/common-hal/_bleio/Adapter.c #: ports/espressif/common-hal/dualbank/__init__.c msgid "Update failed" -msgstr "" +msgstr "Pembaruan gagal" #: ports/espressif/common-hal/_bleio/Characteristic.c #: ports/nordic/common-hal/_bleio/Characteristic.c @@ -2275,7 +2281,7 @@ msgstr "Panjang nilai > max_length" #: ports/espressif/common-hal/espidf/__init__.c msgid "Version was invalid" -msgstr "" +msgstr "Versi tidak valid" #: ports/stm/common-hal/microcontroller/Processor.c msgid "Voltage read timed out" @@ -2287,7 +2293,7 @@ msgstr "PERINGATAN: Nama file kode anda mempunyai dua ekstensi\n" #: ports/nordic/common-hal/watchdog/WatchDogTimer.c msgid "WatchDogTimer cannot be deinitialized once mode is set to RESET" -msgstr "" +msgstr "WatchDogTimer tidak dapat dideinisialisasi setelah mode diatur ke RESET" #: py/builtinhelp.c #, c-format @@ -2298,6 +2304,11 @@ msgid "" "\n" "To list built-in modules type `help(\"modules\")`.\n" msgstr "" +"Selamat datang di Adafruit CircuitPython %s!\n" +"\n" +"Kunjungi circuitpython.org untuk informasi lebih lanjut.\n" +"\n" +"Untuk membuat daftar modul bawaan, ketik `help(\"modules\")`.\n" #: supervisor/shared/web_workflow/web_workflow.c msgid "Wi-Fi: " @@ -2305,7 +2316,7 @@ msgstr "" #: ports/raspberrypi/common-hal/wifi/Radio.c msgid "Wifi is not enabled" -msgstr "" +msgstr "Wifi tidak diaktifkan" #: main.c msgid "Woken up by alarm.\n" @@ -2321,63 +2332,63 @@ msgstr "Menulis tidak didukung pada Karakteristik" #: ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h #: ports/atmel-samd/boards/meowmeow/mpconfigboard.h msgid "You pressed both buttons at start up." -msgstr "" +msgstr "Anda menekan kedua tombol saat memulai." #: ports/espressif/boards/m5stack_core_basic/mpconfigboard.h #: ports/espressif/boards/m5stack_core_fire/mpconfigboard.h #: ports/espressif/boards/m5stack_stick_c/mpconfigboard.h #: ports/espressif/boards/m5stack_stick_c_plus/mpconfigboard.h msgid "You pressed button A at start up." -msgstr "" +msgstr "Anda menekan tombol A saat memulai." #: ports/espressif/boards/m5stack_m5paper/mpconfigboard.h msgid "You pressed button DOWN at start up." -msgstr "" +msgstr "Anda menekan tombol DOWN saat memulai." #: supervisor/shared/safe_mode.c msgid "You pressed the BOOT button at start up" -msgstr "" +msgstr "Anda menekan tombol BOOT saat memulai" #: ports/espressif/boards/adafruit_feather_esp32c6_4mbflash_nopsram/mpconfigboard.h #: ports/espressif/boards/adafruit_itsybitsy_esp32/mpconfigboard.h msgid "You pressed the BOOT button at start up." -msgstr "" +msgstr "Anda menekan tombol BOOT saat memulai" #: ports/espressif/boards/adafruit_huzzah32_breakout/mpconfigboard.h msgid "You pressed the GPIO0 button at start up." -msgstr "" +msgstr "Anda menekan tombol GPIO0 saat memulai." #: ports/espressif/boards/espressif_esp32_lyrat/mpconfigboard.h msgid "You pressed the Rec button at start up." -msgstr "" +msgstr "Anda menekan tombol Rec saat memulai." #: ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h msgid "You pressed the SW38 button at start up." -msgstr "" +msgstr "Anda menekan tombol SW38 saat memulai." #: ports/espressif/boards/hardkernel_odroid_go/mpconfigboard.h #: ports/espressif/boards/vidi_x/mpconfigboard.h msgid "You pressed the VOLUME button at start up." -msgstr "" +msgstr "Anda menekan tombol VOLUME saat memulai." #: ports/espressif/boards/m5stack_atom_echo/mpconfigboard.h #: ports/espressif/boards/m5stack_atom_lite/mpconfigboard.h #: ports/espressif/boards/m5stack_atom_matrix/mpconfigboard.h #: ports/espressif/boards/m5stack_atom_u/mpconfigboard.h msgid "You pressed the central button at start up." -msgstr "" +msgstr "Anda menekan tombol tengah saat memulai." #: ports/nordic/boards/aramcon2_badge/mpconfigboard.h msgid "You pressed the left button at start up." -msgstr "" +msgstr "Anda menekan tombol kiri saat memulai." #: supervisor/shared/safe_mode.c msgid "You pressed the reset button during boot." -msgstr "" +msgstr "Anda menekan tombol reset saat memulai." #: supervisor/shared/micropython.c msgid "[truncated due to length]" -msgstr "" +msgstr "[terpotong karena kepanjangan]" #: py/objtype.c msgid "__init__() should return None" @@ -2402,11 +2413,11 @@ msgstr "alamatnya kosong" #: py/compile.c msgid "annotation must be an identifier" -msgstr "" +msgstr "anotasi harus merupakan pengidentifikasi" #: extmod/ulab/code/numpy/create.c msgid "arange: cannot compute length" -msgstr "" +msgstr "arange: tidak dapat menghitung panjang" #: py/modbuiltins.c msgid "arg is an empty sequence" @@ -2414,7 +2425,7 @@ msgstr "arg berisi urutan kosong" #: py/objobject.c msgid "arg must be user-type" -msgstr "" +msgstr "arg harus bertipe user-type" #: extmod/ulab/code/numpy/numerical.c msgid "argsort argument must be an ndarray" From a335fa074b48b8f3836f0df174452e2954ceb677 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 7 Nov 2024 10:50:32 -0600 Subject: [PATCH 30/46] make the default variant 'coverage' This means that the variant no longer needs to be explicitly named and you can just run `make test`. --- ports/unix/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/ports/unix/Makefile b/ports/unix/Makefile index 526955b1ea5c9..cd0403a8f5df5 100644 --- a/ports/unix/Makefile +++ b/ports/unix/Makefile @@ -4,8 +4,9 @@ ifdef VARIANT_DIR # the path as the variant name. VARIANT ?= $(notdir $(VARIANT_DIR:/=)) else -# If not given on the command line, then default to standard. -VARIANT ?= standard +# CIRCUITPY-CHANGE: default variant is coverage +# If not given on the command line, then default to coverage. +VARIANT ?= coverage VARIANT_DIR ?= variants/$(VARIANT) endif From 600ab366943a194bced8a00a6702d24f5027eee2 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 5 Nov 2024 09:36:18 -0600 Subject: [PATCH 31/46] Add audiodelays & audioeffects to unix coverage port .. and add a very basic audioeffects test, showing that it plausibly is working I had to address several build errors that occurred in the Unix build, mostly related to conversion from FP types to integral types (replaced by explicit casts) and by accidental mixing of regular & f-suffixed floating constants (replaced with the MICROPY_FLOAT_CONST macro) Particularly this change could use consideration: ```diff - self->max_echo_buffer_len = self->sample_rate / 1000.0f * max_delay_ms * (self->channel_count * sizeof(uint16_t)); // bytes + self->max_echo_buffer_len = (uint32_t)(self->sample_rate / 1000.0f * max_delay_ms) * (self->channel_count * sizeof(uint16_t)); // bytes ``` The buffer length is being calculated in floating point based on the millisecond delay & the sample rate. The result could then be a fractional number such as 529.2 for a 12ms delay at 44.1kHz. Multiplying a floating number by the size required for each echo buffer item (`(self->channel_count * sizeof(uint16_t))`) could yield a number of bytes that doesn't correspond to an integral number of buffer items. I grouped the float->int conversion so that it converts the number of echo buffer items to an integer and then multiplies by the size of the item. --- .../unix/variants/coverage/mpconfigvariant.mk | 11 + shared-module/audiodelays/Echo.c | 22 +- shared-module/audiofilters/Filter.c | 5 +- tests/circuitpython/audiofilter_filter.py | 16 + tests/circuitpython/audiofilter_filter.py.exp | 1536 +++++++++++++++++ tests/testlib/audiofilterhelper.py | 26 + 6 files changed, 1603 insertions(+), 13 deletions(-) create mode 100644 tests/circuitpython/audiofilter_filter.py create mode 100644 tests/circuitpython/audiofilter_filter.py.exp create mode 100644 tests/testlib/audiofilterhelper.py diff --git a/ports/unix/variants/coverage/mpconfigvariant.mk b/ports/unix/variants/coverage/mpconfigvariant.mk index e250fbe9b2dac..80491823e492d 100644 --- a/ports/unix/variants/coverage/mpconfigvariant.mk +++ b/ports/unix/variants/coverage/mpconfigvariant.mk @@ -33,6 +33,10 @@ SRC_BITMAP := \ shared-bindings/audiocore/__init__.c \ shared-bindings/audiocore/RawSample.c \ shared-bindings/audiocore/WaveFile.c \ + shared-bindings/audiodelays/Echo.c \ + shared-bindings/audiodelays/__init__.c \ + shared-bindings/audiofilters/Filter.c \ + shared-bindings/audiofilters/__init__.c \ shared-bindings/audiomixer/__init__.c \ shared-bindings/audiomixer/Mixer.c \ shared-bindings/audiomixer/MixerVoice.c \ @@ -70,6 +74,10 @@ SRC_BITMAP := \ shared-module/audiocore/__init__.c \ shared-module/audiocore/RawSample.c \ shared-module/audiocore/WaveFile.c \ + shared-module/audiodelays/Echo.c \ + shared-module/audiodelays/__init__.c \ + shared-module/audiofilters/Filter.c \ + shared-module/audiofilters/__init__.c \ shared-module/audiomixer/__init__.c \ shared-module/audiomp3/MP3Decoder.c \ shared-module/audiomixer/Mixer.c \ @@ -127,6 +135,9 @@ $(BUILD)/lib/mp3/src/buffers.o: CFLAGS += -include "shared-module/audiomp3/__ini CFLAGS += \ -DCIRCUITPY_AESIO=1 \ -DCIRCUITPY_AUDIOCORE=1 \ + -DCIRCUITPY_AUDIOEFFECTS=1 \ + -DCIRCUITPY_AUDIODELAYS=1 \ + -DCIRCUITPY_AUDIOFILTERS=1 \ -DCIRCUITPY_AUDIOMIXER=1 \ -DCIRCUITPY_AUDIOMP3=1 \ -DCIRCUITPY_AUDIOMP3_USE_PORT_ALLOCATOR=0 \ diff --git a/shared-module/audiodelays/Echo.c b/shared-module/audiodelays/Echo.c index a0c34c6540d85..e4eeff48f4c33 100644 --- a/shared-module/audiodelays/Echo.c +++ b/shared-module/audiodelays/Echo.c @@ -77,7 +77,7 @@ void common_hal_audiodelays_echo_construct(audiodelays_echo_obj_t *self, uint32_ // Allocate the echo buffer for the max possible delay, echo is always 16-bit self->max_delay_ms = max_delay_ms; - self->max_echo_buffer_len = self->sample_rate / 1000.0f * max_delay_ms * (self->channel_count * sizeof(uint16_t)); // bytes + self->max_echo_buffer_len = (uint32_t)(self->sample_rate / 1000.0f * max_delay_ms) * (self->channel_count * sizeof(uint16_t)); // bytes self->echo_buffer = m_malloc(self->max_echo_buffer_len); if (self->echo_buffer == NULL) { common_hal_audiodelays_echo_deinit(self); @@ -129,11 +129,11 @@ void common_hal_audiodelays_echo_set_delay_ms(audiodelays_echo_obj_t *self, mp_o void recalculate_delay(audiodelays_echo_obj_t *self, mp_float_t f_delay_ms) { if (self->freq_shift) { // Calculate the rate of iteration over the echo buffer with 8 sub-bits - self->echo_buffer_rate = MAX(self->max_delay_ms / f_delay_ms * 256.0f, 1.0); + self->echo_buffer_rate = (uint32_t)MAX(self->max_delay_ms / f_delay_ms * MICROPY_FLOAT_CONST(256.0), MICROPY_FLOAT_CONST(1.0)); self->echo_buffer_len = self->max_echo_buffer_len; } else { // Calculate the current echo buffer length in bytes - uint32_t new_echo_buffer_len = self->sample_rate / 1000.0f * f_delay_ms * (self->channel_count * sizeof(uint16_t)); + uint32_t new_echo_buffer_len = (uint32_t)(self->sample_rate / MICROPY_FLOAT_CONST(1000.0) * f_delay_ms) * (self->channel_count * sizeof(uint16_t)); // Check if our new echo is too long for our maximum buffer if (new_echo_buffer_len > self->max_echo_buffer_len) { @@ -153,7 +153,7 @@ void recalculate_delay(audiodelays_echo_obj_t *self, mp_float_t f_delay_ms) { memset(self->echo_buffer + self->echo_buffer_len, 0, self->max_echo_buffer_len - self->echo_buffer_len); } - self->current_delay_ms = f_delay_ms; + self->current_delay_ms = (uint32_t)f_delay_ms; } mp_obj_t common_hal_audiodelays_echo_get_decay(audiodelays_echo_obj_t *self) { @@ -360,17 +360,17 @@ audioio_get_buffer_result_t audiodelays_echo_get_buffer(audiodelays_echo_obj_t * echo = echo_buffer[echo_buffer_pos >> 8]; next_buffer_pos = echo_buffer_pos + self->echo_buffer_rate; - word = echo * decay; + word = (int16_t)(echo * decay); for (uint32_t j = echo_buffer_pos >> 8; j < next_buffer_pos >> 8; j++) { echo_buffer[j % echo_buf_len] = word; } } else { echo = echo_buffer[self->echo_buffer_read_pos++]; - word = echo * decay; + word = (int16_t)(echo * decay); echo_buffer[self->echo_buffer_write_pos++] = word; } - word = echo * mix; + word = (int16_t)(echo * mix); if (MP_LIKELY(self->bits_per_sample == 16)) { word_buffer[i] = word; @@ -433,10 +433,10 @@ audioio_get_buffer_result_t audiodelays_echo_get_buffer(audiodelays_echo_obj_t * if (self->freq_shift) { echo = echo_buffer[echo_buffer_pos >> 8]; next_buffer_pos = echo_buffer_pos + self->echo_buffer_rate; - word = echo * decay + sample_word; + word = (int32_t)(echo * decay + sample_word); } else { echo = echo_buffer[self->echo_buffer_read_pos++]; - word = echo * decay + sample_word; + word = (int32_t)(echo * decay + sample_word); } if (MP_LIKELY(self->bits_per_sample == 16)) { @@ -467,12 +467,12 @@ audioio_get_buffer_result_t audiodelays_echo_get_buffer(audiodelays_echo_obj_t * word = echo + sample_word; if (MP_LIKELY(self->bits_per_sample == 16)) { - word_buffer[i] = (sample_word * (1.0 - mix)) + (word * mix); + word_buffer[i] = (int16_t)((sample_word * (1.0 - mix)) + (word * mix)); if (!self->samples_signed) { word_buffer[i] ^= 0x8000; } } else { - int8_t mixed = (sample_word * (1.0 - mix)) + (word * mix); + int8_t mixed = (int16_t)((sample_word * (1.0 - mix)) + (word * mix)); if (self->samples_signed) { hword_buffer[i] = mixed; } else { diff --git a/shared-module/audiofilters/Filter.c b/shared-module/audiofilters/Filter.c index d7ee30e8ea66c..6b8fc85dd4e27 100644 --- a/shared-module/audiofilters/Filter.c +++ b/shared-module/audiofilters/Filter.c @@ -204,6 +204,7 @@ int16_t mix_down_sample(int32_t sample) { audioio_get_buffer_result_t audiofilters_filter_get_buffer(audiofilters_filter_obj_t *self, bool single_channel_output, uint8_t channel, uint8_t **buffer, uint32_t *buffer_length) { + (void)channel; if (!single_channel_output) { channel = 0; @@ -297,7 +298,7 @@ audioio_get_buffer_result_t audiofilters_filter_get_buffer(audiofilters_filter_o // Mix processed signal with original sample and transfer to output buffer for (uint32_t j = 0; j < n_samples; j++) { if (MP_LIKELY(self->bits_per_sample == 16)) { - word_buffer[i + j] = mix_down_sample((sample_src[i + j] * (1.0 - mix)) + (self->filter_buffer[j] * mix)); + word_buffer[i + j] = mix_down_sample((int32_t)((sample_src[i + j] * (MICROPY_FLOAT_CONST(1.0) - mix)) + (self->filter_buffer[j] * mix))); if (!self->samples_signed) { word_buffer[i + j] ^= 0x8000; } @@ -305,7 +306,7 @@ audioio_get_buffer_result_t audiofilters_filter_get_buffer(audiofilters_filter_o if (self->samples_signed) { hword_buffer[i + j] = (int8_t)((sample_hsrc[i + j] * (1.0 - mix)) + (self->filter_buffer[j] * mix)); } else { - hword_buffer[i + j] = (uint8_t)(((int8_t)(((uint8_t)sample_hsrc[i + j]) ^ 0x80) * (1.0 - mix)) + (self->filter_buffer[j] * mix)) ^ 0x80; + hword_buffer[i + j] = (uint8_t)(((int8_t)(((uint8_t)sample_hsrc[i + j]) ^ 0x80) * (MICROPY_FLOAT_CONST(1.0) - mix)) + (self->filter_buffer[j] * mix)) ^ 0x80; } } } diff --git a/tests/circuitpython/audiofilter_filter.py b/tests/circuitpython/audiofilter_filter.py new file mode 100644 index 0000000000000..3267ded439790 --- /dev/null +++ b/tests/circuitpython/audiofilter_filter.py @@ -0,0 +1,16 @@ +from audiofilters import Filter +from audiofilterhelper import synth_test, sine8k + +@synth_test +def basic_filter(): + effect = Filter( + bits_per_sample=16, + samples_signed=True, + ) + yield effect, [] + + effect.play(sine8k, loop=True) + yield 4 + + effect.stop() + yield 2 diff --git a/tests/circuitpython/audiofilter_filter.py.exp b/tests/circuitpython/audiofilter_filter.py.exp new file mode 100644 index 0000000000000..734ac16b3a799 --- /dev/null +++ b/tests/circuitpython/audiofilter_filter.py.exp @@ -0,0 +1,1536 @@ +0 0.0 +1 0.010467529296875 +2 0.02093505859375 +3 0.031402587890625 +4 0.0418701171875 +5 0.05230712890625 +6 0.062774658203125 +7 0.073211669921875 +8 0.083648681640625 +9 0.094085693359375 +10 0.104522705078125 +11 0.11492919921875 +12 0.12530517578125 +13 0.13568115234375 +14 0.14605712890625 +15 0.156402587890625 +16 0.166748046875 +17 0.17706298828125 +18 0.187347412109375 +19 0.1976318359375 +20 0.2078857421875 +21 0.218109130859375 +22 0.22833251953125 +23 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import numpy as np +from math import sin, pi, ceil +from audiocore import get_buffer, RawSample +from synthio import Note, LFO, MathOperation, Synthesizer + +sinedata = array.array("h", [int(32767 * sin(i * 2 * pi / 600)) for i in range(600)]) +sine8k = RawSample(sinedata, sample_rate=8000) + +def synth_test(_gen=None, dtype=np.int16, divisor = 32768, channel_count=1): + def func(gen): + g = gen() + synth, blocks = next(g) + t = 0 + for nframes in g: + for i in range(nframes): + samples = np.frombuffer(get_buffer(synth)[1], dtype=dtype) / divisor + block_values = [b.value for b in blocks] + for k in range(0, len(samples), channel_count): + print(t, *(list(samples[k : k + channel_count]) + block_values)) + t += 1 + + if _gen is None: + return func + else: + func(_gen) From a97a28798725d3c9d5b5b1ae036cc53d292fa1a6 Mon Sep 17 00:00:00 2001 From: eightycc Date: Fri, 8 Nov 2024 07:08:10 -0800 Subject: [PATCH 32/46] Fix raspberrypi bootloop when using serial REPL by removing extra call to serial_early_init. --- ports/raspberrypi/supervisor/port.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/ports/raspberrypi/supervisor/port.c b/ports/raspberrypi/supervisor/port.c index 13e5abb61216a..b9697a0f83fd0 100644 --- a/ports/raspberrypi/supervisor/port.c +++ b/ports/raspberrypi/supervisor/port.c @@ -326,8 +326,6 @@ safe_mode_t port_init(void) { // Reset everything into a known state before board_init. reset_port(); - serial_early_init(); - #ifdef CIRCUITPY_PSRAM_CHIP_SELECT setup_psram(); #endif From d38ddb5d5fe34ac7d2d070951a62e7956a55ca3d Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Wed, 18 Dec 2024 15:35:57 -0600 Subject: [PATCH 33/46] update pins and flash filesystem format for L433 --- ports/stm/boards/STM32L433_default.ld | 6 +-- ports/stm/boards/cygnet/board.c | 42 ++++++++------- ports/stm/boards/cygnet/pins.c | 54 +------------------ .../peripherals/stm32l4/stm32l433xx/pins.c | 6 +-- ports/stm/supervisor/internal_flash.c | 10 ++-- ports/stm/supervisor/internal_flash.h | 6 +-- ports/stm/supervisor/usb.c | 4 +- 7 files changed, 42 insertions(+), 86 deletions(-) diff --git a/ports/stm/boards/STM32L433_default.ld b/ports/stm/boards/STM32L433_default.ld index ad5f6ace22aa2..886a1b8827a20 100644 --- a/ports/stm/boards/STM32L433_default.ld +++ b/ports/stm/boards/STM32L433_default.ld @@ -6,9 +6,9 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 4K /* ISR vector. Kind of wasteful. */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 192K - 4K - FLASH_FS (rw) : ORIGIN = 0x08030000, LENGTH = 64K + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* ISR vector. */ + FLASH_FS (rw) : ORIGIN = 0x08004000, LENGTH = 48K + FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 256K - 48K - 16K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K } diff --git a/ports/stm/boards/cygnet/board.c b/ports/stm/boards/cygnet/board.c index 80875e8375841..f6650fb8f9c33 100644 --- a/ports/stm/boards/cygnet/board.c +++ b/ports/stm/boards/cygnet/board.c @@ -20,32 +20,36 @@ digitalio_digitalinout_obj_t power_pin = { .base.type = &digitalio_digitalinout_ digitalio_digitalinout_obj_t discharge_pin = { .base.type = &digitalio_digitalinout_type }; void initialize_discharge_pin(void) { - /* Initialize the 3V3 discharge to be OFF and the output power to be ON */ - __HAL_RCC_GPIOE_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); - common_hal_digitalio_digitalinout_construct(&power_pin, &pin_PE04); - common_hal_digitalio_digitalinout_construct(&discharge_pin, &pin_PE06); + common_hal_digitalio_digitalinout_construct(&power_pin, &pin_PH00); + common_hal_digitalio_digitalinout_construct(&discharge_pin, &pin_PH01); common_hal_digitalio_digitalinout_never_reset(&power_pin); common_hal_digitalio_digitalinout_never_reset(&discharge_pin); GPIO_InitTypeDef GPIO_InitStruct; - /* Set the DISCHARGE pin and the USB_DETECT pin to FLOAT */ + + /* Set DISCHARGE_3V3 as well as the pins we're not initially using to FLOAT */ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Pin = GPIO_PIN_6; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); /* PE6 DISCHRG */ - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); /* PC6 is USB_DETECT */ + GPIO_InitStruct.Pin = GPIO_PIN_1; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); /* PH1 DISCHARGE_3V3 */ + GPIO_InitStruct.Pin = GPIO_PIN_3; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); /* PB3 is USB_DETECT */ + GPIO_InitStruct.Pin = GPIO_PIN_15; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* PA15 is CHARGE_DETECT */ + GPIO_InitStruct.Pin = GPIO_PIN_4; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* PA4 is BAT_VOLTAGE */ /* Turn on the 3V3 regulator */ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Speed = GPIO_SPEED_LOW; - GPIO_InitStruct.Pin = GPIO_PIN_4; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_SET); - + GPIO_InitStruct.Pin = GPIO_PIN_0; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + HAL_GPIO_WritePin(GPIOH, GPIO_InitStruct.Pin, GPIO_PIN_SET); } void board_init(void) { @@ -56,16 +60,16 @@ void board_init(void) { // Without this, USB does not function. HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); - __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_LOW; - GPIO_InitStruct.Pin = GPIO_PIN_2; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET); + GPIO_InitStruct.Pin = GPIO_PIN_8; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET); HAL_Delay(50); - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); } void reset_board(void) { diff --git a/ports/stm/boards/cygnet/pins.c b/ports/stm/boards/cygnet/pins.c index ed392adc75d31..54963172f5a7f 100644 --- a/ports/stm/boards/cygnet/pins.c +++ b/ports/stm/boards/cygnet/pins.c @@ -4,65 +4,14 @@ // // SPDX-License-Identifier: MIT -#include "py/objtuple.h" +// #include "py/objtuple.h" #include "shared-bindings/board/__init__.h" #include "board.h" -// extended pins -static const mp_rom_map_elem_t board_module_carrier_table[] = { - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PE01) }, - - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB01) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA04) }, - - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB05) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PB08) }, - - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_EN), MP_ROM_PTR(&pin_PH00) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB04) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB15) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB13) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB14) }, - - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, -}; - -MP_DEFINE_CONST_DICT(board_module_carrier, board_module_carrier_table); - -MP_DEFINE_CONST_OBJ_TYPE( - carrier_type, - MP_QSTR_Ext, - MP_TYPE_FLAG_NONE, - locals_dict, &board_module_carrier - ); - - // Core Feather Pins static const mp_rom_map_elem_t board_module_globals_table[] = { CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS - { MP_ROM_QSTR(MP_QSTR_ext), MP_ROM_PTR(&carrier_type) }, - { MP_ROM_QSTR(MP_QSTR_ENABLE_3V3), &power_pin }, { MP_ROM_QSTR(MP_QSTR_DISCHARGE_3V3), &discharge_pin }, @@ -105,4 +54,5 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; + MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c index 5ff6b5aea2068..f72eff02d4ff2 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c @@ -90,6 +90,6 @@ const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); -const mcu_pin_obj_t pin_PH00 = PIN(7, 0, NO_ADC); -const mcu_pin_obj_t pin_PH01 = PIN(7, 1, NO_ADC); -const mcu_pin_obj_t pin_PH03 = PIN(7, 3, NO_ADC); +const mcu_pin_obj_t pin_PH00 = PIN(5, 0, NO_ADC); +const mcu_pin_obj_t pin_PH01 = PIN(5, 1, NO_ADC); +const mcu_pin_obj_t pin_PH03 = PIN(5, 3, NO_ADC); diff --git a/ports/stm/supervisor/internal_flash.c b/ports/stm/supervisor/internal_flash.c index 02ea9cd514f58..f6d687f08fd39 100644 --- a/ports/stm/supervisor/internal_flash.c +++ b/ports/stm/supervisor/internal_flash.c @@ -77,9 +77,9 @@ static uint8_t _flash_cache[0x1000] __attribute__((aligned(4))); #elif defined(STM32L433XX) static const flash_layout_t flash_layout[] = { - { 0x08000000, 0x2000, 128 }, + { 0x08000000, 0x0800, 128 }, }; -static uint8_t _flash_cache[0x2000] __attribute__((aligned(4))); +static uint8_t _flash_cache[0x0800] __attribute__((aligned(4))); #else #error Unsupported processor @@ -181,11 +181,11 @@ void port_internal_flash_flush(void) { // set up for erase FLASH_EraseInitTypeDef EraseInitStruct = {}; #if CPY_STM32L4 - #if defined(STM32L4R5) + #if defined(STM32L4R5XX) EraseInitStruct.TypeErase = TYPEERASE_PAGES; EraseInitStruct.Banks = FLASH_BANK_2; // filesystem stored in upper 1MB of flash in dual bank mode - #elif defined(STM32L433) - EraseInitStruct.TypeErase = FLASH_TYPEERASE_MASSERASE; + #elif defined(STM32L433XX) + EraseInitStruct.TypeErase = TYPEERASE_PAGES; EraseInitStruct.Banks = FLASH_BANK_1; #endif #else diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index 1f0d815723ca1..0ecfcbf12a0be 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -88,9 +88,9 @@ #endif #ifdef STM32L433xx -#define STM32_FLASH_SIZE 0x80000 // 256KiB -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x19000 // 100KiB -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08026000 +#define STM32_FLASH_SIZE 0x40000 // 256KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 // 48KiB +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 #endif #define INTERNAL_FLASH_FILESYSTEM_NUM_BLOCKS (INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE) diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 5601b27b0f8a2..c9f674607a4b3 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -56,7 +56,7 @@ void init_usb_hardware(void) { GPIO_InitTypeDef GPIO_InitStruct = {0}; /**USB_OTG_FS GPIO Configuration - PA10 ------> USB_OTG_FS_ID + PA10 ------> USB_OTG_FS_ID (not present on STM32L433) PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ @@ -71,6 +71,8 @@ void init_usb_hardware(void) { GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; #elif CPY_STM32F4 || CPY_STM32F7 || defined(STM32L4R5XX) GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + #elif defined(STM32L433XX) + GPIO_InitStruct.Alternate = GPIO_AF10_USB_FS; #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 11); From d2202859509dfe55329707bd1e9368d2c401e777 Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Wed, 18 Dec 2024 15:43:31 -0600 Subject: [PATCH 34/46] re-add uf2 --- ports/stm/boards/cygnet/mpconfigboard.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index 21324f01243be..688125f80182f 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -82,9 +82,9 @@ CIRCUITPY_TOUCHIO = 0 CIRCUITPY_TOUCHIO_USE_NATIVE = 1 CIRCUITPY_TRACEBACK = 0 CIRCUITPY_ULAB = 0 -CIRCUITPY_UDB_CDC = 1 +CIRCUITPY_USB_CDC = 1 CIRCUITPY_USB_HID = 0 -CIRCUITPY_USB_IDENTIFICATION = 0 +CIRCUITPY_USB_IDENTIFICATION = 1 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 CIRCUITPY_USB_MSC = 0 From c2055e49b9cffb466d3f3b8bd087cc22799856bb Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Wed, 18 Dec 2024 16:26:05 -0600 Subject: [PATCH 35/46] add msc back --- ports/stm/boards/cygnet/mpconfigboard.mk | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index 688125f80182f..b8ecb4c2ee289 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -74,7 +74,7 @@ CIRCUITPY_RTC = 0 CIRCUITPY_SAFEMODE_PY = 0 CIRCUITPY_SDCARDIO = 0 CIRCUITPY_STATUS_BAR= 0 -CIRCUITPY_STORAGE = 0 +CIRCUITPY_STORAGE = 1 CIRCUITPY_SUPERVISOR = 1 CIRCUITPY_SYNTHIO = 0 CIRCUITPY_TERMINALIO = 0 @@ -87,8 +87,8 @@ CIRCUITPY_USB_HID = 0 CIRCUITPY_USB_IDENTIFICATION = 1 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 -CIRCUITPY_USB_MSC = 0 -CIRCUITPY_USB_VENDOR = 0 +CIRCUITPY_USB_MSC = 1 +CIRCUITPY_USB_VENDOR = 1 CIRCUITPY_WIFI_RADIO_SETTABLE_MAC_ADDRESS= 0 CIRCUITPY_VECTORIO = 0 CIRCUITPY_ZLIB = 0 From 971a8fc60fd258c43b374ff30051d1de2154efec Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Thu, 26 Dec 2024 12:33:16 -0600 Subject: [PATCH 36/46] flesh out configuration --- ports/stm/boards/cygnet/mpconfigboard.mk | 2 +- ports/stm/common-hal/microcontroller/Pin.c | 2 +- ports/stm/packages/LQFP48.c | 2 +- ports/stm/peripherals/stm32l4/clocks.c | 26 ++++-- .../peripherals/stm32l4/stm32l433xx/clocks.h | 8 +- .../peripherals/stm32l4/stm32l433xx/gpio.c | 3 +- .../peripherals/stm32l4/stm32l433xx/periph.c | 86 ++----------------- .../peripherals/stm32l4/stm32l433xx/pins.c | 45 ---------- .../peripherals/stm32l4/stm32l433xx/pins.h | 61 ------------- ports/stm/supervisor/usb.c | 3 +- 10 files changed, 35 insertions(+), 203 deletions(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index b8ecb4c2ee289..2feee7b179a30 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -88,7 +88,7 @@ CIRCUITPY_USB_IDENTIFICATION = 1 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_MIDI_ENABLED_DEFAULT= 0 CIRCUITPY_USB_MSC = 1 -CIRCUITPY_USB_VENDOR = 1 +CIRCUITPY_USB_VENDOR = 0 CIRCUITPY_WIFI_RADIO_SETTABLE_MAC_ADDRESS= 0 CIRCUITPY_VECTORIO = 0 CIRCUITPY_ZLIB = 0 diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 8a6f57f9ab63d..b93f3099377b2 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -12,7 +12,7 @@ #if defined(TFBGA216) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; #elif defined(LQFP48) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC}; +GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOH}; #elif defined(LQFP144) || defined(WLCSP144) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; #elif defined(LQFP100_f4) || (LQFP100_x7) diff --git a/ports/stm/packages/LQFP48.c b/ports/stm/packages/LQFP48.c index 1092b8df15f52..f7b4c650ebccb 100644 --- a/ports/stm/packages/LQFP48.c +++ b/ports/stm/packages/LQFP48.c @@ -27,7 +27,7 @@ static const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, - // VCAP1 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, // VSS --------------------------------------------*/ // VDD --------------------------------------------*/ diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index a46c64de49637..2c03a3c0f6aab 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -56,18 +56,25 @@ void stm32_peripherals_clocks_init(void) { } #endif - /* Activate PLL with MSI , stabilizied via PLL by LSE */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON; - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + #ifdef STM32L4R5xx + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; RCC_OscInitStruct.PLL.PLLM = 6; RCC_OscInitStruct.PLL.PLLN = 30; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5; + #elif STM32L433xx + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + #endif RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct)); @@ -83,22 +90,29 @@ void stm32_peripherals_clocks_init(void) { RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + #ifdef STM32L4R5xx HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3)); + #elif STM32L433xx + HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4)); + #endif + #ifdef STM32L4R5xx /* AHB prescaler divider at 1 as second step */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - #ifdef STM32L4R5xx HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5)); - #elif STM32L433xx - HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4)); #endif /* Select MSI output as USB clock source */ + #ifdef STM32L4R5xx PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_ADC; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; + #elif STM32L433xx + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + #endif PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK; - HAL_CHECK(HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct)); + HAL_CHECK(HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct)); } diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h b/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h index b9335f7e6331d..a01cae704d6b6 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/clocks.h @@ -14,16 +14,16 @@ // Defaults: #ifndef CPY_CLK_VSCALE -#define CPY_CLK_VSCALE (PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) // up to 80MHz +#define CPY_CLK_VSCALE (PWR_REGULATOR_VOLTAGE_SCALE1) // up to 80MHz #endif #ifndef CPY_CLK_PLLM -#define CPY_CLK_PLLM (12) +#define CPY_CLK_PLLM (1) #endif #ifndef CPY_CLK_PLLN -#define CPY_CLK_PLLN (60) +#define CPY_CLK_PLLN (40) #endif #ifndef CPY_CLK_PLLP -#define CPY_CLK_PLLP (RCC_PLLP_DIV2) +#define CPY_CLK_PLLP (RCC_PLLP_DIV7) #endif #ifndef CPY_CLK_PLLQ #define CPY_CLK_PLLQ (2) diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c b/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c index d1721dda3e96d..eb8914b5585c1 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/gpio.c @@ -12,8 +12,7 @@ void stm32_peripherals_gpio_init(void) { __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); // Never reset pins never_reset_pin_number(2, 14); // PC14 OSC32_IN diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c index 193bd75620063..3d3a10af9819d 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c @@ -9,71 +9,31 @@ #include "peripherals/pins.h" #include "peripherals/periph.h" -I2C_TypeDef *mcu_i2c_banks[I2C_BANK_ARRAY_LEN] = {I2C1, I2C2, I2C3}; +I2C_TypeDef *mcu_i2c_banks[I2C_BANK_ARRAY_LEN] = {I2C1, I2C2}; const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN] = { - PERIPH(3, 4, &pin_PB04), - PERIPH(1, 4, &pin_PB07), - PERIPH(1, 4, &pin_PB09), - PERIPH(2, 4, &pin_PB11), + PERIPH(1, 4, &pin_PA10), PERIPH(2, 4, &pin_PB14), - PERIPH(3, 4, &pin_PC01), }; const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN] = { - PERIPH(1, 4, &pin_PB06), - PERIPH(1, 4, &pin_PB08), - PERIPH(3, 4, &pin_PA07), - PERIPH(2, 4, &pin_PB10), + PERIPH(1, 4, &pin_PA09), PERIPH(2, 4, &pin_PB13), - PERIPH(3, 4, &pin_PC00), }; -SPI_TypeDef *mcu_spi_banks[SPI_BANK_ARRAY_LEN] = {SPI1, SPI2, SPI3}; +SPI_TypeDef *mcu_spi_banks[SPI_BANK_ARRAY_LEN] = {SPI1}; const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN] = { - PERIPH(1, 5, &pin_PA01), - PERIPH(1, 5, &pin_PA05), PERIPH(1, 5, &pin_PB03), - PERIPH(3, 6, &pin_PB03), - PERIPH(2, 5, &pin_PB10), - PERIPH(2, 5, &pin_PB13), - PERIPH(3, 6, &pin_PC10), - PERIPH(2, 5, &pin_PD01), - PERIPH(1, 5, &pin_PE13), }; const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN] = { - PERIPH(1, 5, &pin_PA07), PERIPH(1, 5, &pin_PA12), - PERIPH(1, 5, &pin_PB05), - PERIPH(3, 6, &pin_PB05), - PERIPH(2, 5, &pin_PB15), - PERIPH(2, 5, &pin_PC03), - PERIPH(3, 6, &pin_PC12), - PERIPH(2, 5, &pin_PD04), - PERIPH(1, 5, &pin_PE15), }; const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN] = { - PERIPH(1, 5, &pin_PA06), PERIPH(1, 5, &pin_PA11), - PERIPH(1, 5, &pin_PB04), - PERIPH(3, 6, &pin_PB04), - PERIPH(2, 5, &pin_PB14), - PERIPH(2, 5, &pin_PC02), - PERIPH(3, 6, &pin_PC11), - PERIPH(2, 5, &pin_PD03), - PERIPH(1, 5, &pin_PE14), }; const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN] = { - PERIPH(1, 5, &pin_PA04), - PERIPH(3, 6, &pin_PA04), PERIPH(1, 5, &pin_PA15), - PERIPH(3, 6, &pin_PA15), - PERIPH(1, 5, &pin_PB00), - PERIPH(2, 5, &pin_PB09), - PERIPH(2, 5, &pin_PB12), - PERIPH(2, 5, &pin_PD00), - PERIPH(1, 5, &pin_PE12), }; USART_TypeDef *mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3}; @@ -84,21 +44,13 @@ const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN] = { PERIPH(1, 7, &pin_PA09), PERIPH(1, 7, &pin_PB06), PERIPH(3, 7, &pin_PB10), - PERIPH(3, 7, &pin_PC04), - PERIPH(3, 7, &pin_PC10), - PERIPH(2, 7, &pin_PD05), - PERIPH(3, 7, &pin_PD08), }; const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN] = { PERIPH(2, 7, &pin_PA03), PERIPH(1, 7, &pin_PA10), - PERIPH(2, 3, &pin_PA15), + PERIPH(2, 7, &pin_PA15), PERIPH(1, 7, &pin_PB07), PERIPH(3, 7, &pin_PB11), - PERIPH(3, 7, &pin_PC05), - PERIPH(3, 7, &pin_PC11), - PERIPH(2, 7, &pin_PD06), - PERIPH(3, 7, &pin_PD09), }; // Timers @@ -124,32 +76,6 @@ const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN] = { TIM(2, 1, 4, &pin_PB11), TIM(15, 15, 1, &pin_PB14), TIM(15, 15, 2, &pin_PB15), - TIM(16, 15, 1, &pin_PE00), - TIM(1, 1, 1, &pin_PE09), - TIM(1, 1, 2, &pin_PE11), - TIM(1, 1, 3, &pin_PE13), - TIM(1, 1, 4, &pin_PE14), -}; -// SDIO -// SDIO_TypeDef *mcu_sdio_banks[1] = {SDIO}; -// todo - the L4 has a SDMMC pripheral -const mcu_periph_obj_t mcu_sdio_clock_list[1] = { - PERIPH(1, 12, &pin_PC12), -}; -const mcu_periph_obj_t mcu_sdio_command_list[1] = { - PERIPH(1, 12, &pin_PD02), -}; -const mcu_periph_obj_t mcu_sdio_data0_list[1] = { - PERIPH(1, 12, &pin_PC08), -}; -const mcu_periph_obj_t mcu_sdio_data1_list[1] = { - PERIPH(1, 12, &pin_PC09), -}; -const mcu_periph_obj_t mcu_sdio_data2_list[1] = { - PERIPH(1, 12, &pin_PC10), -}; -const mcu_periph_obj_t mcu_sdio_data3_list[1] = { - PERIPH(1, 12, &pin_PC11), }; // CAN @@ -158,10 +84,8 @@ CAN_TypeDef *mcu_can_banks[] = {CAN1}; const mcu_periph_obj_t mcu_can_tx_list[4] = { PERIPH(1, 10, &pin_PA12), PERIPH(1, 10, &pin_PB09), - PERIPH(1, 10, &pin_PD01), }; const mcu_periph_obj_t mcu_can_rx_list[4] = { PERIPH(1, 10, &pin_PA11), PERIPH(1, 10, &pin_PB08), - PERIPH(1, 10, &pin_PD00), }; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c index f72eff02d4ff2..060f53031bb44 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.c @@ -42,54 +42,9 @@ const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); -const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1, 1)); -const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1, 2)); -const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1, 3)); -const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1, 4)); -const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1, 13)); -const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1, 14)); -const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); -const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); -const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); -const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); -const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); -const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); -const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); -const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); -const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); -const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); -const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); -const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); -const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); -const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); -const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); -const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); -const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); -const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); -const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); -const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); -const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); -const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); -const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); -const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); -const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); -const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); -const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); -const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); -const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); -const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); -const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); -const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); -const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); -const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); -const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); -const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); -const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); -const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); -const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); const mcu_pin_obj_t pin_PH00 = PIN(5, 0, NO_ADC); const mcu_pin_obj_t pin_PH01 = PIN(5, 1, NO_ADC); const mcu_pin_obj_t pin_PH03 = PIN(5, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h index fefebbe152588..93a175ddbad81 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/pins.h @@ -38,70 +38,9 @@ extern const mcu_pin_obj_t pin_PB12; extern const mcu_pin_obj_t pin_PB13; extern const mcu_pin_obj_t pin_PB14; extern const mcu_pin_obj_t pin_PB15; -extern const mcu_pin_obj_t pin_PC00; -extern const mcu_pin_obj_t pin_PC01; -extern const mcu_pin_obj_t pin_PC02; -extern const mcu_pin_obj_t pin_PC03; -extern const mcu_pin_obj_t pin_PC04; -extern const mcu_pin_obj_t pin_PC05; -extern const mcu_pin_obj_t pin_PC06; -extern const mcu_pin_obj_t pin_PC07; -extern const mcu_pin_obj_t pin_PC08; -extern const mcu_pin_obj_t pin_PC09; -extern const mcu_pin_obj_t pin_PC10; -extern const mcu_pin_obj_t pin_PC11; -extern const mcu_pin_obj_t pin_PC12; extern const mcu_pin_obj_t pin_PC13; extern const mcu_pin_obj_t pin_PC14; extern const mcu_pin_obj_t pin_PC15; -extern const mcu_pin_obj_t pin_PD00; -extern const mcu_pin_obj_t pin_PD01; -extern const mcu_pin_obj_t pin_PD02; -extern const mcu_pin_obj_t pin_PD03; -extern const mcu_pin_obj_t pin_PD04; -extern const mcu_pin_obj_t pin_PD05; -extern const mcu_pin_obj_t pin_PD06; -extern const mcu_pin_obj_t pin_PD07; -extern const mcu_pin_obj_t pin_PD08; -extern const mcu_pin_obj_t pin_PD09; -extern const mcu_pin_obj_t pin_PD10; -extern const mcu_pin_obj_t pin_PD11; -extern const mcu_pin_obj_t pin_PD12; -extern const mcu_pin_obj_t pin_PD13; -extern const mcu_pin_obj_t pin_PD14; -extern const mcu_pin_obj_t pin_PD15; -extern const mcu_pin_obj_t pin_PE00; -extern const mcu_pin_obj_t pin_PE01; -extern const mcu_pin_obj_t pin_PE02; -extern const mcu_pin_obj_t pin_PE03; -extern const mcu_pin_obj_t pin_PE04; -extern const mcu_pin_obj_t pin_PE05; -extern const mcu_pin_obj_t pin_PE06; -extern const mcu_pin_obj_t pin_PE07; -extern const mcu_pin_obj_t pin_PE08; -extern const mcu_pin_obj_t pin_PE09; -extern const mcu_pin_obj_t pin_PE10; -extern const mcu_pin_obj_t pin_PE11; -extern const mcu_pin_obj_t pin_PE12; -extern const mcu_pin_obj_t pin_PE13; -extern const mcu_pin_obj_t pin_PE14; -extern const mcu_pin_obj_t pin_PE15; extern const mcu_pin_obj_t pin_PH00; extern const mcu_pin_obj_t pin_PH01; -extern const mcu_pin_obj_t pin_PH02; extern const mcu_pin_obj_t pin_PH03; -extern const mcu_pin_obj_t pin_PH04; -extern const mcu_pin_obj_t pin_PH05; -extern const mcu_pin_obj_t pin_PH06; -extern const mcu_pin_obj_t pin_PH07; -extern const mcu_pin_obj_t pin_PH08; -extern const mcu_pin_obj_t pin_PH09; -extern const mcu_pin_obj_t pin_PH10; -extern const mcu_pin_obj_t pin_PH11; -extern const mcu_pin_obj_t pin_PH12; -extern const mcu_pin_obj_t pin_PH13; -extern const mcu_pin_obj_t pin_PH14; -extern const mcu_pin_obj_t pin_PH15; -extern const mcu_pin_obj_t pin_PI00; -extern const mcu_pin_obj_t pin_PI01; -extern const mcu_pin_obj_t pin_PI03; diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index c9f674607a4b3..86acdc49b34e6 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -122,9 +122,10 @@ void init_usb_hardware(void) { #elif CPY_STM32F4 || CPY_STM32F7 || defined(STM32L4R5XX) /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + #else + __HAL_RCC_USB_CLK_ENABLE(); #endif - init_usb_vbus_sense(); } From 294f58678dff8554a46a978d731f03dd47f47a7c Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Mon, 30 Dec 2024 11:30:27 -0600 Subject: [PATCH 37/46] update for USB --- ports/stm/boards/cygnet/pins.c | 18 ++++------ ports/stm/common-hal/microcontroller/Pin.c | 2 +- ports/stm/packages/LQFP48.c | 4 +-- ports/stm/peripherals/stm32l4/clocks.c | 23 ++++++++---- .../peripherals/stm32l4/stm32l433xx/periph.c | 4 +-- .../peripherals/stm32l4/stm32l433xx/periph.h | 36 +++++++------------ 6 files changed, 40 insertions(+), 47 deletions(-) diff --git a/ports/stm/boards/cygnet/pins.c b/ports/stm/boards/cygnet/pins.c index 54963172f5a7f..f644160e4fd2a 100644 --- a/ports/stm/boards/cygnet/pins.c +++ b/ports/stm/boards/cygnet/pins.c @@ -21,17 +21,14 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_USR), MP_ROM_PTR(&pin_PC13) }, - { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_PE04) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB15) }, { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB04) }, // ADC, PWM, DAC2 output also @@ -39,13 +36,10 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, // PWM { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, // PWM - { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA04) }, // D10 - { MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_PA05) }, // D13 - { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB05) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA09) }, // ADC, PWM { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA10) }, // PWM diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index b93f3099377b2..8a6f57f9ab63d 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -12,7 +12,7 @@ #if defined(TFBGA216) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; #elif defined(LQFP48) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOH}; +GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC}; #elif defined(LQFP144) || defined(WLCSP144) GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; #elif defined(LQFP100_f4) || (LQFP100_x7) diff --git a/ports/stm/packages/LQFP48.c b/ports/stm/packages/LQFP48.c index f7b4c650ebccb..52d9d517d6546 100644 --- a/ports/stm/packages/LQFP48.c +++ b/ports/stm/packages/LQFP48.c @@ -8,8 +8,8 @@ static const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, // PC14 OSC32_IN ----------------------------------*/ // PC15 OSC32_OUT ---------------------------------*/ - // PH0 OSC_IN -------------------------------------*/ - // PH1 OSC_OUT ------------------------------------*/ + //{ MP_ROM_QSTR(MP_QSTR_PH00), MP_ROM_PTR(&pin_PH00) }, PH00 OSC_IN + //{ MP_ROM_QSTR(MP_QSTR_PH01), MP_ROM_PTR(&pin_PH01) }, PH01 OSC_OUT // NRST -------------------------------------------*/ // VSSA -------------------------------------------*/ // VDDA -------------------------------------------*/ diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index 2c03a3c0f6aab..dd1d2f01bb2c9 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -57,26 +57,37 @@ void stm32_peripherals_clocks_init(void) { #endif /* Activate PLL with MSI , stabilizied via PLL by LSE */ + #ifdef STM32L4R5xx RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; - #ifdef STM32L4R5xx + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; RCC_OscInitStruct.PLL.PLLM = 6; RCC_OscInitStruct.PLL.PLLN = 30; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; #elif STM32L433xx - RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.MSICalibrationValue = 0; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; RCC_OscInitStruct.PLL.PLLM = 1; RCC_OscInitStruct.PLL.PLLN = 40; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; - #endif RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + + __HAL_RCC_HSI48_ENABLE(); + #endif + HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct)); /* Enable MSI Auto-calibration through LSE */ @@ -86,7 +97,6 @@ void stm32_peripherals_clocks_init(void) { clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - // Avoid overshoot and start with HCLK 60 MHz RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; @@ -96,19 +106,18 @@ void stm32_peripherals_clocks_init(void) { HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4)); #endif - #ifdef STM32L4R5xx /* AHB prescaler divider at 1 as second step */ + #ifdef STM32L4R5xx RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; HAL_CHECK(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5)); #endif /* Select MSI output as USB clock source */ - #ifdef STM32L4R5xx PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_ADC; + #ifdef STM32L4R5xx PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; #elif STM32L433xx - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; #endif PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c index 3d3a10af9819d..e98c192c68517 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.c @@ -81,11 +81,11 @@ const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN] = { // CAN CAN_TypeDef *mcu_can_banks[] = {CAN1}; -const mcu_periph_obj_t mcu_can_tx_list[4] = { +const mcu_periph_obj_t mcu_can_tx_list[2] = { PERIPH(1, 10, &pin_PA12), PERIPH(1, 10, &pin_PB09), }; -const mcu_periph_obj_t mcu_can_rx_list[4] = { +const mcu_periph_obj_t mcu_can_rx_list[2] = { PERIPH(1, 10, &pin_PA11), PERIPH(1, 10, &pin_PB08), }; diff --git a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h index 3e45a17c811c4..6bf0add01fef4 100644 --- a/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h +++ b/ports/stm/peripherals/stm32l4/stm32l433xx/periph.h @@ -7,19 +7,19 @@ #pragma once // I2C -#define I2C_BANK_ARRAY_LEN 4 -#define I2C_SDA_ARRAY_LEN 16 -#define I2C_SCL_ARRAY_LEN 15 +#define I2C_BANK_ARRAY_LEN 2 +#define I2C_SDA_ARRAY_LEN 2 +#define I2C_SCL_ARRAY_LEN 2 extern I2C_TypeDef *mcu_i2c_banks[I2C_BANK_ARRAY_LEN]; extern const mcu_periph_obj_t mcu_i2c_sda_list[I2C_SDA_ARRAY_LEN]; extern const mcu_periph_obj_t mcu_i2c_scl_list[I2C_SCL_ARRAY_LEN]; // SPI -#define SPI_BANK_ARRAY_LEN 3 -#define SPI_SCK_ARRAY_LEN 14 -#define SPI_MOSI_ARRAY_LEN 14 -#define SPI_MISO_ARRAY_LEN 12 -#define SPI_NSS_ARRAY_LEN 12 +#define SPI_BANK_ARRAY_LEN 1 +#define SPI_SCK_ARRAY_LEN 1 +#define SPI_MOSI_ARRAY_LEN 1 +#define SPI_MISO_ARRAY_LEN 1 +#define SPI_NSS_ARRAY_LEN 1 extern SPI_TypeDef *mcu_spi_banks[SPI_BANK_ARRAY_LEN]; extern const mcu_periph_obj_t mcu_spi_sck_list[SPI_SCK_ARRAY_LEN]; extern const mcu_periph_obj_t mcu_spi_mosi_list[SPI_MOSI_ARRAY_LEN]; @@ -27,8 +27,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[SPI_MISO_ARRAY_LEN]; extern const mcu_periph_obj_t mcu_spi_nss_list[SPI_NSS_ARRAY_LEN]; // UART -#define UART_TX_ARRAY_LEN 12 -#define UART_RX_ARRAY_LEN 13 +#define UART_TX_ARRAY_LEN 4 +#define UART_RX_ARRAY_LEN 5 extern USART_TypeDef *mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; extern const mcu_periph_obj_t mcu_uart_tx_list[UART_TX_ARRAY_LEN]; @@ -36,21 +36,11 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN]; // Timers #define TIM_BANK_ARRAY_LEN 17 -#define TIM_PIN_ARRAY_LEN (73 - 3) +#define TIM_PIN_ARRAY_LEN 19 extern TIM_TypeDef *mcu_tim_banks[TIM_BANK_ARRAY_LEN]; extern const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -// SDIO -// extern SDIO_TypeDef *mcu_sdio_banks[1]; - -// extern const mcu_periph_obj_t mcu_sdio_clock_list[1]; -// extern const mcu_periph_obj_t mcu_sdio_command_list[1]; -// extern const mcu_periph_obj_t mcu_sdio_data0_list[1]; -// extern const mcu_periph_obj_t mcu_sdio_data1_list[1]; -// extern const mcu_periph_obj_t mcu_sdio_data2_list[1]; -// extern const mcu_periph_obj_t mcu_sdio_data3_list[1]; - // CAN extern CAN_TypeDef *mcu_can_banks[1]; -extern const mcu_periph_obj_t mcu_can_tx_list[4]; -extern const mcu_periph_obj_t mcu_can_rx_list[4]; +extern const mcu_periph_obj_t mcu_can_tx_list[2]; +extern const mcu_periph_obj_t mcu_can_rx_list[2]; From 6d50534045dc743c03158dff51666d3e493aa8df Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Thu, 2 Jan 2025 16:49:16 -0600 Subject: [PATCH 38/46] clocks cleanup --- ports/stm/peripherals/stm32l4/clocks.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index dd1d2f01bb2c9..d4cf3312efe14 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -84,14 +84,14 @@ void stm32_peripherals_clocks_init(void) { RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; - - __HAL_RCC_HSI48_ENABLE(); #endif HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct)); + #ifdef STM32L4R5xx /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); + #endif /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ From 2f12252abcdcf3f21b63592eb7f88988c013b4a5 Mon Sep 17 00:00:00 2001 From: Brandon Satrom Date: Thu, 2 Jan 2025 17:05:34 -0600 Subject: [PATCH 39/46] usb endpoints cleanup --- ports/stm/boards/cygnet/mpconfigboard.mk | 2 -- ports/stm/mpconfigport.mk | 4 ++++ ports/stm/packages/LQFP48.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/ports/stm/boards/cygnet/mpconfigboard.mk b/ports/stm/boards/cygnet/mpconfigboard.mk index 2feee7b179a30..df5648b04d03d 100644 --- a/ports/stm/boards/cygnet/mpconfigboard.mk +++ b/ports/stm/boards/cygnet/mpconfigboard.mk @@ -17,8 +17,6 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 -USB_NUM_ENDPOINT_PAIRS = 8 - CIRCUITPY_AESIO = 0 CIRCUITPY_ALARM = 0 CIRCUITPY_ANALOGIO = 1 diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 05fe9bf7aca1f..c119596588d8d 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -90,5 +90,9 @@ ifeq ($(MCU_VARIANT),STM32L4R5xx) USB_NUM_ENDPOINT_PAIRS = 6 endif +ifeq ($(MCU_VARIANT),STM32L433xx) + USB_NUM_ENDPOINT_PAIRS = 4 +endif + CIRCUITPY_PARALLELDISPLAYBUS := 0 CIRCUITPY_BUILD_EXTENSIONS ?= bin diff --git a/ports/stm/packages/LQFP48.c b/ports/stm/packages/LQFP48.c index 52d9d517d6546..46b737adeb8e3 100644 --- a/ports/stm/packages/LQFP48.c +++ b/ports/stm/packages/LQFP48.c @@ -8,8 +8,8 @@ static const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, // PC14 OSC32_IN ----------------------------------*/ // PC15 OSC32_OUT ---------------------------------*/ - //{ MP_ROM_QSTR(MP_QSTR_PH00), MP_ROM_PTR(&pin_PH00) }, PH00 OSC_IN - //{ MP_ROM_QSTR(MP_QSTR_PH01), MP_ROM_PTR(&pin_PH01) }, PH01 OSC_OUT + // { MP_ROM_QSTR(MP_QSTR_PH00), MP_ROM_PTR(&pin_PH00) }, PH00 OSC_IN + // { MP_ROM_QSTR(MP_QSTR_PH01), MP_ROM_PTR(&pin_PH01) }, PH01 OSC_OUT // NRST -------------------------------------------*/ // VSSA -------------------------------------------*/ // VDDA -------------------------------------------*/ From 69087ba462433c47cb69c0954689ce641169b441 Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 14:24:44 +0000 Subject: [PATCH 40/46] stm32l4: Set proper USB and HAL tick interrupt priorities for L433 - Set USB interrupt priority to 1 for STM32L433 - Lower HAL tick interrupt priority to 2 to ensure proper USB operation - Ensures proper interrupt handling for USB functionality Co-Authored-By: bsatrom@blues.com --- ports/stm/boards/cygnet/board.c | 5 ++--- ports/stm/peripherals/stm32l4/clocks.c | 17 +++++++++++++++++ ports/stm/supervisor/usb.c | 5 +++++ 3 files changed, 24 insertions(+), 3 deletions(-) diff --git a/ports/stm/boards/cygnet/board.c b/ports/stm/boards/cygnet/board.c index f6650fb8f9c33..f70a75324ac53 100644 --- a/ports/stm/boards/cygnet/board.c +++ b/ports/stm/boards/cygnet/board.c @@ -56,9 +56,8 @@ void board_init(void) { // enable the debugger while sleeping. Todo move somewhere more central (kind of generally useful in a debug build) SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); - // Set tick interrupt priority, default HAL value is intentionally invalid - // Without this, USB does not function. - HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); + // Set tick interrupt priority lower than USB to ensure proper operation + HAL_InitTick(2); __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitTypeDef GPIO_InitStruct; diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index d4cf3312efe14..b562687235d44 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -88,6 +88,23 @@ void stm32_peripherals_clocks_init(void) { HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct)); + #ifdef STM32L433xx + /* Enable CRS clock */ + __HAL_RCC_CRS_CLK_ENABLE(); + + /* Configure CRS */ + RCC_CRSInitTypeDef RCC_CRSInitStruct = {0}; + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; + RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); + RCC_CRSInitStruct.ErrorLimitValue = 34; + RCC_CRSInitStruct.HSI48CalibrationValue = 32; + + /* Start automatic synchronization */ + HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); + #endif + #ifdef STM32L4R5xx /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 86acdc49b34e6..20802a9a137b9 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -46,6 +46,11 @@ static void init_usb_vbus_sense(void) { } void init_usb_hardware(void) { + #ifdef STM32L433xx + /* Set USB interrupt priority */ + HAL_NVIC_SetPriority(USB_IRQn, 1, 0); + HAL_NVIC_EnableIRQ(USB_IRQn); + #endif /* Enable USB power on Pwrctrl CR2 register */ #ifdef PWR_CR2_USV From bcb39bd87ed95f59f388f4884e1452480964d14f Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 14:54:23 +0000 Subject: [PATCH 41/46] Fix formatting in documentation and code style Co-Authored-By: bsatrom@blues.com --- ports/espressif/tools/decode_backtrace.py | 8 ++++---- ports/espressif/tools/update_sdkconfig.py | 2 +- ports/stm/supervisor/internal_flash.h | 2 +- shared-bindings/epaperdisplay/__init__.c | 4 +--- shared-bindings/fourwire/__init__.c | 4 +--- shared-bindings/gifio/__init__.c | 3 +-- shared-bindings/i2cdisplaybus/__init__.c | 4 +--- shared-bindings/onewireio/__init__.c | 3 ++- tools/cortex-m-fault-gdb.py | 4 +++- tools/gdb-stack-size.py | 4 +++- tools/stack-loc-to-pc.py | 8 ++++---- 11 files changed, 22 insertions(+), 24 deletions(-) diff --git a/ports/espressif/tools/decode_backtrace.py b/ports/espressif/tools/decode_backtrace.py index 6d2772d39f77b..024e636207ec8 100644 --- a/ports/espressif/tools/decode_backtrace.py +++ b/ports/espressif/tools/decode_backtrace.py @@ -1,10 +1,10 @@ """Simple script that translates "Backtrace:" lines from the ESP output to files - and line numbers. +and line numbers. - Run with: python3 tools/decode_backtrace.py +Run with: python3 tools/decode_backtrace.py - Enter the backtrace line at the "? " prompt. CTRL-C to exit the script. - """ +Enter the backtrace line at the "? " prompt. CTRL-C to exit the script. +""" import subprocess import sys diff --git a/ports/espressif/tools/update_sdkconfig.py b/ports/espressif/tools/update_sdkconfig.py index c1e7ebd349c23..74447de76caec 100644 --- a/ports/espressif/tools/update_sdkconfig.py +++ b/ports/espressif/tools/update_sdkconfig.py @@ -1,5 +1,5 @@ """This script updates the sdkconfigs based on the menuconfig results in a given - build.""" +build.""" import pathlib import click diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index 0ecfcbf12a0be..a21764b44a0c9 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -98,4 +98,4 @@ #define STM32_FLASH_OFFSET 0x8000000 // All STM32 chips map to this flash location #define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick)&INTERNAL_FLASH_SYSTICK_MASK) == 2) +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) diff --git a/shared-bindings/epaperdisplay/__init__.c b/shared-bindings/epaperdisplay/__init__.c index 1b18212a35a39..eff31cb01b309 100644 --- a/shared-bindings/epaperdisplay/__init__.c +++ b/shared-bindings/epaperdisplay/__init__.c @@ -13,9 +13,7 @@ #include "shared-bindings/epaperdisplay/__init__.h" #include "shared-bindings/epaperdisplay/EPaperDisplay.h" -//| """Displays a `displayio` object tree on an e-paper display -//| -//| """ +//| """Displays a `displayio` object tree on an e-paper display""" static const mp_rom_map_elem_t epaperdisplay_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_displayio) }, diff --git a/shared-bindings/fourwire/__init__.c b/shared-bindings/fourwire/__init__.c index 34542db97a7e1..659d9482cb57b 100644 --- a/shared-bindings/fourwire/__init__.c +++ b/shared-bindings/fourwire/__init__.c @@ -13,9 +13,7 @@ #include "shared-bindings/fourwire/__init__.h" #include "shared-bindings/fourwire/FourWire.h" -//| """Connects to a BusDisplay over a four wire bus -//| -//| """ +//| """Connects to a BusDisplay over a four wire bus""" static const mp_rom_map_elem_t fourwire_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_fourwire) }, diff --git a/shared-bindings/gifio/__init__.c b/shared-bindings/gifio/__init__.c index 057d18ce82d47..a8a09dc08d89a 100644 --- a/shared-bindings/gifio/__init__.c +++ b/shared-bindings/gifio/__init__.c @@ -10,8 +10,7 @@ #include "shared-bindings/gifio/OnDiskGif.h" #include "shared-bindings/util.h" -//| """Access GIF-format images -//| """ +//| """Access GIF-format images""" static const mp_rom_map_elem_t gifio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_gifio) }, { MP_OBJ_NEW_QSTR(MP_QSTR_GifWriter), MP_ROM_PTR(&gifio_gifwriter_type)}, diff --git a/shared-bindings/i2cdisplaybus/__init__.c b/shared-bindings/i2cdisplaybus/__init__.c index 45be89668f028..dc25571758307 100644 --- a/shared-bindings/i2cdisplaybus/__init__.c +++ b/shared-bindings/i2cdisplaybus/__init__.c @@ -13,9 +13,7 @@ #include "shared-bindings/i2cdisplaybus/__init__.h" #include "shared-bindings/i2cdisplaybus/I2CDisplayBus.h" -//| """Communicates to a display IC over I2C -//| -//| """ +//| """Communicates to a display IC over I2C""" static const mp_rom_map_elem_t i2cdisplaybus_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_i2cdisplaybus) }, diff --git a/shared-bindings/onewireio/__init__.c b/shared-bindings/onewireio/__init__.c index bce56326b1ad9..3a1a1e285afe5 100644 --- a/shared-bindings/onewireio/__init__.c +++ b/shared-bindings/onewireio/__init__.c @@ -17,7 +17,8 @@ //| """Low-level bit primitives for Maxim (formerly Dallas Semi) one-wire protocol. //| -//| Protocol definition is here: https://www.analog.com/en/technical-articles/1wire-communication-through-software.html""" +//| Protocol definition is here: https://www.analog.com/en/technical-articles/1wire-communication-through-software.html +//| """ static const mp_rom_map_elem_t onewireio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_onewireio) }, diff --git a/tools/cortex-m-fault-gdb.py b/tools/cortex-m-fault-gdb.py index 8de754ed26056..b9606f6b718d2 100644 --- a/tools/cortex-m-fault-gdb.py +++ b/tools/cortex-m-fault-gdb.py @@ -1,5 +1,7 @@ """Source this file into gdb `source ../../tools/cortex-m-fault-gdb.py` then run - `cortex-m-fault` to print basic info about the fault registers.""" +`cortex-m-fault` to print basic info about the fault registers.""" + +import gdb SCS = 0xE000E000 SCB = SCS + 0x0D00 diff --git a/tools/gdb-stack-size.py b/tools/gdb-stack-size.py index 4d3fc9fe08aa1..6426cf429564b 100644 --- a/tools/gdb-stack-size.py +++ b/tools/gdb-stack-size.py @@ -1,5 +1,7 @@ """Source this file into gdb `source ../../tools/gdb-stack-size.py` then run - `stack-size` to print a backtrace with each frame size next to it.""" +`stack-size` to print a backtrace with each frame size next to it.""" + +import gdb class StackSize(gdb.Command): diff --git a/tools/stack-loc-to-pc.py b/tools/stack-loc-to-pc.py index a1ce788f2b652..d4287f3a5d6e6 100644 --- a/tools/stack-loc-to-pc.py +++ b/tools/stack-loc-to-pc.py @@ -1,10 +1,10 @@ """Prints the pcs that access each stack location in a function. Useful for finding - infrequently used stack space. +infrequently used stack space. - Pipe in disassembly like so: +Pipe in disassembly like so: - arm-none-eabi-objdump --disassemble=mp_execute_bytecode build-metro_m0_express/firmware.elf | python ../../tools/stack-loc-to-pc.py - """ +arm-none-eabi-objdump --disassemble=mp_execute_bytecode build-metro_m0_express/firmware.elf | python ../../tools/stack-loc-to-pc.py +""" import sys import re From fee1e69156b117bda2845bd3789d048e76fe7fee Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 14:57:05 +0000 Subject: [PATCH 42/46] stm32l4: Fix formatting in peripheral header files Co-Authored-By: bsatrom@blues.com --- ports/stm/peripherals/periph.h | 22 +++++++++++----------- ports/stm/peripherals/pins.h | 20 ++++++++++---------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h index 4960125d90f12..571247964d141 100644 --- a/ports/stm/peripherals/periph.h +++ b/ports/stm/peripherals/periph.h @@ -21,11 +21,11 @@ typedef struct { } mcu_periph_obj_t; #define PERIPH(index, alt, p_pin) \ - { \ - .periph_index = index, \ - .altfn_index = alt, \ - .pin = p_pin, \ - } + { \ + .periph_index = index, \ + .altfn_index = alt, \ + .pin = p_pin, \ + } // Timer Peripheral @@ -37,12 +37,12 @@ typedef struct { } mcu_tim_pin_obj_t; #define TIM(index, alt, channel, tim_pin) \ - { \ - .tim_index = index - 1, \ - .altfn_index = alt, \ - .channel_index = channel - 1, \ - .pin = tim_pin, \ - } + { \ + .tim_index = index - 1, \ + .altfn_index = alt, \ + .channel_index = channel - 1, \ + .pin = tim_pin, \ + } // F4 Series // Access Lines diff --git a/ports/stm/peripherals/pins.h b/ports/stm/peripherals/pins.h index c91879939552e..3fffd70423702 100644 --- a/ports/stm/peripherals/pins.h +++ b/ports/stm/peripherals/pins.h @@ -32,24 +32,24 @@ typedef struct { // but all 3 ADCs will share the same input number per pin. // F4 family has 3 ADC max, 24 channels max. #define ADC_INPUT(mask, number) \ - .adc_unit = mask, \ - .adc_channel = number, + .adc_unit = mask, \ + .adc_channel = number, #define NO_ADC \ - .adc_unit = 0x00, \ - .adc_channel = 0x1f + .adc_unit = 0x00, \ + .adc_channel = 0x1f extern const mp_obj_type_t mcu_pin_type; // STM32 can have up to 9 ports, each restricted to 16 pins // We split the pin/port evenly, in contrast to nrf. #define PIN(p_port, p_number, p_adc) \ - { \ - { &mcu_pin_type }, \ - .port = p_port, \ - .number = p_number, \ - p_adc \ - } + { \ + { &mcu_pin_type }, \ + .port = p_port, \ + .number = p_number, \ + p_adc \ + } // Use illegal pin value to mark unassigned pins. #define NO_PIN 0xff From 28718f22b764e153dce0d8197bc9c8756f1f2d30 Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 15:33:40 +0000 Subject: [PATCH 43/46] ci: Add null check for workflow information in ci_changes_per_commit.py Co-Authored-By: bsatrom@blues.com --- tools/ci_changes_per_commit.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/ci_changes_per_commit.py b/tools/ci_changes_per_commit.py index 6cbd475fa95b7..a90a73afa8d70 100644 --- a/tools/ci_changes_per_commit.py +++ b/tools/ci_changes_per_commit.py @@ -155,7 +155,8 @@ def get_commit_depth_and_check_suite(query_commits): check_suites = commit["checkSuites"] if check_suites["totalCount"] > 0: for check_suite in check_suites["nodes"]: - if check_suite["workflowRun"]["workflow"]["name"] == "Build CI": + workflow_run = check_suite.get("workflowRun") + if workflow_run and workflow_run.get("workflow", {}).get("name") == "Build CI": return [ {"sha": commit_sha, "depth": commit_depth}, ( From efa4908615a34c6173477f6cd331cf683993ccfa Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 15:47:25 +0000 Subject: [PATCH 44/46] ci: Improve error handling in ci_changes_per_commit.py - Add proper null checks for workflow and check suite data - Add timeout to GitHub API requests - Improve error messages and exception handling - Add type checking for pagination - Handle missing page info gracefully Co-Authored-By: bsatrom@blues.com --- tools/ci_changes_per_commit.py | 139 ++++++++++++++++++++------------- 1 file changed, 85 insertions(+), 54 deletions(-) diff --git a/tools/ci_changes_per_commit.py b/tools/ci_changes_per_commit.py index a90a73afa8d70..704546aaa5241 100644 --- a/tools/ci_changes_per_commit.py +++ b/tools/ci_changes_per_commit.py @@ -111,24 +111,36 @@ def __init__(self, query, variables={}, headers={}): self.headers = headers def paginate(self, page_info, name): - has_page = page_info["hasNextPage" if name.startswith("after") else "hasPreviousPage"] - if has_page: - self.variables[name] = page_info[ - "endCursor" if name.startswith("after") else "startCursor" - ] + if not isinstance(page_info, dict): + return False + + page_type = "hasNextPage" if name.startswith("after") else "hasPreviousPage" + cursor_type = "endCursor" if name.startswith("after") else "startCursor" + + has_page = page_info.get(page_type, False) + if has_page and cursor_type in page_info: + self.variables[name] = page_info[cursor_type] + return has_page def fetch(self): - request = requests.post( - "https://api.github.com/graphql", - json={"query": self.query, "variables": self.variables}, - headers=self.headers, - ) - if request.status_code == 200: + try: + request = requests.post( + "https://api.github.com/graphql", + json={"query": self.query, "variables": self.variables}, + headers=self.headers, + timeout=30 + ) + request.raise_for_status() return request.json() - else: - print(request.json()) - raise Exception("Query Failed: {}".format(request.status_code)) + except requests.RequestException as e: + print(f"Request failed: {str(e)}") + if hasattr(e.response, 'json'): + try: + print(e.response.json()) + except ValueError: + pass + raise Exception(f"Query failed: {str(e)}") def set_output(name, value): @@ -146,22 +158,24 @@ def get_commit_depth_and_check_suite(query_commits): if commits["totalCount"] > 0: nodes = commits["nodes"] nodes.reverse() - if nodes[0]["commit"]["oid"] == os.environ["EXCLUDE_COMMIT"]: + if nodes[0]["commit"]["oid"] == os.environ.get("EXCLUDE_COMMIT"): nodes.pop(0) for commit in nodes: commit_depth += 1 commit = commit["commit"] commit_sha = commit["oid"] - check_suites = commit["checkSuites"] - if check_suites["totalCount"] > 0: - for check_suite in check_suites["nodes"]: - workflow_run = check_suite.get("workflowRun") - if workflow_run and workflow_run.get("workflow", {}).get("name") == "Build CI": + check_suites = commit.get("checkSuites", {}) + if check_suites.get("totalCount", 0) > 0: + for check_suite in check_suites.get("nodes", []): + workflow_run = check_suite.get("workflowRun", {}) + workflow = workflow_run.get("workflow", {}) + workflow_name = workflow.get("name") if workflow else None + if workflow_name == "Build CI": return [ {"sha": commit_sha, "depth": commit_depth}, ( check_suite["id"] - if check_suite["conclusion"] != "SUCCESS" + if check_suite.get("conclusion") != "SUCCESS" else None ), ] @@ -177,28 +191,32 @@ def get_bad_check_runs(query_check_runs): have_dependent_jobs = ["scheduler", "mpy-cross", "tests"] while more_pages: - check_runs = query_check_runs.fetch()["data"]["node"] + response = query_check_runs.fetch() + check_runs = response.get("data", {}).get("node", {}) more_pages = False for run_type in run_types: run_type_camel = run_type.capitalize() + "Run" run_type = run_type + "Runs" - for check_run in check_runs[run_type]["nodes"]: - name = check_run["name"] + run_data = check_runs.get(run_type, {}) + for check_run in run_data.get("nodes", []): + name = check_run.get("name", "") if any([name.startswith(job) for job in have_dependent_jobs]): return {} if name.startswith("ports"): - matrix_job = name.rsplit(" (", 1)[1][:-1] - bad_runs.setdefault("ports", []).append(matrix_job) + try: + matrix_job = name.rsplit(" (", 1)[1][:-1] + bad_runs.setdefault("ports", []).append(matrix_job) + except IndexError: + continue else: bad_runs[name] = True - if query_check_runs.paginate( - check_runs[run_type]["pageInfo"], "after" + run_type_camel - ): + page_info = run_data.get("pageInfo", {}) + if query_check_runs.paginate(page_info, "after" + run_type_camel): query_check_runs.variables["include" + run_type_camel] = True more_pages = True @@ -211,31 +229,44 @@ def set_commit(commit): def main(): - query_commits = Query(QUERY_COMMITS, query_variables_commits, headers) - query_commits.variables["owner"], query_commits.variables["name"] = os.environ["REPO"].split( - "/" - ) - - commit, check_suite = get_commit_depth_and_check_suite(query_commits) - - if not check_suite: - if commit: - set_commit(commit) - else: - print("Abort: No check suite found") - quit() - - query_check_runs = Query(QUERY_CHECK_RUNS, query_variables_check_runs, headers) - query_check_runs.variables["checkSuiteID"] = check_suite - - check_runs = get_bad_check_runs(query_check_runs) - - if not check_runs: - print("Abort: No check runs found") - quit() - - set_commit(commit) - set_output("check_runs", json.dumps(check_runs)) + try: + if "REPO" not in os.environ: + print("Error: REPO environment variable not set") + return + + query_commits = Query(QUERY_COMMITS, query_variables_commits, headers) + try: + owner, name = os.environ["REPO"].split("/") + except ValueError: + print("Error: REPO must be in format 'owner/name'") + return + + query_commits.variables["owner"] = owner + query_commits.variables["name"] = name + + commit, check_suite = get_commit_depth_and_check_suite(query_commits) + + if not check_suite: + if commit: + set_commit(commit) + else: + print("Abort: No check suite found") + return + + query_check_runs = Query(QUERY_CHECK_RUNS, query_variables_check_runs, headers) + query_check_runs.variables["checkSuiteID"] = check_suite + + check_runs = get_bad_check_runs(query_check_runs) + + if not check_runs: + print("Abort: No check runs found") + return + + set_commit(commit) + set_output("check_runs", json.dumps(check_runs)) + except Exception as e: + print(f"Error: {str(e)}") + return if __name__ == "__main__": From 25dfe5c3f989a9dfe127c7bc82f15d8d2fd2a423 Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 15:49:14 +0000 Subject: [PATCH 45/46] ci: Improve pagination error handling in ci_changes_per_commit.py - Add type checking for name parameter - Add validation for pagination direction - Add null check for cursor value - Improve error messages for invalid cases Co-Authored-By: bsatrom@blues.com --- tools/ci_changes_per_commit.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/tools/ci_changes_per_commit.py b/tools/ci_changes_per_commit.py index 704546aaa5241..450f5ccdb2d4b 100644 --- a/tools/ci_changes_per_commit.py +++ b/tools/ci_changes_per_commit.py @@ -114,12 +114,25 @@ def paginate(self, page_info, name): if not isinstance(page_info, dict): return False + if not isinstance(name, str): + print(f"Warning: Invalid name parameter type: {type(name)}") + return False + + if not (name.startswith("after") or name.startswith("before")): + print(f"Warning: Invalid pagination direction: {name}") + return False + page_type = "hasNextPage" if name.startswith("after") else "hasPreviousPage" cursor_type = "endCursor" if name.startswith("after") else "startCursor" has_page = page_info.get(page_type, False) if has_page and cursor_type in page_info: - self.variables[name] = page_info[cursor_type] + cursor = page_info.get(cursor_type) + if cursor is not None: + self.variables[name] = cursor + else: + print(f"Warning: Missing {cursor_type} in page_info") + return False return has_page From 2f96fe7f85d98983ba1d4b306421d183dde0d1b2 Mon Sep 17 00:00:00 2001 From: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Date: Wed, 29 Jan 2025 16:38:35 +0000 Subject: [PATCH 46/46] Revert changes from PR #5 Co-Authored-By: bsatrom@blues.com --- ports/espressif/tools/decode_backtrace.py | 8 +- ports/espressif/tools/update_sdkconfig.py | 2 +- ports/stm/boards/cygnet/board.c | 5 +- ports/stm/peripherals/periph.h | 22 ++-- ports/stm/peripherals/pins.h | 20 +-- ports/stm/peripherals/stm32l4/clocks.c | 17 --- ports/stm/supervisor/internal_flash.h | 2 +- ports/stm/supervisor/usb.c | 5 - shared-bindings/epaperdisplay/__init__.c | 4 +- shared-bindings/fourwire/__init__.c | 4 +- shared-bindings/gifio/__init__.c | 3 +- shared-bindings/i2cdisplaybus/__init__.c | 4 +- shared-bindings/onewireio/__init__.c | 3 +- tools/ci_changes_per_commit.py | 151 ++++++++-------------- tools/cortex-m-fault-gdb.py | 4 +- tools/gdb-stack-size.py | 4 +- tools/stack-loc-to-pc.py | 8 +- 17 files changed, 101 insertions(+), 165 deletions(-) diff --git a/ports/espressif/tools/decode_backtrace.py b/ports/espressif/tools/decode_backtrace.py index 024e636207ec8..6d2772d39f77b 100644 --- a/ports/espressif/tools/decode_backtrace.py +++ b/ports/espressif/tools/decode_backtrace.py @@ -1,10 +1,10 @@ """Simple script that translates "Backtrace:" lines from the ESP output to files -and line numbers. + and line numbers. -Run with: python3 tools/decode_backtrace.py + Run with: python3 tools/decode_backtrace.py -Enter the backtrace line at the "? " prompt. CTRL-C to exit the script. -""" + Enter the backtrace line at the "? " prompt. CTRL-C to exit the script. + """ import subprocess import sys diff --git a/ports/espressif/tools/update_sdkconfig.py b/ports/espressif/tools/update_sdkconfig.py index 74447de76caec..c1e7ebd349c23 100644 --- a/ports/espressif/tools/update_sdkconfig.py +++ b/ports/espressif/tools/update_sdkconfig.py @@ -1,5 +1,5 @@ """This script updates the sdkconfigs based on the menuconfig results in a given -build.""" + build.""" import pathlib import click diff --git a/ports/stm/boards/cygnet/board.c b/ports/stm/boards/cygnet/board.c index f70a75324ac53..f6650fb8f9c33 100644 --- a/ports/stm/boards/cygnet/board.c +++ b/ports/stm/boards/cygnet/board.c @@ -56,8 +56,9 @@ void board_init(void) { // enable the debugger while sleeping. Todo move somewhere more central (kind of generally useful in a debug build) SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); - // Set tick interrupt priority lower than USB to ensure proper operation - HAL_InitTick(2); + // Set tick interrupt priority, default HAL value is intentionally invalid + // Without this, USB does not function. + HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); __HAL_RCC_GPIOA_CLK_ENABLE(); GPIO_InitTypeDef GPIO_InitStruct; diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h index 571247964d141..4960125d90f12 100644 --- a/ports/stm/peripherals/periph.h +++ b/ports/stm/peripherals/periph.h @@ -21,11 +21,11 @@ typedef struct { } mcu_periph_obj_t; #define PERIPH(index, alt, p_pin) \ - { \ - .periph_index = index, \ - .altfn_index = alt, \ - .pin = p_pin, \ - } + { \ + .periph_index = index, \ + .altfn_index = alt, \ + .pin = p_pin, \ + } // Timer Peripheral @@ -37,12 +37,12 @@ typedef struct { } mcu_tim_pin_obj_t; #define TIM(index, alt, channel, tim_pin) \ - { \ - .tim_index = index - 1, \ - .altfn_index = alt, \ - .channel_index = channel - 1, \ - .pin = tim_pin, \ - } + { \ + .tim_index = index - 1, \ + .altfn_index = alt, \ + .channel_index = channel - 1, \ + .pin = tim_pin, \ + } // F4 Series // Access Lines diff --git a/ports/stm/peripherals/pins.h b/ports/stm/peripherals/pins.h index 3fffd70423702..c91879939552e 100644 --- a/ports/stm/peripherals/pins.h +++ b/ports/stm/peripherals/pins.h @@ -32,24 +32,24 @@ typedef struct { // but all 3 ADCs will share the same input number per pin. // F4 family has 3 ADC max, 24 channels max. #define ADC_INPUT(mask, number) \ - .adc_unit = mask, \ - .adc_channel = number, + .adc_unit = mask, \ + .adc_channel = number, #define NO_ADC \ - .adc_unit = 0x00, \ - .adc_channel = 0x1f + .adc_unit = 0x00, \ + .adc_channel = 0x1f extern const mp_obj_type_t mcu_pin_type; // STM32 can have up to 9 ports, each restricted to 16 pins // We split the pin/port evenly, in contrast to nrf. #define PIN(p_port, p_number, p_adc) \ - { \ - { &mcu_pin_type }, \ - .port = p_port, \ - .number = p_number, \ - p_adc \ - } + { \ + { &mcu_pin_type }, \ + .port = p_port, \ + .number = p_number, \ + p_adc \ + } // Use illegal pin value to mark unassigned pins. #define NO_PIN 0xff diff --git a/ports/stm/peripherals/stm32l4/clocks.c b/ports/stm/peripherals/stm32l4/clocks.c index b562687235d44..d4cf3312efe14 100644 --- a/ports/stm/peripherals/stm32l4/clocks.c +++ b/ports/stm/peripherals/stm32l4/clocks.c @@ -88,23 +88,6 @@ void stm32_peripherals_clocks_init(void) { HAL_CHECK(HAL_RCC_OscConfig(&RCC_OscInitStruct)); - #ifdef STM32L433xx - /* Enable CRS clock */ - __HAL_RCC_CRS_CLK_ENABLE(); - - /* Configure CRS */ - RCC_CRSInitTypeDef RCC_CRSInitStruct = {0}; - RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; - RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; - RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; - RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); - RCC_CRSInitStruct.ErrorLimitValue = 34; - RCC_CRSInitStruct.HSI48CalibrationValue = 32; - - /* Start automatic synchronization */ - HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); - #endif - #ifdef STM32L4R5xx /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index a21764b44a0c9..0ecfcbf12a0be 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -98,4 +98,4 @@ #define STM32_FLASH_OFFSET 0x8000000 // All STM32 chips map to this flash location #define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms -#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick)&INTERNAL_FLASH_SYSTICK_MASK) == 2) diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 20802a9a137b9..86acdc49b34e6 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -46,11 +46,6 @@ static void init_usb_vbus_sense(void) { } void init_usb_hardware(void) { - #ifdef STM32L433xx - /* Set USB interrupt priority */ - HAL_NVIC_SetPriority(USB_IRQn, 1, 0); - HAL_NVIC_EnableIRQ(USB_IRQn); - #endif /* Enable USB power on Pwrctrl CR2 register */ #ifdef PWR_CR2_USV diff --git a/shared-bindings/epaperdisplay/__init__.c b/shared-bindings/epaperdisplay/__init__.c index eff31cb01b309..1b18212a35a39 100644 --- a/shared-bindings/epaperdisplay/__init__.c +++ b/shared-bindings/epaperdisplay/__init__.c @@ -13,7 +13,9 @@ #include "shared-bindings/epaperdisplay/__init__.h" #include "shared-bindings/epaperdisplay/EPaperDisplay.h" -//| """Displays a `displayio` object tree on an e-paper display""" +//| """Displays a `displayio` object tree on an e-paper display +//| +//| """ static const mp_rom_map_elem_t epaperdisplay_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_displayio) }, diff --git a/shared-bindings/fourwire/__init__.c b/shared-bindings/fourwire/__init__.c index 659d9482cb57b..34542db97a7e1 100644 --- a/shared-bindings/fourwire/__init__.c +++ b/shared-bindings/fourwire/__init__.c @@ -13,7 +13,9 @@ #include "shared-bindings/fourwire/__init__.h" #include "shared-bindings/fourwire/FourWire.h" -//| """Connects to a BusDisplay over a four wire bus""" +//| """Connects to a BusDisplay over a four wire bus +//| +//| """ static const mp_rom_map_elem_t fourwire_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_fourwire) }, diff --git a/shared-bindings/gifio/__init__.c b/shared-bindings/gifio/__init__.c index a8a09dc08d89a..057d18ce82d47 100644 --- a/shared-bindings/gifio/__init__.c +++ b/shared-bindings/gifio/__init__.c @@ -10,7 +10,8 @@ #include "shared-bindings/gifio/OnDiskGif.h" #include "shared-bindings/util.h" -//| """Access GIF-format images""" +//| """Access GIF-format images +//| """ static const mp_rom_map_elem_t gifio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_gifio) }, { MP_OBJ_NEW_QSTR(MP_QSTR_GifWriter), MP_ROM_PTR(&gifio_gifwriter_type)}, diff --git a/shared-bindings/i2cdisplaybus/__init__.c b/shared-bindings/i2cdisplaybus/__init__.c index dc25571758307..45be89668f028 100644 --- a/shared-bindings/i2cdisplaybus/__init__.c +++ b/shared-bindings/i2cdisplaybus/__init__.c @@ -13,7 +13,9 @@ #include "shared-bindings/i2cdisplaybus/__init__.h" #include "shared-bindings/i2cdisplaybus/I2CDisplayBus.h" -//| """Communicates to a display IC over I2C""" +//| """Communicates to a display IC over I2C +//| +//| """ static const mp_rom_map_elem_t i2cdisplaybus_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_i2cdisplaybus) }, diff --git a/shared-bindings/onewireio/__init__.c b/shared-bindings/onewireio/__init__.c index 3a1a1e285afe5..bce56326b1ad9 100644 --- a/shared-bindings/onewireio/__init__.c +++ b/shared-bindings/onewireio/__init__.c @@ -17,8 +17,7 @@ //| """Low-level bit primitives for Maxim (formerly Dallas Semi) one-wire protocol. //| -//| Protocol definition is here: https://www.analog.com/en/technical-articles/1wire-communication-through-software.html -//| """ +//| Protocol definition is here: https://www.analog.com/en/technical-articles/1wire-communication-through-software.html""" static const mp_rom_map_elem_t onewireio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_onewireio) }, diff --git a/tools/ci_changes_per_commit.py b/tools/ci_changes_per_commit.py index 450f5ccdb2d4b..6cbd475fa95b7 100644 --- a/tools/ci_changes_per_commit.py +++ b/tools/ci_changes_per_commit.py @@ -111,49 +111,24 @@ def __init__(self, query, variables={}, headers={}): self.headers = headers def paginate(self, page_info, name): - if not isinstance(page_info, dict): - return False - - if not isinstance(name, str): - print(f"Warning: Invalid name parameter type: {type(name)}") - return False - - if not (name.startswith("after") or name.startswith("before")): - print(f"Warning: Invalid pagination direction: {name}") - return False - - page_type = "hasNextPage" if name.startswith("after") else "hasPreviousPage" - cursor_type = "endCursor" if name.startswith("after") else "startCursor" - - has_page = page_info.get(page_type, False) - if has_page and cursor_type in page_info: - cursor = page_info.get(cursor_type) - if cursor is not None: - self.variables[name] = cursor - else: - print(f"Warning: Missing {cursor_type} in page_info") - return False - + has_page = page_info["hasNextPage" if name.startswith("after") else "hasPreviousPage"] + if has_page: + self.variables[name] = page_info[ + "endCursor" if name.startswith("after") else "startCursor" + ] return has_page def fetch(self): - try: - request = requests.post( - "https://api.github.com/graphql", - json={"query": self.query, "variables": self.variables}, - headers=self.headers, - timeout=30 - ) - request.raise_for_status() + request = requests.post( + "https://api.github.com/graphql", + json={"query": self.query, "variables": self.variables}, + headers=self.headers, + ) + if request.status_code == 200: return request.json() - except requests.RequestException as e: - print(f"Request failed: {str(e)}") - if hasattr(e.response, 'json'): - try: - print(e.response.json()) - except ValueError: - pass - raise Exception(f"Query failed: {str(e)}") + else: + print(request.json()) + raise Exception("Query Failed: {}".format(request.status_code)) def set_output(name, value): @@ -171,24 +146,21 @@ def get_commit_depth_and_check_suite(query_commits): if commits["totalCount"] > 0: nodes = commits["nodes"] nodes.reverse() - if nodes[0]["commit"]["oid"] == os.environ.get("EXCLUDE_COMMIT"): + if nodes[0]["commit"]["oid"] == os.environ["EXCLUDE_COMMIT"]: nodes.pop(0) for commit in nodes: commit_depth += 1 commit = commit["commit"] commit_sha = commit["oid"] - check_suites = commit.get("checkSuites", {}) - if check_suites.get("totalCount", 0) > 0: - for check_suite in check_suites.get("nodes", []): - workflow_run = check_suite.get("workflowRun", {}) - workflow = workflow_run.get("workflow", {}) - workflow_name = workflow.get("name") if workflow else None - if workflow_name == "Build CI": + check_suites = commit["checkSuites"] + if check_suites["totalCount"] > 0: + for check_suite in check_suites["nodes"]: + if check_suite["workflowRun"]["workflow"]["name"] == "Build CI": return [ {"sha": commit_sha, "depth": commit_depth}, ( check_suite["id"] - if check_suite.get("conclusion") != "SUCCESS" + if check_suite["conclusion"] != "SUCCESS" else None ), ] @@ -204,32 +176,28 @@ def get_bad_check_runs(query_check_runs): have_dependent_jobs = ["scheduler", "mpy-cross", "tests"] while more_pages: - response = query_check_runs.fetch() - check_runs = response.get("data", {}).get("node", {}) + check_runs = query_check_runs.fetch()["data"]["node"] more_pages = False for run_type in run_types: run_type_camel = run_type.capitalize() + "Run" run_type = run_type + "Runs" - run_data = check_runs.get(run_type, {}) - for check_run in run_data.get("nodes", []): - name = check_run.get("name", "") + for check_run in check_runs[run_type]["nodes"]: + name = check_run["name"] if any([name.startswith(job) for job in have_dependent_jobs]): return {} if name.startswith("ports"): - try: - matrix_job = name.rsplit(" (", 1)[1][:-1] - bad_runs.setdefault("ports", []).append(matrix_job) - except IndexError: - continue + matrix_job = name.rsplit(" (", 1)[1][:-1] + bad_runs.setdefault("ports", []).append(matrix_job) else: bad_runs[name] = True - page_info = run_data.get("pageInfo", {}) - if query_check_runs.paginate(page_info, "after" + run_type_camel): + if query_check_runs.paginate( + check_runs[run_type]["pageInfo"], "after" + run_type_camel + ): query_check_runs.variables["include" + run_type_camel] = True more_pages = True @@ -242,44 +210,31 @@ def set_commit(commit): def main(): - try: - if "REPO" not in os.environ: - print("Error: REPO environment variable not set") - return - - query_commits = Query(QUERY_COMMITS, query_variables_commits, headers) - try: - owner, name = os.environ["REPO"].split("/") - except ValueError: - print("Error: REPO must be in format 'owner/name'") - return - - query_commits.variables["owner"] = owner - query_commits.variables["name"] = name - - commit, check_suite = get_commit_depth_and_check_suite(query_commits) - - if not check_suite: - if commit: - set_commit(commit) - else: - print("Abort: No check suite found") - return - - query_check_runs = Query(QUERY_CHECK_RUNS, query_variables_check_runs, headers) - query_check_runs.variables["checkSuiteID"] = check_suite - - check_runs = get_bad_check_runs(query_check_runs) - - if not check_runs: - print("Abort: No check runs found") - return - - set_commit(commit) - set_output("check_runs", json.dumps(check_runs)) - except Exception as e: - print(f"Error: {str(e)}") - return + query_commits = Query(QUERY_COMMITS, query_variables_commits, headers) + query_commits.variables["owner"], query_commits.variables["name"] = os.environ["REPO"].split( + "/" + ) + + commit, check_suite = get_commit_depth_and_check_suite(query_commits) + + if not check_suite: + if commit: + set_commit(commit) + else: + print("Abort: No check suite found") + quit() + + query_check_runs = Query(QUERY_CHECK_RUNS, query_variables_check_runs, headers) + query_check_runs.variables["checkSuiteID"] = check_suite + + check_runs = get_bad_check_runs(query_check_runs) + + if not check_runs: + print("Abort: No check runs found") + quit() + + set_commit(commit) + set_output("check_runs", json.dumps(check_runs)) if __name__ == "__main__": diff --git a/tools/cortex-m-fault-gdb.py b/tools/cortex-m-fault-gdb.py index b9606f6b718d2..8de754ed26056 100644 --- a/tools/cortex-m-fault-gdb.py +++ b/tools/cortex-m-fault-gdb.py @@ -1,7 +1,5 @@ """Source this file into gdb `source ../../tools/cortex-m-fault-gdb.py` then run -`cortex-m-fault` to print basic info about the fault registers.""" - -import gdb + `cortex-m-fault` to print basic info about the fault registers.""" SCS = 0xE000E000 SCB = SCS + 0x0D00 diff --git a/tools/gdb-stack-size.py b/tools/gdb-stack-size.py index 6426cf429564b..4d3fc9fe08aa1 100644 --- a/tools/gdb-stack-size.py +++ b/tools/gdb-stack-size.py @@ -1,7 +1,5 @@ """Source this file into gdb `source ../../tools/gdb-stack-size.py` then run -`stack-size` to print a backtrace with each frame size next to it.""" - -import gdb + `stack-size` to print a backtrace with each frame size next to it.""" class StackSize(gdb.Command): diff --git a/tools/stack-loc-to-pc.py b/tools/stack-loc-to-pc.py index d4287f3a5d6e6..a1ce788f2b652 100644 --- a/tools/stack-loc-to-pc.py +++ b/tools/stack-loc-to-pc.py @@ -1,10 +1,10 @@ """Prints the pcs that access each stack location in a function. Useful for finding -infrequently used stack space. + infrequently used stack space. -Pipe in disassembly like so: + Pipe in disassembly like so: -arm-none-eabi-objdump --disassemble=mp_execute_bytecode build-metro_m0_express/firmware.elf | python ../../tools/stack-loc-to-pc.py -""" + arm-none-eabi-objdump --disassemble=mp_execute_bytecode build-metro_m0_express/firmware.elf | python ../../tools/stack-loc-to-pc.py + """ import sys import re