From da9bd8bf69b8cfa7ffd68dea1b7b09b57273ca54 Mon Sep 17 00:00:00 2001 From: Philippe Antoine Date: Fri, 15 Feb 2019 17:54:40 +0100 Subject: [PATCH] Fixes more undefined left shift of negative values --- arch/TMS320C64x/TMS320C64xDisassembler.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/TMS320C64x/TMS320C64xDisassembler.c b/arch/TMS320C64x/TMS320C64xDisassembler.c index 34c3ef90b2..9031ec10b2 100644 --- a/arch/TMS320C64x/TMS320C64xDisassembler.c +++ b/arch/TMS320C64x/TMS320C64xDisassembler.c @@ -196,7 +196,7 @@ static DecodeStatus DecodePCRelScst7(MCInst *Inst, unsigned Val, imm |= ~((1 << 7) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ - MCOperand_CreateImm0(Inst, (Address & ~31) + (imm << 2)); + MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } @@ -212,7 +212,7 @@ static DecodeStatus DecodePCRelScst10(MCInst *Inst, unsigned Val, imm |= ~((1 << 10) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ - MCOperand_CreateImm0(Inst, (Address & ~31) + (imm << 2)); + MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; } @@ -228,7 +228,7 @@ static DecodeStatus DecodePCRelScst12(MCInst *Inst, unsigned Val, imm |= ~((1 << 12) - 1); /* Address is relative to the address of the first instruction in the fetch packet */ - MCOperand_CreateImm0(Inst, (Address & ~31) + (imm << 2)); + MCOperand_CreateImm0(Inst, (Address & ~31) + (imm * 4)); return MCDisassembler_Success; }