From 7d9b5780e2f6eed7171d1a979543724111b1d183 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 2 Jul 2023 12:37:01 +0300 Subject: [PATCH 01/26] Add Alpha arch based on AArch64 PR --- CMakeLists.txt | 30 +- Makefile | 10 + Mapping.h | 56 + arch/Alpha/AlphaDisassembler.c | 132 + arch/Alpha/AlphaDisassembler.h | 18 + arch/Alpha/AlphaGenAsmWriter.inc | 1376 +++++++++ arch/Alpha/AlphaGenCSFeatureName.inc | 13 + arch/Alpha/AlphaGenCSMappingInsn.inc | 3207 +++++++++++++++++++++ arch/Alpha/AlphaGenCSMappingInsnName.inc | 135 + arch/Alpha/AlphaGenCSMappingInsnOp.inc | 2131 ++++++++++++++ arch/Alpha/AlphaGenCSOpGroup.inc | 14 + arch/Alpha/AlphaGenDisassemblerTables.inc | 936 ++++++ arch/Alpha/AlphaGenInstrInfo.inc | 1019 +++++++ arch/Alpha/AlphaGenRegisterInfo.inc | 281 ++ arch/Alpha/AlphaGenSubtargetInfo.inc | 24 + arch/Alpha/AlphaGenSystemRegister.inc | 13 + arch/Alpha/AlphaInstPrinter.c | 102 + arch/Alpha/AlphaInstPrinter.h | 15 + arch/Alpha/AlphaMapping.c | 117 + arch/Alpha/AlphaMapping.h | 15 + arch/Alpha/AlphaModule.c | 37 + arch/Alpha/AlphaModule.h | 7 + bindings/const_generator.py | 1 + bindings/python/capstone/__init__.py | 5 +- bindings/python/capstone/alpha.py | 43 + bindings/python/capstone/alpha_const.py | 211 ++ bindings/python/test_alpha.py | 61 + config.mk | 2 +- cs.c | 32 +- cstool/cstool.c | 12 + cstool/cstool.h | 1 + cstool/cstool_alpha.c | 62 + include/capstone/alpha.h | 280 ++ include/capstone/capstone.h | 3 + suite/capstone_get_setup.c | 3 + suite/cstest/include/factory.h | 1 + suite/cstest/src/alpha_detail.c | 66 + suite/cstest/src/capstone_test.c | 4 + suite/cstest/src/main.c | 1 + suite/test_c.sh | 3 +- suite/test_corpus.py | 1 + suite/test_corpus3.py | 1 + suite/test_python.sh | 1 + tests/test_alpha.c | 132 + tests/test_iter.c | 13 + 45 files changed, 10621 insertions(+), 6 deletions(-) create mode 100644 arch/Alpha/AlphaDisassembler.c create mode 100644 arch/Alpha/AlphaDisassembler.h create mode 100644 arch/Alpha/AlphaGenAsmWriter.inc create mode 100644 arch/Alpha/AlphaGenCSFeatureName.inc create mode 100644 arch/Alpha/AlphaGenCSMappingInsn.inc create mode 100644 arch/Alpha/AlphaGenCSMappingInsnName.inc create mode 100644 arch/Alpha/AlphaGenCSMappingInsnOp.inc create mode 100644 arch/Alpha/AlphaGenCSOpGroup.inc create mode 100644 arch/Alpha/AlphaGenDisassemblerTables.inc create mode 100644 arch/Alpha/AlphaGenInstrInfo.inc create mode 100644 arch/Alpha/AlphaGenRegisterInfo.inc create mode 100644 arch/Alpha/AlphaGenSubtargetInfo.inc create mode 100644 arch/Alpha/AlphaGenSystemRegister.inc create mode 100644 arch/Alpha/AlphaInstPrinter.c create mode 100644 arch/Alpha/AlphaInstPrinter.h create mode 100644 arch/Alpha/AlphaMapping.c create mode 100644 arch/Alpha/AlphaMapping.h create mode 100644 arch/Alpha/AlphaModule.c create mode 100644 arch/Alpha/AlphaModule.h create mode 100644 bindings/python/capstone/alpha.py create mode 100644 bindings/python/capstone/alpha_const.py create mode 100755 bindings/python/test_alpha.py create mode 100644 cstool/cstool_alpha.c create mode 100644 include/capstone/alpha.h create mode 100644 suite/cstest/src/alpha_detail.c create mode 100644 tests/test_alpha.c diff --git a/CMakeLists.txt b/CMakeLists.txt index f116b958fb..da633f64ad 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -45,8 +45,8 @@ option(CAPSTONE_ARCHITECTURE_DEFAULT "Whether architectures are enabled by defau option(CAPSTONE_DEBUG "Whether to enable extra debug assertions" OFF) option(CAPSTONE_INSTALL "Generate install target" ${PROJECT_IS_TOP_LEVEL}) -set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE) -set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore) +set(SUPPORTED_ARCHITECTURES ARM AARCH64 M68K MIPS PPC SPARC SYSZ XCORE X86 TMS320C64X M680X EVM MOS65XX WASM BPF RISCV SH TRICORE ALPHA) +set(SUPPORTED_ARCHITECTURE_LABELS ARM AARCH64 M68K MIPS PowerPC Sparc SystemZ XCore x86 TMS320C64x M680x EVM MOS65XX WASM BPF RISCV SH TriCore Alpha) list(LENGTH SUPPORTED_ARCHITECTURES count) math(EXPR count "${count}-1") @@ -145,6 +145,7 @@ set(HEADERS_COMMON include/capstone/tricore.h include/capstone/platform.h include/capstone/sh.h + include/capstone/alpha.h ) set(TEST_SOURCES test_basic.c test_detail.c test_skipdata.c test_iter.c) @@ -569,6 +570,27 @@ if (CAPSTONE_TRICORE_SUPPORT) set(TEST_SOURCES ${TEST_SOURCES} test_tricore.c) endif () +if (CAPSTONE_ALPHA_SUPPORT) + add_definitions(-DCAPSTONE_HAS_ALPHA) + set(SOURCES_ALPHA + arch/Alpha/AlphaDisassembler.c + arch/Alpha/AlphaInstPrinter.c + arch/Alpha/AlphaMapping.c + arch/Alpha/AlphaModule.c + ) + set(HEADERS_ALPHA + arch/Alpha/AlphaDisassembler.h + arch/Alpha/AlphaGenAsmWriter.inc + arch/Alpha/AlphaGenDisassemblerTables.inc + arch/Alpha/AlphaGenInstrInfo.inc + arch/Alpha/AlphaGenRegisterInfo.inc + arch/Alpha/AlphaInstPrinter.h + arch/Alpha/AlphaMapping.h + arch/Alpha/AlphaModule.h + ) + set(TEST_SOURCES ${TEST_SOURCES} test_alpha.c) +endif () + if (CAPSTONE_OSXKERNEL_SUPPORT) add_definitions(-DCAPSTONE_HAS_OSXKERNEL) endif() @@ -593,6 +615,7 @@ set(ALL_SOURCES ${SOURCES_RISCV} ${SOURCES_SH} ${SOURCES_TRICORE} + ${SOURCES_ALPHA} ) set(ALL_HEADERS @@ -616,6 +639,7 @@ set(ALL_HEADERS ${HEADERS_RISCV} ${HEADERS_SH} ${HEADERS_TRICORE} + ${HEADERS_ALPHA} ) ## properties @@ -679,6 +703,7 @@ source_group("Source\\BPF" FILES ${SOURCES_BPF}) source_group("Source\\RISCV" FILES ${SOURCES_RISCV}) source_group("Source\\SH" FILES ${SOURCES_SH}) source_group("Source\\TriCore" FILES ${SOURCES_TRICORE}) +source_group("Source\\Alpha" FILES ${SOURCES_ALPHA}) source_group("Include\\Common" FILES ${HEADERS_COMMON}) source_group("Include\\Engine" FILES ${HEADERS_ENGINE}) @@ -700,6 +725,7 @@ source_group("Include\\BPF" FILES ${HEADERS_BPF}) source_group("Include\\RISCV" FILES ${HEADERS_RISCV}) source_group("Include\\SH" FILES ${HEADERS_SH}) source_group("Include\\TriCore" FILES ${HEADERS_TRICORE}) +source_group("Include\\Alpha" FILES ${HEADERS_ALPHA}) ## installation if(CAPSTONE_INSTALL) diff --git a/Makefile b/Makefile index 88715bfeae..be88c541e0 100644 --- a/Makefile +++ b/Makefile @@ -325,6 +325,15 @@ ifneq (,$(findstring tricore,$(CAPSTONE_ARCHS))) LIBOBJ_TRICORE += $(LIBSRC_TRICORE:%.c=$(OBJDIR)/%.o) endif +DEP_ALPHA = +DEP_ALPHA +=$(wildcard arch/Alpha/Alpha*.inc) + +LIBOBJ_ALPHA = +ifneq (,$(findstring alpha,$(CAPSTONE_ARCHS))) + CFLAGS += -DCAPSTONE_HAS_ALPHA + LIBSRC_ALPHA += $(wildcard arch/Alpha/Alpha*.c) + LIBOBJ_ALPHA += $(LIBSRC_ALPHA:%.c=$(OBJDIR)/%.o) +endif LIBOBJ = LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o $(OBJDIR)/MCInst.o $(OBJDIR)/MCInstPrinter.o $(OBJDIR)/Mapping.o @@ -466,6 +475,7 @@ $(LIBOBJ_WASM): $(DEP_WASM) $(LIBOBJ_MOS65XX): $(DEP_MOS65XX) $(LIBOBJ_BPF): $(DEP_BPF) $(LIBOBJ_TRICORE): $(DEP_TRICORE) +$(LIBOBJ_ALPHA): $(DEP_ALPHA) ifeq ($(CAPSTONE_STATIC),yes) $(ARCHIVE): $(LIBOBJ) diff --git a/Mapping.h b/Mapping.h index 208032999a..bcfa9becb9 100644 --- a/Mapping.h +++ b/Mapping.h @@ -202,4 +202,60 @@ bool map_use_alias_details(const MCInst *MI); void map_set_alias_id(MCInst *MI, const SStream *O, const name_map *alias_mnem_id_map, int map_size); +/// Increments the detail->arch.op_count by one. +#define DEFINE_inc_detail_op_count(arch, ARCH) \ + static inline void ARCH##_inc_op_count(MCInst *MI) \ + { \ + MI->flat_insn->detail->arch.op_count++; \ + } + +/// Decrements the detail->arch.op_count by one. +#define DEFINE_dec_detail_op_count(arch, ARCH) \ + static inline void ARCH##_dec_op_count(MCInst *MI) \ + { \ + MI->flat_insn->detail->arch.op_count--; \ + } + +DEFINE_inc_detail_op_count(arm, ARM); +DEFINE_dec_detail_op_count(arm, ARM); +DEFINE_inc_detail_op_count(ppc, PPC); +DEFINE_dec_detail_op_count(ppc, PPC); +DEFINE_inc_detail_op_count(aarch64, AArch64); +DEFINE_dec_detail_op_count(aarch64, AArch64); +DEFINE_inc_detail_op_count(alpha, Alpha); +DEFINE_dec_detail_op_count(alpha, Alpha); + +/// Returns true if a memory operand is currently edited. +static inline bool doing_mem(const MCInst *MI) { return MI->csh->doing_mem; } + +/// Sets the doing_mem flag to @status. +static inline void set_doing_mem(const MCInst *MI, bool status) +{ + MI->csh->doing_mem = status; +} + +/// Returns detail->arch +#define DEFINE_get_arch_detail(arch, ARCH) \ + static inline cs_##arch *ARCH##_get_detail(const MCInst *MI) \ + { \ + assert(MI && MI->flat_insn && MI->flat_insn->detail); \ + return &MI->flat_insn->detail->arch; \ + } + +DEFINE_get_arch_detail(arm, ARM); +DEFINE_get_arch_detail(ppc, PPC); +DEFINE_get_arch_detail(aarch64, AArch64); + +static inline bool detail_is_set(const MCInst *MI) +{ + assert(MI && MI->flat_insn); + return MI->flat_insn->detail != NULL; +} + +static inline cs_detail *get_detail(const MCInst *MI) +{ + assert(MI && MI->flat_insn); + return MI->flat_insn->detail; +} + #endif // CS_MAPPING_H \ No newline at end of file diff --git a/arch/Alpha/AlphaDisassembler.c b/arch/Alpha/AlphaDisassembler.c new file mode 100644 index 0000000000..217b69dfcc --- /dev/null +++ b/arch/Alpha/AlphaDisassembler.c @@ -0,0 +1,132 @@ +#ifdef CAPSTONE_HAS_ALPHA + +#include // DEBUG +#include +#include + +#include "../../utils.h" + +#include "../../MCFixedLenDisassembler.h" +#include "../../MCDisassembler.h" + +static bool readInstruction32(const uint8_t *code, size_t code_len, + uint32_t *insn) +{ + if (code_len < 4) + // insufficient data + return false; + + // Encoded as a little-endian 32-bit word in the stream. + *insn = (code[0] << 0) | (code[1] << 8) | (code[2] << 16) | + (code[3] << 24); + + return true; +} + +static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder); + +static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder); + +static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder); + +#include "AlphaGenDisassemblerTables.inc" + +#define GET_REGINFO_ENUM +#define GET_REGINFO_MC_DESC + +#include "AlphaGenRegisterInfo.inc" + +static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder) +{ + if (RegNo > 31) + return MCDisassembler_Fail; + + unsigned Register = GPRC[RegNo]; + MCOperand_CreateReg0(Inst, (Register)); + return MCDisassembler_Success; +} + +static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder) +{ + if (RegNo > 31) + return MCDisassembler_Fail; + + unsigned Register = F4RC[RegNo]; + MCOperand_CreateReg0(Inst, (Register)); + return MCDisassembler_Success; +} + +static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder) +{ + if (RegNo > 31) + return MCDisassembler_Fail; + + unsigned Register = F8RC[RegNo]; + MCOperand_CreateReg0(Inst, (Register)); + return MCDisassembler_Success; +} + +#define GET_SUBTARGETINFO_ENUM + +#include "AlphaGenInstrInfo.inc" + +static inline bool tryGetInstruction32(const uint8_t *code, size_t code_len, + MCInst *MI, uint16_t *size, + uint64_t address, void *info, + const uint8_t *decoderTable32) +{ + uint32_t insn32; + DecodeStatus Result; + if (!readInstruction32(code, code_len, &insn32)) { + return false; + } + // Calling the auto-generated decoder function. + Result = decodeInstruction_4(decoderTable32, MI, insn32, address, NULL); + if (Result != MCDisassembler_Fail) { + *size = 4; + return true; + } + return false; +} + +bool Alpha_getInstruction(csh handle, const uint8_t *Bytes, size_t ByteLen, + MCInst *MI, uint16_t *Size, uint64_t Address, + void *Info) +{ + if (!handle) { + return false; + } + + if (MI->flat_insn->detail) { + memset(MI->flat_insn->detail, 0, sizeof(cs_detail)); + } + + if (ByteLen < 4) { + return MCDisassembler_Fail; + } + return tryGetInstruction32(Bytes, ByteLen, MI, Size, Address, Info, + DecoderTable32); + +} + +void Alpha_init(MCRegisterInfo *MRI) +{ + MCRegisterInfo_InitMCRegisterInfo( + MRI, AlphaRegDesc, ARR_SIZE(AlphaRegDesc), 0, 0, + AlphaMCRegisterClasses, ARR_SIZE(AlphaMCRegisterClasses), 0, + 0, AlphaRegDiffLists, 0, AlphaSubRegIdxLists, 1, 0); +} + +#endif \ No newline at end of file diff --git a/arch/Alpha/AlphaDisassembler.h b/arch/Alpha/AlphaDisassembler.h new file mode 100644 index 0000000000..5180b284bf --- /dev/null +++ b/arch/Alpha/AlphaDisassembler.h @@ -0,0 +1,18 @@ +#ifndef CS_ALPHADISASSEMBLER_H +#define CS_ALPHADISASSEMBLER_H + +#if !defined(_MSC_VER) || !defined(_KERNEL_MODE) +#include +#endif + +#include +#include "../../MCRegisterInfo.h" +#include "../../MCInst.h" + +void Alpha_init(MCRegisterInfo *MRI); + +bool Alpha_getInstruction(csh ud, const uint8_t *code, size_t code_len, + MCInst *instr, uint16_t *size, uint64_t address, + void *info); + +#endif // CS_ALPHADISASSEMBLER_H \ No newline at end of file diff --git a/arch/Alpha/AlphaGenAsmWriter.inc b/arch/Alpha/AlphaGenAsmWriter.inc new file mode 100644 index 0000000000..e7d4cb7183 --- /dev/null +++ b/arch/Alpha/AlphaGenAsmWriter.inc @@ -0,0 +1,1376 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +#include +#include + +/// getMnemonic - This method is automatically generated by tablegen +/// from the instruction set description. +static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { +#ifndef CAPSTONE_DIET + static const char AsmStrs[] = { + /* 0 */ "EXTBL \0" + /* 7 */ "EXTLL \0" + /* 14 */ "EXTWL \0" + /* 21 */ "; ADJDOWN \0" + /* 32 */ "CTPOP \0" + /* 39 */ "; ADJUP \0" + /* 48 */ "CTLZ \0" + /* 54 */ "CTTZ \0" + /* 60 */ "lda \0" + /* 65 */ "sra \0" + /* 70 */ "stb \0" + /* 75 */ "sextb \0" + /* 82 */ "blbc \0" + /* 88 */ "cmovlbc \0" + /* 97 */ "rpcc \0" + /* 103 */ "bic \0" + /* 108 */ "cvttq/svc \0" + /* 119 */ "and \0" + /* 124 */ "fbge \0" + /* 130 */ "cmpbge \0" + /* 138 */ "fcmovge \0" + /* 147 */ "fble \0" + /* 153 */ "cmple \0" + /* 160 */ "cmpule \0" + /* 168 */ "fcmovle \0" + /* 177 */ "fbne \0" + /* 183 */ "jsr_coroutine \0" + /* 198 */ "fcmovne \0" + /* 207 */ "cpyse \0" + /* 214 */ "ldah \0" + /* 220 */ "umulh \0" + /* 227 */ "cvtqs/sui \0" + /* 238 */ "cvtts/sui \0" + /* 249 */ "cvtqt/sui \0" + /* 260 */ "ldl/l \0" + /* 267 */ "stl/l \0" + /* 274 */ "ldq/l \0" + /* 281 */ "stq/l \0" + /* 288 */ "s4subl \0" + /* 296 */ "s8subl \0" + /* 304 */ "s4addl \0" + /* 312 */ "s8addl \0" + /* 320 */ "ldl \0" + /* 325 */ "sll \0" + /* 330 */ "mull \0" + /* 336 */ "srl \0" + /* 341 */ "stl \0" + /* 346 */ "cpysn \0" + /* 353 */ "s4subq \0" + /* 361 */ "s8subq \0" + /* 369 */ "s4addq \0" + /* 377 */ "s8addq \0" + /* 385 */ "ldq \0" + /* 390 */ "fbeq \0" + /* 396 */ "cmpeq \0" + /* 403 */ "fcmoveq \0" + /* 412 */ "mulq \0" + /* 418 */ "stq \0" + /* 423 */ "xor \0" + /* 428 */ "cvtst/s \0" + /* 437 */ "blbs \0" + /* 443 */ "cmovlbs \0" + /* 452 */ "lds \0" + /* 457 */ "itofs \0" + /* 464 */ "bis \0" + /* 469 */ "ftois \0" + /* 476 */ "sts \0" + /* 481 */ "cpys \0" + /* 487 */ "ldt \0" + /* 492 */ "itoft \0" + /* 499 */ "fbgt \0" + /* 505 */ "fcmovgt \0" + /* 514 */ "ftoit \0" + /* 521 */ "fblt \0" + /* 527 */ "cmplt \0" + /* 534 */ "cmpult \0" + /* 542 */ "fcmovlt \0" + /* 551 */ "zapnot \0" + /* 559 */ "ornot \0" + /* 566 */ "stt \0" + /* 571 */ "ldbu \0" + /* 577 */ "cmptle/su \0" + /* 588 */ "cmptun/su \0" + /* 599 */ "cmpteq/su \0" + /* 610 */ "subs/su \0" + /* 619 */ "adds/su \0" + /* 628 */ "muls/su \0" + /* 637 */ "sqrts/su \0" + /* 647 */ "divs/su \0" + /* 656 */ "subt/su \0" + /* 665 */ "addt/su \0" + /* 674 */ "cmptlt/su \0" + /* 685 */ "mult/su \0" + /* 694 */ "sqrtt/su \0" + /* 704 */ "divt/su \0" + /* 713 */ "ldwu \0" + /* 719 */ "eqv \0" + /* 724 */ "stw \0" + /* 729 */ "sextw \0" + /* 736 */ "bsr $26,$\0" + /* 746 */ "LSMARKER$\0" + /* 756 */ "jmp $31,\0" + /* 765 */ "br $31,\0" + /* 773 */ "# XRay Function Patchable RET.\0" + /* 804 */ "# XRay Typed Event Log.\0" + /* 828 */ "# XRay Custom Event Log.\0" + /* 853 */ "# XRay Function Enter.\0" + /* 876 */ "# XRay Tail Call Exit.\0" + /* 899 */ "# XRay Function Exit.\0" + /* 921 */ "jsr $23,($27),0\0" + /* 937 */ "jsr $26,($27),0\0" + /* 953 */ "ret $31,($26),1\0" + /* 969 */ "COND_BRANCH imm:\0" + /* 986 */ "LIFETIME_END\0" + /* 999 */ "PSEUDO_PROBE\0" + /* 1012 */ "BUNDLE\0" + /* 1019 */ "DBG_VALUE\0" + /* 1029 */ "DBG_INSTR_REF\0" + /* 1043 */ "DBG_PHI\0" + /* 1051 */ "DBG_LABEL\0" + /* 1061 */ "LIFETIME_START\0" + /* 1076 */ "DBG_VALUE_LIST\0" + /* 1091 */ "PCMARKER_\0" + /* 1101 */ "wmb\0" + /* 1105 */ "#wtf\0" + /* 1110 */ "# FEntry call\0" +}; +#endif // CAPSTONE_DIET + + static const uint16_t OpInfo0[] = { + 0U, // PHI + 0U, // INLINEASM + 0U, // INLINEASM_BR + 0U, // CFI_INSTRUCTION + 0U, // EH_LABEL + 0U, // GC_LABEL + 0U, // ANNOTATION_LABEL + 0U, // KILL + 0U, // EXTRACT_SUBREG + 0U, // INSERT_SUBREG + 0U, // IMPLICIT_DEF + 0U, // SUBREG_TO_REG + 0U, // COPY_TO_REGCLASS + 1020U, // DBG_VALUE + 1077U, // DBG_VALUE_LIST + 1030U, // DBG_INSTR_REF + 1044U, // DBG_PHI + 1052U, // DBG_LABEL + 0U, // REG_SEQUENCE + 0U, // COPY + 1013U, // BUNDLE + 1062U, // LIFETIME_START + 987U, // LIFETIME_END + 1000U, // PSEUDO_PROBE + 0U, // ARITH_FENCE + 0U, // STACKMAP + 1111U, // FENTRY_CALL + 0U, // PATCHPOINT + 0U, // LOAD_STACK_GUARD + 0U, // PREALLOCATED_SETUP + 0U, // PREALLOCATED_ARG + 0U, // STATEPOINT + 0U, // LOCAL_ESCAPE + 0U, // FAULTING_OP + 0U, // PATCHABLE_OP + 854U, // PATCHABLE_FUNCTION_ENTER + 774U, // PATCHABLE_RET + 900U, // PATCHABLE_FUNCTION_EXIT + 877U, // PATCHABLE_TAIL_CALL + 829U, // PATCHABLE_EVENT_CALL + 805U, // PATCHABLE_TYPED_EVENT_CALL + 0U, // ICALL_BRANCH_FUNNEL + 0U, // MEMBARRIER + 0U, // G_ASSERT_SEXT + 0U, // G_ASSERT_ZEXT + 0U, // G_ASSERT_ALIGN + 0U, // G_ADD + 0U, // G_SUB + 0U, // G_MUL + 0U, // G_SDIV + 0U, // G_UDIV + 0U, // G_SREM + 0U, // G_UREM + 0U, // G_SDIVREM + 0U, // G_UDIVREM + 0U, // G_AND + 0U, // G_OR + 0U, // G_XOR + 0U, // G_IMPLICIT_DEF + 0U, // G_PHI + 0U, // G_FRAME_INDEX + 0U, // G_GLOBAL_VALUE + 0U, // G_EXTRACT + 0U, // G_UNMERGE_VALUES + 0U, // G_INSERT + 0U, // G_MERGE_VALUES + 0U, // G_BUILD_VECTOR + 0U, // G_BUILD_VECTOR_TRUNC + 0U, // G_CONCAT_VECTORS + 0U, // G_PTRTOINT + 0U, // G_INTTOPTR + 0U, // G_BITCAST + 0U, // G_FREEZE + 0U, // G_INTRINSIC_FPTRUNC_ROUND + 0U, // G_INTRINSIC_TRUNC + 0U, // G_INTRINSIC_ROUND + 0U, // G_INTRINSIC_LRINT + 0U, // G_INTRINSIC_ROUNDEVEN + 0U, // G_READCYCLECOUNTER + 0U, // G_LOAD + 0U, // G_SEXTLOAD + 0U, // G_ZEXTLOAD + 0U, // G_INDEXED_LOAD + 0U, // G_INDEXED_SEXTLOAD + 0U, // G_INDEXED_ZEXTLOAD + 0U, // G_STORE + 0U, // G_INDEXED_STORE + 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS + 0U, // G_ATOMIC_CMPXCHG + 0U, // G_ATOMICRMW_XCHG + 0U, // G_ATOMICRMW_ADD + 0U, // G_ATOMICRMW_SUB + 0U, // G_ATOMICRMW_AND + 0U, // G_ATOMICRMW_NAND + 0U, // G_ATOMICRMW_OR + 0U, // G_ATOMICRMW_XOR + 0U, // G_ATOMICRMW_MAX + 0U, // G_ATOMICRMW_MIN + 0U, // G_ATOMICRMW_UMAX + 0U, // G_ATOMICRMW_UMIN + 0U, // G_ATOMICRMW_FADD + 0U, // G_ATOMICRMW_FSUB + 0U, // G_ATOMICRMW_FMAX + 0U, // G_ATOMICRMW_FMIN + 0U, // G_ATOMICRMW_UINC_WRAP + 0U, // G_ATOMICRMW_UDEC_WRAP + 0U, // G_FENCE + 0U, // G_BRCOND + 0U, // G_BRINDIRECT + 0U, // G_INVOKE_REGION_START + 0U, // G_INTRINSIC + 0U, // G_INTRINSIC_W_SIDE_EFFECTS + 0U, // G_ANYEXT + 0U, // G_TRUNC + 0U, // G_CONSTANT + 0U, // G_FCONSTANT + 0U, // G_VASTART + 0U, // G_VAARG + 0U, // G_SEXT + 0U, // G_SEXT_INREG + 0U, // G_ZEXT + 0U, // G_SHL + 0U, // G_LSHR + 0U, // G_ASHR + 0U, // G_FSHL + 0U, // G_FSHR + 0U, // G_ROTR + 0U, // G_ROTL + 0U, // G_ICMP + 0U, // G_FCMP + 0U, // G_SELECT + 0U, // G_UADDO + 0U, // G_UADDE + 0U, // G_USUBO + 0U, // G_USUBE + 0U, // G_SADDO + 0U, // G_SADDE + 0U, // G_SSUBO + 0U, // G_SSUBE + 0U, // G_UMULO + 0U, // G_SMULO + 0U, // G_UMULH + 0U, // G_SMULH + 0U, // G_UADDSAT + 0U, // G_SADDSAT + 0U, // G_USUBSAT + 0U, // G_SSUBSAT + 0U, // G_USHLSAT + 0U, // G_SSHLSAT + 0U, // G_SMULFIX + 0U, // G_UMULFIX + 0U, // G_SMULFIXSAT + 0U, // G_UMULFIXSAT + 0U, // G_SDIVFIX + 0U, // G_UDIVFIX + 0U, // G_SDIVFIXSAT + 0U, // G_UDIVFIXSAT + 0U, // G_FADD + 0U, // G_FSUB + 0U, // G_FMUL + 0U, // G_FMA + 0U, // G_FMAD + 0U, // G_FDIV + 0U, // G_FREM + 0U, // G_FPOW + 0U, // G_FPOWI + 0U, // G_FEXP + 0U, // G_FEXP2 + 0U, // G_FLOG + 0U, // G_FLOG2 + 0U, // G_FLOG10 + 0U, // G_FNEG + 0U, // G_FPEXT + 0U, // G_FPTRUNC + 0U, // G_FPTOSI + 0U, // G_FPTOUI + 0U, // G_SITOFP + 0U, // G_UITOFP + 0U, // G_FABS + 0U, // G_FCOPYSIGN + 0U, // G_IS_FPCLASS + 0U, // G_FCANONICALIZE + 0U, // G_FMINNUM + 0U, // G_FMAXNUM + 0U, // G_FMINNUM_IEEE + 0U, // G_FMAXNUM_IEEE + 0U, // G_FMINIMUM + 0U, // G_FMAXIMUM + 0U, // G_PTR_ADD + 0U, // G_PTRMASK + 0U, // G_SMIN + 0U, // G_SMAX + 0U, // G_UMIN + 0U, // G_UMAX + 0U, // G_ABS + 0U, // G_LROUND + 0U, // G_LLROUND + 0U, // G_BR + 0U, // G_BRJT + 0U, // G_INSERT_VECTOR_ELT + 0U, // G_EXTRACT_VECTOR_ELT + 0U, // G_SHUFFLE_VECTOR + 0U, // G_CTTZ + 0U, // G_CTTZ_ZERO_UNDEF + 0U, // G_CTLZ + 0U, // G_CTLZ_ZERO_UNDEF + 0U, // G_CTPOP + 0U, // G_BSWAP + 0U, // G_BITREVERSE + 0U, // G_FCEIL + 0U, // G_FCOS + 0U, // G_FSIN + 0U, // G_FSQRT + 0U, // G_FFLOOR + 0U, // G_FRINT + 0U, // G_FNEARBYINT + 0U, // G_ADDRSPACE_CAST + 0U, // G_BLOCK_ADDR + 0U, // G_JUMP_TABLE + 0U, // G_DYN_STACKALLOC + 0U, // G_STRICT_FADD + 0U, // G_STRICT_FSUB + 0U, // G_STRICT_FMUL + 0U, // G_STRICT_FDIV + 0U, // G_STRICT_FREM + 0U, // G_STRICT_FMA + 0U, // G_STRICT_FSQRT + 0U, // G_READ_REGISTER + 0U, // G_WRITE_REGISTER + 0U, // G_MEMCPY + 0U, // G_MEMCPY_INLINE + 0U, // G_MEMMOVE + 0U, // G_MEMSET + 0U, // G_BZERO + 0U, // G_VECREDUCE_SEQ_FADD + 0U, // G_VECREDUCE_SEQ_FMUL + 0U, // G_VECREDUCE_FADD + 0U, // G_VECREDUCE_FMUL + 0U, // G_VECREDUCE_FMAX + 0U, // G_VECREDUCE_FMIN + 0U, // G_VECREDUCE_ADD + 0U, // G_VECREDUCE_MUL + 0U, // G_VECREDUCE_AND + 0U, // G_VECREDUCE_OR + 0U, // G_VECREDUCE_XOR + 0U, // G_VECREDUCE_SMAX + 0U, // G_VECREDUCE_SMIN + 0U, // G_VECREDUCE_UMAX + 0U, // G_VECREDUCE_UMIN + 0U, // G_SBFX + 0U, // G_UBFX + 2070U, // ADJUSTSTACKDOWN + 2088U, // ADJUSTSTACKUP + 10985U, // ALTENT + 0U, // CAS32 + 0U, // CAS64 + 0U, // LAS32 + 0U, // LAS64 + 19179U, // MEMLABEL + 27716U, // PCLABEL + 0U, // SWAP32 + 0U, // SWAP64 + 1106U, // WTF + 37171U, // ADDLi + 37171U, // ADDLr + 37236U, // ADDQi + 37236U, // ADDQr + 37484U, // ADDS + 37530U, // ADDT + 36984U, // ANDi + 36984U, // ANDr + 43400U, // BEQ + 43134U, // BGE + 43509U, // BGT + 36968U, // BICi + 36968U, // BICr + 37329U, // BISi + 37329U, // BISr + 43091U, // BLBC + 43446U, // BLBS + 43157U, // BLE + 43531U, // BLT + 43187U, // BNE + 2814U, // BR + 51937U, // BSR + 37269U, // CMOVEQi + 37269U, // CMOVEQr + 37004U, // CMOVGEi + 37004U, // CMOVGEr + 37371U, // CMOVGTi + 37371U, // CMOVGTr + 36953U, // CMOVLBCi + 36953U, // CMOVLBCr + 37308U, // CMOVLBSi + 37308U, // CMOVLBSr + 37034U, // CMOVLEi + 37034U, // CMOVLEr + 37408U, // CMOVLTi + 37408U, // CMOVLTr + 37064U, // CMOVNEi + 37064U, // CMOVNEr + 36995U, // CMPBGE + 36995U, // CMPBGEi + 37261U, // CMPEQ + 37261U, // CMPEQi + 37018U, // CMPLE + 37018U, // CMPLEi + 37392U, // CMPLT + 37392U, // CMPLTi + 37464U, // CMPTEQ + 37442U, // CMPTLE + 37539U, // CMPTLT + 37453U, // CMPTUN + 37025U, // CMPULE + 37025U, // CMPULEi + 37399U, // CMPULT + 37399U, // CMPULTi + 60362U, // COND_BRANCH_F + 3018U, // COND_BRANCH_I + 37072U, // CPYSES + 37072U, // CPYSESt + 37072U, // CPYSET + 37211U, // CPYSNS + 37211U, // CPYSNSt + 37211U, // CPYSNT + 37211U, // CPYSNTs + 37346U, // CPYSS + 37346U, // CPYSSt + 37346U, // CPYST + 37346U, // CPYSTs + 12337U, // CTLZ + 12321U, // CTPOP + 12343U, // CTTZ + 12516U, // CVTQS + 12538U, // CVTQT + 12717U, // CVTST + 12397U, // CVTTQ + 12527U, // CVTTS + 37512U, // DIVS + 37569U, // DIVT + 37584U, // EQVi + 37584U, // EQVr + 36865U, // EXTBL + 36872U, // EXTLL + 36879U, // EXTWL + 43399U, // FBEQ + 43133U, // FBGE + 43508U, // FBGT + 43156U, // FBLE + 43530U, // FBLT + 43186U, // FBNE + 6548U, // FCMOVEQS + 6548U, // FCMOVEQT + 6283U, // FCMOVGES + 6283U, // FCMOVGET + 6650U, // FCMOVGTS + 6650U, // FCMOVGTT + 6313U, // FCMOVLES + 6313U, // FCMOVLET + 6687U, // FCMOVLTS + 6687U, // FCMOVLTT + 6343U, // FCMOVNES + 6343U, // FCMOVNET + 12758U, // FTOIS + 12803U, // FTOIT + 12746U, // ITOFS + 12781U, // ITOFT + 19189U, // JMP + 938U, // JSR + 26808U, // JSR_COROUTINE + 922U, // JSRs + 43069U, // LDA + 43223U, // LDAH + 35031U, // LDAHg + 43223U, // LDAHr + 34877U, // LDAg + 43069U, // LDAr + 43580U, // LDBU + 43580U, // LDBUr + 43329U, // LDL + 43269U, // LDL_L + 43329U, // LDLr + 43394U, // LDQ + 43283U, // LDQ_L + 43394U, // LDQl + 43394U, // LDQr + 43461U, // LDS + 43461U, // LDSr + 43496U, // LDT + 43496U, // LDTr + 43722U, // LDWU + 43722U, // LDWUr + 1103U, // MB + 37195U, // MULLi + 37195U, // MULLr + 37277U, // MULQi + 37277U, // MULQr + 37493U, // MULS + 37550U, // MULT + 37424U, // ORNOTi + 37424U, // ORNOTr + 954U, // RETDAG + 954U, // RETDAGp + 2146U, // RPCC + 37169U, // S4ADDLi + 37169U, // S4ADDLr + 37234U, // S4ADDQi + 37234U, // S4ADDQr + 37153U, // S4SUBLi + 37153U, // S4SUBLr + 37218U, // S4SUBQi + 37218U, // S4SUBQr + 37177U, // S8ADDLi + 37177U, // S8ADDLr + 37242U, // S8ADDQi + 37242U, // S8ADDQr + 37161U, // S8SUBLi + 37161U, // S8SUBLr + 37226U, // S8SUBQi + 37226U, // S8SUBQr + 12364U, // SEXTB + 13018U, // SEXTW + 37190U, // SLi + 37190U, // SLr + 12926U, // SQRTS + 12983U, // SQRTT + 36930U, // SRAi + 36930U, // SRAr + 37201U, // SRLi + 37201U, // SRLr + 43079U, // STB + 43079U, // STBr + 43350U, // STL + 37132U, // STL_C + 43350U, // STLr + 43427U, // STQ + 37146U, // STQ_C + 43427U, // STQr + 43485U, // STS + 43485U, // STSr + 43575U, // STT + 43575U, // STTr + 43733U, // STW + 43733U, // STWr + 37155U, // SUBLi + 37155U, // SUBLr + 37220U, // SUBQi + 37220U, // SUBQr + 37475U, // SUBS + 37521U, // SUBT + 37085U, // UMULHi + 37085U, // UMULHr + 1102U, // WMB + 37288U, // XORi + 37288U, // XORr + 37416U, // ZAPNOTi + }; + + static const uint8_t OpInfo1[] = { + 0U, // PHI + 0U, // INLINEASM + 0U, // INLINEASM_BR + 0U, // CFI_INSTRUCTION + 0U, // EH_LABEL + 0U, // GC_LABEL + 0U, // ANNOTATION_LABEL + 0U, // KILL + 0U, // EXTRACT_SUBREG + 0U, // INSERT_SUBREG + 0U, // IMPLICIT_DEF + 0U, // SUBREG_TO_REG + 0U, // COPY_TO_REGCLASS + 0U, // DBG_VALUE + 0U, // DBG_VALUE_LIST + 0U, // DBG_INSTR_REF + 0U, // DBG_PHI + 0U, // DBG_LABEL + 0U, // REG_SEQUENCE + 0U, // COPY + 0U, // BUNDLE + 0U, // LIFETIME_START + 0U, // LIFETIME_END + 0U, // PSEUDO_PROBE + 0U, // ARITH_FENCE + 0U, // STACKMAP + 0U, // FENTRY_CALL + 0U, // PATCHPOINT + 0U, // LOAD_STACK_GUARD + 0U, // PREALLOCATED_SETUP + 0U, // PREALLOCATED_ARG + 0U, // STATEPOINT + 0U, // LOCAL_ESCAPE + 0U, // FAULTING_OP + 0U, // PATCHABLE_OP + 0U, // PATCHABLE_FUNCTION_ENTER + 0U, // PATCHABLE_RET + 0U, // PATCHABLE_FUNCTION_EXIT + 0U, // PATCHABLE_TAIL_CALL + 0U, // PATCHABLE_EVENT_CALL + 0U, // PATCHABLE_TYPED_EVENT_CALL + 0U, // ICALL_BRANCH_FUNNEL + 0U, // MEMBARRIER + 0U, // G_ASSERT_SEXT + 0U, // G_ASSERT_ZEXT + 0U, // G_ASSERT_ALIGN + 0U, // G_ADD + 0U, // G_SUB + 0U, // G_MUL + 0U, // G_SDIV + 0U, // G_UDIV + 0U, // G_SREM + 0U, // G_UREM + 0U, // G_SDIVREM + 0U, // G_UDIVREM + 0U, // G_AND + 0U, // G_OR + 0U, // G_XOR + 0U, // G_IMPLICIT_DEF + 0U, // G_PHI + 0U, // G_FRAME_INDEX + 0U, // G_GLOBAL_VALUE + 0U, // G_EXTRACT + 0U, // G_UNMERGE_VALUES + 0U, // G_INSERT + 0U, // G_MERGE_VALUES + 0U, // G_BUILD_VECTOR + 0U, // G_BUILD_VECTOR_TRUNC + 0U, // G_CONCAT_VECTORS + 0U, // G_PTRTOINT + 0U, // G_INTTOPTR + 0U, // G_BITCAST + 0U, // G_FREEZE + 0U, // G_INTRINSIC_FPTRUNC_ROUND + 0U, // G_INTRINSIC_TRUNC + 0U, // G_INTRINSIC_ROUND + 0U, // G_INTRINSIC_LRINT + 0U, // G_INTRINSIC_ROUNDEVEN + 0U, // G_READCYCLECOUNTER + 0U, // G_LOAD + 0U, // G_SEXTLOAD + 0U, // G_ZEXTLOAD + 0U, // G_INDEXED_LOAD + 0U, // G_INDEXED_SEXTLOAD + 0U, // G_INDEXED_ZEXTLOAD + 0U, // G_STORE + 0U, // G_INDEXED_STORE + 0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS + 0U, // G_ATOMIC_CMPXCHG + 0U, // G_ATOMICRMW_XCHG + 0U, // G_ATOMICRMW_ADD + 0U, // G_ATOMICRMW_SUB + 0U, // G_ATOMICRMW_AND + 0U, // G_ATOMICRMW_NAND + 0U, // G_ATOMICRMW_OR + 0U, // G_ATOMICRMW_XOR + 0U, // G_ATOMICRMW_MAX + 0U, // G_ATOMICRMW_MIN + 0U, // G_ATOMICRMW_UMAX + 0U, // G_ATOMICRMW_UMIN + 0U, // G_ATOMICRMW_FADD + 0U, // G_ATOMICRMW_FSUB + 0U, // G_ATOMICRMW_FMAX + 0U, // G_ATOMICRMW_FMIN + 0U, // G_ATOMICRMW_UINC_WRAP + 0U, // G_ATOMICRMW_UDEC_WRAP + 0U, // G_FENCE + 0U, // G_BRCOND + 0U, // G_BRINDIRECT + 0U, // G_INVOKE_REGION_START + 0U, // G_INTRINSIC + 0U, // G_INTRINSIC_W_SIDE_EFFECTS + 0U, // G_ANYEXT + 0U, // G_TRUNC + 0U, // G_CONSTANT + 0U, // G_FCONSTANT + 0U, // G_VASTART + 0U, // G_VAARG + 0U, // G_SEXT + 0U, // G_SEXT_INREG + 0U, // G_ZEXT + 0U, // G_SHL + 0U, // G_LSHR + 0U, // G_ASHR + 0U, // G_FSHL + 0U, // G_FSHR + 0U, // G_ROTR + 0U, // G_ROTL + 0U, // G_ICMP + 0U, // G_FCMP + 0U, // G_SELECT + 0U, // G_UADDO + 0U, // G_UADDE + 0U, // G_USUBO + 0U, // G_USUBE + 0U, // G_SADDO + 0U, // G_SADDE + 0U, // G_SSUBO + 0U, // G_SSUBE + 0U, // G_UMULO + 0U, // G_SMULO + 0U, // G_UMULH + 0U, // G_SMULH + 0U, // G_UADDSAT + 0U, // G_SADDSAT + 0U, // G_USUBSAT + 0U, // G_SSUBSAT + 0U, // G_USHLSAT + 0U, // G_SSHLSAT + 0U, // G_SMULFIX + 0U, // G_UMULFIX + 0U, // G_SMULFIXSAT + 0U, // G_UMULFIXSAT + 0U, // G_SDIVFIX + 0U, // G_UDIVFIX + 0U, // G_SDIVFIXSAT + 0U, // G_UDIVFIXSAT + 0U, // G_FADD + 0U, // G_FSUB + 0U, // G_FMUL + 0U, // G_FMA + 0U, // G_FMAD + 0U, // G_FDIV + 0U, // G_FREM + 0U, // G_FPOW + 0U, // G_FPOWI + 0U, // G_FEXP + 0U, // G_FEXP2 + 0U, // G_FLOG + 0U, // G_FLOG2 + 0U, // G_FLOG10 + 0U, // G_FNEG + 0U, // G_FPEXT + 0U, // G_FPTRUNC + 0U, // G_FPTOSI + 0U, // G_FPTOUI + 0U, // G_SITOFP + 0U, // G_UITOFP + 0U, // G_FABS + 0U, // G_FCOPYSIGN + 0U, // G_IS_FPCLASS + 0U, // G_FCANONICALIZE + 0U, // G_FMINNUM + 0U, // G_FMAXNUM + 0U, // G_FMINNUM_IEEE + 0U, // G_FMAXNUM_IEEE + 0U, // G_FMINIMUM + 0U, // G_FMAXIMUM + 0U, // G_PTR_ADD + 0U, // G_PTRMASK + 0U, // G_SMIN + 0U, // G_SMAX + 0U, // G_UMIN + 0U, // G_UMAX + 0U, // G_ABS + 0U, // G_LROUND + 0U, // G_LLROUND + 0U, // G_BR + 0U, // G_BRJT + 0U, // G_INSERT_VECTOR_ELT + 0U, // G_EXTRACT_VECTOR_ELT + 0U, // G_SHUFFLE_VECTOR + 0U, // G_CTTZ + 0U, // G_CTTZ_ZERO_UNDEF + 0U, // G_CTLZ + 0U, // G_CTLZ_ZERO_UNDEF + 0U, // G_CTPOP + 0U, // G_BSWAP + 0U, // G_BITREVERSE + 0U, // G_FCEIL + 0U, // G_FCOS + 0U, // G_FSIN + 0U, // G_FSQRT + 0U, // G_FFLOOR + 0U, // G_FRINT + 0U, // G_FNEARBYINT + 0U, // G_ADDRSPACE_CAST + 0U, // G_BLOCK_ADDR + 0U, // G_JUMP_TABLE + 0U, // G_DYN_STACKALLOC + 0U, // G_STRICT_FADD + 0U, // G_STRICT_FSUB + 0U, // G_STRICT_FMUL + 0U, // G_STRICT_FDIV + 0U, // G_STRICT_FREM + 0U, // G_STRICT_FMA + 0U, // G_STRICT_FSQRT + 0U, // G_READ_REGISTER + 0U, // G_WRITE_REGISTER + 0U, // G_MEMCPY + 0U, // G_MEMCPY_INLINE + 0U, // G_MEMMOVE + 0U, // G_MEMSET + 0U, // G_BZERO + 0U, // G_VECREDUCE_SEQ_FADD + 0U, // G_VECREDUCE_SEQ_FMUL + 0U, // G_VECREDUCE_FADD + 0U, // G_VECREDUCE_FMUL + 0U, // G_VECREDUCE_FMAX + 0U, // G_VECREDUCE_FMIN + 0U, // G_VECREDUCE_ADD + 0U, // G_VECREDUCE_MUL + 0U, // G_VECREDUCE_AND + 0U, // G_VECREDUCE_OR + 0U, // G_VECREDUCE_XOR + 0U, // G_VECREDUCE_SMAX + 0U, // G_VECREDUCE_SMIN + 0U, // G_VECREDUCE_UMAX + 0U, // G_VECREDUCE_UMIN + 0U, // G_SBFX + 0U, // G_UBFX + 0U, // ADJUSTSTACKDOWN + 0U, // ADJUSTSTACKUP + 0U, // ALTENT + 0U, // CAS32 + 0U, // CAS64 + 0U, // LAS32 + 0U, // LAS64 + 0U, // MEMLABEL + 0U, // PCLABEL + 0U, // SWAP32 + 0U, // SWAP64 + 0U, // WTF + 0U, // ADDLi + 0U, // ADDLr + 0U, // ADDQi + 0U, // ADDQr + 0U, // ADDS + 0U, // ADDT + 0U, // ANDi + 0U, // ANDr + 2U, // BEQ + 2U, // BGE + 2U, // BGT + 0U, // BICi + 0U, // BICr + 0U, // BISi + 0U, // BISr + 2U, // BLBC + 2U, // BLBS + 2U, // BLE + 2U, // BLT + 2U, // BNE + 0U, // BR + 0U, // BSR + 0U, // CMOVEQi + 0U, // CMOVEQr + 0U, // CMOVGEi + 0U, // CMOVGEr + 0U, // CMOVGTi + 0U, // CMOVGTr + 0U, // CMOVLBCi + 0U, // CMOVLBCr + 0U, // CMOVLBSi + 0U, // CMOVLBSr + 0U, // CMOVLEi + 0U, // CMOVLEr + 0U, // CMOVLTi + 0U, // CMOVLTr + 0U, // CMOVNEi + 0U, // CMOVNEr + 0U, // CMPBGE + 0U, // CMPBGEi + 0U, // CMPEQ + 0U, // CMPEQi + 0U, // CMPLE + 0U, // CMPLEi + 0U, // CMPLT + 0U, // CMPLTi + 0U, // CMPTEQ + 0U, // CMPTLE + 0U, // CMPTLT + 0U, // CMPTUN + 0U, // CMPULE + 0U, // CMPULEi + 0U, // CMPULT + 0U, // CMPULTi + 0U, // COND_BRANCH_F + 1U, // COND_BRANCH_I + 0U, // CPYSES + 0U, // CPYSESt + 0U, // CPYSET + 0U, // CPYSNS + 0U, // CPYSNSt + 0U, // CPYSNT + 0U, // CPYSNTs + 0U, // CPYSS + 0U, // CPYSSt + 0U, // CPYST + 0U, // CPYSTs + 1U, // CTLZ + 1U, // CTPOP + 1U, // CTTZ + 1U, // CVTQS + 1U, // CVTQT + 1U, // CVTST + 1U, // CVTTQ + 1U, // CVTTS + 0U, // DIVS + 0U, // DIVT + 0U, // EQVi + 0U, // EQVr + 0U, // EXTBL + 0U, // EXTLL + 0U, // EXTWL + 2U, // FBEQ + 2U, // FBGE + 2U, // FBGT + 2U, // FBLE + 2U, // FBLT + 2U, // FBNE + 0U, // FCMOVEQS + 0U, // FCMOVEQT + 0U, // FCMOVGES + 0U, // FCMOVGET + 0U, // FCMOVGTS + 0U, // FCMOVGTT + 0U, // FCMOVLES + 0U, // FCMOVLET + 0U, // FCMOVLTS + 0U, // FCMOVLTT + 0U, // FCMOVNES + 0U, // FCMOVNET + 1U, // FTOIS + 1U, // FTOIT + 1U, // ITOFS + 1U, // ITOFT + 1U, // JMP + 0U, // JSR + 1U, // JSR_COROUTINE + 0U, // JSRs + 4U, // LDA + 4U, // LDAH + 1U, // LDAHg + 20U, // LDAHr + 1U, // LDAg + 36U, // LDAr + 4U, // LDBU + 36U, // LDBUr + 4U, // LDL + 4U, // LDL_L + 36U, // LDLr + 4U, // LDQ + 4U, // LDQ_L + 52U, // LDQl + 36U, // LDQr + 4U, // LDS + 36U, // LDSr + 4U, // LDT + 36U, // LDTr + 4U, // LDWU + 36U, // LDWUr + 0U, // MB + 0U, // MULLi + 0U, // MULLr + 0U, // MULQi + 0U, // MULQr + 0U, // MULS + 0U, // MULT + 0U, // ORNOTi + 0U, // ORNOTr + 0U, // RETDAG + 0U, // RETDAGp + 0U, // RPCC + 0U, // S4ADDLi + 0U, // S4ADDLr + 0U, // S4ADDQi + 0U, // S4ADDQr + 0U, // S4SUBLi + 0U, // S4SUBLr + 0U, // S4SUBQi + 0U, // S4SUBQr + 0U, // S8ADDLi + 0U, // S8ADDLr + 0U, // S8ADDQi + 0U, // S8ADDQr + 0U, // S8SUBLi + 0U, // S8SUBLr + 0U, // S8SUBQi + 0U, // S8SUBQr + 1U, // SEXTB + 1U, // SEXTW + 0U, // SLi + 0U, // SLr + 1U, // SQRTS + 1U, // SQRTT + 0U, // SRAi + 0U, // SRAr + 0U, // SRLi + 0U, // SRLr + 1U, // STB + 36U, // STBr + 4U, // STL + 12U, // STL_C + 36U, // STLr + 4U, // STQ + 12U, // STQ_C + 36U, // STQr + 4U, // STS + 36U, // STSr + 4U, // STT + 36U, // STTr + 4U, // STW + 36U, // STWr + 0U, // SUBLi + 0U, // SUBLr + 0U, // SUBQi + 0U, // SUBQr + 0U, // SUBS + 0U, // SUBT + 0U, // UMULHi + 0U, // UMULHr + 0U, // WMB + 0U, // XORi + 0U, // XORr + 0U, // ZAPNOTi + }; + + // Emit the opcode for the instruction. + uint32_t Bits = 0; + Bits |= OpInfo0[MCInst_getOpcode(MI)] << 0; + Bits |= OpInfo1[MCInst_getOpcode(MI)] << 16; + MnemonicBitsInfo MBI = { +#ifndef CAPSTONE_DIET + AsmStrs+(Bits & 2047)-1, +#else + NULL, +#endif // CAPSTONE_DIET + Bits + }; + return MBI; +} + +/// printInstruction - This method is automatically generated by tablegen +/// from the instruction set description. +static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { + SStream_concat0(O, ""); + MnemonicBitsInfo MnemonicInfo = getMnemonic(MI, O); + + SStream_concat0(O, MnemonicInfo.first); + + uint32_t Bits = MnemonicInfo.second; + assert(Bits != 0 && "Cannot print this instruction."); + + // Fragment 0 encoded into 2 bits for 4 unique commands. + switch ((Bits >> 11) & 3) { + default: assert(0 && "Invalid command number."); + case 0: + // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... + return; + break; + case 1: + // ADJUSTSTACKDOWN, ADJUSTSTACKUP, ALTENT, MEMLABEL, PCLABEL, BEQ, BGE, B... + printOperand(MI, 0, O); + break; + case 2: + // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... + printOperand(MI, 1, O); + SStream_concat1(O, ','); + break; + case 3: + // FCMOVEQS, FCMOVEQT, FCMOVGES, FCMOVGET, FCMOVGTS, FCMOVGTT, FCMOVLES, ... + printOperand(MI, 3, O); + SStream_concat1(O, ','); + printOperand(MI, 2, O); + SStream_concat1(O, ','); + printOperand(MI, 0, O); + return; + break; + } + + + // Fragment 1 encoded into 4 bits for 14 unique commands. + switch ((Bits >> 13) & 15) { + default: assert(0 && "Invalid command number."); + case 0: + // ADJUSTSTACKDOWN, ADJUSTSTACKUP, BR, RPCC + return; + break; + case 1: + // ALTENT + SStream_concat0(O, "..ng:\n"); + return; + break; + case 2: + // MEMLABEL + SStream_concat1(O, '$'); + printOperand(MI, 1, O); + SStream_concat1(O, '$'); + printOperand(MI, 2, O); + SStream_concat1(O, '$'); + printOperand(MI, 3, O); + SStream_concat1(O, ':'); + return; + break; + case 3: + // PCLABEL + SStream_concat0(O, ":\n"); + return; + break; + case 4: + // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... + printOperand(MI, 2, O); + break; + case 5: + // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... + SStream_concat1(O, ','); + printOperand(MI, 1, O); + break; + case 6: + // BSR + SStream_concat0(O, " ..ng"); + return; + break; + case 7: + // COND_BRANCH_F + SStream_concat0(O, ", F8RC:"); + printOperand(MI, 1, O); + SStream_concat0(O, ", bb:"); + printOperand(MI, 2, O); + return; + break; + case 8: + // COND_BRANCH_I + SStream_concat0(O, ", GPRC:"); + printOperand(MI, 1, O); + SStream_concat0(O, ", bb:"); + printOperand(MI, 2, O); + return; + break; + case 9: + // CTLZ, CTPOP, CTTZ, CVTQS, CVTQT, CVTST, CVTTQ, CVTTS, FTOIS, FTOIT, IT... + printOperand(MI, 0, O); + return; + break; + case 10: + // JMP + SStream_concat0(O, ",0"); + return; + break; + case 11: + // JSR_COROUTINE + SStream_concat0(O, ",( "); + printOperand(MI, 1, O); + SStream_concat0(O, " ),"); + printOperand(MI, 2, O); + return; + break; + case 12: + // LDAHg, LDAg + SStream_concat0(O, ",0("); + printOperand(MI, 2, O); + SStream_concat0(O, ")\t\t!gpdisp!"); + printOperand(MI, 3, O); + return; + break; + case 13: + // STB + SStream_concat0(O, ", "); + printOperand(MI, 1, O); + SStream_concat1(O, '('); + printOperand(MI, 2, O); + SStream_concat1(O, ')'); + return; + break; + } + + + // Fragment 2 encoded into 2 bits for 3 unique commands. + switch ((Bits >> 17) & 3) { + default: assert(0 && "Invalid command number."); + case 0: + // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... + SStream_concat1(O, ','); + printOperand(MI, 0, O); + return; + break; + case 1: + // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... + return; + break; + case 2: + // LDA, LDAH, LDAHr, LDAr, LDBU, LDBUr, LDL, LDL_L, LDLr, LDQ, LDQ_L, LDQ... + SStream_concat1(O, '('); + break; + } + + + // Fragment 3 encoded into 1 bits for 2 unique commands. + if ((Bits >> 19) & 1) { + // STL_C, STQ_C + printOperand(MI, 3, O); + SStream_concat1(O, ')'); + return; + } else { + // LDA, LDAH, LDAHr, LDAr, LDBU, LDBUr, LDL, LDL_L, LDLr, LDQ, LDQ_L, LDQ... + printOperand(MI, 2, O); + } + + + // Fragment 4 encoded into 2 bits for 4 unique commands. + switch ((Bits >> 20) & 3) { + default: assert(0 && "Invalid command number."); + case 0: + // LDA, LDAH, LDBU, LDL, LDL_L, LDQ, LDQ_L, LDS, LDT, LDWU, STL, STQ, STS... + SStream_concat1(O, ')'); + return; + break; + case 1: + // LDAHr + SStream_concat0(O, ")\t\t!gprelhigh"); + return; + break; + case 2: + // LDAr, LDBUr, LDLr, LDQr, LDSr, LDTr, LDWUr, STBr, STLr, STQr, STSr, ST... + SStream_concat0(O, ")\t\t!gprellow"); + return; + break; + case 3: + // LDQl + SStream_concat0(O, ")\t\t!literal"); + return; + break; + } + +} + + +/// getRegisterName - This method is automatically generated by tblgen +/// from the register set description. This returns the assembler name +/// for the specified register. +static const char *getRegisterName(unsigned RegNo) { +#ifndef CAPSTONE_DIET + assert(RegNo && RegNo < 65 && "Invalid register number!"); + + static const char AsmStrs[] = { + /* 0 */ "$0\0" + /* 3 */ "$10\0" + /* 7 */ "$f10\0" + /* 12 */ "$20\0" + /* 16 */ "$f20\0" + /* 21 */ "$30\0" + /* 25 */ "$f30\0" + /* 30 */ "$f0\0" + /* 34 */ "$1\0" + /* 37 */ "$11\0" + /* 41 */ "$f11\0" + /* 46 */ "$21\0" + /* 50 */ "$f21\0" + /* 55 */ "$31\0" + /* 59 */ "$f31\0" + /* 64 */ "$f1\0" + /* 68 */ "$2\0" + /* 71 */ "$12\0" + /* 75 */ "$f12\0" + /* 80 */ "$22\0" + /* 84 */ "$f22\0" + /* 89 */ "$f2\0" + /* 93 */ "$3\0" + /* 96 */ "$13\0" + /* 100 */ "$f13\0" + /* 105 */ "$23\0" + /* 109 */ "$f23\0" + /* 114 */ "$f3\0" + /* 118 */ "$4\0" + /* 121 */ "$14\0" + /* 125 */ "$f14\0" + /* 130 */ "$24\0" + /* 134 */ "$f24\0" + /* 139 */ "$f4\0" + /* 143 */ "$5\0" + /* 146 */ "$15\0" + /* 150 */ "$f15\0" + /* 155 */ "$25\0" + /* 159 */ "$f25\0" + /* 164 */ "$f5\0" + /* 168 */ "$6\0" + /* 171 */ "$16\0" + /* 175 */ "$f16\0" + /* 180 */ "$26\0" + /* 184 */ "$f26\0" + /* 189 */ "$f6\0" + /* 193 */ "$7\0" + /* 196 */ "$17\0" + /* 200 */ "$f17\0" + /* 205 */ "$27\0" + /* 209 */ "$f27\0" + /* 214 */ "$f7\0" + /* 218 */ "$8\0" + /* 221 */ "$18\0" + /* 225 */ "$f18\0" + /* 230 */ "$28\0" + /* 234 */ "$f28\0" + /* 239 */ "$f8\0" + /* 243 */ "$9\0" + /* 246 */ "$19\0" + /* 250 */ "$f19\0" + /* 255 */ "$29\0" + /* 259 */ "$f29\0" + /* 264 */ "$f9\0" +}; + static const uint16_t RegAsmOffset[] = { + 30, 64, 89, 114, 139, 164, 189, 214, 239, 264, 7, 41, 75, 100, + 125, 150, 175, 200, 225, 250, 16, 50, 84, 109, 134, 159, 184, 209, + 234, 259, 25, 59, 0, 34, 68, 93, 118, 143, 168, 193, 218, 243, + 3, 37, 71, 96, 121, 146, 171, 196, 221, 246, 12, 46, 80, 105, + 130, 155, 180, 205, 230, 255, 21, 55, + }; + + assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && + "Invalid alt name index for register!"); + return AsmStrs+RegAsmOffset[RegNo-1]; +#else + return NULL; +#endif // CAPSTONE_DIET +} +#ifdef PRINT_ALIAS_INSTR +#undef PRINT_ALIAS_INSTR + +static bool printAliasInstr(MCInst *MI, uint64_t Address, SStream *OS) { +#ifndef CAPSTONE_DIET + return false; +#endif // CAPSTONE_DIET +} + +#endif // PRINT_ALIAS_INSTR diff --git a/arch/Alpha/AlphaGenCSFeatureName.inc b/arch/Alpha/AlphaGenCSFeatureName.inc new file mode 100644 index 0000000000..b3734cf65a --- /dev/null +++ b/arch/Alpha/AlphaGenCSFeatureName.inc @@ -0,0 +1,13 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + diff --git a/arch/Alpha/AlphaGenCSMappingInsn.inc b/arch/Alpha/AlphaGenCSMappingInsn.inc new file mode 100644 index 0000000000..e68a274405 --- /dev/null +++ b/arch/Alpha/AlphaGenCSMappingInsn.inc @@ -0,0 +1,3207 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +{ + /* PHINODE */ + Alpha_PHI /* 0 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_INLINEASM /* 1 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_INLINEASM_BR /* 2 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_CFI_INSTRUCTION /* 3 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_EH_LABEL /* 4 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_GC_LABEL /* 5 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_ANNOTATION_LABEL /* 6 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_KILL /* 7 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_EXTRACT_SUBREG /* 8 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_INSERT_SUBREG /* 9 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_IMPLICIT_DEF /* 10 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_SUBREG_TO_REG /* 11 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_COPY_TO_REGCLASS /* 12 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* DBG_VALUE */ + Alpha_DBG_VALUE /* 13 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* DBG_VALUE_LIST */ + Alpha_DBG_VALUE_LIST /* 14 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* DBG_INSTR_REF */ + Alpha_DBG_INSTR_REF /* 15 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* DBG_PHI */ + Alpha_DBG_PHI /* 16 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* DBG_LABEL */ + Alpha_DBG_LABEL /* 17 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_REG_SEQUENCE /* 18 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_COPY /* 19 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* BUNDLE */ + Alpha_BUNDLE /* 20 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* LIFETIME_START */ + Alpha_LIFETIME_START /* 21 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* LIFETIME_END */ + Alpha_LIFETIME_END /* 22 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* PSEUDO_PROBE */ + Alpha_PSEUDO_PROBE /* 23 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_ARITH_FENCE /* 24 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_STACKMAP /* 25 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # FEntry call */ + Alpha_FENTRY_CALL /* 26 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_PATCHPOINT /* 27 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_LOAD_STACK_GUARD /* 28 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_PREALLOCATED_SETUP /* 29 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_PREALLOCATED_ARG /* 30 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_STATEPOINT /* 31 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_LOCAL_ESCAPE /* 32 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_FAULTING_OP /* 33 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_PATCHABLE_OP /* 34 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Function Enter. */ + Alpha_PATCHABLE_FUNCTION_ENTER /* 35 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Function Patchable RET. */ + Alpha_PATCHABLE_RET /* 36 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Function Exit. */ + Alpha_PATCHABLE_FUNCTION_EXIT /* 37 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Tail Call Exit. */ + Alpha_PATCHABLE_TAIL_CALL /* 38 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Custom Event Log. */ + Alpha_PATCHABLE_EVENT_CALL /* 39 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* # XRay Typed Event Log. */ + Alpha_PATCHABLE_TYPED_EVENT_CALL /* 40 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_ICALL_BRANCH_FUNNEL /* 41 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_MEMBARRIER /* 42 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ASSERT_SEXT /* 43 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ASSERT_ZEXT /* 44 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ASSERT_ALIGN /* 45 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ADD /* 46 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SUB /* 47 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MUL /* 48 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SDIV /* 49 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UDIV /* 50 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SREM /* 51 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UREM /* 52 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SDIVREM /* 53 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UDIVREM /* 54 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_AND /* 55 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_OR /* 56 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_XOR /* 57 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_IMPLICIT_DEF /* 58 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_PHI /* 59 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FRAME_INDEX /* 60 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_GLOBAL_VALUE /* 61 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_EXTRACT /* 62 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UNMERGE_VALUES /* 63 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INSERT /* 64 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MERGE_VALUES /* 65 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BUILD_VECTOR /* 66 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BUILD_VECTOR_TRUNC /* 67 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CONCAT_VECTORS /* 68 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_PTRTOINT /* 69 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTTOPTR /* 70 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BITCAST /* 71 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FREEZE /* 72 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_FPTRUNC_ROUND /* 73 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_TRUNC /* 74 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_ROUND /* 75 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_LRINT /* 76 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_ROUNDEVEN /* 77 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_READCYCLECOUNTER /* 78 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_LOAD /* 79 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SEXTLOAD /* 80 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ZEXTLOAD /* 81 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INDEXED_LOAD /* 82 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INDEXED_SEXTLOAD /* 83 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INDEXED_ZEXTLOAD /* 84 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STORE /* 85 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INDEXED_STORE /* 86 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMIC_CMPXCHG_WITH_SUCCESS /* 87 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMIC_CMPXCHG /* 88 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_XCHG /* 89 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_ADD /* 90 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_SUB /* 91 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_AND /* 92 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_NAND /* 93 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_OR /* 94 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_XOR /* 95 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_MAX /* 96 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_MIN /* 97 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_UMAX /* 98 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_UMIN /* 99 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_FADD /* 100 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_FSUB /* 101 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_FMAX /* 102 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_FMIN /* 103 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_UINC_WRAP /* 104 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ATOMICRMW_UDEC_WRAP /* 105 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FENCE /* 106 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BRCOND /* 107 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BRINDIRECT /* 108 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INVOKE_REGION_START /* 109 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC /* 110 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INTRINSIC_W_SIDE_EFFECTS /* 111 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ANYEXT /* 112 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_TRUNC /* 113 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CONSTANT /* 114 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCONSTANT /* 115 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VASTART /* 116 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VAARG /* 117 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SEXT /* 118 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SEXT_INREG /* 119 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ZEXT /* 120 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SHL /* 121 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_LSHR /* 122 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ASHR /* 123 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FSHL /* 124 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FSHR /* 125 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ROTR /* 126 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ROTL /* 127 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ICMP /* 128 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCMP /* 129 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SELECT /* 130 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UADDO /* 131 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UADDE /* 132 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_USUBO /* 133 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_USUBE /* 134 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SADDO /* 135 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SADDE /* 136 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SSUBO /* 137 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SSUBE /* 138 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMULO /* 139 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMULO /* 140 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMULH /* 141 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMULH /* 142 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UADDSAT /* 143 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SADDSAT /* 144 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_USUBSAT /* 145 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SSUBSAT /* 146 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_USHLSAT /* 147 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SSHLSAT /* 148 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMULFIX /* 149 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMULFIX /* 150 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMULFIXSAT /* 151 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMULFIXSAT /* 152 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SDIVFIX /* 153 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UDIVFIX /* 154 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SDIVFIXSAT /* 155 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UDIVFIXSAT /* 156 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FADD /* 157 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FSUB /* 158 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMUL /* 159 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMA /* 160 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMAD /* 161 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FDIV /* 162 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FREM /* 163 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPOW /* 164 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPOWI /* 165 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FEXP /* 166 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FEXP2 /* 167 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FLOG /* 168 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FLOG2 /* 169 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FLOG10 /* 170 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FNEG /* 171 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPEXT /* 172 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPTRUNC /* 173 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPTOSI /* 174 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FPTOUI /* 175 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SITOFP /* 176 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UITOFP /* 177 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FABS /* 178 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCOPYSIGN /* 179 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_IS_FPCLASS /* 180 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCANONICALIZE /* 181 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMINNUM /* 182 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMAXNUM /* 183 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMINNUM_IEEE /* 184 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMAXNUM_IEEE /* 185 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMINIMUM /* 186 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FMAXIMUM /* 187 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_PTR_ADD /* 188 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_PTRMASK /* 189 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMIN /* 190 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SMAX /* 191 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMIN /* 192 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UMAX /* 193 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ABS /* 194 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_LROUND /* 195 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_LLROUND /* 196 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BR /* 197 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BRJT /* 198 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_INSERT_VECTOR_ELT /* 199 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_EXTRACT_VECTOR_ELT /* 200 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SHUFFLE_VECTOR /* 201 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CTTZ /* 202 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CTTZ_ZERO_UNDEF /* 203 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CTLZ /* 204 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CTLZ_ZERO_UNDEF /* 205 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_CTPOP /* 206 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BSWAP /* 207 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BITREVERSE /* 208 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCEIL /* 209 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FCOS /* 210 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FSIN /* 211 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FSQRT /* 212 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FFLOOR /* 213 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FRINT /* 214 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_FNEARBYINT /* 215 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_ADDRSPACE_CAST /* 216 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BLOCK_ADDR /* 217 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_JUMP_TABLE /* 218 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_DYN_STACKALLOC /* 219 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FADD /* 220 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FSUB /* 221 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FMUL /* 222 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FDIV /* 223 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FREM /* 224 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FMA /* 225 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_STRICT_FSQRT /* 226 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_READ_REGISTER /* 227 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_WRITE_REGISTER /* 228 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MEMCPY /* 229 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MEMCPY_INLINE /* 230 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MEMMOVE /* 231 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_MEMSET /* 232 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_BZERO /* 233 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_SEQ_FADD /* 234 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_SEQ_FMUL /* 235 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_FADD /* 236 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_FMUL /* 237 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_FMAX /* 238 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_FMIN /* 239 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_ADD /* 240 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_MUL /* 241 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_AND /* 242 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_OR /* 243 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_XOR /* 244 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_SMAX /* 245 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_SMIN /* 246 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_UMAX /* 247 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_VECREDUCE_UMIN /* 248 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_SBFX /* 249 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_G_UBFX /* 250 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ; ADJDOWN $amt1 */ + Alpha_ADJUSTSTACKDOWN /* 251 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ; ADJUP $amt1 */ + Alpha_ADJUSTSTACKUP /* 252 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* $$$TARGET..ng: + */ + Alpha_ALTENT /* 253 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_CAS32 /* 254 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_CAS64 /* 255 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_LAS32 /* 256 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_LAS64 /* 257 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* LSMARKER$$$i$$$j$$$k$$$m: */ + Alpha_MEMLABEL /* 258 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* PCMARKER_$num: + */ + Alpha_PCLABEL /* 259 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_SWAP32 /* 260 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* */ + Alpha_SWAP64 /* 261 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* #wtf */ + Alpha_WTF /* 262 */, Alpha_INS_INVALID, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* addl $RA,$L,$RC */ + Alpha_ADDLi /* 263 */, Alpha_INS_ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* addl $RA,$RB,$RC */ + Alpha_ADDLr /* 264 */, Alpha_INS_ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* addq $RA,$L,$RC */ + Alpha_ADDQi /* 265 */, Alpha_INS_ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* addq $RA,$RB,$RC */ + Alpha_ADDQr /* 266 */, Alpha_INS_ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* adds/su $RA,$RB,$RC */ + Alpha_ADDS /* 267 */, Alpha_INS_ADDSsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* addt/su $RA,$RB,$RC */ + Alpha_ADDT /* 268 */, Alpha_INS_ADDTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* and $RA,$L,$RC */ + Alpha_ANDi /* 269 */, Alpha_INS_AND, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* and $RA,$RB,$RC */ + Alpha_ANDr /* 270 */, Alpha_INS_AND, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* beq $R,$dst */ + Alpha_BEQ /* 271 */, Alpha_INS_BEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* bge $R,$dst */ + Alpha_BGE /* 272 */, Alpha_INS_BGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* bgt $R,$dst */ + Alpha_BGT /* 273 */, Alpha_INS_BGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* bic $RA,$L,$RC */ + Alpha_BICi /* 274 */, Alpha_INS_BIC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* bic $RA,$RB,$RC */ + Alpha_BICr /* 275 */, Alpha_INS_BIC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* bis $RA,$L,$RC */ + Alpha_BISi /* 276 */, Alpha_INS_BIS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* bis $RA,$RB,$RC */ + Alpha_BISr /* 277 */, Alpha_INS_BIS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* blbc $R,$dst */ + Alpha_BLBC /* 278 */, Alpha_INS_BLBC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* blbs $R,$dst */ + Alpha_BLBS /* 279 */, Alpha_INS_BLBS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* ble $R,$dst */ + Alpha_BLE /* 280 */, Alpha_INS_BLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* blt $R,$dst */ + Alpha_BLT /* 281 */, Alpha_INS_BLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* bne $R,$dst */ + Alpha_BNE /* 282 */, Alpha_INS_BNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* br $$31,$DISP */ + Alpha_BR /* 283 */, Alpha_INS_BR, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* bsr $$26,$$$DISP ..ng */ + Alpha_BSR /* 284 */, Alpha_INS_BSR, + #ifndef CAPSTONE_DIET + { Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* cmoveq $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVEQi /* 285 */, Alpha_INS_CMOVEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmoveq $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVEQr /* 286 */, Alpha_INS_CMOVEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovge $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVGEi /* 287 */, Alpha_INS_CMOVGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovge $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVGEr /* 288 */, Alpha_INS_CMOVGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovgt $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVGTi /* 289 */, Alpha_INS_CMOVGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovgt $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVGTr /* 290 */, Alpha_INS_CMOVGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlbc $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLBCi /* 291 */, Alpha_INS_CMOVLBC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlbc $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLBCr /* 292 */, Alpha_INS_CMOVLBC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlbs $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLBSi /* 293 */, Alpha_INS_CMOVLBS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlbs $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLBSr /* 294 */, Alpha_INS_CMOVLBS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovle $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLEi /* 295 */, Alpha_INS_CMOVLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovle $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLEr /* 296 */, Alpha_INS_CMOVLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlt $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLTi /* 297 */, Alpha_INS_CMOVLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovlt $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVLTr /* 298 */, Alpha_INS_CMOVLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovne $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVNEi /* 299 */, Alpha_INS_CMOVNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmovne $RCOND,$RTRUE,$RDEST */ + Alpha_CMOVNEr /* 300 */, Alpha_INS_CMOVNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpbge $RA,$RB,$RC */ + Alpha_CMPBGE /* 301 */, Alpha_INS_CMPBGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpbge $RA,$L,$RC */ + Alpha_CMPBGEi /* 302 */, Alpha_INS_CMPBGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpeq $RA,$RB,$RC */ + Alpha_CMPEQ /* 303 */, Alpha_INS_CMPEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpeq $RA,$L,$RC */ + Alpha_CMPEQi /* 304 */, Alpha_INS_CMPEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmple $RA,$RB,$RC */ + Alpha_CMPLE /* 305 */, Alpha_INS_CMPLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmple $RA,$L,$RC */ + Alpha_CMPLEi /* 306 */, Alpha_INS_CMPLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmplt $RA,$RB,$RC */ + Alpha_CMPLT /* 307 */, Alpha_INS_CMPLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmplt $RA,$L,$RC */ + Alpha_CMPLTi /* 308 */, Alpha_INS_CMPLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpteq/su $RA,$RB,$RC */ + Alpha_CMPTEQ /* 309 */, Alpha_INS_CMPTEQsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmptle/su $RA,$RB,$RC */ + Alpha_CMPTLE /* 310 */, Alpha_INS_CMPTLEsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmptlt/su $RA,$RB,$RC */ + Alpha_CMPTLT /* 311 */, Alpha_INS_CMPTLTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmptun/su $RA,$RB,$RC */ + Alpha_CMPTUN /* 312 */, Alpha_INS_CMPTUNsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpule $RA,$RB,$RC */ + Alpha_CMPULE /* 313 */, Alpha_INS_CMPULE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpule $RA,$L,$RC */ + Alpha_CMPULEi /* 314 */, Alpha_INS_CMPULE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpult $RA,$RB,$RC */ + Alpha_CMPULT /* 315 */, Alpha_INS_CMPULT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cmpult $RA,$L,$RC */ + Alpha_CMPULTi /* 316 */, Alpha_INS_CMPULT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* COND_BRANCH imm:$opc, F8RC:$R, bb:$dst */ + Alpha_COND_BRANCH_F /* 317 */, Alpha_INS_COND_BRANCH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* COND_BRANCH imm:$opc, GPRC:$R, bb:$dst */ + Alpha_COND_BRANCH_I /* 318 */, Alpha_INS_COND_BRANCH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* cpyse $RA,$RB,$RC */ + Alpha_CPYSES /* 319 */, Alpha_INS_CPYSE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpyse $RA,$RB,$RC */ + Alpha_CPYSESt /* 320 */, Alpha_INS_CPYSE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpyse $RA,$RB,$RC */ + Alpha_CPYSET /* 321 */, Alpha_INS_CPYSE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpysn $RA,$RB,$RC */ + Alpha_CPYSNS /* 322 */, Alpha_INS_CPYSN, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpysn $RA,$RB,$RC */ + Alpha_CPYSNSt /* 323 */, Alpha_INS_CPYSN, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpysn $RA,$RB,$RC */ + Alpha_CPYSNT /* 324 */, Alpha_INS_CPYSN, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpysn $RA,$RB,$RC */ + Alpha_CPYSNTs /* 325 */, Alpha_INS_CPYSN, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpys $RA,$RB,$RC */ + Alpha_CPYSS /* 326 */, Alpha_INS_CPYS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpys $RA,$RB,$RC */ + Alpha_CPYSSt /* 327 */, Alpha_INS_CPYS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpys $RA,$RB,$RC */ + Alpha_CPYST /* 328 */, Alpha_INS_CPYS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cpys $RA,$RB,$RC */ + Alpha_CPYSTs /* 329 */, Alpha_INS_CPYS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* CTLZ $RB,$RC */ + Alpha_CTLZ /* 330 */, Alpha_INS_CTLZ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* CTPOP $RB,$RC */ + Alpha_CTPOP /* 331 */, Alpha_INS_CTPOP, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* CTTZ $RB,$RC */ + Alpha_CTTZ /* 332 */, Alpha_INS_CTTZ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cvtqs/sui $RB,$RC */ + Alpha_CVTQS /* 333 */, Alpha_INS_CVTQSsSUI, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cvtqt/sui $RB,$RC */ + Alpha_CVTQT /* 334 */, Alpha_INS_CVTQTsSUI, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cvtst/s $RB,$RC */ + Alpha_CVTST /* 335 */, Alpha_INS_CVTSTsS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cvttq/svc $RB,$RC */ + Alpha_CVTTQ /* 336 */, Alpha_INS_CVTTQsSVC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* cvtts/sui $RB,$RC */ + Alpha_CVTTS /* 337 */, Alpha_INS_CVTTSsSUI, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* divs/su $RA,$RB,$RC */ + Alpha_DIVS /* 338 */, Alpha_INS_DIVSsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* divt/su $RA,$RB,$RC */ + Alpha_DIVT /* 339 */, Alpha_INS_DIVTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* eqv $RA,$L,$RC */ + Alpha_EQVi /* 340 */, Alpha_INS_EQV, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* eqv $RA,$RB,$RC */ + Alpha_EQVr /* 341 */, Alpha_INS_EQV, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTBL $RA,$RB,$RC */ + Alpha_EXTBL /* 342 */, Alpha_INS_EXTBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTLL $RA,$RB,$RC */ + Alpha_EXTLL /* 343 */, Alpha_INS_EXTLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTWL $RA,$RB,$RC */ + Alpha_EXTWL /* 344 */, Alpha_INS_EXTWL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fbeq $R,$dst */ + Alpha_FBEQ /* 345 */, Alpha_INS_FBEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fbge $R,$dst */ + Alpha_FBGE /* 346 */, Alpha_INS_FBGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fbgt $R,$dst */ + Alpha_FBGT /* 347 */, Alpha_INS_FBGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fble $R,$dst */ + Alpha_FBLE /* 348 */, Alpha_INS_FBLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fblt $R,$dst */ + Alpha_FBLT /* 349 */, Alpha_INS_FBLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fbne $R,$dst */ + Alpha_FBNE /* 350 */, Alpha_INS_FBNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + #endif +}, +{ + /* fcmoveq $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVEQS /* 351 */, Alpha_INS_FCMOVEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmoveq $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVEQT /* 352 */, Alpha_INS_FCMOVEQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovge $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVGES /* 353 */, Alpha_INS_FCMOVGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovge $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVGET /* 354 */, Alpha_INS_FCMOVGE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovgt $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVGTS /* 355 */, Alpha_INS_FCMOVGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovgt $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVGTT /* 356 */, Alpha_INS_FCMOVGT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovle $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVLES /* 357 */, Alpha_INS_FCMOVLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovle $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVLET /* 358 */, Alpha_INS_FCMOVLE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovlt $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVLTS /* 359 */, Alpha_INS_FCMOVLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovlt $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVLTT /* 360 */, Alpha_INS_FCMOVLT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovne $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVNES /* 361 */, Alpha_INS_FCMOVNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fcmovne $RCOND,$RTRUE,$RDEST */ + Alpha_FCMOVNET /* 362 */, Alpha_INS_FCMOVNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ftois $RA,$RC */ + Alpha_FTOIS /* 363 */, Alpha_INS_FTOIS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ftoit $RA,$RC */ + Alpha_FTOIT /* 364 */, Alpha_INS_FTOIT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* itofs $RA,$RC */ + Alpha_ITOFS /* 365 */, Alpha_INS_ITOFS, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* itoft $RA,$RC */ + Alpha_ITOFT /* 366 */, Alpha_INS_ITOFT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* jmp $$31,{$RS},0 */ + Alpha_JMP /* 367 */, Alpha_INS_JMP, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 1, {{ 0 }} + #endif +}, +{ + /* jsr $$26,($$27),0 */ + Alpha_JSR /* 368 */, Alpha_INS_JSR, + #ifndef CAPSTONE_DIET + { Alpha_REG_R27, Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* jsr_coroutine $RD,( $RS ),$DISP */ + Alpha_JSR_COROUTINE /* 369 */, Alpha_INS_JSR_COROUTINE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* jsr $$23,($$27),0 */ + Alpha_JSRs /* 370 */, Alpha_INS_JSR, + #ifndef CAPSTONE_DIET + { Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, 0 }, { Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, Alpha_REG_R28, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* lda $RA,$DISP($RB) */ + Alpha_LDA /* 371 */, Alpha_INS_LDA, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldah $RA,$DISP($RB) */ + Alpha_LDAH /* 372 */, Alpha_INS_LDAH, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldah $RA,0($RB) !gpdisp!$NUM */ + Alpha_LDAHg /* 373 */, Alpha_INS_LDAH, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldah $RA,$DISP($RB) !gprelhigh */ + Alpha_LDAHr /* 374 */, Alpha_INS_LDAH, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* lda $RA,0($RB) !gpdisp!$NUM */ + Alpha_LDAg /* 375 */, Alpha_INS_LDA, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* lda $RA,$DISP($RB) !gprellow */ + Alpha_LDAr /* 376 */, Alpha_INS_LDA, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldbu $RA,$DISP($RB) */ + Alpha_LDBU /* 377 */, Alpha_INS_LDBU, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldbu $RA,$DISP($RB) !gprellow */ + Alpha_LDBUr /* 378 */, Alpha_INS_LDBU, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldl $RA,$DISP($RB) */ + Alpha_LDL /* 379 */, Alpha_INS_LDL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldl/l $RA,$DISP($RB) */ + Alpha_LDL_L /* 380 */, Alpha_INS_LDLsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldl $RA,$DISP($RB) !gprellow */ + Alpha_LDLr /* 381 */, Alpha_INS_LDL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldq $RA,$DISP($RB) */ + Alpha_LDQ /* 382 */, Alpha_INS_LDQ, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldq/l $RA,$DISP($RB) */ + Alpha_LDQ_L /* 383 */, Alpha_INS_LDQsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldq $RA,$DISP($RB) !literal */ + Alpha_LDQl /* 384 */, Alpha_INS_LDQ, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldq $RA,$DISP($RB) !gprellow */ + Alpha_LDQr /* 385 */, Alpha_INS_LDQ, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* lds $RA,$DISP($RB) */ + Alpha_LDS /* 386 */, Alpha_INS_LDS, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* lds $RA,$DISP($RB) !gprellow */ + Alpha_LDSr /* 387 */, Alpha_INS_LDS, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldt $RA,$DISP($RB) */ + Alpha_LDT /* 388 */, Alpha_INS_LDT, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldt $RA,$DISP($RB) !gprellow */ + Alpha_LDTr /* 389 */, Alpha_INS_LDT, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldwu $RA,$DISP($RB) */ + Alpha_LDWU /* 390 */, Alpha_INS_LDWU, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldwu $RA,$DISP($RB) !gprellow */ + Alpha_LDWUr /* 391 */, Alpha_INS_LDWU, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mb */ + Alpha_MB /* 392 */, Alpha_INS_MB, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mull $RA,$L,$RC */ + Alpha_MULLi /* 393 */, Alpha_INS_MULL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mull $RA,$RB,$RC */ + Alpha_MULLr /* 394 */, Alpha_INS_MULL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mulq $RA,$L,$RC */ + Alpha_MULQi /* 395 */, Alpha_INS_MULQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mulq $RA,$RB,$RC */ + Alpha_MULQr /* 396 */, Alpha_INS_MULQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* muls/su $RA,$RB,$RC */ + Alpha_MULS /* 397 */, Alpha_INS_MULSsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* mult/su $RA,$RB,$RC */ + Alpha_MULT /* 398 */, Alpha_INS_MULTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ornot $RA,$L,$RC */ + Alpha_ORNOTi /* 399 */, Alpha_INS_ORNOT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ornot $RA,$RB,$RC */ + Alpha_ORNOTr /* 400 */, Alpha_INS_ORNOT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ret $$31,($$26),1 */ + Alpha_RETDAG /* 401 */, Alpha_INS_RET, + #ifndef CAPSTONE_DIET + { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ret $$31,($$26),1 */ + Alpha_RETDAGp /* 402 */, Alpha_INS_RET, + #ifndef CAPSTONE_DIET + { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* rpcc $RA */ + Alpha_RPCC /* 403 */, Alpha_INS_RPCC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4addl $RA,$L,$RC */ + Alpha_S4ADDLi /* 404 */, Alpha_INS_S4ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4addl $RA,$RB,$RC */ + Alpha_S4ADDLr /* 405 */, Alpha_INS_S4ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4addq $RA,$L,$RC */ + Alpha_S4ADDQi /* 406 */, Alpha_INS_S4ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4addq $RA,$RB,$RC */ + Alpha_S4ADDQr /* 407 */, Alpha_INS_S4ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4subl $RA,$L,$RC */ + Alpha_S4SUBLi /* 408 */, Alpha_INS_S4SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4subl $RA,$RB,$RC */ + Alpha_S4SUBLr /* 409 */, Alpha_INS_S4SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4subq $RA,$L,$RC */ + Alpha_S4SUBQi /* 410 */, Alpha_INS_S4SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s4subq $RA,$RB,$RC */ + Alpha_S4SUBQr /* 411 */, Alpha_INS_S4SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8addl $RA,$L,$RC */ + Alpha_S8ADDLi /* 412 */, Alpha_INS_S8ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8addl $RA,$RB,$RC */ + Alpha_S8ADDLr /* 413 */, Alpha_INS_S8ADDL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8addq $RA,$L,$RC */ + Alpha_S8ADDQi /* 414 */, Alpha_INS_S8ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8addq $RA,$RB,$RC */ + Alpha_S8ADDQr /* 415 */, Alpha_INS_S8ADDQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8subl $RA,$L,$RC */ + Alpha_S8SUBLi /* 416 */, Alpha_INS_S8SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8subl $RA,$RB,$RC */ + Alpha_S8SUBLr /* 417 */, Alpha_INS_S8SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8subq $RA,$L,$RC */ + Alpha_S8SUBQi /* 418 */, Alpha_INS_S8SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* s8subq $RA,$RB,$RC */ + Alpha_S8SUBQr /* 419 */, Alpha_INS_S8SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sextb $RB,$RC */ + Alpha_SEXTB /* 420 */, Alpha_INS_SEXTB, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sextw $RB,$RC */ + Alpha_SEXTW /* 421 */, Alpha_INS_SEXTW, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sll $RA,$L,$RC */ + Alpha_SLi /* 422 */, Alpha_INS_SLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sll $RA,$RB,$RC */ + Alpha_SLr /* 423 */, Alpha_INS_SLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sqrts/su $RB,$RC */ + Alpha_SQRTS /* 424 */, Alpha_INS_SQRTSsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sqrtt/su $RB,$RC */ + Alpha_SQRTT /* 425 */, Alpha_INS_SQRTTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sra $RA,$L,$RC */ + Alpha_SRAi /* 426 */, Alpha_INS_SRA, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sra $RA,$RB,$RC */ + Alpha_SRAr /* 427 */, Alpha_INS_SRA, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* srl $RA,$L,$RC */ + Alpha_SRLi /* 428 */, Alpha_INS_SRL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* srl $RA,$RB,$RC */ + Alpha_SRLr /* 429 */, Alpha_INS_SRL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stb $RA, $DISP($RB) */ + Alpha_STB /* 430 */, Alpha_INS_STB, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stb $RA,$DISP($RB) !gprellow */ + Alpha_STBr /* 431 */, Alpha_INS_STB, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stl $RA,$DISP($RB) */ + Alpha_STL /* 432 */, Alpha_INS_STL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stl/l $RA,$DISP($RB) */ + Alpha_STL_C /* 433 */, Alpha_INS_STLsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stl $RA,$DISP($RB) !gprellow */ + Alpha_STLr /* 434 */, Alpha_INS_STL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stq $RA,$DISP($RB) */ + Alpha_STQ /* 435 */, Alpha_INS_STQ, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stq/l $RA,$DISP($RB) */ + Alpha_STQ_C /* 436 */, Alpha_INS_STQsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stq $RA,$DISP($RB) !gprellow */ + Alpha_STQr /* 437 */, Alpha_INS_STQ, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sts $RA,$DISP($RB) */ + Alpha_STS /* 438 */, Alpha_INS_STS, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* sts $RA,$DISP($RB) !gprellow */ + Alpha_STSr /* 439 */, Alpha_INS_STS, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stt $RA,$DISP($RB) */ + Alpha_STT /* 440 */, Alpha_INS_STT, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stt $RA,$DISP($RB) !gprellow */ + Alpha_STTr /* 441 */, Alpha_INS_STT, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stw $RA,$DISP($RB) */ + Alpha_STW /* 442 */, Alpha_INS_STW, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stw $RA,$DISP($RB) !gprellow */ + Alpha_STWr /* 443 */, Alpha_INS_STW, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subl $RA,$L,$RC */ + Alpha_SUBLi /* 444 */, Alpha_INS_SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subl $RA,$RB,$RC */ + Alpha_SUBLr /* 445 */, Alpha_INS_SUBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subq $RA,$L,$RC */ + Alpha_SUBQi /* 446 */, Alpha_INS_SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subq $RA,$RB,$RC */ + Alpha_SUBQr /* 447 */, Alpha_INS_SUBQ, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subs/su $RA,$RB,$RC */ + Alpha_SUBS /* 448 */, Alpha_INS_SUBSsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* subt/su $RA,$RB,$RC */ + Alpha_SUBT /* 449 */, Alpha_INS_SUBTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* umulh $RA,$L,$RC */ + Alpha_UMULHi /* 450 */, Alpha_INS_UMULH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* umulh $RA,$RB,$RC */ + Alpha_UMULHr /* 451 */, Alpha_INS_UMULH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* wmb */ + Alpha_WMB /* 452 */, Alpha_INS_WMB, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* xor $RA,$L,$RC */ + Alpha_XORi /* 453 */, Alpha_INS_XOR, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* xor $RA,$RB,$RC */ + Alpha_XORr /* 454 */, Alpha_INS_XOR, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* zapnot $RA,$L,$RC */ + Alpha_ZAPNOTi /* 455 */, Alpha_INS_ZAPNOT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, diff --git a/arch/Alpha/AlphaGenCSMappingInsnName.inc b/arch/Alpha/AlphaGenCSMappingInsnName.inc new file mode 100644 index 0000000000..cfde97b1fc --- /dev/null +++ b/arch/Alpha/AlphaGenCSMappingInsnName.inc @@ -0,0 +1,135 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + + "invalid", // Alpha_INS_INVALID + "addl", // Alpha_INS_ADDL + "addq", // Alpha_INS_ADDQ + "adds/su", // Alpha_INS_ADDSsSU + "addt/su", // Alpha_INS_ADDTsSU + "and", // Alpha_INS_AND + "beq", // Alpha_INS_BEQ + "bge", // Alpha_INS_BGE + "bgt", // Alpha_INS_BGT + "bic", // Alpha_INS_BIC + "bis", // Alpha_INS_BIS + "blbc", // Alpha_INS_BLBC + "blbs", // Alpha_INS_BLBS + "ble", // Alpha_INS_BLE + "blt", // Alpha_INS_BLT + "bne", // Alpha_INS_BNE + "br", // Alpha_INS_BR + "bsr", // Alpha_INS_BSR + "cmoveq", // Alpha_INS_CMOVEQ + "cmovge", // Alpha_INS_CMOVGE + "cmovgt", // Alpha_INS_CMOVGT + "cmovlbc", // Alpha_INS_CMOVLBC + "cmovlbs", // Alpha_INS_CMOVLBS + "cmovle", // Alpha_INS_CMOVLE + "cmovlt", // Alpha_INS_CMOVLT + "cmovne", // Alpha_INS_CMOVNE + "cmpbge", // Alpha_INS_CMPBGE + "cmpeq", // Alpha_INS_CMPEQ + "cmple", // Alpha_INS_CMPLE + "cmplt", // Alpha_INS_CMPLT + "cmpteq/su", // Alpha_INS_CMPTEQsSU + "cmptle/su", // Alpha_INS_CMPTLEsSU + "cmptlt/su", // Alpha_INS_CMPTLTsSU + "cmptun/su", // Alpha_INS_CMPTUNsSU + "cmpule", // Alpha_INS_CMPULE + "cmpult", // Alpha_INS_CMPULT + "COND_BRANCH", // Alpha_INS_COND_BRANCH + "cpyse", // Alpha_INS_CPYSE + "cpysn", // Alpha_INS_CPYSN + "cpys", // Alpha_INS_CPYS + "CTLZ", // Alpha_INS_CTLZ + "CTPOP", // Alpha_INS_CTPOP + "CTTZ", // Alpha_INS_CTTZ + "cvtqs/sui", // Alpha_INS_CVTQSsSUI + "cvtqt/sui", // Alpha_INS_CVTQTsSUI + "cvtst/s", // Alpha_INS_CVTSTsS + "cvttq/svc", // Alpha_INS_CVTTQsSVC + "cvtts/sui", // Alpha_INS_CVTTSsSUI + "divs/su", // Alpha_INS_DIVSsSU + "divt/su", // Alpha_INS_DIVTsSU + "eqv", // Alpha_INS_EQV + "EXTBL", // Alpha_INS_EXTBL + "EXTLL", // Alpha_INS_EXTLL + "EXTWL", // Alpha_INS_EXTWL + "fbeq", // Alpha_INS_FBEQ + "fbge", // Alpha_INS_FBGE + "fbgt", // Alpha_INS_FBGT + "fble", // Alpha_INS_FBLE + "fblt", // Alpha_INS_FBLT + "fbne", // Alpha_INS_FBNE + "fcmoveq", // Alpha_INS_FCMOVEQ + "fcmovge", // Alpha_INS_FCMOVGE + "fcmovgt", // Alpha_INS_FCMOVGT + "fcmovle", // Alpha_INS_FCMOVLE + "fcmovlt", // Alpha_INS_FCMOVLT + "fcmovne", // Alpha_INS_FCMOVNE + "ftois", // Alpha_INS_FTOIS + "ftoit", // Alpha_INS_FTOIT + "itofs", // Alpha_INS_ITOFS + "itoft", // Alpha_INS_ITOFT + "jmp", // Alpha_INS_JMP + "jsr", // Alpha_INS_JSR + "jsr_coroutine", // Alpha_INS_JSR_COROUTINE + "lda", // Alpha_INS_LDA + "ldah", // Alpha_INS_LDAH + "ldbu", // Alpha_INS_LDBU + "ldl", // Alpha_INS_LDL + "ldl/l", // Alpha_INS_LDLsL + "ldq", // Alpha_INS_LDQ + "ldq/l", // Alpha_INS_LDQsL + "lds", // Alpha_INS_LDS + "ldt", // Alpha_INS_LDT + "ldwu", // Alpha_INS_LDWU + "mb", // Alpha_INS_MB + "mull", // Alpha_INS_MULL + "mulq", // Alpha_INS_MULQ + "muls/su", // Alpha_INS_MULSsSU + "mult/su", // Alpha_INS_MULTsSU + "ornot", // Alpha_INS_ORNOT + "ret", // Alpha_INS_RET + "rpcc", // Alpha_INS_RPCC + "s4addl", // Alpha_INS_S4ADDL + "s4addq", // Alpha_INS_S4ADDQ + "s4subl", // Alpha_INS_S4SUBL + "s4subq", // Alpha_INS_S4SUBQ + "s8addl", // Alpha_INS_S8ADDL + "s8addq", // Alpha_INS_S8ADDQ + "s8subl", // Alpha_INS_S8SUBL + "s8subq", // Alpha_INS_S8SUBQ + "sextb", // Alpha_INS_SEXTB + "sextw", // Alpha_INS_SEXTW + "sll", // Alpha_INS_SLL + "sqrts/su", // Alpha_INS_SQRTSsSU + "sqrtt/su", // Alpha_INS_SQRTTsSU + "sra", // Alpha_INS_SRA + "srl", // Alpha_INS_SRL + "stb", // Alpha_INS_STB + "stl", // Alpha_INS_STL + "stl/l", // Alpha_INS_STLsL + "stq", // Alpha_INS_STQ + "stq/l", // Alpha_INS_STQsL + "sts", // Alpha_INS_STS + "stt", // Alpha_INS_STT + "stw", // Alpha_INS_STW + "subl", // Alpha_INS_SUBL + "subq", // Alpha_INS_SUBQ + "subs/su", // Alpha_INS_SUBSsSU + "subt/su", // Alpha_INS_SUBTsSU + "umulh", // Alpha_INS_UMULH + "wmb", // Alpha_INS_WMB + "xor", // Alpha_INS_XOR + "zapnot", // Alpha_INS_ZAPNOT diff --git a/arch/Alpha/AlphaGenCSMappingInsnOp.inc b/arch/Alpha/AlphaGenCSMappingInsnOp.inc new file mode 100644 index 0000000000..6606725419 --- /dev/null +++ b/arch/Alpha/AlphaGenCSMappingInsnOp.inc @@ -0,0 +1,2131 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +{{{ /* Alpha_PHI (0) - Alpha_INS_INVALID - PHINODE */ + 0 +}}}, +{{{ /* Alpha_INLINEASM (1) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_INLINEASM_BR (2) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_CFI_INSTRUCTION (3) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_EH_LABEL (4) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_GC_LABEL (5) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_ANNOTATION_LABEL (6) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_KILL (7) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_EXTRACT_SUBREG (8) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_INSERT_SUBREG (9) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_IMPLICIT_DEF (10) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_SUBREG_TO_REG (11) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_COPY_TO_REGCLASS (12) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_DBG_VALUE (13) - Alpha_INS_INVALID - DBG_VALUE */ + 0 +}}}, +{{{ /* Alpha_DBG_VALUE_LIST (14) - Alpha_INS_INVALID - DBG_VALUE_LIST */ + 0 +}}}, +{{{ /* Alpha_DBG_INSTR_REF (15) - Alpha_INS_INVALID - DBG_INSTR_REF */ + 0 +}}}, +{{{ /* Alpha_DBG_PHI (16) - Alpha_INS_INVALID - DBG_PHI */ + 0 +}}}, +{{{ /* Alpha_DBG_LABEL (17) - Alpha_INS_INVALID - DBG_LABEL */ + 0 +}}}, +{{{ /* Alpha_REG_SEQUENCE (18) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_COPY (19) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_BUNDLE (20) - Alpha_INS_INVALID - BUNDLE */ + 0 +}}}, +{{{ /* Alpha_LIFETIME_START (21) - Alpha_INS_INVALID - LIFETIME_START */ + 0 +}}}, +{{{ /* Alpha_LIFETIME_END (22) - Alpha_INS_INVALID - LIFETIME_END */ + 0 +}}}, +{{{ /* Alpha_PSEUDO_PROBE (23) - Alpha_INS_INVALID - PSEUDO_PROBE */ + 0 +}}}, +{{{ /* Alpha_ARITH_FENCE (24) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_STACKMAP (25) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_FENTRY_CALL (26) - Alpha_INS_INVALID - # FEntry call */ + 0 +}}}, +{{{ /* Alpha_PATCHPOINT (27) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_LOAD_STACK_GUARD (28) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_PREALLOCATED_SETUP (29) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_PREALLOCATED_ARG (30) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_STATEPOINT (31) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_LOCAL_ESCAPE (32) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_FAULTING_OP (33) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_PATCHABLE_OP (34) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_PATCHABLE_FUNCTION_ENTER (35) - Alpha_INS_INVALID - # XRay Function Enter. */ + 0 +}}}, +{{{ /* Alpha_PATCHABLE_RET (36) - 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0 +}}}, +{{{ /* Alpha_G_UDIVFIX (154) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_SDIVFIXSAT (155) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_UDIVFIXSAT (156) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FADD (157) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FSUB (158) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FMUL (159) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FMA (160) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FMAD (161) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FDIV (162) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FREM (163) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FPOW (164) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FPOWI (165) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FEXP (166) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FEXP2 (167) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FLOG (168) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FLOG2 (169) - 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Alpha_G_EXTRACT_VECTOR_ELT (200) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_SHUFFLE_VECTOR (201) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_CTTZ (202) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_CTTZ_ZERO_UNDEF (203) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_CTLZ (204) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_CTLZ_ZERO_UNDEF (205) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_CTPOP (206) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_BSWAP (207) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_BITREVERSE (208) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FCEIL (209) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FCOS (210) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FSIN (211) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FSQRT (212) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FFLOOR (213) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FRINT (214) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_FNEARBYINT (215) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_ADDRSPACE_CAST (216) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_BLOCK_ADDR (217) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_JUMP_TABLE (218) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_DYN_STACKALLOC (219) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FADD (220) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FSUB (221) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FMUL (222) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FDIV (223) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FREM (224) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FMA (225) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_STRICT_FSQRT (226) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_READ_REGISTER (227) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_WRITE_REGISTER (228) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_G_MEMCPY (229) - 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0 +}}}, +{{{ /* Alpha_MEMLABEL (258) - Alpha_INS_INVALID - LSMARKER$$$i$$$j$$$k$$$m: */ + 0 +}}}, +{{{ /* Alpha_PCLABEL (259) - Alpha_INS_INVALID - PCMARKER_$num: + */ + 0 +}}}, +{{{ /* Alpha_SWAP32 (260) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_SWAP64 (261) - Alpha_INS_INVALID - */ + 0 +}}}, +{{{ /* Alpha_WTF (262) - Alpha_INS_INVALID - #wtf */ + 0 +}}}, +{ /* Alpha_ADDLi (263) - Alpha_INS_ADDL - addl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_ADDLr (264) - Alpha_INS_ADDL - addl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ADDQi (265) - Alpha_INS_ADDQ - addq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_ADDQr (266) - Alpha_INS_ADDQ - addq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ADDS (267) - Alpha_INS_ADDSsSU - adds/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ADDT (268) - Alpha_INS_ADDTsSU - addt/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ANDi (269) - Alpha_INS_AND - and $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_ANDr (270) - Alpha_INS_AND - and $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_BEQ (271) - Alpha_INS_BEQ - beq $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BGE (272) - Alpha_INS_BGE - bge $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BGT (273) - Alpha_INS_BGT - bgt $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BICi (274) - Alpha_INS_BIC - bic $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_BICr (275) - Alpha_INS_BIC - bic $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_BISi (276) - Alpha_INS_BIS - bis $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_BISr (277) - Alpha_INS_BIS - bis $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_BLBC (278) - Alpha_INS_BLBC - blbc $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BLBS (279) - Alpha_INS_BLBS - blbs $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BLE (280) - Alpha_INS_BLE - ble $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BLT (281) - Alpha_INS_BLT - blt $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BNE (282) - Alpha_INS_BNE - bne $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_BR (283) - Alpha_INS_BR - br $$31,$DISP */ +{ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* DISP */ + { 0 } +}}, +{ /* Alpha_BSR (284) - Alpha_INS_BSR - bsr $$26,$$$DISP ..ng */ +{ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* DISP */ + { 0 } +}}, +{ /* Alpha_CMOVEQi (285) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVEQr (286) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVGEi (287) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVGEr (288) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVGTi (289) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVGTr (290) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLBCi (291) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLBCr (292) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLBSi (293) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLBSr (294) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLEi (295) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLEr (296) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLTi (297) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVLTr (298) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVNEi (299) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMOVNEr (300) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { 0 } +}}, +{ /* Alpha_CMPBGE (301) - Alpha_INS_CMPBGE - cmpbge $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPBGEi (302) - Alpha_INS_CMPBGE - cmpbge $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_CMPEQ (303) - Alpha_INS_CMPEQ - cmpeq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPEQi (304) - Alpha_INS_CMPEQ - cmpeq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_CMPLE (305) - Alpha_INS_CMPLE - cmple $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPLEi (306) - Alpha_INS_CMPLE - cmple $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_CMPLT (307) - Alpha_INS_CMPLT - cmplt $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPLTi (308) - Alpha_INS_CMPLT - cmplt $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_CMPTEQ (309) - Alpha_INS_CMPTEQsSU - cmpteq/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPTLE (310) - Alpha_INS_CMPTLEsSU - cmptle/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPTLT (311) - Alpha_INS_CMPTLTsSU - cmptlt/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPTUN (312) - Alpha_INS_CMPTUNsSU - cmptun/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPULE (313) - Alpha_INS_CMPULE - cmpule $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPULEi (314) - Alpha_INS_CMPULE - cmpule $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_CMPULT (315) - Alpha_INS_CMPULT - cmpult $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CMPULTi (316) - Alpha_INS_CMPULT - cmpult $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_COND_BRANCH_F (317) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, F8RC:$R, bb:$dst */ +{ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_COND_BRANCH_I (318) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, GPRC:$R, bb:$dst */ +{ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_CPYSES (319) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSESt (320) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSET (321) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSNS (322) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSNSt (323) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSNT (324) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSNTs (325) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSS (326) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSSt (327) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYST (328) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CPYSTs (329) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CTLZ (330) - Alpha_INS_CTLZ - CTLZ $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CTPOP (331) - Alpha_INS_CTPOP - CTPOP $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CTTZ (332) - Alpha_INS_CTTZ - CTTZ $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CVTQS (333) - Alpha_INS_CVTQSsSUI - cvtqs/sui $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CVTQT (334) - Alpha_INS_CVTQTsSUI - cvtqt/sui $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CVTST (335) - Alpha_INS_CVTSTsS - cvtst/s $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CVTTQ (336) - Alpha_INS_CVTTQsSVC - cvttq/svc $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_CVTTS (337) - Alpha_INS_CVTTSsSUI - cvtts/sui $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_DIVS (338) - Alpha_INS_DIVSsSU - divs/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_DIVT (339) - Alpha_INS_DIVTsSU - divt/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EQVi (340) - Alpha_INS_EQV - eqv $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EQVr (341) - Alpha_INS_EQV - eqv $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTBL (342) - Alpha_INS_EXTBL - EXTBL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTLL (343) - Alpha_INS_EXTLL - EXTLL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTWL (344) - Alpha_INS_EXTWL - EXTWL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_FBEQ (345) - Alpha_INS_FBEQ - fbeq $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FBGE (346) - Alpha_INS_FBGE - fbge $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FBGT (347) - Alpha_INS_FBGT - fbgt $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FBLE (348) - Alpha_INS_FBLE - fble $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FBLT (349) - Alpha_INS_FBLT - fblt $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FBNE (350) - Alpha_INS_FBNE - fbne $R,$dst */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ + { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { 0 } +}}, +{ /* Alpha_FCMOVEQS (351) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVEQT (352) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVGES (353) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVGET (354) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVGTS (355) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVGTT (356) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVLES (357) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVLET (358) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVLTS (359) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVLTT (360) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVNES (361) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FCMOVNET (362) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { 0 } +}}, +{ /* Alpha_FTOIS (363) - Alpha_INS_FTOIS - ftois $RA,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_FTOIT (364) - Alpha_INS_FTOIT - ftoit $RA,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_ITOFS (365) - Alpha_INS_ITOFS - itofs $RA,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_ITOFT (366) - Alpha_INS_ITOFT - itoft $RA,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_JMP (367) - Alpha_INS_JMP - jmp $$31,{$RS},0 */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ + { 0 } +}}, +{ /* Alpha_JSR (368) - Alpha_INS_JSR - jsr $$26,($$27),0 */ +{ + { 0 } +}}, +{ /* Alpha_JSR_COROUTINE (369) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,( $RS ),$DISP */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RD */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { 0 } +}}, +{ /* Alpha_JSRs (370) - Alpha_INS_JSR - jsr $$23,($$27),0 */ +{ + { 0 } +}}, +{ /* Alpha_LDA (371) - Alpha_INS_LDA - lda $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDAH (372) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDAHg (373) - Alpha_INS_LDAH - ldah $RA,0($RB) !gpdisp!$NUM */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ + { 0 } +}}, +{ /* Alpha_LDAHr (374) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) !gprelhigh */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDAg (375) - Alpha_INS_LDA - lda $RA,0($RB) !gpdisp!$NUM */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ + { 0 } +}}, +{ /* Alpha_LDAr (376) - Alpha_INS_LDA - lda $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDBU (377) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDBUr (378) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDL (379) - Alpha_INS_LDL - ldl $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDL_L (380) - Alpha_INS_LDLsL - ldl/l $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDLr (381) - Alpha_INS_LDL - ldl $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDQ (382) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDQ_L (383) - Alpha_INS_LDQsL - ldq/l $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDQl (384) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !literal */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDQr (385) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDS (386) - Alpha_INS_LDS - lds $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDSr (387) - Alpha_INS_LDS - lds $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDT (388) - Alpha_INS_LDT - ldt $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDTr (389) - Alpha_INS_LDT - ldt $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDWU (390) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDWUr (391) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MB (392) - Alpha_INS_MB - mb */ +{ + { 0 } +}}, +{ /* Alpha_MULLi (393) - Alpha_INS_MULL - mull $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MULLr (394) - Alpha_INS_MULL - mull $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MULQi (395) - Alpha_INS_MULQ - mulq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MULQr (396) - Alpha_INS_MULQ - mulq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MULS (397) - Alpha_INS_MULSsSU - muls/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MULT (398) - Alpha_INS_MULTsSU - mult/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ORNOTi (399) - Alpha_INS_ORNOT - ornot $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_ORNOTr (400) - Alpha_INS_ORNOT - ornot $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_RETDAG (401) - Alpha_INS_RET - ret $$31,($$26),1 */ +{ + { 0 } +}}, +{ /* Alpha_RETDAGp (402) - Alpha_INS_RET - ret $$31,($$26),1 */ +{ + { 0 } +}}, +{ /* Alpha_RPCC (403) - Alpha_INS_RPCC - rpcc $RA */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_S4ADDLi (404) - Alpha_INS_S4ADDL - s4addl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S4ADDLr (405) - Alpha_INS_S4ADDL - s4addl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S4ADDQi (406) - Alpha_INS_S4ADDQ - s4addq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S4ADDQr (407) - Alpha_INS_S4ADDQ - s4addq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S4SUBLi (408) - Alpha_INS_S4SUBL - s4subl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S4SUBLr (409) - Alpha_INS_S4SUBL - s4subl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S4SUBQi (410) - Alpha_INS_S4SUBQ - s4subq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S4SUBQr (411) - Alpha_INS_S4SUBQ - s4subq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S8ADDLi (412) - Alpha_INS_S8ADDL - s8addl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S8ADDLr (413) - Alpha_INS_S8ADDL - s8addl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S8ADDQi (414) - Alpha_INS_S8ADDQ - s8addq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S8ADDQr (415) - Alpha_INS_S8ADDQ - s8addq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S8SUBLi (416) - Alpha_INS_S8SUBL - s8subl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S8SUBLr (417) - Alpha_INS_S8SUBL - s8subl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_S8SUBQi (418) - Alpha_INS_S8SUBQ - s8subq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_S8SUBQr (419) - Alpha_INS_S8SUBQ - s8subq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SEXTB (420) - Alpha_INS_SEXTB - sextb $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SEXTW (421) - Alpha_INS_SEXTW - sextw $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SLi (422) - Alpha_INS_SLL - sll $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_SLr (423) - Alpha_INS_SLL - sll $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SQRTS (424) - Alpha_INS_SQRTSsSU - sqrts/su $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SQRTT (425) - Alpha_INS_SQRTTsSU - sqrtt/su $RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SRAi (426) - Alpha_INS_SRA - sra $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_SRAr (427) - Alpha_INS_SRA - sra $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SRLi (428) - Alpha_INS_SRL - srl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_SRLr (429) - Alpha_INS_SRL - srl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STB (430) - Alpha_INS_STB - stb $RA, $DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STBr (431) - Alpha_INS_STB - stb $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STL (432) - Alpha_INS_STL - stl $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STL_C (433) - Alpha_INS_STLsL - stl/l $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STLr (434) - Alpha_INS_STL - stl $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STQ (435) - Alpha_INS_STQ - stq $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STQ_C (436) - Alpha_INS_STQsL - stq/l $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STQr (437) - Alpha_INS_STQ - stq $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STS (438) - Alpha_INS_STS - sts $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STSr (439) - Alpha_INS_STS - sts $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STT (440) - Alpha_INS_STT - stt $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STTr (441) - Alpha_INS_STT - stt $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STW (442) - Alpha_INS_STW - stw $RA,$DISP($RB) */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STWr (443) - Alpha_INS_STW - stw $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SUBLi (444) - Alpha_INS_SUBL - subl $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_SUBLr (445) - Alpha_INS_SUBL - subl $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SUBQi (446) - Alpha_INS_SUBQ - subq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_SUBQr (447) - Alpha_INS_SUBQ - subq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SUBS (448) - Alpha_INS_SUBSsSU - subs/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_SUBT (449) - Alpha_INS_SUBTsSU - subt/su $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_UMULHi (450) - Alpha_INS_UMULH - umulh $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_UMULHr (451) - Alpha_INS_UMULH - umulh $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_WMB (452) - Alpha_INS_WMB - wmb */ +{ + { 0 } +}}, +{ /* Alpha_XORi (453) - Alpha_INS_XOR - xor $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_XORr (454) - Alpha_INS_XOR - xor $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_ZAPNOTi (455) - Alpha_INS_ZAPNOT - zapnot $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, diff --git a/arch/Alpha/AlphaGenCSOpGroup.inc b/arch/Alpha/AlphaGenCSOpGroup.inc new file mode 100644 index 0000000000..dad38bd6ad --- /dev/null +++ b/arch/Alpha/AlphaGenCSOpGroup.inc @@ -0,0 +1,14 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + + Alpha_OP_GROUP_Operand = 0, diff --git a/arch/Alpha/AlphaGenDisassemblerTables.inc b/arch/Alpha/AlphaGenDisassemblerTables.inc new file mode 100644 index 0000000000..570139def6 --- /dev/null +++ b/arch/Alpha/AlphaGenDisassemblerTables.inc @@ -0,0 +1,936 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +#include "../../MCInst.h" +#include "../../LEB128.h" + +// Helper function for extracting fields from encoded instructions. +#define FieldFromInstruction(fname, InsnType) \ +static InsnType fname(InsnType insn, unsigned startBit, unsigned numBits) \ +{ \ + InsnType fieldMask; \ + if (numBits == sizeof(InsnType) * 8) \ + fieldMask = (InsnType)(-1LL); \ + else \ + fieldMask = (((InsnType)1 << numBits) - 1) << startBit; \ + return (insn & fieldMask) >> startBit; \ +} + +static const uint8_t DecoderTable32[] = { +/* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... +/* 3 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 12 +/* 8 */ MCD_OPC_Decode, 190, 2, 0, // Opcode: COND_BRANCH_I +/* 12 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 21 +/* 17 */ MCD_OPC_Decode, 243, 2, 1, // Opcode: LDA +/* 21 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 30 +/* 26 */ MCD_OPC_Decode, 244, 2, 1, // Opcode: LDAH +/* 30 */ MCD_OPC_FilterValue, 10, 4, 0, 0, // Skip to: 39 +/* 35 */ MCD_OPC_Decode, 249, 2, 1, // Opcode: LDBU +/* 39 */ MCD_OPC_FilterValue, 12, 4, 0, 0, // Skip to: 48 +/* 44 */ MCD_OPC_Decode, 134, 3, 1, // Opcode: LDWU +/* 48 */ MCD_OPC_FilterValue, 13, 4, 0, 0, // Skip to: 57 +/* 53 */ MCD_OPC_Decode, 186, 3, 1, // Opcode: STW +/* 57 */ MCD_OPC_FilterValue, 14, 4, 0, 0, // Skip to: 66 +/* 62 */ MCD_OPC_Decode, 174, 3, 1, // Opcode: STB +/* 66 */ MCD_OPC_FilterValue, 16, 215, 1, 0, // Skip to: 542 +/* 71 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 74 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 90 +/* 79 */ MCD_OPC_CheckField, 13, 3, 0, 180, 7, 0, // Skip to: 2058 +/* 86 */ MCD_OPC_Decode, 136, 2, 2, // Opcode: ADDLr +/* 90 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 106 +/* 95 */ MCD_OPC_CheckField, 13, 3, 0, 164, 7, 0, // Skip to: 2058 +/* 102 */ MCD_OPC_Decode, 149, 3, 2, // Opcode: S4ADDLr +/* 106 */ MCD_OPC_FilterValue, 9, 11, 0, 0, // Skip to: 122 +/* 111 */ MCD_OPC_CheckField, 13, 3, 0, 148, 7, 0, // Skip to: 2058 +/* 118 */ MCD_OPC_Decode, 189, 3, 2, // Opcode: SUBLr +/* 122 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 138 +/* 127 */ MCD_OPC_CheckField, 13, 3, 0, 132, 7, 0, // Skip to: 2058 +/* 134 */ MCD_OPC_Decode, 153, 3, 2, // Opcode: S4SUBLr +/* 138 */ MCD_OPC_FilterValue, 15, 11, 0, 0, // Skip to: 154 +/* 143 */ MCD_OPC_CheckField, 13, 3, 0, 116, 7, 0, // Skip to: 2058 +/* 150 */ MCD_OPC_Decode, 173, 2, 2, // Opcode: CMPBGE +/* 154 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 170 +/* 159 */ MCD_OPC_CheckField, 13, 3, 0, 100, 7, 0, // Skip to: 2058 +/* 166 */ MCD_OPC_Decode, 157, 3, 2, // Opcode: S8ADDLr +/* 170 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 186 +/* 175 */ MCD_OPC_CheckField, 13, 3, 0, 84, 7, 0, // Skip to: 2058 +/* 182 */ MCD_OPC_Decode, 161, 3, 2, // Opcode: S8SUBLr +/* 186 */ MCD_OPC_FilterValue, 29, 11, 0, 0, // Skip to: 202 +/* 191 */ MCD_OPC_CheckField, 13, 3, 0, 68, 7, 0, // Skip to: 2058 +/* 198 */ MCD_OPC_Decode, 187, 2, 2, // Opcode: CMPULT +/* 202 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 218 +/* 207 */ MCD_OPC_CheckField, 13, 3, 0, 52, 7, 0, // Skip to: 2058 +/* 214 */ MCD_OPC_Decode, 138, 2, 2, // Opcode: ADDQr +/* 218 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 234 +/* 223 */ MCD_OPC_CheckField, 13, 3, 0, 36, 7, 0, // Skip to: 2058 +/* 230 */ MCD_OPC_Decode, 151, 3, 2, // Opcode: S4ADDQr +/* 234 */ MCD_OPC_FilterValue, 41, 11, 0, 0, // Skip to: 250 +/* 239 */ MCD_OPC_CheckField, 13, 3, 0, 20, 7, 0, // Skip to: 2058 +/* 246 */ MCD_OPC_Decode, 191, 3, 2, // Opcode: SUBQr +/* 250 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 266 +/* 255 */ MCD_OPC_CheckField, 13, 3, 0, 4, 7, 0, // Skip to: 2058 +/* 262 */ MCD_OPC_Decode, 155, 3, 2, // Opcode: S4SUBQr +/* 266 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 282 +/* 271 */ MCD_OPC_CheckField, 13, 3, 0, 244, 6, 0, // Skip to: 2058 +/* 278 */ MCD_OPC_Decode, 175, 2, 2, // Opcode: CMPEQ +/* 282 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 298 +/* 287 */ MCD_OPC_CheckField, 13, 3, 0, 228, 6, 0, // Skip to: 2058 +/* 294 */ MCD_OPC_Decode, 159, 3, 2, // Opcode: S8ADDQr +/* 298 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 314 +/* 303 */ MCD_OPC_CheckField, 13, 3, 0, 212, 6, 0, // Skip to: 2058 +/* 310 */ MCD_OPC_Decode, 163, 3, 2, // Opcode: S8SUBQr +/* 314 */ MCD_OPC_FilterValue, 61, 11, 0, 0, // Skip to: 330 +/* 319 */ MCD_OPC_CheckField, 13, 3, 0, 196, 6, 0, // Skip to: 2058 +/* 326 */ MCD_OPC_Decode, 185, 2, 2, // Opcode: CMPULE +/* 330 */ MCD_OPC_FilterValue, 77, 11, 0, 0, // Skip to: 346 +/* 335 */ MCD_OPC_CheckField, 13, 3, 0, 180, 6, 0, // Skip to: 2058 +/* 342 */ MCD_OPC_Decode, 179, 2, 2, // Opcode: CMPLT +/* 346 */ MCD_OPC_FilterValue, 109, 11, 0, 0, // Skip to: 362 +/* 351 */ MCD_OPC_CheckField, 13, 3, 0, 164, 6, 0, // Skip to: 2058 +/* 358 */ MCD_OPC_Decode, 177, 2, 2, // Opcode: CMPLE +/* 362 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 372 +/* 368 */ MCD_OPC_Decode, 135, 2, 3, // Opcode: ADDLi +/* 372 */ MCD_OPC_FilterValue, 130, 1, 4, 0, 0, // Skip to: 382 +/* 378 */ MCD_OPC_Decode, 148, 3, 3, // Opcode: S4ADDLi +/* 382 */ MCD_OPC_FilterValue, 137, 1, 4, 0, 0, // Skip to: 392 +/* 388 */ MCD_OPC_Decode, 188, 3, 3, // Opcode: SUBLi +/* 392 */ MCD_OPC_FilterValue, 139, 1, 4, 0, 0, // Skip to: 402 +/* 398 */ MCD_OPC_Decode, 152, 3, 3, // Opcode: S4SUBLi +/* 402 */ MCD_OPC_FilterValue, 143, 1, 4, 0, 0, // Skip to: 412 +/* 408 */ MCD_OPC_Decode, 174, 2, 3, // Opcode: CMPBGEi +/* 412 */ MCD_OPC_FilterValue, 146, 1, 4, 0, 0, // Skip to: 422 +/* 418 */ MCD_OPC_Decode, 156, 3, 3, // Opcode: S8ADDLi +/* 422 */ MCD_OPC_FilterValue, 155, 1, 4, 0, 0, // Skip to: 432 +/* 428 */ MCD_OPC_Decode, 160, 3, 3, // Opcode: S8SUBLi +/* 432 */ MCD_OPC_FilterValue, 157, 1, 4, 0, 0, // Skip to: 442 +/* 438 */ MCD_OPC_Decode, 188, 2, 3, // Opcode: CMPULTi +/* 442 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 452 +/* 448 */ MCD_OPC_Decode, 137, 2, 3, // Opcode: ADDQi +/* 452 */ MCD_OPC_FilterValue, 162, 1, 4, 0, 0, // Skip to: 462 +/* 458 */ MCD_OPC_Decode, 150, 3, 3, // Opcode: S4ADDQi +/* 462 */ MCD_OPC_FilterValue, 169, 1, 4, 0, 0, // Skip to: 472 +/* 468 */ MCD_OPC_Decode, 190, 3, 3, // Opcode: SUBQi +/* 472 */ MCD_OPC_FilterValue, 171, 1, 4, 0, 0, // Skip to: 482 +/* 478 */ MCD_OPC_Decode, 154, 3, 3, // Opcode: S4SUBQi +/* 482 */ MCD_OPC_FilterValue, 173, 1, 4, 0, 0, // Skip to: 492 +/* 488 */ MCD_OPC_Decode, 176, 2, 3, // Opcode: CMPEQi +/* 492 */ MCD_OPC_FilterValue, 178, 1, 4, 0, 0, // Skip to: 502 +/* 498 */ MCD_OPC_Decode, 158, 3, 3, // Opcode: S8ADDQi +/* 502 */ MCD_OPC_FilterValue, 187, 1, 4, 0, 0, // Skip to: 512 +/* 508 */ MCD_OPC_Decode, 162, 3, 3, // Opcode: S8SUBQi +/* 512 */ MCD_OPC_FilterValue, 189, 1, 4, 0, 0, // Skip to: 522 +/* 518 */ MCD_OPC_Decode, 186, 2, 3, // Opcode: CMPULEi +/* 522 */ MCD_OPC_FilterValue, 205, 1, 4, 0, 0, // Skip to: 532 +/* 528 */ MCD_OPC_Decode, 180, 2, 3, // Opcode: CMPLTi +/* 532 */ MCD_OPC_FilterValue, 237, 1, 240, 5, 0, // Skip to: 2058 +/* 538 */ MCD_OPC_Decode, 178, 2, 3, // Opcode: CMPLEi +/* 542 */ MCD_OPC_FilterValue, 17, 111, 1, 0, // Skip to: 914 +/* 547 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 550 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 566 +/* 555 */ MCD_OPC_CheckField, 13, 3, 0, 216, 5, 0, // Skip to: 2058 +/* 562 */ MCD_OPC_Decode, 142, 2, 2, // Opcode: ANDr +/* 566 */ MCD_OPC_FilterValue, 8, 11, 0, 0, // Skip to: 582 +/* 571 */ MCD_OPC_CheckField, 13, 3, 0, 200, 5, 0, // Skip to: 2058 +/* 578 */ MCD_OPC_Decode, 147, 2, 2, // Opcode: BICr +/* 582 */ MCD_OPC_FilterValue, 20, 11, 0, 0, // Skip to: 598 +/* 587 */ MCD_OPC_CheckField, 13, 3, 0, 184, 5, 0, // Skip to: 2058 +/* 594 */ MCD_OPC_Decode, 166, 2, 4, // Opcode: CMOVLBSr +/* 598 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 614 +/* 603 */ MCD_OPC_CheckField, 13, 3, 0, 168, 5, 0, // Skip to: 2058 +/* 610 */ MCD_OPC_Decode, 164, 2, 4, // Opcode: CMOVLBCr +/* 614 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 630 +/* 619 */ MCD_OPC_CheckField, 13, 3, 0, 152, 5, 0, // Skip to: 2058 +/* 626 */ MCD_OPC_Decode, 149, 2, 2, // Opcode: BISr +/* 630 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 646 +/* 635 */ MCD_OPC_CheckField, 13, 3, 0, 136, 5, 0, // Skip to: 2058 +/* 642 */ MCD_OPC_Decode, 158, 2, 4, // Opcode: CMOVEQr +/* 646 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 662 +/* 651 */ MCD_OPC_CheckField, 13, 3, 0, 120, 5, 0, // Skip to: 2058 +/* 658 */ MCD_OPC_Decode, 172, 2, 4, // Opcode: CMOVNEr +/* 662 */ MCD_OPC_FilterValue, 40, 11, 0, 0, // Skip to: 678 +/* 667 */ MCD_OPC_CheckField, 13, 3, 0, 104, 5, 0, // Skip to: 2058 +/* 674 */ MCD_OPC_Decode, 144, 3, 2, // Opcode: ORNOTr +/* 678 */ MCD_OPC_FilterValue, 64, 11, 0, 0, // Skip to: 694 +/* 683 */ MCD_OPC_CheckField, 13, 3, 0, 88, 5, 0, // Skip to: 2058 +/* 690 */ MCD_OPC_Decode, 198, 3, 2, // Opcode: XORr +/* 694 */ MCD_OPC_FilterValue, 68, 11, 0, 0, // Skip to: 710 +/* 699 */ MCD_OPC_CheckField, 13, 3, 0, 72, 5, 0, // Skip to: 2058 +/* 706 */ MCD_OPC_Decode, 170, 2, 4, // Opcode: CMOVLTr +/* 710 */ MCD_OPC_FilterValue, 70, 11, 0, 0, // Skip to: 726 +/* 715 */ MCD_OPC_CheckField, 13, 3, 0, 56, 5, 0, // Skip to: 2058 +/* 722 */ MCD_OPC_Decode, 160, 2, 4, // Opcode: CMOVGEr +/* 726 */ MCD_OPC_FilterValue, 72, 11, 0, 0, // Skip to: 742 +/* 731 */ MCD_OPC_CheckField, 13, 3, 0, 40, 5, 0, // Skip to: 2058 +/* 738 */ MCD_OPC_Decode, 213, 2, 2, // Opcode: EQVr +/* 742 */ MCD_OPC_FilterValue, 100, 11, 0, 0, // Skip to: 758 +/* 747 */ MCD_OPC_CheckField, 13, 3, 0, 24, 5, 0, // Skip to: 2058 +/* 754 */ MCD_OPC_Decode, 168, 2, 4, // Opcode: CMOVLEr +/* 758 */ MCD_OPC_FilterValue, 102, 11, 0, 0, // Skip to: 774 +/* 763 */ MCD_OPC_CheckField, 13, 3, 0, 8, 5, 0, // Skip to: 2058 +/* 770 */ MCD_OPC_Decode, 162, 2, 4, // Opcode: CMOVGTr +/* 774 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 784 +/* 780 */ MCD_OPC_Decode, 141, 2, 3, // Opcode: ANDi +/* 784 */ MCD_OPC_FilterValue, 136, 1, 4, 0, 0, // Skip to: 794 +/* 790 */ MCD_OPC_Decode, 146, 2, 3, // Opcode: BICi +/* 794 */ MCD_OPC_FilterValue, 148, 1, 4, 0, 0, // Skip to: 804 +/* 800 */ MCD_OPC_Decode, 165, 2, 5, // Opcode: CMOVLBSi +/* 804 */ MCD_OPC_FilterValue, 150, 1, 4, 0, 0, // Skip to: 814 +/* 810 */ MCD_OPC_Decode, 163, 2, 5, // Opcode: CMOVLBCi +/* 814 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 824 +/* 820 */ MCD_OPC_Decode, 148, 2, 3, // Opcode: BISi +/* 824 */ MCD_OPC_FilterValue, 164, 1, 4, 0, 0, // Skip to: 834 +/* 830 */ MCD_OPC_Decode, 157, 2, 5, // Opcode: CMOVEQi +/* 834 */ MCD_OPC_FilterValue, 166, 1, 4, 0, 0, // Skip to: 844 +/* 840 */ MCD_OPC_Decode, 171, 2, 5, // Opcode: CMOVNEi +/* 844 */ MCD_OPC_FilterValue, 168, 1, 4, 0, 0, // Skip to: 854 +/* 850 */ MCD_OPC_Decode, 143, 3, 3, // Opcode: ORNOTi +/* 854 */ MCD_OPC_FilterValue, 192, 1, 4, 0, 0, // Skip to: 864 +/* 860 */ MCD_OPC_Decode, 197, 3, 3, // Opcode: XORi +/* 864 */ MCD_OPC_FilterValue, 196, 1, 4, 0, 0, // Skip to: 874 +/* 870 */ MCD_OPC_Decode, 169, 2, 5, // Opcode: CMOVLTi +/* 874 */ MCD_OPC_FilterValue, 198, 1, 4, 0, 0, // Skip to: 884 +/* 880 */ MCD_OPC_Decode, 159, 2, 5, // Opcode: CMOVGEi +/* 884 */ MCD_OPC_FilterValue, 200, 1, 4, 0, 0, // Skip to: 894 +/* 890 */ MCD_OPC_Decode, 212, 2, 3, // Opcode: EQVi +/* 894 */ MCD_OPC_FilterValue, 228, 1, 4, 0, 0, // Skip to: 904 +/* 900 */ MCD_OPC_Decode, 167, 2, 5, // Opcode: CMOVLEi +/* 904 */ MCD_OPC_FilterValue, 230, 1, 124, 4, 0, // Skip to: 2058 +/* 910 */ MCD_OPC_Decode, 161, 2, 5, // Opcode: CMOVGTi +/* 914 */ MCD_OPC_FilterValue, 18, 139, 0, 0, // Skip to: 1058 +/* 919 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 922 */ MCD_OPC_FilterValue, 6, 11, 0, 0, // Skip to: 938 +/* 927 */ MCD_OPC_CheckField, 13, 3, 0, 100, 4, 0, // Skip to: 2058 +/* 934 */ MCD_OPC_Decode, 214, 2, 2, // Opcode: EXTBL +/* 938 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 954 +/* 943 */ MCD_OPC_CheckField, 13, 3, 0, 84, 4, 0, // Skip to: 2058 +/* 950 */ MCD_OPC_Decode, 216, 2, 2, // Opcode: EXTWL +/* 954 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 970 +/* 959 */ MCD_OPC_CheckField, 13, 3, 0, 68, 4, 0, // Skip to: 2058 +/* 966 */ MCD_OPC_Decode, 215, 2, 2, // Opcode: EXTLL +/* 970 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 986 +/* 975 */ MCD_OPC_CheckField, 13, 3, 0, 52, 4, 0, // Skip to: 2058 +/* 982 */ MCD_OPC_Decode, 173, 3, 2, // Opcode: SRLr +/* 986 */ MCD_OPC_FilterValue, 57, 11, 0, 0, // Skip to: 1002 +/* 991 */ MCD_OPC_CheckField, 13, 3, 0, 36, 4, 0, // Skip to: 2058 +/* 998 */ MCD_OPC_Decode, 167, 3, 2, // Opcode: SLr +/* 1002 */ MCD_OPC_FilterValue, 60, 11, 0, 0, // Skip to: 1018 +/* 1007 */ MCD_OPC_CheckField, 13, 3, 0, 20, 4, 0, // Skip to: 2058 +/* 1014 */ MCD_OPC_Decode, 171, 3, 2, // Opcode: SRAr +/* 1018 */ MCD_OPC_FilterValue, 177, 1, 4, 0, 0, // Skip to: 1028 +/* 1024 */ MCD_OPC_Decode, 199, 3, 3, // Opcode: ZAPNOTi +/* 1028 */ MCD_OPC_FilterValue, 180, 1, 4, 0, 0, // Skip to: 1038 +/* 1034 */ MCD_OPC_Decode, 172, 3, 3, // Opcode: SRLi +/* 1038 */ MCD_OPC_FilterValue, 185, 1, 4, 0, 0, // Skip to: 1048 +/* 1044 */ MCD_OPC_Decode, 166, 3, 3, // Opcode: SLi +/* 1048 */ MCD_OPC_FilterValue, 188, 1, 236, 3, 0, // Skip to: 2058 +/* 1054 */ MCD_OPC_Decode, 170, 3, 3, // Opcode: SRAi +/* 1058 */ MCD_OPC_FilterValue, 19, 81, 0, 0, // Skip to: 1144 +/* 1063 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 1066 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1082 +/* 1071 */ MCD_OPC_CheckField, 13, 3, 0, 212, 3, 0, // Skip to: 2058 +/* 1078 */ MCD_OPC_Decode, 138, 3, 2, // Opcode: MULLr +/* 1082 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 1098 +/* 1087 */ MCD_OPC_CheckField, 13, 3, 0, 196, 3, 0, // Skip to: 2058 +/* 1094 */ MCD_OPC_Decode, 140, 3, 2, // Opcode: MULQr +/* 1098 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1114 +/* 1103 */ MCD_OPC_CheckField, 13, 3, 0, 180, 3, 0, // Skip to: 2058 +/* 1110 */ MCD_OPC_Decode, 195, 3, 2, // Opcode: UMULHr +/* 1114 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 1124 +/* 1120 */ MCD_OPC_Decode, 137, 3, 3, // Opcode: MULLi +/* 1124 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 1134 +/* 1130 */ MCD_OPC_Decode, 139, 3, 3, // Opcode: MULQi +/* 1134 */ MCD_OPC_FilterValue, 176, 1, 150, 3, 0, // Skip to: 2058 +/* 1140 */ MCD_OPC_Decode, 194, 3, 3, // Opcode: UMULHi +/* 1144 */ MCD_OPC_FilterValue, 20, 69, 0, 0, // Skip to: 1218 +/* 1149 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1152 */ MCD_OPC_FilterValue, 4, 11, 0, 0, // Skip to: 1168 +/* 1157 */ MCD_OPC_CheckField, 16, 5, 31, 126, 3, 0, // Skip to: 2058 +/* 1164 */ MCD_OPC_Decode, 237, 2, 6, // Opcode: ITOFS +/* 1168 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 1184 +/* 1173 */ MCD_OPC_CheckField, 16, 5, 31, 110, 3, 0, // Skip to: 2058 +/* 1180 */ MCD_OPC_Decode, 238, 2, 7, // Opcode: ITOFT +/* 1184 */ MCD_OPC_FilterValue, 139, 11, 11, 0, 0, // Skip to: 1201 +/* 1190 */ MCD_OPC_CheckField, 21, 5, 31, 93, 3, 0, // Skip to: 2058 +/* 1197 */ MCD_OPC_Decode, 168, 3, 8, // Opcode: SQRTS +/* 1201 */ MCD_OPC_FilterValue, 171, 11, 83, 3, 0, // Skip to: 2058 +/* 1207 */ MCD_OPC_CheckField, 21, 5, 31, 76, 3, 0, // Skip to: 2058 +/* 1214 */ MCD_OPC_Decode, 169, 3, 9, // Opcode: SQRTT +/* 1218 */ MCD_OPC_FilterValue, 22, 208, 0, 0, // Skip to: 1431 +/* 1223 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1226 */ MCD_OPC_FilterValue, 175, 10, 11, 0, 0, // Skip to: 1243 +/* 1232 */ MCD_OPC_CheckField, 21, 5, 31, 51, 3, 0, // Skip to: 2058 +/* 1239 */ MCD_OPC_Decode, 208, 2, 9, // Opcode: CVTTQ +/* 1243 */ MCD_OPC_FilterValue, 128, 11, 4, 0, 0, // Skip to: 1253 +/* 1249 */ MCD_OPC_Decode, 139, 2, 10, // Opcode: ADDS +/* 1253 */ MCD_OPC_FilterValue, 129, 11, 4, 0, 0, // Skip to: 1263 +/* 1259 */ MCD_OPC_Decode, 192, 3, 10, // Opcode: SUBS +/* 1263 */ MCD_OPC_FilterValue, 130, 11, 4, 0, 0, // Skip to: 1273 +/* 1269 */ MCD_OPC_Decode, 141, 3, 10, // Opcode: MULS +/* 1273 */ MCD_OPC_FilterValue, 131, 11, 4, 0, 0, // Skip to: 1283 +/* 1279 */ MCD_OPC_Decode, 210, 2, 10, // Opcode: DIVS +/* 1283 */ MCD_OPC_FilterValue, 160, 11, 4, 0, 0, // Skip to: 1293 +/* 1289 */ MCD_OPC_Decode, 140, 2, 11, // Opcode: ADDT +/* 1293 */ MCD_OPC_FilterValue, 161, 11, 4, 0, 0, // Skip to: 1303 +/* 1299 */ MCD_OPC_Decode, 193, 3, 11, // Opcode: SUBT +/* 1303 */ MCD_OPC_FilterValue, 162, 11, 4, 0, 0, // Skip to: 1313 +/* 1309 */ MCD_OPC_Decode, 142, 3, 11, // Opcode: MULT +/* 1313 */ MCD_OPC_FilterValue, 163, 11, 4, 0, 0, // Skip to: 1323 +/* 1319 */ MCD_OPC_Decode, 211, 2, 11, // Opcode: DIVT +/* 1323 */ MCD_OPC_FilterValue, 164, 11, 4, 0, 0, // Skip to: 1333 +/* 1329 */ MCD_OPC_Decode, 184, 2, 11, // Opcode: CMPTUN +/* 1333 */ MCD_OPC_FilterValue, 165, 11, 4, 0, 0, // Skip to: 1343 +/* 1339 */ MCD_OPC_Decode, 181, 2, 11, // Opcode: CMPTEQ +/* 1343 */ MCD_OPC_FilterValue, 166, 11, 4, 0, 0, // Skip to: 1353 +/* 1349 */ MCD_OPC_Decode, 183, 2, 11, // Opcode: CMPTLT +/* 1353 */ MCD_OPC_FilterValue, 167, 11, 4, 0, 0, // Skip to: 1363 +/* 1359 */ MCD_OPC_Decode, 182, 2, 11, // Opcode: CMPTLE +/* 1363 */ MCD_OPC_FilterValue, 172, 13, 11, 0, 0, // Skip to: 1380 +/* 1369 */ MCD_OPC_CheckField, 21, 5, 31, 170, 2, 0, // Skip to: 2058 +/* 1376 */ MCD_OPC_Decode, 207, 2, 12, // Opcode: CVTST +/* 1380 */ MCD_OPC_FilterValue, 172, 15, 11, 0, 0, // Skip to: 1397 +/* 1386 */ MCD_OPC_CheckField, 21, 5, 31, 153, 2, 0, // Skip to: 2058 +/* 1393 */ MCD_OPC_Decode, 209, 2, 13, // Opcode: CVTTS +/* 1397 */ MCD_OPC_FilterValue, 188, 15, 11, 0, 0, // Skip to: 1414 +/* 1403 */ MCD_OPC_CheckField, 21, 5, 31, 136, 2, 0, // Skip to: 2058 +/* 1410 */ MCD_OPC_Decode, 205, 2, 13, // Opcode: CVTQS +/* 1414 */ MCD_OPC_FilterValue, 190, 15, 126, 2, 0, // Skip to: 2058 +/* 1420 */ MCD_OPC_CheckField, 21, 5, 31, 119, 2, 0, // Skip to: 2058 +/* 1427 */ MCD_OPC_Decode, 206, 2, 9, // Opcode: CVTQT +/* 1431 */ MCD_OPC_FilterValue, 23, 84, 0, 0, // Skip to: 1520 +/* 1436 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1439 */ MCD_OPC_FilterValue, 32, 4, 0, 0, // Skip to: 1448 +/* 1444 */ MCD_OPC_Decode, 198, 2, 10, // Opcode: CPYSS +/* 1448 */ MCD_OPC_FilterValue, 33, 4, 0, 0, // Skip to: 1457 +/* 1453 */ MCD_OPC_Decode, 196, 2, 11, // Opcode: CPYSNT +/* 1457 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 1466 +/* 1462 */ MCD_OPC_Decode, 191, 2, 10, // Opcode: CPYSES +/* 1466 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 1475 +/* 1471 */ MCD_OPC_Decode, 223, 2, 10, // Opcode: FCMOVEQS +/* 1475 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 1484 +/* 1480 */ MCD_OPC_Decode, 234, 2, 11, // Opcode: FCMOVNET +/* 1484 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 1493 +/* 1489 */ MCD_OPC_Decode, 231, 2, 10, // Opcode: FCMOVLTS +/* 1493 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 1502 +/* 1498 */ MCD_OPC_Decode, 225, 2, 10, // Opcode: FCMOVGES +/* 1502 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 1511 +/* 1507 */ MCD_OPC_Decode, 229, 2, 10, // Opcode: FCMOVLES +/* 1511 */ MCD_OPC_FilterValue, 47, 30, 2, 0, // Skip to: 2058 +/* 1516 */ MCD_OPC_Decode, 227, 2, 10, // Opcode: FCMOVGTS +/* 1520 */ MCD_OPC_FilterValue, 24, 50, 0, 0, // Skip to: 1575 +/* 1525 */ MCD_OPC_ExtractField, 0, 21, // Inst{20-0} ... +/* 1528 */ MCD_OPC_FilterValue, 128, 128, 1, 11, 0, 0, // Skip to: 1546 +/* 1535 */ MCD_OPC_CheckField, 21, 5, 0, 4, 2, 0, // Skip to: 2058 +/* 1542 */ MCD_OPC_Decode, 136, 3, 14, // Opcode: MB +/* 1546 */ MCD_OPC_FilterValue, 128, 136, 1, 11, 0, 0, // Skip to: 1564 +/* 1553 */ MCD_OPC_CheckField, 21, 5, 0, 242, 1, 0, // Skip to: 2058 +/* 1560 */ MCD_OPC_Decode, 196, 3, 14, // Opcode: WMB +/* 1564 */ MCD_OPC_FilterValue, 128, 128, 3, 231, 1, 0, // Skip to: 2058 +/* 1571 */ MCD_OPC_Decode, 147, 3, 15, // Opcode: RPCC +/* 1575 */ MCD_OPC_FilterValue, 26, 101, 0, 0, // Skip to: 1681 +/* 1580 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... +/* 1583 */ MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 1606 +/* 1588 */ MCD_OPC_CheckField, 21, 5, 31, 207, 1, 0, // Skip to: 2058 +/* 1595 */ MCD_OPC_CheckField, 0, 14, 0, 200, 1, 0, // Skip to: 2058 +/* 1602 */ MCD_OPC_Decode, 239, 2, 16, // Opcode: JMP +/* 1606 */ MCD_OPC_FilterValue, 1, 37, 0, 0, // Skip to: 1648 +/* 1611 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... +/* 1614 */ MCD_OPC_FilterValue, 251, 5, 11, 0, 0, // Skip to: 1631 +/* 1620 */ MCD_OPC_CheckField, 0, 14, 0, 175, 1, 0, // Skip to: 2058 +/* 1627 */ MCD_OPC_Decode, 242, 2, 14, // Opcode: JSRs +/* 1631 */ MCD_OPC_FilterValue, 219, 6, 165, 1, 0, // Skip to: 2058 +/* 1637 */ MCD_OPC_CheckField, 0, 14, 0, 158, 1, 0, // Skip to: 2058 +/* 1644 */ MCD_OPC_Decode, 240, 2, 14, // Opcode: JSR +/* 1648 */ MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 1672 +/* 1653 */ MCD_OPC_CheckField, 16, 10, 250, 7, 141, 1, 0, // Skip to: 2058 +/* 1661 */ MCD_OPC_CheckField, 0, 14, 1, 134, 1, 0, // Skip to: 2058 +/* 1668 */ MCD_OPC_Decode, 145, 3, 14, // Opcode: RETDAG +/* 1672 */ MCD_OPC_FilterValue, 3, 125, 1, 0, // Skip to: 2058 +/* 1677 */ MCD_OPC_Decode, 241, 2, 17, // Opcode: JSR_COROUTINE +/* 1681 */ MCD_OPC_FilterValue, 28, 115, 0, 0, // Skip to: 1801 +/* 1686 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1689 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1705 +/* 1694 */ MCD_OPC_CheckField, 21, 5, 31, 101, 1, 0, // Skip to: 2058 +/* 1701 */ MCD_OPC_Decode, 164, 3, 18, // Opcode: SEXTB +/* 1705 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 1721 +/* 1710 */ MCD_OPC_CheckField, 21, 5, 31, 85, 1, 0, // Skip to: 2058 +/* 1717 */ MCD_OPC_Decode, 165, 3, 18, // Opcode: SEXTW +/* 1721 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1737 +/* 1726 */ MCD_OPC_CheckField, 21, 5, 31, 69, 1, 0, // Skip to: 2058 +/* 1733 */ MCD_OPC_Decode, 203, 2, 18, // Opcode: CTPOP +/* 1737 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 1753 +/* 1742 */ MCD_OPC_CheckField, 21, 5, 31, 53, 1, 0, // Skip to: 2058 +/* 1749 */ MCD_OPC_Decode, 202, 2, 18, // Opcode: CTLZ +/* 1753 */ MCD_OPC_FilterValue, 51, 11, 0, 0, // Skip to: 1769 +/* 1758 */ MCD_OPC_CheckField, 21, 5, 31, 37, 1, 0, // Skip to: 2058 +/* 1765 */ MCD_OPC_Decode, 204, 2, 18, // Opcode: CTTZ +/* 1769 */ MCD_OPC_FilterValue, 112, 11, 0, 0, // Skip to: 1785 +/* 1774 */ MCD_OPC_CheckField, 16, 5, 31, 21, 1, 0, // Skip to: 2058 +/* 1781 */ MCD_OPC_Decode, 236, 2, 19, // Opcode: FTOIT +/* 1785 */ MCD_OPC_FilterValue, 120, 12, 1, 0, // Skip to: 2058 +/* 1790 */ MCD_OPC_CheckField, 16, 5, 31, 5, 1, 0, // Skip to: 2058 +/* 1797 */ MCD_OPC_Decode, 235, 2, 20, // Opcode: FTOIS +/* 1801 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 1810 +/* 1806 */ MCD_OPC_Decode, 130, 3, 21, // Opcode: LDS +/* 1810 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 1819 +/* 1815 */ MCD_OPC_Decode, 132, 3, 22, // Opcode: LDT +/* 1819 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 1828 +/* 1824 */ MCD_OPC_Decode, 182, 3, 21, // Opcode: STS +/* 1828 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 1837 +/* 1833 */ MCD_OPC_Decode, 184, 3, 22, // Opcode: STT +/* 1837 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 1846 +/* 1842 */ MCD_OPC_Decode, 251, 2, 1, // Opcode: LDL +/* 1846 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 1855 +/* 1851 */ MCD_OPC_Decode, 254, 2, 1, // Opcode: LDQ +/* 1855 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 1864 +/* 1860 */ MCD_OPC_Decode, 252, 2, 1, // Opcode: LDL_L +/* 1864 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 1873 +/* 1869 */ MCD_OPC_Decode, 255, 2, 1, // Opcode: LDQ_L +/* 1873 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 1882 +/* 1878 */ MCD_OPC_Decode, 176, 3, 1, // Opcode: STL +/* 1882 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 1891 +/* 1887 */ MCD_OPC_Decode, 179, 3, 1, // Opcode: STQ +/* 1891 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 1900 +/* 1896 */ MCD_OPC_Decode, 177, 3, 23, // Opcode: STL_C +/* 1900 */ MCD_OPC_FilterValue, 47, 4, 0, 0, // Skip to: 1909 +/* 1905 */ MCD_OPC_Decode, 180, 3, 23, // Opcode: STQ_C +/* 1909 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1925 +/* 1914 */ MCD_OPC_CheckField, 21, 5, 31, 137, 0, 0, // Skip to: 2058 +/* 1921 */ MCD_OPC_Decode, 155, 2, 24, // Opcode: BR +/* 1925 */ MCD_OPC_FilterValue, 49, 4, 0, 0, // Skip to: 1934 +/* 1930 */ MCD_OPC_Decode, 217, 2, 25, // Opcode: FBEQ +/* 1934 */ MCD_OPC_FilterValue, 50, 4, 0, 0, // Skip to: 1943 +/* 1939 */ MCD_OPC_Decode, 221, 2, 25, // Opcode: FBLT +/* 1943 */ MCD_OPC_FilterValue, 51, 4, 0, 0, // Skip to: 1952 +/* 1948 */ MCD_OPC_Decode, 220, 2, 25, // Opcode: FBLE +/* 1952 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 1968 +/* 1957 */ MCD_OPC_CheckField, 21, 5, 26, 94, 0, 0, // Skip to: 2058 +/* 1964 */ MCD_OPC_Decode, 156, 2, 24, // Opcode: BSR +/* 1968 */ MCD_OPC_FilterValue, 54, 4, 0, 0, // Skip to: 1977 +/* 1973 */ MCD_OPC_Decode, 218, 2, 25, // Opcode: FBGE +/* 1977 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 1986 +/* 1982 */ MCD_OPC_Decode, 219, 2, 25, // Opcode: FBGT +/* 1986 */ MCD_OPC_FilterValue, 56, 4, 0, 0, // Skip to: 1995 +/* 1991 */ MCD_OPC_Decode, 150, 2, 26, // Opcode: BLBC +/* 1995 */ MCD_OPC_FilterValue, 57, 4, 0, 0, // Skip to: 2004 +/* 2000 */ MCD_OPC_Decode, 143, 2, 26, // Opcode: BEQ +/* 2004 */ MCD_OPC_FilterValue, 58, 4, 0, 0, // Skip to: 2013 +/* 2009 */ MCD_OPC_Decode, 153, 2, 26, // Opcode: BLT +/* 2013 */ MCD_OPC_FilterValue, 59, 4, 0, 0, // Skip to: 2022 +/* 2018 */ MCD_OPC_Decode, 152, 2, 26, // Opcode: BLE +/* 2022 */ MCD_OPC_FilterValue, 60, 4, 0, 0, // Skip to: 2031 +/* 2027 */ MCD_OPC_Decode, 151, 2, 26, // Opcode: BLBS +/* 2031 */ MCD_OPC_FilterValue, 61, 4, 0, 0, // Skip to: 2040 +/* 2036 */ MCD_OPC_Decode, 154, 2, 26, // Opcode: BNE +/* 2040 */ MCD_OPC_FilterValue, 62, 4, 0, 0, // Skip to: 2049 +/* 2045 */ MCD_OPC_Decode, 144, 2, 26, // Opcode: BGE +/* 2049 */ MCD_OPC_FilterValue, 63, 4, 0, 0, // Skip to: 2058 +/* 2054 */ MCD_OPC_Decode, 145, 2, 26, // Opcode: BGT +/* 2058 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCondBranchF32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 0, 4, 0, 0, // Skip to: 11 +/* 7 */ MCD_OPC_Decode, 189, 2, 27, // Opcode: COND_BRANCH_F +/* 11 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCpys32[] = { +/* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 3 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 19 +/* 8 */ MCD_OPC_CheckField, 26, 6, 23, 36, 0, 0, // Skip to: 51 +/* 15 */ MCD_OPC_Decode, 199, 2, 28, // Opcode: CPYSSt +/* 19 */ MCD_OPC_FilterValue, 33, 11, 0, 0, // Skip to: 35 +/* 24 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 51 +/* 31 */ MCD_OPC_Decode, 195, 2, 28, // Opcode: CPYSNSt +/* 35 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 51 +/* 40 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 51 +/* 47 */ MCD_OPC_Decode, 192, 2, 28, // Opcode: CPYSESt +/* 51 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCpysET32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 23, 11, 0, 0, // Skip to: 18 +/* 7 */ MCD_OPC_CheckField, 5, 11, 34, 4, 0, 0, // Skip to: 18 +/* 14 */ MCD_OPC_Decode, 193, 2, 11, // Opcode: CPYSET +/* 18 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCpysNS32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 23, 11, 0, 0, // Skip to: 18 +/* 7 */ MCD_OPC_CheckField, 5, 11, 33, 4, 0, 0, // Skip to: 18 +/* 14 */ MCD_OPC_Decode, 194, 2, 10, // Opcode: CPYSNS +/* 18 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCpysT32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 23, 11, 0, 0, // Skip to: 18 +/* 7 */ MCD_OPC_CheckField, 5, 11, 32, 4, 0, 0, // Skip to: 18 +/* 14 */ MCD_OPC_Decode, 200, 2, 11, // Opcode: CPYST +/* 18 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableCpysTs32[] = { +/* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 3 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 19 +/* 8 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 35 +/* 15 */ MCD_OPC_Decode, 201, 2, 29, // Opcode: CPYSTs +/* 19 */ MCD_OPC_FilterValue, 33, 11, 0, 0, // Skip to: 35 +/* 24 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 35 +/* 31 */ MCD_OPC_Decode, 197, 2, 29, // Opcode: CPYSNTs +/* 35 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableFb32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 54, 4, 0, 0, // Skip to: 11 +/* 7 */ MCD_OPC_Decode, 222, 2, 25, // Opcode: FBNE +/* 11 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableFcmov32[] = { +/* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 3 */ MCD_OPC_FilterValue, 42, 11, 0, 0, // Skip to: 19 +/* 8 */ MCD_OPC_CheckField, 26, 6, 23, 84, 0, 0, // Skip to: 99 +/* 15 */ MCD_OPC_Decode, 224, 2, 11, // Opcode: FCMOVEQT +/* 19 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 35 +/* 24 */ MCD_OPC_CheckField, 26, 6, 23, 68, 0, 0, // Skip to: 99 +/* 31 */ MCD_OPC_Decode, 233, 2, 10, // Opcode: FCMOVNES +/* 35 */ MCD_OPC_FilterValue, 44, 11, 0, 0, // Skip to: 51 +/* 40 */ MCD_OPC_CheckField, 26, 6, 23, 52, 0, 0, // Skip to: 99 +/* 47 */ MCD_OPC_Decode, 232, 2, 11, // Opcode: FCMOVLTT +/* 51 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 67 +/* 56 */ MCD_OPC_CheckField, 26, 6, 23, 36, 0, 0, // Skip to: 99 +/* 63 */ MCD_OPC_Decode, 226, 2, 11, // Opcode: FCMOVGET +/* 67 */ MCD_OPC_FilterValue, 46, 11, 0, 0, // Skip to: 83 +/* 72 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 99 +/* 79 */ MCD_OPC_Decode, 230, 2, 11, // Opcode: FCMOVLET +/* 83 */ MCD_OPC_FilterValue, 47, 11, 0, 0, // Skip to: 99 +/* 88 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 99 +/* 95 */ MCD_OPC_Decode, 228, 2, 11, // Opcode: FCMOVGTT +/* 99 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableLDg32[] = { +/* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... +/* 3 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12 +/* 8 */ MCD_OPC_Decode, 247, 2, 1, // Opcode: LDAg +/* 12 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21 +/* 17 */ MCD_OPC_Decode, 245, 2, 1, // Opcode: LDAHg +/* 21 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableLDl32[] = { +/* 0 */ MCD_OPC_CheckField, 26, 6, 41, 4, 0, 0, // Skip to: 11 +/* 7 */ MCD_OPC_Decode, 128, 3, 1, // Opcode: LDQl +/* 11 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableLDr32[] = { +/* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... +/* 3 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12 +/* 8 */ MCD_OPC_Decode, 248, 2, 1, // Opcode: LDAr +/* 12 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21 +/* 17 */ MCD_OPC_Decode, 246, 2, 1, // Opcode: LDAHr +/* 21 */ MCD_OPC_FilterValue, 10, 4, 0, 0, // Skip to: 30 +/* 26 */ MCD_OPC_Decode, 250, 2, 1, // Opcode: LDBUr +/* 30 */ MCD_OPC_FilterValue, 12, 4, 0, 0, // Skip to: 39 +/* 35 */ MCD_OPC_Decode, 135, 3, 1, // Opcode: LDWUr +/* 39 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 48 +/* 44 */ MCD_OPC_Decode, 131, 3, 21, // Opcode: LDSr +/* 48 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 57 +/* 53 */ MCD_OPC_Decode, 133, 3, 22, // Opcode: LDTr +/* 57 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 66 +/* 62 */ MCD_OPC_Decode, 253, 2, 1, // Opcode: LDLr +/* 66 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 75 +/* 71 */ MCD_OPC_Decode, 129, 3, 1, // Opcode: LDQr +/* 75 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableRet32[] = { +/* 0 */ MCD_OPC_CheckField, 0, 32, 129, 128, 234, 223, 6, 4, 0, 0, // Skip to: 15 +/* 11 */ MCD_OPC_Decode, 146, 3, 14, // Opcode: RETDAGp +/* 15 */ MCD_OPC_Fail, + 0 +}; + +static const uint8_t DecoderTableSTr32[] = { +/* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... +/* 3 */ MCD_OPC_FilterValue, 13, 4, 0, 0, // Skip to: 12 +/* 8 */ MCD_OPC_Decode, 187, 3, 1, // Opcode: STWr +/* 12 */ MCD_OPC_FilterValue, 14, 4, 0, 0, // Skip to: 21 +/* 17 */ MCD_OPC_Decode, 175, 3, 1, // Opcode: STBr +/* 21 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 30 +/* 26 */ MCD_OPC_Decode, 183, 3, 21, // Opcode: STSr +/* 30 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 39 +/* 35 */ MCD_OPC_Decode, 185, 3, 22, // Opcode: STTr +/* 39 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 48 +/* 44 */ MCD_OPC_Decode, 178, 3, 1, // Opcode: STLr +/* 48 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 57 +/* 53 */ MCD_OPC_Decode, 181, 3, 1, // Opcode: STQr +/* 57 */ MCD_OPC_Fail, + 0 +}; + +static bool checkDecoderPredicate(MCInst *Inst, unsigned Idx) { + /* llvm_unreachable("Invalid index!"); */ +} + +#define DecodeToMCInst(fname, fieldname, InsnType) \ +static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *MI, \ + uint64_t Address, const void *Decoder, bool *DecodeComplete) \ +{ \ + InsnType tmp; \ + switch (Idx) { \ + default: /* llvm_unreachable("Invalid index!"); */ \ + case 0: \ + tmp = fieldname(insn, 21, 5); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 0, 21); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 1: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 16); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 2: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 3: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 13, 8); \ + MCOperand_CreateImm0(MI, tmp); \ + return S; \ + case 4: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 5: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 13, 8); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 6: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 7: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 8: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 9: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 10: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 11: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 12: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 13: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 14: \ + return S; \ + case 15: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 16: \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 17: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 14); \ + MCOperand_CreateImm0(MI, tmp); \ + return S; \ + case 18: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 19: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 20: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 21: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 16); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 22: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 16); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 23: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 16); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 24: \ + tmp = fieldname(insn, 0, 21); \ + MCOperand_CreateImm0(MI, tmp); \ + return S; \ + case 25: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 21); \ + MCOperand_CreateImm0(MI, tmp); \ + return S; \ + case 26: \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 0, 21); \ + MCOperand_CreateImm0(MI, tmp); \ + return S; \ + case 27: \ + tmp = fieldname(insn, 21, 5); \ + MCOperand_CreateImm0(MI, tmp); \ + tmp = fieldname(insn, 0, 21); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 28: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 29: \ + tmp = fieldname(insn, 0, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 21, 5); \ + if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + } \ +} + +#define DecodeInstruction(fname, fieldname, decoder, InsnType) \ +static DecodeStatus fname(const uint8_t DecodeTable[], MCInst *MI, \ + InsnType insn, uint64_t Address, const void *Decoder) { \ + const uint8_t *Ptr = DecodeTable; \ + uint64_t CurFieldValue = 0; \ + DecodeStatus S = MCDisassembler_Success; \ + while (true) { \ + switch (*Ptr) { \ + default: \ + return MCDisassembler_Fail; \ + case MCD_OPC_ExtractField: { \ + unsigned Start = *++Ptr; \ + unsigned Len = *++Ptr; \ + ++Ptr; \ + CurFieldValue = fieldname(insn, Start, Len); \ + break; \ + } \ + case MCD_OPC_FilterValue: { \ + /* Decode the field value. */ \ + unsigned Len; \ + uint64_t Val = decodeULEB128(++Ptr, &Len); \ + Ptr += Len; \ + /* NumToSkip is a plain 24-bit integer. */ \ + unsigned NumToSkip = *Ptr++; \ + NumToSkip |= (*Ptr++) << 8; \ + NumToSkip |= (*Ptr++) << 16; \ + /* Perform the filter operation. */ \ + if (Val != CurFieldValue) \ + Ptr += NumToSkip; \ + break; \ + } \ + case MCD_OPC_CheckField: { \ + unsigned Start = *++Ptr; \ + unsigned Len = *++Ptr; \ + uint64_t FieldValue = fieldname(insn, Start, Len); \ + /* Decode the field value. */ \ + unsigned PtrLen = 0; \ + uint64_t ExpectedValue = decodeULEB128(++Ptr, &PtrLen); \ + Ptr += PtrLen; \ + /* NumToSkip is a plain 24-bit integer. */ \ + unsigned NumToSkip = *Ptr++; \ + NumToSkip |= (*Ptr++) << 8; \ + NumToSkip |= (*Ptr++) << 16; \ + /* If the actual and expected values don't match, skip. */ \ + if (ExpectedValue != FieldValue) \ + Ptr += NumToSkip; \ + break; \ + } \ + case MCD_OPC_CheckPredicate: { \ + unsigned Len; \ + /* Decode the Predicate Index value. */ \ + unsigned PIdx = decodeULEB128(++Ptr, &Len); \ + Ptr += Len; \ + /* NumToSkip is a plain 24-bit integer. */ \ + unsigned NumToSkip = *Ptr++; \ + NumToSkip |= (*Ptr++) << 8; \ + NumToSkip |= (*Ptr++) << 16; \ + /* Check the predicate. */ \ + bool Pred = checkDecoderPredicate(MI, PIdx); \ + if (!Pred) \ + Ptr += NumToSkip; \ + break; \ + } \ + case MCD_OPC_Decode: { \ + unsigned Len; \ + /* Decode the Opcode value. */ \ + unsigned Opc = decodeULEB128(++Ptr, &Len); \ + Ptr += Len; \ + unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \ + Ptr += Len; \ + MCInst_clear(MI); \ + MCInst_setOpcode(MI, Opc); \ + bool DecodeComplete; \ + S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \ + return S; \ + } \ + case MCD_OPC_TryDecode: { \ + unsigned Len; \ + /* Decode the Opcode value. */ \ + unsigned Opc = decodeULEB128(++Ptr, &Len); \ + Ptr += Len; \ + unsigned DecodeIdx = decodeULEB128(Ptr, &Len); \ + Ptr += Len; \ + /* NumToSkip is a plain 24-bit integer. */ \ + unsigned NumToSkip = *Ptr++; \ + NumToSkip |= (*Ptr++) << 8; \ + NumToSkip |= (*Ptr++) << 16; \ + /* Perform the decode operation. */ \ + MCInst_setOpcode(MI, Opc); \ + bool DecodeComplete; \ + S = decoder(S, DecodeIdx, insn, MI, Address, Decoder, &DecodeComplete); \ + if (DecodeComplete) { \ + /* Decoding complete. */ \ + return S; \ + } else { \ + /* If the decoding was incomplete, skip. */ \ + Ptr += NumToSkip; \ + /* Reset decode status. This also drops a SoftFail status that could be */ \ + /* set before the decode attempt. */ \ + S = MCDisassembler_Success; \ + } \ + break; \ + } \ + case MCD_OPC_SoftFail: { \ + /* Decode the mask values. */ \ + unsigned Len; \ + uint64_t PositiveMask = decodeULEB128(++Ptr, &Len); \ + Ptr += Len; \ + uint64_t NegativeMask = decodeULEB128(Ptr, &Len); \ + Ptr += Len; \ + bool Fail = (insn & PositiveMask) != 0 || (~insn & NegativeMask) != 0; \ + if (Fail) \ + S = MCDisassembler_SoftFail; \ + break; \ + } \ + case MCD_OPC_Fail: { \ + return MCDisassembler_Fail; \ + } \ + } \ + } \ + /* Bogisity detected in disassembler state machine! */ \ +} + +FieldFromInstruction(fieldFromInstruction_4, uint32_t) +DecodeToMCInst(decodeToMCInst_4, fieldFromInstruction_4, uint32_t) +DecodeInstruction(decodeInstruction_4, fieldFromInstruction_4, decodeToMCInst_4, uint32_t) diff --git a/arch/Alpha/AlphaGenInstrInfo.inc b/arch/Alpha/AlphaGenInstrInfo.inc new file mode 100644 index 0000000000..dc0da68aa6 --- /dev/null +++ b/arch/Alpha/AlphaGenInstrInfo.inc @@ -0,0 +1,1019 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +#ifdef GET_INSTRINFO_ENUM +#undef GET_INSTRINFO_ENUM + + enum { + Alpha_PHI = 0, + Alpha_INLINEASM = 1, + Alpha_INLINEASM_BR = 2, + Alpha_CFI_INSTRUCTION = 3, + Alpha_EH_LABEL = 4, + Alpha_GC_LABEL = 5, + Alpha_ANNOTATION_LABEL = 6, + Alpha_KILL = 7, + Alpha_EXTRACT_SUBREG = 8, + Alpha_INSERT_SUBREG = 9, + Alpha_IMPLICIT_DEF = 10, + Alpha_SUBREG_TO_REG = 11, + Alpha_COPY_TO_REGCLASS = 12, + Alpha_DBG_VALUE = 13, + Alpha_DBG_VALUE_LIST = 14, + Alpha_DBG_INSTR_REF = 15, + Alpha_DBG_PHI = 16, + Alpha_DBG_LABEL = 17, + Alpha_REG_SEQUENCE = 18, + Alpha_COPY = 19, + Alpha_BUNDLE = 20, + Alpha_LIFETIME_START = 21, + Alpha_LIFETIME_END = 22, + Alpha_PSEUDO_PROBE = 23, + Alpha_ARITH_FENCE = 24, + Alpha_STACKMAP = 25, + Alpha_FENTRY_CALL = 26, + Alpha_PATCHPOINT = 27, + Alpha_LOAD_STACK_GUARD = 28, + Alpha_PREALLOCATED_SETUP = 29, + Alpha_PREALLOCATED_ARG = 30, + Alpha_STATEPOINT = 31, + Alpha_LOCAL_ESCAPE = 32, + Alpha_FAULTING_OP = 33, + Alpha_PATCHABLE_OP = 34, + Alpha_PATCHABLE_FUNCTION_ENTER = 35, + Alpha_PATCHABLE_RET = 36, + Alpha_PATCHABLE_FUNCTION_EXIT = 37, + Alpha_PATCHABLE_TAIL_CALL = 38, + Alpha_PATCHABLE_EVENT_CALL = 39, + Alpha_PATCHABLE_TYPED_EVENT_CALL = 40, + Alpha_ICALL_BRANCH_FUNNEL = 41, + Alpha_MEMBARRIER = 42, + Alpha_G_ASSERT_SEXT = 43, + Alpha_G_ASSERT_ZEXT = 44, + Alpha_G_ASSERT_ALIGN = 45, + Alpha_G_ADD = 46, + Alpha_G_SUB = 47, + Alpha_G_MUL = 48, + Alpha_G_SDIV = 49, + Alpha_G_UDIV = 50, + Alpha_G_SREM = 51, + Alpha_G_UREM = 52, + Alpha_G_SDIVREM = 53, + Alpha_G_UDIVREM = 54, + Alpha_G_AND = 55, + Alpha_G_OR = 56, + Alpha_G_XOR = 57, + Alpha_G_IMPLICIT_DEF = 58, + Alpha_G_PHI = 59, + Alpha_G_FRAME_INDEX = 60, + Alpha_G_GLOBAL_VALUE = 61, + Alpha_G_EXTRACT = 62, + Alpha_G_UNMERGE_VALUES = 63, + Alpha_G_INSERT = 64, + Alpha_G_MERGE_VALUES = 65, + Alpha_G_BUILD_VECTOR = 66, + Alpha_G_BUILD_VECTOR_TRUNC = 67, + Alpha_G_CONCAT_VECTORS = 68, + Alpha_G_PTRTOINT = 69, + Alpha_G_INTTOPTR = 70, + Alpha_G_BITCAST = 71, + Alpha_G_FREEZE = 72, + Alpha_G_INTRINSIC_FPTRUNC_ROUND = 73, + Alpha_G_INTRINSIC_TRUNC = 74, + Alpha_G_INTRINSIC_ROUND = 75, + Alpha_G_INTRINSIC_LRINT = 76, + Alpha_G_INTRINSIC_ROUNDEVEN = 77, + Alpha_G_READCYCLECOUNTER = 78, + Alpha_G_LOAD = 79, + Alpha_G_SEXTLOAD = 80, + Alpha_G_ZEXTLOAD = 81, + Alpha_G_INDEXED_LOAD = 82, + Alpha_G_INDEXED_SEXTLOAD = 83, + Alpha_G_INDEXED_ZEXTLOAD = 84, + Alpha_G_STORE = 85, + Alpha_G_INDEXED_STORE = 86, + Alpha_G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87, + Alpha_G_ATOMIC_CMPXCHG = 88, + Alpha_G_ATOMICRMW_XCHG = 89, + Alpha_G_ATOMICRMW_ADD = 90, + Alpha_G_ATOMICRMW_SUB = 91, + Alpha_G_ATOMICRMW_AND = 92, + Alpha_G_ATOMICRMW_NAND = 93, + Alpha_G_ATOMICRMW_OR = 94, + Alpha_G_ATOMICRMW_XOR = 95, + Alpha_G_ATOMICRMW_MAX = 96, + Alpha_G_ATOMICRMW_MIN = 97, + Alpha_G_ATOMICRMW_UMAX = 98, + Alpha_G_ATOMICRMW_UMIN = 99, + Alpha_G_ATOMICRMW_FADD = 100, + Alpha_G_ATOMICRMW_FSUB = 101, + Alpha_G_ATOMICRMW_FMAX = 102, + Alpha_G_ATOMICRMW_FMIN = 103, + Alpha_G_ATOMICRMW_UINC_WRAP = 104, + Alpha_G_ATOMICRMW_UDEC_WRAP = 105, + Alpha_G_FENCE = 106, + Alpha_G_BRCOND = 107, + Alpha_G_BRINDIRECT = 108, + Alpha_G_INVOKE_REGION_START = 109, + Alpha_G_INTRINSIC = 110, + Alpha_G_INTRINSIC_W_SIDE_EFFECTS = 111, + Alpha_G_ANYEXT = 112, + Alpha_G_TRUNC = 113, + Alpha_G_CONSTANT = 114, + Alpha_G_FCONSTANT = 115, + Alpha_G_VASTART = 116, + Alpha_G_VAARG = 117, + Alpha_G_SEXT = 118, + Alpha_G_SEXT_INREG = 119, + Alpha_G_ZEXT = 120, + Alpha_G_SHL = 121, + Alpha_G_LSHR = 122, + Alpha_G_ASHR = 123, + Alpha_G_FSHL = 124, + Alpha_G_FSHR = 125, + Alpha_G_ROTR = 126, + Alpha_G_ROTL = 127, + Alpha_G_ICMP = 128, + Alpha_G_FCMP = 129, + Alpha_G_SELECT = 130, + Alpha_G_UADDO = 131, + Alpha_G_UADDE = 132, + Alpha_G_USUBO = 133, + Alpha_G_USUBE = 134, + Alpha_G_SADDO = 135, + Alpha_G_SADDE = 136, + Alpha_G_SSUBO = 137, + Alpha_G_SSUBE = 138, + Alpha_G_UMULO = 139, + Alpha_G_SMULO = 140, + Alpha_G_UMULH = 141, + Alpha_G_SMULH = 142, + Alpha_G_UADDSAT = 143, + Alpha_G_SADDSAT = 144, + Alpha_G_USUBSAT = 145, + Alpha_G_SSUBSAT = 146, + Alpha_G_USHLSAT = 147, + Alpha_G_SSHLSAT = 148, + Alpha_G_SMULFIX = 149, + Alpha_G_UMULFIX = 150, + Alpha_G_SMULFIXSAT = 151, + Alpha_G_UMULFIXSAT = 152, + Alpha_G_SDIVFIX = 153, + Alpha_G_UDIVFIX = 154, + Alpha_G_SDIVFIXSAT = 155, + Alpha_G_UDIVFIXSAT = 156, + Alpha_G_FADD = 157, + Alpha_G_FSUB = 158, + Alpha_G_FMUL = 159, + Alpha_G_FMA = 160, + Alpha_G_FMAD = 161, + Alpha_G_FDIV = 162, + Alpha_G_FREM = 163, + Alpha_G_FPOW = 164, + Alpha_G_FPOWI = 165, + Alpha_G_FEXP = 166, + Alpha_G_FEXP2 = 167, + Alpha_G_FLOG = 168, + Alpha_G_FLOG2 = 169, + Alpha_G_FLOG10 = 170, + Alpha_G_FNEG = 171, + Alpha_G_FPEXT = 172, + Alpha_G_FPTRUNC = 173, + Alpha_G_FPTOSI = 174, + Alpha_G_FPTOUI = 175, + Alpha_G_SITOFP = 176, + Alpha_G_UITOFP = 177, + Alpha_G_FABS = 178, + Alpha_G_FCOPYSIGN = 179, + Alpha_G_IS_FPCLASS = 180, + Alpha_G_FCANONICALIZE = 181, + Alpha_G_FMINNUM = 182, + Alpha_G_FMAXNUM = 183, + Alpha_G_FMINNUM_IEEE = 184, + Alpha_G_FMAXNUM_IEEE = 185, + Alpha_G_FMINIMUM = 186, + Alpha_G_FMAXIMUM = 187, + Alpha_G_PTR_ADD = 188, + Alpha_G_PTRMASK = 189, + Alpha_G_SMIN = 190, + Alpha_G_SMAX = 191, + Alpha_G_UMIN = 192, + Alpha_G_UMAX = 193, + Alpha_G_ABS = 194, + Alpha_G_LROUND = 195, + Alpha_G_LLROUND = 196, + Alpha_G_BR = 197, + Alpha_G_BRJT = 198, + Alpha_G_INSERT_VECTOR_ELT = 199, + Alpha_G_EXTRACT_VECTOR_ELT = 200, + Alpha_G_SHUFFLE_VECTOR = 201, + Alpha_G_CTTZ = 202, + Alpha_G_CTTZ_ZERO_UNDEF = 203, + Alpha_G_CTLZ = 204, + Alpha_G_CTLZ_ZERO_UNDEF = 205, + Alpha_G_CTPOP = 206, + Alpha_G_BSWAP = 207, + Alpha_G_BITREVERSE = 208, + Alpha_G_FCEIL = 209, + Alpha_G_FCOS = 210, + Alpha_G_FSIN = 211, + Alpha_G_FSQRT = 212, + Alpha_G_FFLOOR = 213, + Alpha_G_FRINT = 214, + Alpha_G_FNEARBYINT = 215, + Alpha_G_ADDRSPACE_CAST = 216, + Alpha_G_BLOCK_ADDR = 217, + Alpha_G_JUMP_TABLE = 218, + Alpha_G_DYN_STACKALLOC = 219, + Alpha_G_STRICT_FADD = 220, + Alpha_G_STRICT_FSUB = 221, + Alpha_G_STRICT_FMUL = 222, + Alpha_G_STRICT_FDIV = 223, + Alpha_G_STRICT_FREM = 224, + Alpha_G_STRICT_FMA = 225, + Alpha_G_STRICT_FSQRT = 226, + Alpha_G_READ_REGISTER = 227, + Alpha_G_WRITE_REGISTER = 228, + Alpha_G_MEMCPY = 229, + Alpha_G_MEMCPY_INLINE = 230, + Alpha_G_MEMMOVE = 231, + Alpha_G_MEMSET = 232, + Alpha_G_BZERO = 233, + Alpha_G_VECREDUCE_SEQ_FADD = 234, + Alpha_G_VECREDUCE_SEQ_FMUL = 235, + Alpha_G_VECREDUCE_FADD = 236, + Alpha_G_VECREDUCE_FMUL = 237, + Alpha_G_VECREDUCE_FMAX = 238, + Alpha_G_VECREDUCE_FMIN = 239, + Alpha_G_VECREDUCE_ADD = 240, + Alpha_G_VECREDUCE_MUL = 241, + Alpha_G_VECREDUCE_AND = 242, + Alpha_G_VECREDUCE_OR = 243, + Alpha_G_VECREDUCE_XOR = 244, + Alpha_G_VECREDUCE_SMAX = 245, + Alpha_G_VECREDUCE_SMIN = 246, + Alpha_G_VECREDUCE_UMAX = 247, + Alpha_G_VECREDUCE_UMIN = 248, + Alpha_G_SBFX = 249, + Alpha_G_UBFX = 250, + Alpha_ADJUSTSTACKDOWN = 251, + Alpha_ADJUSTSTACKUP = 252, + Alpha_ALTENT = 253, + Alpha_CAS32 = 254, + Alpha_CAS64 = 255, + Alpha_LAS32 = 256, + Alpha_LAS64 = 257, + Alpha_MEMLABEL = 258, + Alpha_PCLABEL = 259, + Alpha_SWAP32 = 260, + Alpha_SWAP64 = 261, + Alpha_WTF = 262, + Alpha_ADDLi = 263, + Alpha_ADDLr = 264, + Alpha_ADDQi = 265, + Alpha_ADDQr = 266, + Alpha_ADDS = 267, + Alpha_ADDT = 268, + Alpha_ANDi = 269, + Alpha_ANDr = 270, + Alpha_BEQ = 271, + Alpha_BGE = 272, + Alpha_BGT = 273, + Alpha_BICi = 274, + Alpha_BICr = 275, + Alpha_BISi = 276, + Alpha_BISr = 277, + Alpha_BLBC = 278, + Alpha_BLBS = 279, + Alpha_BLE = 280, + Alpha_BLT = 281, + Alpha_BNE = 282, + Alpha_BR = 283, + Alpha_BSR = 284, + Alpha_CMOVEQi = 285, + Alpha_CMOVEQr = 286, + Alpha_CMOVGEi = 287, + Alpha_CMOVGEr = 288, + Alpha_CMOVGTi = 289, + Alpha_CMOVGTr = 290, + Alpha_CMOVLBCi = 291, + Alpha_CMOVLBCr = 292, + Alpha_CMOVLBSi = 293, + Alpha_CMOVLBSr = 294, + Alpha_CMOVLEi = 295, + Alpha_CMOVLEr = 296, + Alpha_CMOVLTi = 297, + Alpha_CMOVLTr = 298, + Alpha_CMOVNEi = 299, + Alpha_CMOVNEr = 300, + Alpha_CMPBGE = 301, + Alpha_CMPBGEi = 302, + Alpha_CMPEQ = 303, + Alpha_CMPEQi = 304, + Alpha_CMPLE = 305, + Alpha_CMPLEi = 306, + Alpha_CMPLT = 307, + Alpha_CMPLTi = 308, + Alpha_CMPTEQ = 309, + Alpha_CMPTLE = 310, + Alpha_CMPTLT = 311, + Alpha_CMPTUN = 312, + Alpha_CMPULE = 313, + Alpha_CMPULEi = 314, + Alpha_CMPULT = 315, + Alpha_CMPULTi = 316, + Alpha_COND_BRANCH_F = 317, + Alpha_COND_BRANCH_I = 318, + Alpha_CPYSES = 319, + Alpha_CPYSESt = 320, + Alpha_CPYSET = 321, + Alpha_CPYSNS = 322, + Alpha_CPYSNSt = 323, + Alpha_CPYSNT = 324, + Alpha_CPYSNTs = 325, + Alpha_CPYSS = 326, + Alpha_CPYSSt = 327, + Alpha_CPYST = 328, + Alpha_CPYSTs = 329, + Alpha_CTLZ = 330, + Alpha_CTPOP = 331, + Alpha_CTTZ = 332, + Alpha_CVTQS = 333, + Alpha_CVTQT = 334, + Alpha_CVTST = 335, + Alpha_CVTTQ = 336, + Alpha_CVTTS = 337, + Alpha_DIVS = 338, + Alpha_DIVT = 339, + Alpha_EQVi = 340, + Alpha_EQVr = 341, + Alpha_EXTBL = 342, + Alpha_EXTLL = 343, + Alpha_EXTWL = 344, + Alpha_FBEQ = 345, + Alpha_FBGE = 346, + Alpha_FBGT = 347, + Alpha_FBLE = 348, + Alpha_FBLT = 349, + Alpha_FBNE = 350, + Alpha_FCMOVEQS = 351, + Alpha_FCMOVEQT = 352, + Alpha_FCMOVGES = 353, + Alpha_FCMOVGET = 354, + Alpha_FCMOVGTS = 355, + Alpha_FCMOVGTT = 356, + Alpha_FCMOVLES = 357, + Alpha_FCMOVLET = 358, + Alpha_FCMOVLTS = 359, + Alpha_FCMOVLTT = 360, + Alpha_FCMOVNES = 361, + Alpha_FCMOVNET = 362, + Alpha_FTOIS = 363, + Alpha_FTOIT = 364, + Alpha_ITOFS = 365, + Alpha_ITOFT = 366, + Alpha_JMP = 367, + Alpha_JSR = 368, + Alpha_JSR_COROUTINE = 369, + Alpha_JSRs = 370, + Alpha_LDA = 371, + Alpha_LDAH = 372, + Alpha_LDAHg = 373, + Alpha_LDAHr = 374, + Alpha_LDAg = 375, + Alpha_LDAr = 376, + Alpha_LDBU = 377, + Alpha_LDBUr = 378, + Alpha_LDL = 379, + Alpha_LDL_L = 380, + Alpha_LDLr = 381, + Alpha_LDQ = 382, + Alpha_LDQ_L = 383, + Alpha_LDQl = 384, + Alpha_LDQr = 385, + Alpha_LDS = 386, + Alpha_LDSr = 387, + Alpha_LDT = 388, + Alpha_LDTr = 389, + Alpha_LDWU = 390, + Alpha_LDWUr = 391, + Alpha_MB = 392, + Alpha_MULLi = 393, + Alpha_MULLr = 394, + Alpha_MULQi = 395, + Alpha_MULQr = 396, + Alpha_MULS = 397, + Alpha_MULT = 398, + Alpha_ORNOTi = 399, + Alpha_ORNOTr = 400, + Alpha_RETDAG = 401, + Alpha_RETDAGp = 402, + Alpha_RPCC = 403, + Alpha_S4ADDLi = 404, + Alpha_S4ADDLr = 405, + Alpha_S4ADDQi = 406, + Alpha_S4ADDQr = 407, + Alpha_S4SUBLi = 408, + Alpha_S4SUBLr = 409, + Alpha_S4SUBQi = 410, + Alpha_S4SUBQr = 411, + Alpha_S8ADDLi = 412, + Alpha_S8ADDLr = 413, + Alpha_S8ADDQi = 414, + Alpha_S8ADDQr = 415, + Alpha_S8SUBLi = 416, + Alpha_S8SUBLr = 417, + Alpha_S8SUBQi = 418, + Alpha_S8SUBQr = 419, + Alpha_SEXTB = 420, + Alpha_SEXTW = 421, + Alpha_SLi = 422, + Alpha_SLr = 423, + Alpha_SQRTS = 424, + Alpha_SQRTT = 425, + Alpha_SRAi = 426, + Alpha_SRAr = 427, + Alpha_SRLi = 428, + Alpha_SRLr = 429, + Alpha_STB = 430, + Alpha_STBr = 431, + Alpha_STL = 432, + Alpha_STL_C = 433, + Alpha_STLr = 434, + Alpha_STQ = 435, + Alpha_STQ_C = 436, + Alpha_STQr = 437, + Alpha_STS = 438, + Alpha_STSr = 439, + Alpha_STT = 440, + Alpha_STTr = 441, + Alpha_STW = 442, + Alpha_STWr = 443, + Alpha_SUBLi = 444, + Alpha_SUBLr = 445, + Alpha_SUBQi = 446, + Alpha_SUBQr = 447, + Alpha_SUBS = 448, + Alpha_SUBT = 449, + Alpha_UMULHi = 450, + Alpha_UMULHr = 451, + Alpha_WMB = 452, + Alpha_XORi = 453, + Alpha_XORr = 454, + Alpha_ZAPNOTi = 455, + INSTRUCTION_LIST_END = 456 + }; + +#endif // GET_INSTRINFO_ENUM + +#ifdef GET_INSTRINFO_MC_DESC +#undef GET_INSTRINFO_MC_DESC + + +static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, CONSTRAINT_MCOI_TIED_TO(0) }, }; +static const MCOperandInfo OperandInfo10[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo11[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo12[] = { { 0, 0|(1<, 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +#ifdef GET_REGINFO_ENUM +#undef GET_REGINFO_ENUM + +enum { + Alpha_NoRegister, + Alpha_F0 = 1, + Alpha_F1 = 2, + Alpha_F2 = 3, + Alpha_F3 = 4, + Alpha_F4 = 5, + Alpha_F5 = 6, + Alpha_F6 = 7, + Alpha_F7 = 8, + Alpha_F8 = 9, + Alpha_F9 = 10, + Alpha_F10 = 11, + Alpha_F11 = 12, + Alpha_F12 = 13, + Alpha_F13 = 14, + Alpha_F14 = 15, + Alpha_F15 = 16, + Alpha_F16 = 17, + Alpha_F17 = 18, + Alpha_F18 = 19, + Alpha_F19 = 20, + Alpha_F20 = 21, + Alpha_F21 = 22, + Alpha_F22 = 23, + Alpha_F23 = 24, + Alpha_F24 = 25, + Alpha_F25 = 26, + Alpha_F26 = 27, + Alpha_F27 = 28, + Alpha_F28 = 29, + Alpha_F29 = 30, + Alpha_F30 = 31, + Alpha_F31 = 32, + Alpha_R0 = 33, + Alpha_R1 = 34, + Alpha_R2 = 35, + Alpha_R3 = 36, + Alpha_R4 = 37, + Alpha_R5 = 38, + Alpha_R6 = 39, + Alpha_R7 = 40, + Alpha_R8 = 41, + Alpha_R9 = 42, + Alpha_R10 = 43, + Alpha_R11 = 44, + Alpha_R12 = 45, + Alpha_R13 = 46, + Alpha_R14 = 47, + Alpha_R15 = 48, + Alpha_R16 = 49, + Alpha_R17 = 50, + Alpha_R18 = 51, + Alpha_R19 = 52, + Alpha_R20 = 53, + Alpha_R21 = 54, + Alpha_R22 = 55, + Alpha_R23 = 56, + Alpha_R24 = 57, + Alpha_R25 = 58, + Alpha_R26 = 59, + Alpha_R27 = 60, + Alpha_R28 = 61, + Alpha_R29 = 62, + Alpha_R30 = 63, + Alpha_R31 = 64, + NUM_TARGET_REGS // 65 +}; + +// Register classes + +enum { + Alpha_F4RCRegClassID = 0, + Alpha_F8RCRegClassID = 1, + Alpha_GPRCRegClassID = 2, + +}; +#endif // GET_REGINFO_ENUM + +#ifdef GET_REGINFO_MC_DESC +#undef GET_REGINFO_MC_DESC + +static const MCPhysReg AlphaRegDiffLists[] = { + /* 0 */ 65535, 0, +}; + +static const uint16_t AlphaSubRegIdxLists[] = { + /* 0 */ 0, +}; + +static const MCRegisterDesc AlphaRegDesc[] = { // Descriptors + { 3, 0, 0, 0, 0, 0 }, + { 24, 1, 1, 0, 1, 0 }, + { 54, 1, 1, 0, 1, 0 }, + { 76, 1, 1, 0, 1, 0 }, + { 98, 1, 1, 0, 1, 0 }, + { 120, 1, 1, 0, 1, 0 }, + { 142, 1, 1, 0, 1, 0 }, + { 164, 1, 1, 0, 1, 0 }, + { 186, 1, 1, 0, 1, 0 }, + { 208, 1, 1, 0, 1, 0 }, + { 230, 1, 1, 0, 1, 0 }, + { 0, 1, 1, 0, 1, 0 }, + { 30, 1, 1, 0, 1, 0 }, + { 60, 1, 1, 0, 1, 0 }, + { 82, 1, 1, 0, 1, 0 }, + { 104, 1, 1, 0, 1, 0 }, + { 126, 1, 1, 0, 1, 0 }, + { 148, 1, 1, 0, 1, 0 }, + { 170, 1, 1, 0, 1, 0 }, + { 192, 1, 1, 0, 1, 0 }, + { 214, 1, 1, 0, 1, 0 }, + { 8, 1, 1, 0, 1, 0 }, + { 38, 1, 1, 0, 1, 0 }, + { 68, 1, 1, 0, 1, 0 }, + { 90, 1, 1, 0, 1, 0 }, + { 112, 1, 1, 0, 1, 0 }, + { 134, 1, 1, 0, 1, 0 }, + { 156, 1, 1, 0, 1, 0 }, + { 178, 1, 1, 0, 1, 0 }, + { 200, 1, 1, 0, 1, 0 }, + { 222, 1, 1, 0, 1, 0 }, + { 16, 1, 1, 0, 1, 0 }, + { 46, 1, 1, 0, 1, 0 }, + { 27, 1, 1, 0, 1, 0 }, + { 57, 1, 1, 0, 1, 0 }, + { 79, 1, 1, 0, 1, 0 }, + { 101, 1, 1, 0, 1, 0 }, + { 123, 1, 1, 0, 1, 0 }, + { 145, 1, 1, 0, 1, 0 }, + { 167, 1, 1, 0, 1, 0 }, + { 189, 1, 1, 0, 1, 0 }, + { 211, 1, 1, 0, 1, 0 }, + { 233, 1, 1, 0, 1, 0 }, + { 4, 1, 1, 0, 1, 0 }, + { 34, 1, 1, 0, 1, 0 }, + { 64, 1, 1, 0, 1, 0 }, + { 86, 1, 1, 0, 1, 0 }, + { 108, 1, 1, 0, 1, 0 }, + { 130, 1, 1, 0, 1, 0 }, + { 152, 1, 1, 0, 1, 0 }, + { 174, 1, 1, 0, 1, 0 }, + { 196, 1, 1, 0, 1, 0 }, + { 218, 1, 1, 0, 1, 0 }, + { 12, 1, 1, 0, 1, 0 }, + { 42, 1, 1, 0, 1, 0 }, + { 72, 1, 1, 0, 1, 0 }, + { 94, 1, 1, 0, 1, 0 }, + { 116, 1, 1, 0, 1, 0 }, + { 138, 1, 1, 0, 1, 0 }, + { 160, 1, 1, 0, 1, 0 }, + { 182, 1, 1, 0, 1, 0 }, + { 204, 1, 1, 0, 1, 0 }, + { 226, 1, 1, 0, 1, 0 }, + { 20, 1, 1, 0, 1, 0 }, + { 50, 1, 1, 0, 1, 0 }, +}; + + // F4RC Register Class... + static const MCPhysReg F4RC[] = { + Alpha_F0, Alpha_F1, Alpha_F10, Alpha_F11, Alpha_F12, Alpha_F13, Alpha_F14, Alpha_F15, Alpha_F16, Alpha_F17, Alpha_F18, Alpha_F19, Alpha_F20, Alpha_F21, Alpha_F22, Alpha_F23, Alpha_F24, Alpha_F25, Alpha_F26, Alpha_F27, Alpha_F28, Alpha_F29, Alpha_F30, Alpha_F2, Alpha_F3, Alpha_F4, Alpha_F5, Alpha_F6, Alpha_F7, Alpha_F8, Alpha_F9, Alpha_F31, + }; + + // F4RC Bit set. + static const uint8_t F4RCBits[] = { + 0xfe, 0xff, 0xff, 0xff, 0x01, + }; + + // F8RC Register Class... + static const MCPhysReg F8RC[] = { + Alpha_F0, Alpha_F1, Alpha_F10, Alpha_F11, Alpha_F12, Alpha_F13, Alpha_F14, Alpha_F15, Alpha_F16, Alpha_F17, Alpha_F18, Alpha_F19, Alpha_F20, Alpha_F21, Alpha_F22, Alpha_F23, Alpha_F24, Alpha_F25, Alpha_F26, Alpha_F27, Alpha_F28, Alpha_F29, Alpha_F30, Alpha_F2, Alpha_F3, Alpha_F4, Alpha_F5, Alpha_F6, Alpha_F7, Alpha_F8, Alpha_F9, Alpha_F31, + }; + + // F8RC Bit set. + static const uint8_t F8RCBits[] = { + 0xfe, 0xff, 0xff, 0xff, 0x01, + }; + + // GPRC Register Class... + static const MCPhysReg GPRC[] = { + Alpha_R0, Alpha_R1, Alpha_R2, Alpha_R3, Alpha_R4, Alpha_R5, Alpha_R6, Alpha_R7, Alpha_R8, Alpha_R16, Alpha_R17, Alpha_R18, Alpha_R19, Alpha_R20, Alpha_R21, Alpha_R22, Alpha_R23, Alpha_R24, Alpha_R25, Alpha_R28, Alpha_R27, Alpha_R26, Alpha_R29, Alpha_R9, Alpha_R10, Alpha_R11, Alpha_R12, Alpha_R13, Alpha_R14, Alpha_R15, Alpha_R30, Alpha_R31, + }; + + // GPRC Bit set. + static const uint8_t GPRCBits[] = { + 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x01, + }; + +static const MCRegisterClass AlphaMCRegisterClasses[] = { + { F4RC, F4RCBits, sizeof(F4RCBits) }, + { F8RC, F8RCBits, sizeof(F8RCBits) }, + { GPRC, GPRCBits, sizeof(GPRCBits) }, +}; + +static const uint16_t AlphaRegEncodingTable[] = { + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, +}; +#endif // GET_REGINFO_MC_DESC + + + diff --git a/arch/Alpha/AlphaGenSubtargetInfo.inc b/arch/Alpha/AlphaGenSubtargetInfo.inc new file mode 100644 index 0000000000..e852cb48f2 --- /dev/null +++ b/arch/Alpha/AlphaGenSubtargetInfo.inc @@ -0,0 +1,24 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + +#ifdef GET_SUBTARGETINFO_ENUM +#undef GET_SUBTARGETINFO_ENUM + +enum { + Alpha_FeatureCIX = 0, + Alpha_NumSubtargetFeatures = 1 +}; +#endif // GET_SUBTARGETINFO_ENUM + + + diff --git a/arch/Alpha/AlphaGenSystemRegister.inc b/arch/Alpha/AlphaGenSystemRegister.inc new file mode 100644 index 0000000000..eb573a2ff4 --- /dev/null +++ b/arch/Alpha/AlphaGenSystemRegister.inc @@ -0,0 +1,13 @@ +/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* By Nguyen Anh Quynh , 2013-2022, */ +/* Rot127 2022-2023 */ +/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ + +/* LLVM-commit: 0xdeadbeef */ +/* LLVM-tag: */ + +/* Do not edit. */ + +/* Capstone's LLVM TableGen Backends: */ +/* https://github.com/capstone-engine/llvm-capstone */ + diff --git a/arch/Alpha/AlphaInstPrinter.c b/arch/Alpha/AlphaInstPrinter.c new file mode 100644 index 0000000000..25ea74d9a3 --- /dev/null +++ b/arch/Alpha/AlphaInstPrinter.c @@ -0,0 +1,102 @@ +#ifdef CAPSTONE_HAS_ALPHA + +#include +#include +#include +#include + +#include "../../utils.h" +#include "AlphaInstPrinter.h" +#include "AlphaMapping.h" +#include "../../MCInstPrinter.h" + +static const char *getRegisterName(unsigned RegNo); + +static void printInstruction(MCInst *, uint64_t, SStream *); + +static void printOperand(MCInst *MI, int OpNum, SStream *O); + +void Alpha_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) +{ + /* + if (((cs_struct *)ud)->detail != CS_OPT_ON) + return; + */ +} + +#define GET_INSTRINFO_ENUM + +#include "AlphaGenInstrInfo.inc" + +#define GET_REGINFO_ENUM + +#include "AlphaGenRegisterInfo.inc" + +static inline void fill_alpha_register(MCInst *MI, uint32_t reg) +{ + if (!(MI->csh->detail == CS_OPT_ON && MI->flat_insn->detail)) + return; + cs_alpha *alpha = &MI->flat_insn->detail->alpha; + alpha->operands[alpha->op_count].type = ALPHA_OP_REG; + alpha->operands[alpha->op_count].reg = reg; + alpha->op_count++; +} + +static inline void fill_alpha_imm(MCInst *MI, int32_t imm) +{ + if (!(MI->csh->detail == CS_OPT_ON && MI->flat_insn->detail)) + return; + cs_alpha *alpha = &MI->flat_insn->detail->alpha; + alpha->operands[alpha->op_count].type = ALPHA_OP_IMM; + alpha->operands[alpha->op_count].imm = imm; + alpha->op_count++; +} + +static void printOperand(MCInst *MI, int OpNum, SStream *O) +{ + MCOperand *Op; + if (OpNum >= MI->size) + return; + + Op = MCInst_getOperand(MI, OpNum); + if (MCOperand_isReg(Op)) { + unsigned reg = MCOperand_getReg(Op); + SStream_concat(O, "%s", getRegisterName(reg)); + fill_alpha_register(MI, reg); + } else if (MCOperand_isImm(Op)) { + int64_t Imm = MCOperand_getImm(Op); + if (Imm >= 0) { + if (Imm > HEX_THRESHOLD) + SStream_concat(O, "0x%" PRIx64, Imm); + else + SStream_concat(O, "%" PRIu64, Imm); + } else { + if (Imm < -HEX_THRESHOLD) + SStream_concat(O, "-0x%" PRIx64, -Imm); + else + SStream_concat(O, "-%" PRIu64, -Imm); + } + + fill_alpha_imm(MI, (int32_t)Imm); + } +} + +#define PRINT_ALIAS_INSTR + +#include "AlphaGenAsmWriter.inc" + +const char *Alpha_getRegisterName(csh handle, unsigned int id) +{ +#ifndef CAPSTONE_DIET + return getRegisterName(id); +#else + return NULL; +#endif +} + +void Alpha_printInst(MCInst *MI, SStream *O, void *Info) +{ + printInstruction(MI, MI->address, O); +} + +#endif \ No newline at end of file diff --git a/arch/Alpha/AlphaInstPrinter.h b/arch/Alpha/AlphaInstPrinter.h new file mode 100644 index 0000000000..1abce19274 --- /dev/null +++ b/arch/Alpha/AlphaInstPrinter.h @@ -0,0 +1,15 @@ +#ifndef CS_ALPHAINSTPRINTER_H +#define CS_ALPHAINSTPRINTER_H + +#include "../../MCInst.h" +#include "../../MCRegisterInfo.h" +#include "../../SStream.h" +#include "AlphaMapping.h" + +const char *Alpha_getRegisterName(csh handle, unsigned int id); + +void Alpha_printInst(MCInst *MI, SStream *O, void *Info); + +void Alpha_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); + +#endif // CS_ALPHAINSTPRINTER_H \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c new file mode 100644 index 0000000000..f513177f72 --- /dev/null +++ b/arch/Alpha/AlphaMapping.c @@ -0,0 +1,117 @@ +#ifdef CAPSTONE_HAS_ALPHA + +#include // debug +#include + +#include "../../utils.h" + +#include "AlphaMapping.h" +#include "../../Mapping.h" + +#define GET_INSTRINFO_ENUM + +#include "AlphaGenInstrInfo.inc" + +static insn_map insns[] = { +#include "AlphaGenCSMappingInsn.inc" +}; + +// unsigned int Alpha_map_insn_id(cs_struct *h, unsigned int id) +// { +// unsigned short i = +// insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); +// if (i != 0) { +// return insns[i].mapid; +// } +// return 0; +// } + +// given internal insn id, return public instruction info +void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) +{ + unsigned short i; + + i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); + if (i != 0) { + insn->id = insns[i].mapid; + + if (h->detail) { +#ifndef CAPSTONE_DIET + memcpy(insn->detail->regs_read, insns[i].regs_use, + sizeof(insns[i].regs_use)); + insn->detail->regs_read_count = + (uint8_t)count_positive(insns[i].regs_use); + + memcpy(insn->detail->regs_write, insns[i].regs_mod, + sizeof(insns[i].regs_mod)); + insn->detail->regs_write_count = + (uint8_t)count_positive(insns[i].regs_mod); + + memcpy(insn->detail->groups, insns[i].groups, + sizeof(insns[i].groups)); + insn->detail->groups_count = + (uint8_t)count_positive8(insns[i].groups); + + // if (insns[i].branch || insns[i].indirect_branch) { + // // this insn also belongs to JUMP group. add JUMP group + // insn->detail + // ->groups[insn->detail->groups_count] = + // Alpha_GRP_JUMP; + // insn->detail->groups_count++; + // } +#endif + } + } +} + +#ifndef CAPSTONE_DIET + +static const char *insn_names[] = { +#include "AlphaGenCSMappingInsnName.inc" +}; + +// special alias insn +static name_map alias_insn_names[] = { { 0, NULL } }; +#endif + +const char *Alpha_insn_name(csh handle, unsigned int id) +{ +#ifndef CAPSTONE_DIET + unsigned int i; + + if (id >= ALPHA_INS_ENDING) + return NULL; + + // handle special alias first + for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { + if (alias_insn_names[i].id == id) + return alias_insn_names[i].name; + } + + return insn_names[id]; +#else + return NULL; +#endif +} + +#ifndef CAPSTONE_DIET +static name_map group_name_maps[] = { + { Alpha_GRP_INVALID, NULL }, + { Alpha_GRP_CALL, "call" }, + { Alpha_GRP_JUMP, "jump" }, +}; +#endif + +const char *Alpha_group_name(csh handle, unsigned int id) +{ +#ifndef CAPSTONE_DIET + if (id >= Alpha_GRP_ENDING) + return NULL; + + return group_name_maps[id].name; +#else + return NULL; +#endif +} + +#endif \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.h b/arch/Alpha/AlphaMapping.h new file mode 100644 index 0000000000..6b583698d2 --- /dev/null +++ b/arch/Alpha/AlphaMapping.h @@ -0,0 +1,15 @@ +#ifndef CS_ALPHA_MAP_H +#define CS_ALPHA_MAP_H + +#include + +// unsigned int Alpha_map_insn_id(cs_struct *h, unsigned int id); + +// given internal insn id, return public instruction info +void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id); + +const char *Alpha_insn_name(csh handle, unsigned int id); + +const char *Alpha_group_name(csh handle, unsigned int id); + +#endif diff --git a/arch/Alpha/AlphaModule.c b/arch/Alpha/AlphaModule.c new file mode 100644 index 0000000000..a2dd49c5b6 --- /dev/null +++ b/arch/Alpha/AlphaModule.c @@ -0,0 +1,37 @@ +#ifdef CAPSTONE_HAS_ALPHA + +#include "../../utils.h" +#include "AlphaDisassembler.h" +#include "AlphaInstPrinter.h" +#include "AlphaMapping.h" + +cs_err ALPHA_global_init(cs_struct *ud) +{ + MCRegisterInfo *mri; + + mri = cs_mem_malloc(sizeof(*mri)); + + Alpha_init(mri); + ud->printer = Alpha_printInst; + ud->printer_info = mri; + ud->getinsn_info = mri; + ud->disasm = Alpha_getInstruction; + ud->post_printer = Alpha_post_printer; + + ud->reg_name = Alpha_getRegisterName; + ud->insn_id = Alpha_get_insn_id; + ud->insn_name = Alpha_insn_name; + ud->group_name = Alpha_group_name; + + return CS_ERR_OK; +} + +cs_err ALPHA_option(cs_struct *handle, cs_opt_type type, size_t value) +{ + if (type == CS_OPT_SYNTAX) + handle->syntax = (int)value; + + return CS_ERR_OK; +} + +#endif diff --git a/arch/Alpha/AlphaModule.h b/arch/Alpha/AlphaModule.h new file mode 100644 index 0000000000..e6ffb6f13f --- /dev/null +++ b/arch/Alpha/AlphaModule.h @@ -0,0 +1,7 @@ +#ifndef CAPSTONE_ALPHAMODULE_H +#define CAPSTONE_ALPHAMODULE_H + +cs_err ALPHA_global_init(cs_struct *ud); +cs_err ALPHA_option(cs_struct *handle, cs_opt_type type, size_t value); + +#endif // CAPSTONE_ALPHAMODULE_H diff --git a/bindings/const_generator.py b/bindings/const_generator.py index 6d65a8d8fc..074b790057 100644 --- a/bindings/const_generator.py +++ b/bindings/const_generator.py @@ -53,6 +53,7 @@ 'riscv.h': 'riscv', 'sh.h': 'sh', 'tricore.h': ['TRICORE', 'TriCore'], + 'alpha.h': ['ALPHA', 'Alpha'], 'comment_open': '#', 'comment_close': '', }, diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py index 6f16a922f2..d96cafc0d6 100755 --- a/bindings/python/capstone/__init__.py +++ b/bindings/python/capstone/__init__.py @@ -41,6 +41,7 @@ 'CS_ARCH_RISCV', 'CS_ARCH_SH', 'CS_ARCH_TRICORE', + 'CS_ARCH_ALPHA', 'CS_ARCH_ALL', 'CS_MODE_LITTLE_ENDIAN', @@ -217,7 +218,8 @@ CS_ARCH_RISCV = 15 CS_ARCH_SH = 16 CS_ARCH_TRICORE = 17 -CS_ARCH_MAX = 18 +CS_ARCH_ALPHA = 18 +CS_ARCH_MAX = 19 CS_ARCH_ALL = 0xFFFF # disasm mode @@ -463,6 +465,7 @@ class _cs_arch(ctypes.Union): ('riscv', riscv.CsRISCV), ('sh', sh.CsSH), ('tricore', tricore.CsTriCore), + ('alpha', alpha.CsAlpha), ) class _cs_detail(ctypes.Structure): diff --git a/bindings/python/capstone/alpha.py b/bindings/python/capstone/alpha.py new file mode 100644 index 0000000000..bd2c56ba01 --- /dev/null +++ b/bindings/python/capstone/alpha.py @@ -0,0 +1,43 @@ +import ctypes +from . import copy_ctypes_list +from .alpha_const import * + +class AlphaOpMem(ctypes.Structure): + _fields_ = ( + ('base', ctypes.c_uint8), + ('disp', ctypes.c_int32), + ) + + +class AlphaOpValue(ctypes.Union): + _fields_ = ( + ('reg', ctypes.c_uint), + ('imm', ctypes.c_int32), + ) + + +class AlphaOp(ctypes.Structure): + _fields_ = ( + ('type', ctypes.c_uint), + ('value', AlphaOpValue), + ('access', ctypes.c_uint8) + ) + + @property + def imm(self): + return self.value.imm + + @property + def reg(self): + return self.value.reg + + +# Instruction structure +class CsAlpha(ctypes.Structure): + _fields_ = ( + ('op_count', ctypes.c_uint8), + ('operands', AlphaOp * 8) + ) + +def get_arch_info(a): + return copy_ctypes_list(a.operands[:a.op_count]) diff --git a/bindings/python/capstone/alpha_const.py b/bindings/python/capstone/alpha_const.py new file mode 100644 index 0000000000..581635e722 --- /dev/null +++ b/bindings/python/capstone/alpha_const.py @@ -0,0 +1,211 @@ +# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [alpha_const.py] + +# Operand type for instruction's operands +ALPHA_OP_INVALID = CS_OP_INVALID +ALPHA_OP_REG = CS_OP_REG +ALPHA_OP_IMM = CS_OP_IMM + +# Alpha registers + +Alpha_REG_INVALID = 0 +Alpha_REG_F0 = 1 +Alpha_REG_F1 = 2 +Alpha_REG_F2 = 3 +Alpha_REG_F3 = 4 +Alpha_REG_F4 = 5 +Alpha_REG_F5 = 6 +Alpha_REG_F6 = 7 +Alpha_REG_F7 = 8 +Alpha_REG_F8 = 9 +Alpha_REG_F9 = 10 +Alpha_REG_F10 = 11 +Alpha_REG_F11 = 12 +Alpha_REG_F12 = 13 +Alpha_REG_F13 = 14 +Alpha_REG_F14 = 15 +Alpha_REG_F15 = 16 +Alpha_REG_F16 = 17 +Alpha_REG_F17 = 18 +Alpha_REG_F18 = 19 +Alpha_REG_F19 = 20 +Alpha_REG_F20 = 21 +Alpha_REG_F21 = 22 +Alpha_REG_F22 = 23 +Alpha_REG_F23 = 24 +Alpha_REG_F24 = 25 +Alpha_REG_F25 = 26 +Alpha_REG_F26 = 27 +Alpha_REG_F27 = 28 +Alpha_REG_F28 = 29 +Alpha_REG_F29 = 30 +Alpha_REG_F30 = 31 +Alpha_REG_F31 = 32 +Alpha_REG_R0 = 33 +Alpha_REG_R1 = 34 +Alpha_REG_R2 = 35 +Alpha_REG_R3 = 36 +Alpha_REG_R4 = 37 +Alpha_REG_R5 = 38 +Alpha_REG_R6 = 39 +Alpha_REG_R7 = 40 +Alpha_REG_R8 = 41 +Alpha_REG_R9 = 42 +Alpha_REG_R10 = 43 +Alpha_REG_R11 = 44 +Alpha_REG_R12 = 45 +Alpha_REG_R13 = 46 +Alpha_REG_R14 = 47 +Alpha_REG_R15 = 48 +Alpha_REG_R16 = 49 +Alpha_REG_R17 = 50 +Alpha_REG_R18 = 51 +Alpha_REG_R19 = 52 +Alpha_REG_R20 = 53 +Alpha_REG_R21 = 54 +Alpha_REG_R22 = 55 +Alpha_REG_R23 = 56 +Alpha_REG_R24 = 57 +Alpha_REG_R25 = 58 +Alpha_REG_R26 = 59 +Alpha_REG_R27 = 60 +Alpha_REG_R28 = 61 +Alpha_REG_R29 = 62 +Alpha_REG_R30 = 63 +Alpha_REG_R31 = 64 +Alpha_REG_ENDING = 65 + +# Alpha instruction +Alpha_INS_INVALID = 66 +Alpha_INS_ADDL = 67 +Alpha_INS_ADDQ = 68 +Alpha_INS_ADDSsSU = 69 +Alpha_INS_ADDTsSU = 70 +Alpha_INS_AND = 71 +Alpha_INS_BEQ = 72 +Alpha_INS_BGE = 73 +Alpha_INS_BGT = 74 +Alpha_INS_BIC = 75 +Alpha_INS_BIS = 76 +Alpha_INS_BLBC = 77 +Alpha_INS_BLBS = 78 +Alpha_INS_BLE = 79 +Alpha_INS_BLT = 80 +Alpha_INS_BNE = 81 +Alpha_INS_BR = 82 +Alpha_INS_BSR = 83 +Alpha_INS_CMOVEQ = 84 +Alpha_INS_CMOVGE = 85 +Alpha_INS_CMOVGT = 86 +Alpha_INS_CMOVLBC = 87 +Alpha_INS_CMOVLBS = 88 +Alpha_INS_CMOVLE = 89 +Alpha_INS_CMOVLT = 90 +Alpha_INS_CMOVNE = 91 +Alpha_INS_CMPBGE = 92 +Alpha_INS_CMPEQ = 93 +Alpha_INS_CMPLE = 94 +Alpha_INS_CMPLT = 95 +Alpha_INS_CMPTEQsSU = 96 +Alpha_INS_CMPTLEsSU = 97 +Alpha_INS_CMPTLTsSU = 98 +Alpha_INS_CMPTUNsSU = 99 +Alpha_INS_CMPULE = 100 +Alpha_INS_CMPULT = 101 +Alpha_INS_COND_BRANCH = 102 +Alpha_INS_CPYSE = 103 +Alpha_INS_CPYSN = 104 +Alpha_INS_CPYS = 105 +Alpha_INS_CTLZ = 106 +Alpha_INS_CTPOP = 107 +Alpha_INS_CTTZ = 108 +Alpha_INS_CVTQSsSUI = 109 +Alpha_INS_CVTQTsSUI = 110 +Alpha_INS_CVTSTsS = 111 +Alpha_INS_CVTTQsSVC = 112 +Alpha_INS_CVTTSsSUI = 113 +Alpha_INS_DIVSsSU = 114 +Alpha_INS_DIVTsSU = 115 +Alpha_INS_EQV = 116 +Alpha_INS_EXTBL = 117 +Alpha_INS_EXTLL = 118 +Alpha_INS_EXTWL = 119 +Alpha_INS_FBEQ = 120 +Alpha_INS_FBGE = 121 +Alpha_INS_FBGT = 122 +Alpha_INS_FBLE = 123 +Alpha_INS_FBLT = 124 +Alpha_INS_FBNE = 125 +Alpha_INS_FCMOVEQ = 126 +Alpha_INS_FCMOVGE = 127 +Alpha_INS_FCMOVGT = 128 +Alpha_INS_FCMOVLE = 129 +Alpha_INS_FCMOVLT = 130 +Alpha_INS_FCMOVNE = 131 +Alpha_INS_FTOIS = 132 +Alpha_INS_FTOIT = 133 +Alpha_INS_ITOFS = 134 +Alpha_INS_ITOFT = 135 +Alpha_INS_JMP = 136 +Alpha_INS_JSR = 137 +Alpha_INS_JSR_COROUTINE = 138 +Alpha_INS_LDA = 139 +Alpha_INS_LDAH = 140 +Alpha_INS_LDBU = 141 +Alpha_INS_LDL = 142 +Alpha_INS_LDLsL = 143 +Alpha_INS_LDQ = 144 +Alpha_INS_LDQsL = 145 +Alpha_INS_LDS = 146 +Alpha_INS_LDT = 147 +Alpha_INS_LDWU = 148 +Alpha_INS_MB = 149 +Alpha_INS_MULL = 150 +Alpha_INS_MULQ = 151 +Alpha_INS_MULSsSU = 152 +Alpha_INS_MULTsSU = 153 +Alpha_INS_ORNOT = 154 +Alpha_INS_RET = 155 +Alpha_INS_RPCC = 156 +Alpha_INS_S4ADDL = 157 +Alpha_INS_S4ADDQ = 158 +Alpha_INS_S4SUBL = 159 +Alpha_INS_S4SUBQ = 160 +Alpha_INS_S8ADDL = 161 +Alpha_INS_S8ADDQ = 162 +Alpha_INS_S8SUBL = 163 +Alpha_INS_S8SUBQ = 164 +Alpha_INS_SEXTB = 165 +Alpha_INS_SEXTW = 166 +Alpha_INS_SLL = 167 +Alpha_INS_SQRTSsSU = 168 +Alpha_INS_SQRTTsSU = 169 +Alpha_INS_SRA = 170 +Alpha_INS_SRL = 171 +Alpha_INS_STB = 172 +Alpha_INS_STL = 173 +Alpha_INS_STLsL = 174 +Alpha_INS_STQ = 175 +Alpha_INS_STQsL = 176 +Alpha_INS_STS = 177 +Alpha_INS_STT = 178 +Alpha_INS_STW = 179 +Alpha_INS_SUBL = 180 +Alpha_INS_SUBQ = 181 +Alpha_INS_SUBSsSU = 182 +Alpha_INS_SUBTsSU = 183 +Alpha_INS_UMULH = 184 +Alpha_INS_WMB = 185 +Alpha_INS_XOR = 186 +Alpha_INS_ZAPNOT = 187 +ALPHA_INS_ENDING = 188 + +# Group of Alpha instructions +Alpha_GRP_INVALID = 189 + +# Generic groups +Alpha_GRP_CALL = 190 +Alpha_GRP_JUMP = 191 +Alpha_GRP_ENDING = 192 + +ALPHA_FEATURE_INVALID = 0 +ALPHA_FEATURE_ENDING = 1 diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py new file mode 100755 index 0000000000..ed939b31ed --- /dev/null +++ b/bindings/python/test_alpha.py @@ -0,0 +1,61 @@ +#!/usr/bin/env python + +from __future__ import print_function +from capstone import * +from capstone.alpha import * +from xprint import to_x, to_hex + +ALPHA_CODE = b'\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5' \ + b'\x0f\x04\xfeG\xfe\xff=$\x90\x86A\x8d\x10\x00O\x9d\xfe\xff=$\x98' \ + b'\x86A\x89\x18\x00O\x99\x10\x00O\x8d \x00O\x9d\x18\x00O\x89(\x00O'\ + b'\x99(\x00O\x89\x8b\xd5\xea[\x00\x00\x00` \x00O\x8e\x11\x04k]\xfe'\ + b'\xff=$x\x86\x01"\x08\x80}\xa7\x00@[k\x02\x00\xba\'\xecy\xbd#\xfe'\ + b'\xff=$\x81\x86\x01"\x08\x80}\xa7\x00@[k\x02\x00\xba\'\xd4y\xbd#' \ + b'\x1f\x04\xffG\x1e\x04\xefG\x00\x00^\xa7\x08\x00\xfe\xa50\x00\xde'\ + b'#\x01\x80\xfak' + +all_tests = ( + (CS_ARCH_ALPHA, 0, ALPHA_CODE, "Alpha"), +) + + +def print_insn_detail(insn): + # print address, mnemonic and operands + print("0x%x:\t%s\t%s" % (insn.address, insn.mnemonic, insn.op_str)) + + # "data" instruction generated by SKIPDATA option has no detail + if insn.id == 0: + return + + if len(insn.operands) > 0: + print("\top_count: %u" % len(insn.operands)) + c = 0 + for i in insn.operands: + if i.type == ALPHA_OP_REG: + print("\t\toperands[%u].type: REG = %s" % (c, insn.reg_name(i.reg))) + if i.type == ALPHA_OP_IMM: + print("\t\toperands[%u].type: IMM = 0x%s" % (c, to_x(i.imm))) + c += 1 + + +# ## Test class Cs +def test_class(): + for (arch, mode, code, comment) in all_tests: + print("*" * 16) + print("Platform: %s" % comment) + print("Code: %s" % to_hex(code)) + print("Disasm:") + + try: + md = Cs(arch, mode) + md.detail = True + for insn in md.disasm(code, 0x1000): + print_insn_detail(insn) + print() + print("0x%x:\n" % (insn.address + insn.size)) + except CsError as e: + print("ERROR: %s" % e) + + +if __name__ == '__main__': + test_class() diff --git a/config.mk b/config.mk index a098de44f3..65ba9a0fcc 100644 --- a/config.mk +++ b/config.mk @@ -4,7 +4,7 @@ ################################################################################ # Specify which archs you want to compile in. By default, we build all archs. -CAPSTONE_ARCHS ?= arm aarch64 m68k mips powerpc sparc systemz x86 xcore tms320c64x m680x evm riscv mos65xx wasm bpf sh tricore +CAPSTONE_ARCHS ?= arm aarch64 m68k mips powerpc sparc systemz x86 xcore tms320c64x m680x evm riscv mos65xx wasm bpf sh tricore alpha ################################################################################ diff --git a/cs.c b/cs.c index 94424cb1a4..7fbe48fe86 100644 --- a/cs.c +++ b/cs.c @@ -70,6 +70,7 @@ #include "arch/BPF/BPFModule.h" #include "arch/SH/SHModule.h" #include "arch/TriCore/TriCoreModule.h" +#include "arch/Alpha/AlphaModule.h" static const struct { // constructor initialization @@ -255,6 +256,15 @@ static const struct { #else { NULL, NULL, 0 }, #endif +#ifdef CAPSTONE_HAS_ALPHA + { + ALPHA_global_init, + ALPHA_option, + 0, + }, +#else + { NULL, NULL, 0 }, +#endif }; // bitmask of enabled architectures @@ -313,6 +323,9 @@ static const uint32_t all_arch = 0 #ifdef CAPSTONE_HAS_TRICORE | (1 << CS_ARCH_TRICORE) #endif +#ifdef CAPSTONE_HAS_ALPHA + | (1 << CS_ARCH_ALPHA) +#endif ; @@ -387,7 +400,8 @@ bool CAPSTONE_API cs_support(int query) (1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM) | (1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX) | (1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF) | - (1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE)); + (1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE) | + (1 << CS_ARCH_ALPHA)); if ((unsigned int)query < CS_ARCH_MAX) return all_arch & (1 << query); @@ -718,6 +732,9 @@ static uint8_t skipdata_size(cs_struct *handle) // TriCore instruction's length can be 2 or 4 bytes, // so we just skip 2 bytes return 2; + case CS_ARCH_ALPHA: + // Alpha alignment is 4. + return 4; } } @@ -1454,6 +1471,11 @@ int CAPSTONE_API cs_op_count(csh ud, const cs_insn *insn, unsigned int op_type) if (insn->detail->tricore.operands[i].type == (tricore_op_type)op_type) count++; break; + case CS_ARCH_ALPHA: + for (i = 0; i < insn->detail->alpha.op_count; i++) + if (insn->detail->alpha.operands[i].type == (alpha_op_type)op_type) + count++; + break; } return count; @@ -1637,6 +1659,14 @@ int CAPSTONE_API cs_op_index(csh ud, const cs_insn *insn, unsigned int op_type, return i; } break; + case CS_ARCH_ALPHA: + for (i = 0; i < insn->detail->alpha.op_count; i++) { + if (insn->detail->alpha.operands[i].type == (alpha_op_type)op_type) + count++; + if (count == post) + return i; + } + break; } return -1; diff --git a/cstool/cstool.c b/cstool/cstool.c index 2240ce1326..053e41e118 100644 --- a/cstool/cstool.c +++ b/cstool/cstool.c @@ -114,6 +114,7 @@ static struct { { "tc160", CS_ARCH_TRICORE, CS_MODE_TRICORE_160 }, { "tc161", CS_ARCH_TRICORE, CS_MODE_TRICORE_161 }, { "tc162", CS_ARCH_TRICORE, CS_MODE_TRICORE_162 }, + { "alpha", CS_ARCH_ALPHA, 0 }, { NULL } }; @@ -320,6 +321,10 @@ static void usage(char *prog) printf(" tc162 tricore V1.6.2\n"); } + if (cs_support(CS_ARCH_ALPHA)) { + printf(" alpha: Alpha\n"); + } + printf("\nExtra options:\n"); printf(" -d show detailed information of the instructions\n"); printf(" -r show detailed information of the real instructions (even for alias)\n"); @@ -392,6 +397,9 @@ static void print_details(csh handle, cs_arch arch, cs_mode md, cs_insn *ins) case CS_ARCH_TRICORE: print_insn_detail_tricore(handle, ins); break; + case CS_ARCH_ALPHA: + print_insn_detail_alpha(handle, ins); + break; default: break; } @@ -528,6 +536,10 @@ int main(int argc, char **argv) printf("tricore=1 "); } + if (cs_support(CS_ARCH_ALPHA)) { + printf("alpha=1 "); + } + printf("\n"); return 0; case 'h': diff --git a/cstool/cstool.h b/cstool/cstool.h index 195d9e33d6..076c7b604e 100644 --- a/cstool/cstool.h +++ b/cstool/cstool.h @@ -19,5 +19,6 @@ void print_insn_detail_mos65xx(csh handle, cs_insn *ins); void print_insn_detail_bpf(csh handle, cs_insn *ins); void print_insn_detail_sh(csh handle, cs_insn *ins); void print_insn_detail_tricore(csh handle, cs_insn *ins); +void print_insn_detail_alpha(csh handle, cs_insn *ins); #endif //CAPSTONE_CSTOOL_CSTOOL_H_ diff --git a/cstool/cstool_alpha.c b/cstool/cstool_alpha.c new file mode 100644 index 0000000000..34e984a17e --- /dev/null +++ b/cstool/cstool_alpha.c @@ -0,0 +1,62 @@ +#include +#include + +#include + +void print_insn_detail_alpha(csh handle, cs_insn *ins) +{ + cs_alpha *alpha; + int i; + cs_regs regs_read, regs_write; + uint8_t regs_read_count, regs_write_count; + + // detail can be NULL on "data" instruction if SKIPDATA option is turned ON + if (ins->detail == NULL) + return; + + alpha = &(ins->detail->alpha); + + if (alpha->op_count) + printf("\top_count: %u\n", alpha->op_count); + + for (i = 0; i < alpha->op_count; i++) { + cs_alpha_op *op = &(alpha->operands[i]); + switch ((int)op->type) { + default: + break; + case ALPHA_OP_REG: + printf("\t\toperands[%u].type: REG = %s\n", i, + cs_reg_name(handle, op->reg)); + break; + case ALPHA_OP_IMM: + printf("\t\toperands[%u].type: IMM = 0x%x\n", i, + op->imm); + break; + } + + // Print out all registers accessed by this instruction (either implicit or + // explicit) + if (!cs_regs_access(handle, ins, regs_read, ®s_read_count, + regs_write, ®s_write_count)) { + if (regs_read_count) { + printf("\tRegisters read:"); + for (i = 0; i < regs_read_count; i++) { + printf(" %s", + cs_reg_name(handle, + regs_read[i])); + } + printf("\n"); + } + + if (regs_write_count) { + printf("\tRegisters modified:"); + for (i = 0; i < regs_write_count; i++) { + printf(" %s", + cs_reg_name(handle, + regs_write[i])); + } + printf("\n"); + } + } + } +} \ No newline at end of file diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h new file mode 100644 index 0000000000..5dd2fb75d4 --- /dev/null +++ b/include/capstone/alpha.h @@ -0,0 +1,280 @@ +#ifndef CAPSTONE_ALPHA_H +#define CAPSTONE_ALPHA_H + +/* Capstone Disassembly Engine */ +/* By Nguyen Anh Quynh , 2014 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#if !defined(_MSC_VER) || !defined(_KERNEL_MODE) +#include +#endif + +#include "../../cs_operand.h" +#include "platform.h" + +#ifdef _MSC_VER +#pragma warning(disable : 4201) +#endif + +//> Operand type for instruction's operands +typedef enum alpha_op_type { + ALPHA_OP_INVALID = CS_OP_INVALID, ///< CS_OP_INVALID (Uninitialized). + ALPHA_OP_REG = CS_OP_REG, ///< CS_OP_REG (Register operand). + ALPHA_OP_IMM = CS_OP_IMM, ///< CS_OP_IMM (Immediate operand). +} alpha_op_type; + +// Instruction operand +typedef struct cs_alpha_op { + alpha_op_type type; // operand type + union { + unsigned int reg; // register value for REG operand + int32_t imm; // immediate value for IMM operand + }; +} cs_alpha_op; + +// Instruction structure +typedef struct cs_alpha { + // Number of operands of this instruction, + // or 0 when instruction has no operand. + uint8_t op_count; + cs_alpha_op operands[8]; // operands for this instruction. +} cs_alpha; + + +//> Alpha registers +typedef enum alpha_reg { + // generated content begin + // clang-format off + + Alpha_REG_INVALID = 0, + Alpha_REG_F0 = 1, + Alpha_REG_F1 = 2, + Alpha_REG_F2 = 3, + Alpha_REG_F3 = 4, + Alpha_REG_F4 = 5, + Alpha_REG_F5 = 6, + Alpha_REG_F6 = 7, + Alpha_REG_F7 = 8, + Alpha_REG_F8 = 9, + Alpha_REG_F9 = 10, + Alpha_REG_F10 = 11, + Alpha_REG_F11 = 12, + Alpha_REG_F12 = 13, + Alpha_REG_F13 = 14, + Alpha_REG_F14 = 15, + Alpha_REG_F15 = 16, + Alpha_REG_F16 = 17, + Alpha_REG_F17 = 18, + Alpha_REG_F18 = 19, + Alpha_REG_F19 = 20, + Alpha_REG_F20 = 21, + Alpha_REG_F21 = 22, + Alpha_REG_F22 = 23, + Alpha_REG_F23 = 24, + Alpha_REG_F24 = 25, + Alpha_REG_F25 = 26, + Alpha_REG_F26 = 27, + Alpha_REG_F27 = 28, + Alpha_REG_F28 = 29, + Alpha_REG_F29 = 30, + Alpha_REG_F30 = 31, + Alpha_REG_F31 = 32, + Alpha_REG_R0 = 33, + Alpha_REG_R1 = 34, + Alpha_REG_R2 = 35, + Alpha_REG_R3 = 36, + Alpha_REG_R4 = 37, + Alpha_REG_R5 = 38, + Alpha_REG_R6 = 39, + Alpha_REG_R7 = 40, + Alpha_REG_R8 = 41, + Alpha_REG_R9 = 42, + Alpha_REG_R10 = 43, + Alpha_REG_R11 = 44, + Alpha_REG_R12 = 45, + Alpha_REG_R13 = 46, + Alpha_REG_R14 = 47, + Alpha_REG_R15 = 48, + Alpha_REG_R16 = 49, + Alpha_REG_R17 = 50, + Alpha_REG_R18 = 51, + Alpha_REG_R19 = 52, + Alpha_REG_R20 = 53, + Alpha_REG_R21 = 54, + Alpha_REG_R22 = 55, + Alpha_REG_R23 = 56, + Alpha_REG_R24 = 57, + Alpha_REG_R25 = 58, + Alpha_REG_R26 = 59, + Alpha_REG_R27 = 60, + Alpha_REG_R28 = 61, + Alpha_REG_R29 = 62, + Alpha_REG_R30 = 63, + Alpha_REG_R31 = 64, + Alpha_REG_ENDING, // 65 + + // clang-format on + // generated content end +} alpha_reg; + +//> Alpha instruction +typedef enum alpha_insn { + // generated content begin + // clang-format off + + Alpha_INS_INVALID, + Alpha_INS_ADDL, + Alpha_INS_ADDQ, + Alpha_INS_ADDSsSU, + Alpha_INS_ADDTsSU, + Alpha_INS_AND, + Alpha_INS_BEQ, + Alpha_INS_BGE, + Alpha_INS_BGT, + Alpha_INS_BIC, + Alpha_INS_BIS, + Alpha_INS_BLBC, + Alpha_INS_BLBS, + Alpha_INS_BLE, + Alpha_INS_BLT, + Alpha_INS_BNE, + Alpha_INS_BR, + Alpha_INS_BSR, + Alpha_INS_CMOVEQ, + Alpha_INS_CMOVGE, + Alpha_INS_CMOVGT, + Alpha_INS_CMOVLBC, + Alpha_INS_CMOVLBS, + Alpha_INS_CMOVLE, + Alpha_INS_CMOVLT, + Alpha_INS_CMOVNE, + Alpha_INS_CMPBGE, + Alpha_INS_CMPEQ, + Alpha_INS_CMPLE, + Alpha_INS_CMPLT, + Alpha_INS_CMPTEQsSU, + Alpha_INS_CMPTLEsSU, + Alpha_INS_CMPTLTsSU, + Alpha_INS_CMPTUNsSU, + Alpha_INS_CMPULE, + Alpha_INS_CMPULT, + Alpha_INS_COND_BRANCH, + Alpha_INS_CPYSE, + Alpha_INS_CPYSN, + Alpha_INS_CPYS, + Alpha_INS_CTLZ, + Alpha_INS_CTPOP, + Alpha_INS_CTTZ, + Alpha_INS_CVTQSsSUI, + Alpha_INS_CVTQTsSUI, + Alpha_INS_CVTSTsS, + Alpha_INS_CVTTQsSVC, + Alpha_INS_CVTTSsSUI, + Alpha_INS_DIVSsSU, + Alpha_INS_DIVTsSU, + Alpha_INS_EQV, + Alpha_INS_EXTBL, + Alpha_INS_EXTLL, + Alpha_INS_EXTWL, + Alpha_INS_FBEQ, + Alpha_INS_FBGE, + Alpha_INS_FBGT, + Alpha_INS_FBLE, + Alpha_INS_FBLT, + Alpha_INS_FBNE, + Alpha_INS_FCMOVEQ, + Alpha_INS_FCMOVGE, + Alpha_INS_FCMOVGT, + Alpha_INS_FCMOVLE, + Alpha_INS_FCMOVLT, + Alpha_INS_FCMOVNE, + Alpha_INS_FTOIS, + Alpha_INS_FTOIT, + Alpha_INS_ITOFS, + Alpha_INS_ITOFT, + Alpha_INS_JMP, + Alpha_INS_JSR, + Alpha_INS_JSR_COROUTINE, + Alpha_INS_LDA, + Alpha_INS_LDAH, + Alpha_INS_LDBU, + Alpha_INS_LDL, + Alpha_INS_LDLsL, + Alpha_INS_LDQ, + Alpha_INS_LDQsL, + Alpha_INS_LDS, + Alpha_INS_LDT, + Alpha_INS_LDWU, + Alpha_INS_MB, + Alpha_INS_MULL, + Alpha_INS_MULQ, + Alpha_INS_MULSsSU, + Alpha_INS_MULTsSU, + Alpha_INS_ORNOT, + Alpha_INS_RET, + Alpha_INS_RPCC, + Alpha_INS_S4ADDL, + Alpha_INS_S4ADDQ, + Alpha_INS_S4SUBL, + Alpha_INS_S4SUBQ, + Alpha_INS_S8ADDL, + Alpha_INS_S8ADDQ, + Alpha_INS_S8SUBL, + Alpha_INS_S8SUBQ, + Alpha_INS_SEXTB, + Alpha_INS_SEXTW, + Alpha_INS_SLL, + Alpha_INS_SQRTSsSU, + Alpha_INS_SQRTTsSU, + Alpha_INS_SRA, + Alpha_INS_SRL, + Alpha_INS_STB, + Alpha_INS_STL, + Alpha_INS_STLsL, + Alpha_INS_STQ, + Alpha_INS_STQsL, + Alpha_INS_STS, + Alpha_INS_STT, + Alpha_INS_STW, + Alpha_INS_SUBL, + Alpha_INS_SUBQ, + Alpha_INS_SUBSsSU, + Alpha_INS_SUBTsSU, + Alpha_INS_UMULH, + Alpha_INS_WMB, + Alpha_INS_XOR, + Alpha_INS_ZAPNOT, + + // clang-format on + // generated content end + ALPHA_INS_ENDING, // <-- mark the end of the list of instructions +} alpha_insn; + +//> Group of Alpha instructions +typedef enum alpha_insn_group { + Alpha_GRP_INVALID, ///< = CS_GRP_INVALID + //> Generic groups + Alpha_GRP_CALL, ///< = CS_GRP_CALL + Alpha_GRP_JUMP, ///< = CS_GRP_JUMP + Alpha_GRP_ENDING, ///< = mark the end of the list of groups +} alpha_insn_group; + +typedef enum alpha_feature_t { + ALPHA_FEATURE_INVALID = 0, + // generated content begin + // clang-format off + + + // clang-format on + // generated content end + ALPHA_FEATURE_ENDING, // <-- mark the end of the list of features +} alpha_feature; + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/include/capstone/capstone.h b/include/capstone/capstone.h index 7ca26531a7..f3883ddc2d 100644 --- a/include/capstone/capstone.h +++ b/include/capstone/capstone.h @@ -144,6 +144,7 @@ typedef enum cs_arch { CS_ARCH_RISCV, ///< RISCV architecture CS_ARCH_SH, ///< SH architecture CS_ARCH_TRICORE, ///< TriCore architecture + CS_ARCH_ALPHA, ///< Alpha architecture CS_ARCH_MAX, CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support() } cs_arch; @@ -364,6 +365,7 @@ typedef struct cs_opt_skipdata { #include "bpf.h" #include "sh.h" #include "tricore.h" +#include "alpha.h" #define MAX_IMPL_W_REGS 20 #define MAX_IMPL_R_REGS 20 @@ -408,6 +410,7 @@ typedef struct cs_detail { cs_riscv riscv; ///< RISCV architecture cs_sh sh; ///< SH architecture cs_tricore tricore; ///< TriCore architecture + cs_alpha alpha; ///< Alpha architecture }; } cs_detail; diff --git a/suite/capstone_get_setup.c b/suite/capstone_get_setup.c index 5f749591c6..2d3f6a6bba 100644 --- a/suite/capstone_get_setup.c +++ b/suite/capstone_get_setup.c @@ -73,6 +73,9 @@ int main() if (cs_support(CS_ARCH_TRICORE)) { printf("tricore=1 "); } + if (cs_support(CS_ARCH_ALPHA)) { + printf("alpha=1 "); + } printf("\n"); return 0; diff --git a/suite/cstest/include/factory.h b/suite/cstest/include/factory.h index ffc1a938bc..09906b8c81 100644 --- a/suite/cstest/include/factory.h +++ b/suite/cstest/include/factory.h @@ -24,5 +24,6 @@ char *get_detail_mos65xx(csh *handle, cs_mode mode, cs_insn *ins); char *get_detail_tms320c64x(csh *handle, cs_mode mode, cs_insn *ins); char *get_detail_bpf(csh *handle, cs_mode mode, cs_insn *ins); char *get_detail_tricore(csh *handle, cs_mode mode, cs_insn *ins); +char *get_detail_alpha(csh *handle, cs_mode mode, cs_insn *ins); #endif /* FACTORY_H */ diff --git a/suite/cstest/src/alpha_detail.c b/suite/cstest/src/alpha_detail.c new file mode 100644 index 0000000000..c8a8132e73 --- /dev/null +++ b/suite/cstest/src/alpha_detail.c @@ -0,0 +1,66 @@ +#include "factory.h" + +char *get_detail_alpha(csh *p_handle, cs_mode mode, cs_insn *ins) +{ + cs_alpha *alpha; + int i; + cs_regs regs_read, regs_write; + uint8_t regs_read_count, regs_write_count; + + char *result; + result = (char *)malloc(sizeof(char)); + result[0] = '\0'; + + if (ins->detail == NULL) + return result; + + csh handle = *p_handle; + + alpha = &(ins->detail->alpha); + + if (alpha->op_count) + add_str(&result, "\top_count: %u\n", alpha->op_count); + + for (i = 0; i < alpha->op_count; i++) { + cs_alpha_op *op = &(alpha->operands[i]); + switch ((int)op->type) { + default: + break; + case ALPHA_OP_REG: + add_str(&result, "\t\toperands[%u].type: REG = %s\n", i, + cs_reg_name(handle, op->reg)); + break; + case ALPHA_OP_IMM: + add_str(&result, "\t\toperands[%u].type: IMM = 0x%x\n", + i, op->imm); + break; + } + + // Print out all registers accessed by this instruction (either implicit or + // explicit) + if (!cs_regs_access(handle, ins, regs_read, ®s_read_count, + regs_write, ®s_write_count)) { + if (regs_read_count) { + add_str(&result, "\tRegisters read:"); + for (i = 0; i < regs_read_count; i++) { + add_str(&result, " %s", + cs_reg_name(handle, + regs_read[i])); + } + add_str(&result, "\n"); + } + + if (regs_write_count) { + add_str(&result, "\tRegisters modified:"); + for (i = 0; i < regs_write_count; i++) { + add_str(&result, " %s", + cs_reg_name(handle, + regs_write[i])); + } + add_str(&result, "\n"); + } + } + } + + return result; +} diff --git a/suite/cstest/src/capstone_test.c b/suite/cstest/src/capstone_test.c index e282756e83..3178abcbfe 100644 --- a/suite/cstest/src/capstone_test.c +++ b/suite/cstest/src/capstone_test.c @@ -190,6 +190,10 @@ int set_function(int arch) case CS_ARCH_TRICORE: function = get_detail_tricore; break; + case CS_ARCH_ALPHA: + function = get_detail_alpha; + break; + default: default: return -1; } diff --git a/suite/cstest/src/main.c b/suite/cstest/src/main.c index 88a0425091..a4a681f2fd 100644 --- a/suite/cstest/src/main.c +++ b/suite/cstest/src/main.c @@ -21,6 +21,7 @@ static single_dict arches[] = { {"CS_ARCH_BPF", CS_ARCH_BPF}, {"CS_ARCH_RISCV", CS_ARCH_RISCV}, {"CS_ARCH_TRICORE", CS_ARCH_TRICORE}, + {"CS_ARCH_ALPHA", CS_ARCH_ALPHA}, }; static single_dict modes[] = { diff --git a/suite/test_c.sh b/suite/test_c.sh index cc7359a347..eacbf3b954 100755 --- a/suite/test_c.sh +++ b/suite/test_c.sh @@ -23,4 +23,5 @@ ../tests/test_wasm > /tmp/$1 ../tests/test_winkernel > /tmp/$1 ../tests/test_x86 > /tmp/$1 -../tests/test_xcore > /tmp/$1 \ No newline at end of file +../tests/test_xcore > /tmp/$1 +../tests/test_alpha > /tmp/$1 \ No newline at end of file diff --git a/suite/test_corpus.py b/suite/test_corpus.py index aa75276b34..7780062885 100755 --- a/suite/test_corpus.py +++ b/suite/test_corpus.py @@ -33,6 +33,7 @@ def test_file(fname): "CS_ARCH_XCORE": CS_ARCH_XCORE, "CS_ARCH_RISCV": CS_ARCH_RISCV, "CS_ARCH_TRICORE": CS_ARCH_TRICORE, + "CS_ARCH_ALPHA": CS_ARCH_ALPHA, } modes = { diff --git a/suite/test_corpus3.py b/suite/test_corpus3.py index b58c4a8d2c..d571137846 100755 --- a/suite/test_corpus3.py +++ b/suite/test_corpus3.py @@ -43,6 +43,7 @@ def test_file(fname): "CS_ARCH_XCORE": CS_ARCH_XCORE, "CS_ARCH_RISCV": CS_ARCH_RISCV, "CS_ARCH_TRICORE": CS_ARCH_TRICORE, + "CS_ARCH_ALPHA": CS_ARCH_ALPHA, } modes = { diff --git a/suite/test_python.sh b/suite/test_python.sh index 90145629a9..e95aa31a84 100755 --- a/suite/test_python.sh +++ b/suite/test_python.sh @@ -11,3 +11,4 @@ ../bindings/python/test_ppc.py >> /tmp/$1 ../bindings/python/test_sparc.py >> /tmp/$1 ../bindings/python/test_x86.py >> /tmp/$1 +../bindings/python/test_alpha.py >> /tmp/$1 \ No newline at end of file diff --git a/tests/test_alpha.c b/tests/test_alpha.c new file mode 100644 index 0000000000..efbfbfb0ce --- /dev/null +++ b/tests/test_alpha.c @@ -0,0 +1,132 @@ +#include + +#include +#include + +struct platform { + cs_arch arch; + cs_mode mode; + unsigned char *code; + size_t size; + char *comment; +}; + +static csh handle; + +static void print_string_hex(char *comment, unsigned char *str, size_t len) +{ + unsigned char *c; + + printf("%s", comment); + for (c = str; c < str + len; c++) { + printf("0x%02x ", *c & 0xff); + } + + printf("\n"); +} + +static void print_insn_detail(cs_insn *ins) +{ + cs_alpha *alpha; + int i; + + // detail can be NULL on "data" instruction if SKIPDATA option is turned ON + if (ins->detail == NULL) + return; + + alpha = &(ins->detail->alpha); + if (alpha->op_count) + printf("\top_count: %u\n", alpha->op_count); + + for (i = 0; i < alpha->op_count; i++) { + cs_alpha_op *op = &(alpha->operands[i]); + switch ((int)op->type) { + default: + break; + case ALPHA_OP_REG: + printf("\t\toperands[%u].type: REG = %s\n", i, + cs_reg_name(handle, op->reg)); + break; + case ALPHA_OP_IMM: + printf("\t\toperands[%u].type: IMM = 0x%x\n", i, + op->imm); + break; + } + } + + printf("\n"); +} + +static void test() +{ +#define ALPHA_CODE \ + "\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5" + + struct platform platforms[] = { + { + CS_ARCH_ALPHA, + 0, + (unsigned char *)ALPHA_CODE, + sizeof(ALPHA_CODE) - 1, + "Alpha", + }, + }; + + uint64_t address = 0x1000; + cs_insn *insn; + int i; + size_t count; + + for (i = 0; i < sizeof(platforms) / sizeof(platforms[0]); i++) { + cs_err err = + cs_open(platforms[i].arch, platforms[i].mode, &handle); + if (err) { + printf("Failed on cs_open() with error returned: %u\n", + err); + continue; + } + + cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON); + + count = cs_disasm(handle, platforms[i].code, platforms[i].size, + address, 0, &insn); + if (count) { + size_t j; + + printf("****************\n"); + printf("Platform: %s\n", platforms[i].comment); + print_string_hex("Code:", platforms[i].code, + platforms[i].size); + printf("Disasm:\n"); + + for (j = 0; j < count; j++) { + printf("0x%" PRIx64 ":\t%s\t%s\n", + insn[j].address, insn[j].mnemonic, + insn[j].op_str); + print_insn_detail(&insn[j]); + } + printf("0x%" PRIx64 ":\n", + insn[j - 1].address + insn[j - 1].size); + + // free memory allocated by cs_disasm() + cs_free(insn, count); + } else { + printf("****************\n"); + printf("Platform: %s\n", platforms[i].comment); + print_string_hex("Code:", platforms[i].code, + platforms[i].size); + printf("ERROR: Failed to disasm given code!\n"); + } + + printf("\n"); + + cs_close(&handle); + } +} + +int main() +{ + test(); + + return 0; +} diff --git a/tests/test_iter.c b/tests/test_iter.c index be877a31e5..38102963c6 100644 --- a/tests/test_iter.c +++ b/tests/test_iter.c @@ -79,6 +79,10 @@ static void test() #define TRICORE_CODE "\x16\x01\x20\x01\x1d\x00\x02\x00\x8f\x70\x00\x11\x40\xae\x89\xee\x04\x09\x42\xf2\xe2\xf2\xc2\x11\x19\xff\xc0\x70\x19\xff\x20\x10" #endif +#ifdef CAPSTONE_HAS_ALPHA +#define ALPHA_CODE "\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5'" +#endif + struct platform platforms[] = { #ifdef CAPSTONE_HAS_X86 { @@ -261,6 +265,15 @@ struct platform platforms[] = { sizeof(TRICORE_CODE) - 1, "TriCore" }, +#endif +#ifdef CAPSTONE_HAS_ALPHA + { + CS_ARCH_ALPHA, + 0, + (unsigned char*)ALPHA_CODE, + sizeof(ALPHA_CODE) - 1, + "Alpha" + }, #endif }; From 334b853a049fda7cdc19a9668eb7e9e458621185 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Thu, 6 Jul 2023 14:36:45 +0300 Subject: [PATCH 02/26] Update Alpha files --- CMakeLists.txt | 2 +- arch/Alpha/AlphaDisassembler.c | 26 +++++++-------------- arch/Alpha/AlphaDisassembler.h | 3 +++ arch/Alpha/AlphaGenSystemRegister.inc | 13 ----------- arch/Alpha/AlphaInstPrinter.c | 20 ++++++++-------- arch/Alpha/AlphaInstPrinter.h | 15 ------------ arch/Alpha/AlphaLinkage.h | 18 +++++++++++++++ arch/Alpha/AlphaMapping.c | 33 ++++++++++++++++----------- arch/Alpha/AlphaMapping.h | 6 +++++ arch/Alpha/AlphaModule.c | 6 +++-- arch/Alpha/AlphaModule.h | 3 +++ bindings/python/test_alpha.py | 2 +- include/capstone/alpha.h | 4 +++- include/capstone/capstone.h | 2 +- 14 files changed, 77 insertions(+), 76 deletions(-) delete mode 100644 arch/Alpha/AlphaGenSystemRegister.inc delete mode 100644 arch/Alpha/AlphaInstPrinter.h create mode 100644 arch/Alpha/AlphaLinkage.h diff --git a/CMakeLists.txt b/CMakeLists.txt index da633f64ad..0a7ba4607a 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -584,7 +584,7 @@ if (CAPSTONE_ALPHA_SUPPORT) arch/Alpha/AlphaGenDisassemblerTables.inc arch/Alpha/AlphaGenInstrInfo.inc arch/Alpha/AlphaGenRegisterInfo.inc - arch/Alpha/AlphaInstPrinter.h + arch/Alpha/AlphaLinkage.h arch/Alpha/AlphaMapping.h arch/Alpha/AlphaModule.h ) diff --git a/arch/Alpha/AlphaDisassembler.c b/arch/Alpha/AlphaDisassembler.c index 217b69dfcc..5e28f31157 100644 --- a/arch/Alpha/AlphaDisassembler.c +++ b/arch/Alpha/AlphaDisassembler.c @@ -1,3 +1,6 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifdef CAPSTONE_HAS_ALPHA #include // DEBUG @@ -9,19 +12,8 @@ #include "../../MCFixedLenDisassembler.h" #include "../../MCDisassembler.h" -static bool readInstruction32(const uint8_t *code, size_t code_len, - uint32_t *insn) -{ - if (code_len < 4) - // insufficient data - return false; - - // Encoded as a little-endian 32-bit word in the stream. - *insn = (code[0] << 0) | (code[1] << 8) | (code[2] << 16) | - (code[3] << 24); - - return true; -} +#include "AlphaDisassembler.h" +#include "AlphaLinkage.h" static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, uint64_t Address, @@ -87,13 +79,11 @@ static inline bool tryGetInstruction32(const uint8_t *code, size_t code_len, uint64_t address, void *info, const uint8_t *decoderTable32) { - uint32_t insn32; + uint32_t insn = readBytes32(MI, code); DecodeStatus Result; - if (!readInstruction32(code, code_len, &insn32)) { - return false; - } + // Calling the auto-generated decoder function. - Result = decodeInstruction_4(decoderTable32, MI, insn32, address, NULL); + Result = decodeInstruction_4(decoderTable32, MI, insn, address, NULL); if (Result != MCDisassembler_Fail) { *size = 4; return true; diff --git a/arch/Alpha/AlphaDisassembler.h b/arch/Alpha/AlphaDisassembler.h index 5180b284bf..9bc20c9dc8 100644 --- a/arch/Alpha/AlphaDisassembler.h +++ b/arch/Alpha/AlphaDisassembler.h @@ -1,3 +1,6 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifndef CS_ALPHADISASSEMBLER_H #define CS_ALPHADISASSEMBLER_H diff --git a/arch/Alpha/AlphaGenSystemRegister.inc b/arch/Alpha/AlphaGenSystemRegister.inc deleted file mode 100644 index eb573a2ff4..0000000000 --- a/arch/Alpha/AlphaGenSystemRegister.inc +++ /dev/null @@ -1,13 +0,0 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ -/* By Nguyen Anh Quynh , 2013-2022, */ -/* Rot127 2022-2023 */ -/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ - -/* LLVM-commit: 0xdeadbeef */ -/* LLVM-tag: */ - -/* Do not edit. */ - -/* Capstone's LLVM TableGen Backends: */ -/* https://github.com/capstone-engine/llvm-capstone */ - diff --git a/arch/Alpha/AlphaInstPrinter.c b/arch/Alpha/AlphaInstPrinter.c index 25ea74d9a3..cfaca2b9d4 100644 --- a/arch/Alpha/AlphaInstPrinter.c +++ b/arch/Alpha/AlphaInstPrinter.c @@ -1,3 +1,6 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifdef CAPSTONE_HAS_ALPHA #include @@ -6,23 +9,17 @@ #include #include "../../utils.h" -#include "AlphaInstPrinter.h" -#include "AlphaMapping.h" #include "../../MCInstPrinter.h" +#include "AlphaLinkage.h" +#include "AlphaMapping.h" + static const char *getRegisterName(unsigned RegNo); static void printInstruction(MCInst *, uint64_t, SStream *); static void printOperand(MCInst *MI, int OpNum, SStream *O); -void Alpha_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci) -{ - /* - if (((cs_struct *)ud)->detail != CS_OPT_ON) - return; - */ -} #define GET_INSTRINFO_ENUM @@ -85,7 +82,7 @@ static void printOperand(MCInst *MI, int OpNum, SStream *O) #include "AlphaGenAsmWriter.inc" -const char *Alpha_getRegisterName(csh handle, unsigned int id) +const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET return getRegisterName(id); @@ -94,8 +91,9 @@ const char *Alpha_getRegisterName(csh handle, unsigned int id) #endif } -void Alpha_printInst(MCInst *MI, SStream *O, void *Info) +void Alpha_LLVM_printInst(MCInst *MI, SStream *O, void *Info) { + printAliasInstr(MI, MI->address, O); printInstruction(MI, MI->address, O); } diff --git a/arch/Alpha/AlphaInstPrinter.h b/arch/Alpha/AlphaInstPrinter.h deleted file mode 100644 index 1abce19274..0000000000 --- a/arch/Alpha/AlphaInstPrinter.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef CS_ALPHAINSTPRINTER_H -#define CS_ALPHAINSTPRINTER_H - -#include "../../MCInst.h" -#include "../../MCRegisterInfo.h" -#include "../../SStream.h" -#include "AlphaMapping.h" - -const char *Alpha_getRegisterName(csh handle, unsigned int id); - -void Alpha_printInst(MCInst *MI, SStream *O, void *Info); - -void Alpha_post_printer(csh ud, cs_insn *insn, char *insn_asm, MCInst *mci); - -#endif // CS_ALPHAINSTPRINTER_H \ No newline at end of file diff --git a/arch/Alpha/AlphaLinkage.h b/arch/Alpha/AlphaLinkage.h new file mode 100644 index 0000000000..22868aee32 --- /dev/null +++ b/arch/Alpha/AlphaLinkage.h @@ -0,0 +1,18 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + +#ifndef CS_ALPHA_LINKAGE_H +#define CS_ALPHA_LINKAGE_H + +// Function defintions to call static LLVM functions. + +#include "../../MCInst.h" +#include "../../MCRegisterInfo.h" +#include "../../SStream.h" +#include "AlphaMapping.h" + +const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id); + +void Alpha_LLVM_printInst(MCInst *MI, SStream *O, void *Info); + +#endif // CS_ALPHA_LINKAGE_H \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c index f513177f72..bd19ba6bda 100644 --- a/arch/Alpha/AlphaMapping.c +++ b/arch/Alpha/AlphaMapping.c @@ -1,12 +1,16 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifdef CAPSTONE_HAS_ALPHA #include // debug #include +#include "../../Mapping.h" #include "../../utils.h" +#include "AlphaLinkage.h" #include "AlphaMapping.h" -#include "../../Mapping.h" #define GET_INSTRINFO_ENUM @@ -77,18 +81,13 @@ static name_map alias_insn_names[] = { { 0, NULL } }; const char *Alpha_insn_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET - unsigned int i; - if (id >= ALPHA_INS_ENDING) return NULL; - // handle special alias first - for (i = 0; i < ARR_SIZE(alias_insn_names); i++) { - if (alias_insn_names[i].id == id) - return alias_insn_names[i].name; - } + if (id < ARR_SIZE(insn_names)) + return insn_names[id]; - return insn_names[id]; + return NULL; #else return NULL; #endif @@ -105,13 +104,21 @@ static name_map group_name_maps[] = { const char *Alpha_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET - if (id >= Alpha_GRP_ENDING) - return NULL; - - return group_name_maps[id].name; + id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif } +const char *Alpha_getRegisterName(csh handle, unsigned int id) +{ + return Alpha_LLVM_getRegisterName(handle, id); +} + +void Alpha_printInst(MCInst *MI, SStream *O, void *Info) +{ + return Alpha_LLVM_printInst(MI, O, Info); +} + + #endif \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.h b/arch/Alpha/AlphaMapping.h index 6b583698d2..f1d583ffd6 100644 --- a/arch/Alpha/AlphaMapping.h +++ b/arch/Alpha/AlphaMapping.h @@ -1,3 +1,6 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifndef CS_ALPHA_MAP_H #define CS_ALPHA_MAP_H @@ -12,4 +15,7 @@ const char *Alpha_insn_name(csh handle, unsigned int id); const char *Alpha_group_name(csh handle, unsigned int id); +void Alpha_printInst(MCInst *MI, SStream *O, void *Info); +const char *Alpha_getRegisterName(csh handle, unsigned int id); + #endif diff --git a/arch/Alpha/AlphaModule.c b/arch/Alpha/AlphaModule.c index a2dd49c5b6..67de33f72f 100644 --- a/arch/Alpha/AlphaModule.c +++ b/arch/Alpha/AlphaModule.c @@ -1,8 +1,10 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifdef CAPSTONE_HAS_ALPHA #include "../../utils.h" #include "AlphaDisassembler.h" -#include "AlphaInstPrinter.h" #include "AlphaMapping.h" cs_err ALPHA_global_init(cs_struct *ud) @@ -16,7 +18,7 @@ cs_err ALPHA_global_init(cs_struct *ud) ud->printer_info = mri; ud->getinsn_info = mri; ud->disasm = Alpha_getInstruction; - ud->post_printer = Alpha_post_printer; + ud->post_printer = NULL; ud->reg_name = Alpha_getRegisterName; ud->insn_id = Alpha_get_insn_id; diff --git a/arch/Alpha/AlphaModule.h b/arch/Alpha/AlphaModule.h index e6ffb6f13f..b0761bf0eb 100644 --- a/arch/Alpha/AlphaModule.h +++ b/arch/Alpha/AlphaModule.h @@ -1,3 +1,6 @@ +/* Capstone Disassembly Engine */ +/* By Dmitry Sibirtsev , 2023 */ + #ifndef CAPSTONE_ALPHAMODULE_H #define CAPSTONE_ALPHAMODULE_H diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py index ed939b31ed..8a5a880166 100755 --- a/bindings/python/test_alpha.py +++ b/bindings/python/test_alpha.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 from __future__ import print_function from capstone import * diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index 5dd2fb75d4..09484a1d09 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -19,6 +19,8 @@ extern "C" { #pragma warning(disable : 4201) #endif +#define MAX_ALPHA_OPS 3 + //> Operand type for instruction's operands typedef enum alpha_op_type { ALPHA_OP_INVALID = CS_OP_INVALID, ///< CS_OP_INVALID (Uninitialized). @@ -40,7 +42,7 @@ typedef struct cs_alpha { // Number of operands of this instruction, // or 0 when instruction has no operand. uint8_t op_count; - cs_alpha_op operands[8]; // operands for this instruction. + cs_alpha_op operands[MAX_ALPHA_OPS]; // operands for this instruction. } cs_alpha; diff --git a/include/capstone/capstone.h b/include/capstone/capstone.h index f3883ddc2d..753f8b0a7b 100644 --- a/include/capstone/capstone.h +++ b/include/capstone/capstone.h @@ -367,7 +367,7 @@ typedef struct cs_opt_skipdata { #include "tricore.h" #include "alpha.h" -#define MAX_IMPL_W_REGS 20 +#define MAX_IMPL_W_REGS 47 #define MAX_IMPL_R_REGS 20 #define MAX_NUM_GROUPS 8 From bdf1f8772dc6898c1e87232e8e4f9c0bcbcfa272 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 11 Jul 2023 17:10:32 +0300 Subject: [PATCH 03/26] Add more Alpha instructions --- CREDITS.TXT | 1 + arch/Alpha/AlphaGenAsmWriter.inc | 1000 +++++++++++--------- arch/Alpha/AlphaGenCSMappingInsn.inc | 582 +++++++++--- arch/Alpha/AlphaGenCSMappingInsnName.inc | 29 + arch/Alpha/AlphaGenCSMappingInsnOp.inc | 567 +++++++++--- arch/Alpha/AlphaGenDisassemblerTables.inc | 1023 ++++++++++++--------- arch/Alpha/AlphaGenInstrInfo.inc | 566 +++++++----- 7 files changed, 2427 insertions(+), 1341 deletions(-) diff --git a/CREDITS.TXT b/CREDITS.TXT index 0f7265a6f3..e520e70816 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -88,3 +88,4 @@ fanfuqiang & citypw & porto703 : RISCV architecture. Josh "blacktop" Maine: Arm64 architecture improvements. Finn Wilkinson: AArch64 update to Armv9.2-a (SME + SVE2 support) Billow & Sidneyp : TriCore architecture. +Dmitry Sibirtsev: Alpha architecture. \ No newline at end of file diff --git a/arch/Alpha/AlphaGenAsmWriter.inc b/arch/Alpha/AlphaGenAsmWriter.inc index e7d4cb7183..8b55c2058f 100644 --- a/arch/Alpha/AlphaGenAsmWriter.inc +++ b/arch/Alpha/AlphaGenAsmWriter.inc @@ -19,132 +19,161 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { #ifndef CAPSTONE_DIET static const char AsmStrs[] = { - /* 0 */ "EXTBL \0" - /* 7 */ "EXTLL \0" - /* 14 */ "EXTWL \0" - /* 21 */ "; ADJDOWN \0" - /* 32 */ "CTPOP \0" - /* 39 */ "; ADJUP \0" - /* 48 */ "CTLZ \0" - /* 54 */ "CTTZ \0" - /* 60 */ "lda \0" - /* 65 */ "sra \0" - /* 70 */ "stb \0" - /* 75 */ "sextb \0" - /* 82 */ "blbc \0" - /* 88 */ "cmovlbc \0" - /* 97 */ "rpcc \0" - /* 103 */ "bic \0" - /* 108 */ "cvttq/svc \0" - /* 119 */ "and \0" - /* 124 */ "fbge \0" - /* 130 */ "cmpbge \0" - /* 138 */ "fcmovge \0" - /* 147 */ "fble \0" - /* 153 */ "cmple \0" - /* 160 */ "cmpule \0" - /* 168 */ "fcmovle \0" - /* 177 */ "fbne \0" - /* 183 */ "jsr_coroutine \0" - /* 198 */ "fcmovne \0" - /* 207 */ "cpyse \0" - /* 214 */ "ldah \0" - /* 220 */ "umulh \0" - /* 227 */ "cvtqs/sui \0" - /* 238 */ "cvtts/sui \0" - /* 249 */ "cvtqt/sui \0" - /* 260 */ "ldl/l \0" - /* 267 */ "stl/l \0" - /* 274 */ "ldq/l \0" - /* 281 */ "stq/l \0" - /* 288 */ "s4subl \0" - /* 296 */ "s8subl \0" - /* 304 */ "s4addl \0" - /* 312 */ "s8addl \0" - /* 320 */ "ldl \0" - /* 325 */ "sll \0" - /* 330 */ "mull \0" - /* 336 */ "srl \0" - /* 341 */ "stl \0" - /* 346 */ "cpysn \0" - /* 353 */ "s4subq \0" - /* 361 */ "s8subq \0" - /* 369 */ "s4addq \0" - /* 377 */ "s8addq \0" - /* 385 */ "ldq \0" - /* 390 */ "fbeq \0" - /* 396 */ "cmpeq \0" - /* 403 */ "fcmoveq \0" - /* 412 */ "mulq \0" - /* 418 */ "stq \0" - /* 423 */ "xor \0" - /* 428 */ "cvtst/s \0" - /* 437 */ "blbs \0" - /* 443 */ "cmovlbs \0" - /* 452 */ "lds \0" - /* 457 */ "itofs \0" - /* 464 */ "bis \0" - /* 469 */ "ftois \0" - /* 476 */ "sts \0" - /* 481 */ "cpys \0" - /* 487 */ "ldt \0" - /* 492 */ "itoft \0" - /* 499 */ "fbgt \0" - /* 505 */ "fcmovgt \0" - /* 514 */ "ftoit \0" - /* 521 */ "fblt \0" - /* 527 */ "cmplt \0" - /* 534 */ "cmpult \0" - /* 542 */ "fcmovlt \0" - /* 551 */ "zapnot \0" - /* 559 */ "ornot \0" - /* 566 */ "stt \0" - /* 571 */ "ldbu \0" - /* 577 */ "cmptle/su \0" - /* 588 */ "cmptun/su \0" - /* 599 */ "cmpteq/su \0" - /* 610 */ "subs/su \0" - /* 619 */ "adds/su \0" - /* 628 */ "muls/su \0" - /* 637 */ "sqrts/su \0" - /* 647 */ "divs/su \0" - /* 656 */ "subt/su \0" - /* 665 */ "addt/su \0" - /* 674 */ "cmptlt/su \0" - /* 685 */ "mult/su \0" - /* 694 */ "sqrtt/su \0" - /* 704 */ "divt/su \0" - /* 713 */ "ldwu \0" - /* 719 */ "eqv \0" - /* 724 */ "stw \0" - /* 729 */ "sextw \0" - /* 736 */ "bsr $26,$\0" - /* 746 */ "LSMARKER$\0" - /* 756 */ "jmp $31,\0" - /* 765 */ "br $31,\0" - /* 773 */ "# XRay Function Patchable RET.\0" - /* 804 */ "# XRay Typed Event Log.\0" - /* 828 */ "# XRay Custom Event Log.\0" - /* 853 */ "# XRay Function Enter.\0" - /* 876 */ "# XRay Tail Call Exit.\0" - /* 899 */ "# XRay Function Exit.\0" - /* 921 */ "jsr $23,($27),0\0" - /* 937 */ "jsr $26,($27),0\0" - /* 953 */ "ret $31,($26),1\0" - /* 969 */ "COND_BRANCH imm:\0" - /* 986 */ "LIFETIME_END\0" - /* 999 */ "PSEUDO_PROBE\0" - /* 1012 */ "BUNDLE\0" - /* 1019 */ "DBG_VALUE\0" - /* 1029 */ "DBG_INSTR_REF\0" - /* 1043 */ "DBG_PHI\0" - /* 1051 */ "DBG_LABEL\0" - /* 1061 */ "LIFETIME_START\0" - /* 1076 */ "DBG_VALUE_LIST\0" - /* 1091 */ "PCMARKER_\0" - /* 1101 */ "wmb\0" - /* 1105 */ "#wtf\0" - /* 1110 */ "# FEntry call\0" + /* 0 */ "MSKLH \0" + /* 7 */ "INSLH \0" + /* 14 */ "EXTLH \0" + /* 21 */ "MSKQH \0" + /* 28 */ "INSQH \0" + /* 35 */ "EXTQH \0" + /* 42 */ "MSKWH \0" + /* 49 */ "INSWH \0" + /* 56 */ "EXTWH \0" + /* 63 */ "MSKBL \0" + /* 70 */ "INSBL \0" + /* 77 */ "EXTBL \0" + /* 84 */ "MSKLL \0" + /* 91 */ "INSLL \0" + /* 98 */ "EXTLL \0" + /* 105 */ "MSKQL \0" + /* 112 */ "INSQL \0" + /* 119 */ "EXTQL \0" + /* 126 */ "MSKWL \0" + /* 133 */ "INSWL \0" + /* 140 */ "EXTWL \0" + /* 147 */ "; ADJDOWN \0" + /* 158 */ "CTPOP \0" + /* 165 */ "; ADJUP \0" + /* 174 */ "CTLZ \0" + /* 180 */ "CTTZ \0" + /* 186 */ "lda \0" + /* 191 */ "sra \0" + /* 196 */ "stb \0" + /* 201 */ "sextb \0" + /* 208 */ "blbc \0" + /* 214 */ "cmovlbc \0" + /* 223 */ "rpcc \0" + /* 229 */ "bic \0" + /* 234 */ "rc \0" + /* 238 */ "cvttq/svc \0" + /* 249 */ "and \0" + /* 254 */ "fbge \0" + /* 260 */ "cmpbge \0" + /* 268 */ "fcmovge \0" + /* 277 */ "fble \0" + /* 283 */ "cmple \0" + /* 290 */ "cmpule \0" + /* 298 */ "fcmovle \0" + /* 307 */ "fbne \0" + /* 313 */ "jsr_coroutine \0" + /* 328 */ "fcmovne \0" + /* 337 */ "cpyse \0" + /* 344 */ "ldah \0" + /* 350 */ "umulh \0" + /* 357 */ "cvtqs/sui \0" + /* 368 */ "cvtts/sui \0" + /* 379 */ "cvtqt/sui \0" + /* 390 */ "ldl/l \0" + /* 397 */ "stl/l \0" + /* 404 */ "ldq/l \0" + /* 411 */ "stq/l \0" + /* 418 */ "s4subl \0" + /* 426 */ "s8subl \0" + /* 434 */ "s4addl \0" + /* 442 */ "s8addl \0" + /* 450 */ "ldl \0" + /* 455 */ "sll \0" + /* 460 */ "mull \0" + /* 466 */ "srl \0" + /* 471 */ "stl \0" + /* 476 */ "cpysn \0" + /* 483 */ "s4subq \0" + /* 491 */ "s8subq \0" + /* 499 */ "s4addq \0" + /* 507 */ "s8addq \0" + /* 515 */ "ldq \0" + /* 520 */ "fbeq \0" + /* 526 */ "cmpeq \0" + /* 533 */ "fcmoveq \0" + /* 542 */ "mulq \0" + /* 548 */ "stq \0" + /* 553 */ "xor \0" + /* 558 */ "cvtst/s \0" + /* 567 */ "blbs \0" + /* 573 */ "cmovlbs \0" + /* 582 */ "lds \0" + /* 587 */ "itofs \0" + /* 594 */ "bis \0" + /* 599 */ "ftois \0" + /* 606 */ "rs \0" + /* 610 */ "sts \0" + /* 615 */ "cpys \0" + /* 621 */ "ldt \0" + /* 626 */ "itoft \0" + /* 633 */ "fbgt \0" + /* 639 */ "fcmovgt \0" + /* 648 */ "ftoit \0" + /* 655 */ "fblt \0" + /* 661 */ "cmplt \0" + /* 668 */ "cmpult \0" + /* 676 */ "fcmovlt \0" + /* 685 */ "zapnot \0" + /* 693 */ "ornot \0" + /* 700 */ "stt \0" + /* 705 */ "ldq_u \0" + /* 712 */ "stq_u \0" + /* 719 */ "ldbu \0" + /* 725 */ "cmptle/su \0" + /* 736 */ "cmptun/su \0" + /* 747 */ "cmpteq/su \0" + /* 758 */ "subs/su \0" + /* 767 */ "adds/su \0" + /* 776 */ "muls/su \0" + /* 785 */ "sqrts/su \0" + /* 795 */ "divs/su \0" + /* 804 */ "subt/su \0" + /* 813 */ "addt/su \0" + /* 822 */ "cmptlt/su \0" + /* 833 */ "mult/su \0" + /* 842 */ "sqrtt/su \0" + /* 852 */ "divt/su \0" + /* 861 */ "ldwu \0" + /* 867 */ "eqv \0" + /* 872 */ "stw \0" + /* 877 */ "sextw \0" + /* 884 */ "bsr $26,$\0" + /* 894 */ "LSMARKER$\0" + /* 904 */ "wh64 (\0" + /* 911 */ "ecb (\0" + /* 917 */ "fetch (\0" + /* 925 */ "fetch_m (\0" + /* 935 */ "wh64en (\0" + /* 944 */ "jmp $31,\0" + /* 953 */ "br $31,\0" + /* 961 */ "# XRay Function Patchable RET.\0" + /* 992 */ "# XRay Typed Event Log.\0" + /* 1016 */ "# XRay Custom Event Log.\0" + /* 1041 */ "# XRay Function Enter.\0" + /* 1064 */ "# XRay Tail Call Exit.\0" + /* 1087 */ "# XRay Function Exit.\0" + /* 1109 */ "jsr $23,($27),0\0" + /* 1125 */ "jsr $26,($27),0\0" + /* 1141 */ "ret $31,($26),1\0" + /* 1157 */ "COND_BRANCH imm:\0" + /* 1174 */ "LIFETIME_END\0" + /* 1187 */ "PSEUDO_PROBE\0" + /* 1200 */ "BUNDLE\0" + /* 1207 */ "DBG_VALUE\0" + /* 1217 */ "DBG_INSTR_REF\0" + /* 1231 */ "DBG_PHI\0" + /* 1239 */ "DBG_LABEL\0" + /* 1249 */ "LIFETIME_START\0" + /* 1264 */ "DBG_VALUE_LIST\0" + /* 1279 */ "PCMARKER_\0" + /* 1289 */ "excb\0" + /* 1294 */ "wmb\0" + /* 1298 */ "trapb\0" + /* 1304 */ "#wtf\0" + /* 1309 */ "# FEntry call\0" }; #endif // CAPSTONE_DIET @@ -162,20 +191,20 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS - 1020U, // DBG_VALUE - 1077U, // DBG_VALUE_LIST - 1030U, // DBG_INSTR_REF - 1044U, // DBG_PHI - 1052U, // DBG_LABEL + 1208U, // DBG_VALUE + 1265U, // DBG_VALUE_LIST + 1218U, // DBG_INSTR_REF + 1232U, // DBG_PHI + 1240U, // DBG_LABEL 0U, // REG_SEQUENCE 0U, // COPY - 1013U, // BUNDLE - 1062U, // LIFETIME_START - 987U, // LIFETIME_END - 1000U, // PSEUDO_PROBE + 1201U, // BUNDLE + 1250U, // LIFETIME_START + 1175U, // LIFETIME_END + 1188U, // PSEUDO_PROBE 0U, // ARITH_FENCE 0U, // STACKMAP - 1111U, // FENTRY_CALL + 1310U, // FENTRY_CALL 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // PREALLOCATED_SETUP @@ -184,12 +213,12 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // LOCAL_ESCAPE 0U, // FAULTING_OP 0U, // PATCHABLE_OP - 854U, // PATCHABLE_FUNCTION_ENTER - 774U, // PATCHABLE_RET - 900U, // PATCHABLE_FUNCTION_EXIT - 877U, // PATCHABLE_TAIL_CALL - 829U, // PATCHABLE_EVENT_CALL - 805U, // PATCHABLE_TYPED_EVENT_CALL + 1042U, // PATCHABLE_FUNCTION_ENTER + 962U, // PATCHABLE_RET + 1088U, // PATCHABLE_FUNCTION_EXIT + 1065U, // PATCHABLE_TAIL_CALL + 1017U, // PATCHABLE_EVENT_CALL + 993U, // PATCHABLE_TYPED_EVENT_CALL 0U, // ICALL_BRANCH_FUNNEL 0U, // MEMBARRIER 0U, // G_ASSERT_SEXT @@ -400,211 +429,261 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // G_VECREDUCE_UMIN 0U, // G_SBFX 0U, // G_UBFX - 2070U, // ADJUSTSTACKDOWN - 2088U, // ADJUSTSTACKUP - 10985U, // ALTENT + 2196U, // ADJUSTSTACKDOWN + 2214U, // ADJUSTSTACKUP + 11133U, // ALTENT 0U, // CAS32 0U, // CAS64 0U, // LAS32 0U, // LAS64 - 19179U, // MEMLABEL - 27716U, // PCLABEL + 19327U, // MEMLABEL + 27904U, // PCLABEL 0U, // SWAP32 0U, // SWAP64 - 1106U, // WTF - 37171U, // ADDLi - 37171U, // ADDLr - 37236U, // ADDQi - 37236U, // ADDQr - 37484U, // ADDS - 37530U, // ADDT - 36984U, // ANDi - 36984U, // ANDr - 43400U, // BEQ - 43134U, // BGE - 43509U, // BGT - 36968U, // BICi - 36968U, // BICr - 37329U, // BISi - 37329U, // BISr - 43091U, // BLBC - 43446U, // BLBS - 43157U, // BLE - 43531U, // BLT - 43187U, // BNE - 2814U, // BR - 51937U, // BSR - 37269U, // CMOVEQi - 37269U, // CMOVEQr - 37004U, // CMOVGEi - 37004U, // CMOVGEr - 37371U, // CMOVGTi - 37371U, // CMOVGTr - 36953U, // CMOVLBCi - 36953U, // CMOVLBCr - 37308U, // CMOVLBSi - 37308U, // CMOVLBSr - 37034U, // CMOVLEi - 37034U, // CMOVLEr - 37408U, // CMOVLTi - 37408U, // CMOVLTr - 37064U, // CMOVNEi - 37064U, // CMOVNEr - 36995U, // CMPBGE - 36995U, // CMPBGEi - 37261U, // CMPEQ - 37261U, // CMPEQi - 37018U, // CMPLE - 37018U, // CMPLEi - 37392U, // CMPLT - 37392U, // CMPLTi - 37464U, // CMPTEQ - 37442U, // CMPTLE - 37539U, // CMPTLT - 37453U, // CMPTUN - 37025U, // CMPULE - 37025U, // CMPULEi - 37399U, // CMPULT - 37399U, // CMPULTi - 60362U, // COND_BRANCH_F - 3018U, // COND_BRANCH_I - 37072U, // CPYSES - 37072U, // CPYSESt - 37072U, // CPYSET - 37211U, // CPYSNS - 37211U, // CPYSNSt - 37211U, // CPYSNT - 37211U, // CPYSNTs - 37346U, // CPYSS - 37346U, // CPYSSt - 37346U, // CPYST - 37346U, // CPYSTs - 12337U, // CTLZ - 12321U, // CTPOP - 12343U, // CTTZ - 12516U, // CVTQS - 12538U, // CVTQT - 12717U, // CVTST - 12397U, // CVTTQ - 12527U, // CVTTS - 37512U, // DIVS - 37569U, // DIVT - 37584U, // EQVi - 37584U, // EQVr - 36865U, // EXTBL - 36872U, // EXTLL - 36879U, // EXTWL - 43399U, // FBEQ - 43133U, // FBGE - 43508U, // FBGT - 43156U, // FBLE - 43530U, // FBLT - 43186U, // FBNE - 6548U, // FCMOVEQS - 6548U, // FCMOVEQT - 6283U, // FCMOVGES - 6283U, // FCMOVGET - 6650U, // FCMOVGTS - 6650U, // FCMOVGTT - 6313U, // FCMOVLES - 6313U, // FCMOVLET - 6687U, // FCMOVLTS - 6687U, // FCMOVLTT - 6343U, // FCMOVNES - 6343U, // FCMOVNET - 12758U, // FTOIS - 12803U, // FTOIT - 12746U, // ITOFS - 12781U, // ITOFT - 19189U, // JMP - 938U, // JSR - 26808U, // JSR_COROUTINE - 922U, // JSRs - 43069U, // LDA - 43223U, // LDAH - 35031U, // LDAHg - 43223U, // LDAHr - 34877U, // LDAg - 43069U, // LDAr - 43580U, // LDBU - 43580U, // LDBUr - 43329U, // LDL - 43269U, // LDL_L - 43329U, // LDLr - 43394U, // LDQ - 43283U, // LDQ_L - 43394U, // LDQl - 43394U, // LDQr - 43461U, // LDS - 43461U, // LDSr - 43496U, // LDT - 43496U, // LDTr - 43722U, // LDWU - 43722U, // LDWUr - 1103U, // MB - 37195U, // MULLi - 37195U, // MULLr - 37277U, // MULQi - 37277U, // MULQr - 37493U, // MULS - 37550U, // MULT - 37424U, // ORNOTi - 37424U, // ORNOTr - 954U, // RETDAG - 954U, // RETDAGp - 2146U, // RPCC - 37169U, // S4ADDLi - 37169U, // S4ADDLr - 37234U, // S4ADDQi - 37234U, // S4ADDQr - 37153U, // S4SUBLi - 37153U, // S4SUBLr - 37218U, // S4SUBQi - 37218U, // S4SUBQr - 37177U, // S8ADDLi - 37177U, // S8ADDLr - 37242U, // S8ADDQi - 37242U, // S8ADDQr - 37161U, // S8SUBLi - 37161U, // S8SUBLr - 37226U, // S8SUBQi - 37226U, // S8SUBQr - 12364U, // SEXTB - 13018U, // SEXTW - 37190U, // SLi - 37190U, // SLr - 12926U, // SQRTS - 12983U, // SQRTT - 36930U, // SRAi - 36930U, // SRAr - 37201U, // SRLi - 37201U, // SRLr - 43079U, // STB - 43079U, // STBr - 43350U, // STL - 37132U, // STL_C - 43350U, // STLr - 43427U, // STQ - 37146U, // STQ_C - 43427U, // STQr - 43485U, // STS - 43485U, // STSr - 43575U, // STT - 43575U, // STTr - 43733U, // STW - 43733U, // STWr - 37155U, // SUBLi - 37155U, // SUBLr - 37220U, // SUBQi - 37220U, // SUBQr - 37475U, // SUBS - 37521U, // SUBT - 37085U, // UMULHi - 37085U, // UMULHr - 1102U, // WMB - 37288U, // XORi - 37288U, // XORr - 37416U, // ZAPNOTi + 1305U, // WTF + 37301U, // ADDLi + 37301U, // ADDLr + 37366U, // ADDQi + 37366U, // ADDQr + 37632U, // ADDS + 37678U, // ADDT + 37114U, // ANDi + 37114U, // ANDr + 35338U, // BEQ + 35072U, // BGE + 35451U, // BGT + 37094U, // BICi + 37094U, // BICr + 37459U, // BISi + 37459U, // BISr + 35025U, // BLBC + 35384U, // BLBS + 35095U, // BLE + 35473U, // BLT + 35125U, // BNE + 3002U, // BR + 43893U, // BSR + 37399U, // CMOVEQi + 37399U, // CMOVEQr + 37134U, // CMOVGEi + 37134U, // CMOVGEr + 37505U, // CMOVGTi + 37505U, // CMOVGTr + 37079U, // CMOVLBCi + 37079U, // CMOVLBCr + 37438U, // CMOVLBSi + 37438U, // CMOVLBSr + 37164U, // CMOVLEi + 37164U, // CMOVLEr + 37542U, // CMOVLTi + 37542U, // CMOVLTr + 37194U, // CMOVNEi + 37194U, // CMOVNEr + 37125U, // CMPBGE + 37125U, // CMPBGEi + 37391U, // CMPEQ + 37391U, // CMPEQi + 37148U, // CMPLE + 37148U, // CMPLEi + 37526U, // CMPLT + 37526U, // CMPLTi + 37612U, // CMPTEQ + 37590U, // CMPTLE + 37687U, // CMPTLT + 37601U, // CMPTUN + 37155U, // CMPULE + 37155U, // CMPULEi + 37533U, // CMPULT + 37533U, // CMPULTi + 52358U, // COND_BRANCH_F + 60550U, // COND_BRANCH_I + 37202U, // CPYSES + 37202U, // CPYSESt + 37202U, // CPYSET + 37341U, // CPYSNS + 37341U, // CPYSNSt + 37341U, // CPYSNT + 37341U, // CPYSNTs + 37480U, // CPYSS + 37480U, // CPYSSt + 37480U, // CPYST + 37480U, // CPYSTs + 37039U, // CTLZ + 37023U, // CTPOP + 37045U, // CTTZ + 37222U, // CVTQS + 37244U, // CVTQT + 37423U, // CVTST + 37103U, // CVTTQ + 37233U, // CVTTS + 37660U, // DIVS + 37717U, // DIVT + 5008U, // ECB + 37732U, // EQVi + 37732U, // EQVr + 1290U, // EXCB + 36942U, // EXTBL + 36942U, // EXTBLi + 36879U, // EXTLH + 36879U, // EXTLHi + 36963U, // EXTLL + 36963U, // EXTLLi + 36900U, // EXTQH + 36900U, // EXTQHi + 36984U, // EXTQL + 36984U, // EXTQLi + 36921U, // EXTWH + 36921U, // EXTWHi + 37005U, // EXTWL + 37005U, // EXTWLi + 35337U, // FBEQ + 35071U, // FBGE + 35450U, // FBGT + 35094U, // FBLE + 35472U, // FBLT + 35124U, // FBNE + 6678U, // FCMOVEQS + 6678U, // FCMOVEQT + 6413U, // FCMOVGES + 6413U, // FCMOVGET + 6784U, // FCMOVGTS + 6784U, // FCMOVGTT + 6443U, // FCMOVLES + 6443U, // FCMOVLET + 6821U, // FCMOVLTS + 6821U, // FCMOVLTT + 6473U, // FCMOVNES + 6473U, // FCMOVNET + 5014U, // FETCH + 5022U, // FETCH_M + 37464U, // FTOIS + 37513U, // FTOIT + 36935U, // INSBL + 36935U, // INSBLi + 36872U, // INSLH + 36872U, // INSLHi + 36956U, // INSLL + 36956U, // INSLLi + 36893U, // INSQH + 36893U, // INSQHi + 36977U, // INSQL + 36977U, // INSQLi + 36914U, // INSWH + 36914U, // INSWHi + 36998U, // INSWL + 36998U, // INSWLi + 37452U, // ITOFS + 37491U, // ITOFT + 11185U, // JMP + 1126U, // JSR + 18746U, // JSR_COROUTINE + 1110U, // JSRs + 35003U, // LDA + 35161U, // LDAH + 26969U, // LDAHg + 35161U, // LDAHr + 26811U, // LDAg + 35003U, // LDAr + 35536U, // LDBU + 35536U, // LDBUr + 35267U, // LDL + 35207U, // LDL_L + 35267U, // LDLr + 35332U, // LDQ + 35221U, // LDQ_L + 35522U, // LDQ_U + 35332U, // LDQl + 35332U, // LDQr + 35399U, // LDS + 35399U, // LDSr + 35438U, // LDT + 35438U, // LDTr + 35678U, // LDWU + 35678U, // LDWUr + 1296U, // MB + 36928U, // MSKBL + 36928U, // MSKBLi + 36865U, // MSKLH + 36865U, // MSKLHi + 36949U, // MSKLL + 36949U, // MSKLLi + 36886U, // MSKQH + 36886U, // MSKQHi + 36970U, // MSKQL + 36970U, // MSKQLi + 36907U, // MSKWH + 36907U, // MSKWHi + 36991U, // MSKWL + 36991U, // MSKWLi + 37325U, // MULLi + 37325U, // MULLr + 37407U, // MULQi + 37407U, // MULQr + 37641U, // MULS + 37698U, // MULT + 37558U, // ORNOTi + 37558U, // ORNOTr + 2283U, // RC + 1142U, // RETDAG + 1142U, // RETDAGp + 2272U, // RPCC + 2655U, // RS + 37299U, // S4ADDLi + 37299U, // S4ADDLr + 37364U, // S4ADDQi + 37364U, // S4ADDQr + 37283U, // S4SUBLi + 37283U, // S4SUBLr + 37348U, // S4SUBQi + 37348U, // S4SUBQr + 37307U, // S8ADDLi + 37307U, // S8ADDLr + 37372U, // S8ADDQi + 37372U, // S8ADDQr + 37291U, // S8SUBLi + 37291U, // S8SUBLr + 37356U, // S8SUBQi + 37356U, // S8SUBQr + 37066U, // SEXTB + 37742U, // SEXTW + 37320U, // SLi + 37320U, // SLr + 37650U, // SQRTS + 37707U, // SQRTT + 37056U, // SRAi + 37056U, // SRAr + 37331U, // SRLi + 37331U, // SRLr + 35013U, // STB + 35013U, // STBr + 35288U, // STL + 37262U, // STL_C + 35288U, // STLr + 35365U, // STQ + 37276U, // STQ_C + 35529U, // STQ_U + 35365U, // STQr + 35427U, // STS + 35427U, // STSr + 35517U, // STT + 35517U, // STTr + 35689U, // STW + 35689U, // STWr + 37285U, // SUBLi + 37285U, // SUBLr + 37350U, // SUBQi + 37350U, // SUBQr + 37623U, // SUBS + 37669U, // SUBT + 1299U, // TRAPB + 37215U, // UMULHi + 37215U, // UMULHr + 5001U, // WH64 + 5032U, // WH64EN + 1295U, // WMB + 37418U, // XORi + 37418U, // XORr + 37550U, // ZAPNOTi }; static const uint8_t OpInfo1[] = { @@ -879,18 +958,18 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // ADDT 0U, // ANDi 0U, // ANDr - 2U, // BEQ - 2U, // BGE - 2U, // BGT + 10U, // BEQ + 10U, // BGE + 10U, // BGT 0U, // BICi 0U, // BICr 0U, // BISi 0U, // BISr - 2U, // BLBC - 2U, // BLBS - 2U, // BLE - 2U, // BLT - 2U, // BNE + 10U, // BLBC + 10U, // BLBS + 10U, // BLE + 10U, // BLT + 10U, // BNE 0U, // BR 0U, // BSR 0U, // CMOVEQi @@ -926,7 +1005,7 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // CMPULT 0U, // CMPULTi 0U, // COND_BRANCH_F - 1U, // COND_BRANCH_I + 0U, // COND_BRANCH_I 0U, // CPYSES 0U, // CPYSESt 0U, // CPYSET @@ -938,27 +1017,40 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // CPYSSt 0U, // CPYST 0U, // CPYSTs - 1U, // CTLZ - 1U, // CTPOP - 1U, // CTTZ - 1U, // CVTQS - 1U, // CVTQT - 1U, // CVTST - 1U, // CVTTQ - 1U, // CVTTS + 4U, // CTLZ + 4U, // CTPOP + 4U, // CTTZ + 4U, // CVTQS + 4U, // CVTQT + 4U, // CVTST + 4U, // CVTTQ + 4U, // CVTTS 0U, // DIVS 0U, // DIVT + 1U, // ECB 0U, // EQVi 0U, // EQVr + 0U, // EXCB 0U, // EXTBL + 0U, // EXTBLi + 0U, // EXTLH + 0U, // EXTLHi 0U, // EXTLL + 0U, // EXTLLi + 0U, // EXTQH + 0U, // EXTQHi + 0U, // EXTQL + 0U, // EXTQLi + 0U, // EXTWH + 0U, // EXTWHi 0U, // EXTWL - 2U, // FBEQ - 2U, // FBGE - 2U, // FBGT - 2U, // FBLE - 2U, // FBLT - 2U, // FBNE + 0U, // EXTWLi + 10U, // FBEQ + 10U, // FBGE + 10U, // FBGT + 10U, // FBLE + 10U, // FBLT + 10U, // FBNE 0U, // FCMOVEQS 0U, // FCMOVEQT 0U, // FCMOVGES @@ -971,36 +1063,67 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // FCMOVLTT 0U, // FCMOVNES 0U, // FCMOVNET - 1U, // FTOIS - 1U, // FTOIT - 1U, // ITOFS - 1U, // ITOFT + 1U, // FETCH + 1U, // FETCH_M + 4U, // FTOIS + 4U, // FTOIT + 0U, // INSBL + 0U, // INSBLi + 0U, // INSLH + 0U, // INSLHi + 0U, // INSLL + 0U, // INSLLi + 0U, // INSQH + 0U, // INSQHi + 0U, // INSQL + 0U, // INSQLi + 0U, // INSWH + 0U, // INSWHi + 0U, // INSWL + 0U, // INSWLi + 4U, // ITOFS + 4U, // ITOFT 1U, // JMP 0U, // JSR 1U, // JSR_COROUTINE 0U, // JSRs - 4U, // LDA - 4U, // LDAH + 18U, // LDA + 18U, // LDAH 1U, // LDAHg - 20U, // LDAHr + 82U, // LDAHr 1U, // LDAg - 36U, // LDAr - 4U, // LDBU - 36U, // LDBUr - 4U, // LDL - 4U, // LDL_L - 36U, // LDLr - 4U, // LDQ - 4U, // LDQ_L - 52U, // LDQl - 36U, // LDQr - 4U, // LDS - 36U, // LDSr - 4U, // LDT - 36U, // LDTr - 4U, // LDWU - 36U, // LDWUr + 146U, // LDAr + 18U, // LDBU + 146U, // LDBUr + 18U, // LDL + 18U, // LDL_L + 146U, // LDLr + 18U, // LDQ + 18U, // LDQ_L + 18U, // LDQ_U + 210U, // LDQl + 146U, // LDQr + 18U, // LDS + 146U, // LDSr + 18U, // LDT + 146U, // LDTr + 18U, // LDWU + 146U, // LDWUr 0U, // MB + 0U, // MSKBL + 0U, // MSKBLi + 0U, // MSKLH + 0U, // MSKLHi + 0U, // MSKLL + 0U, // MSKLLi + 0U, // MSKQH + 0U, // MSKQHi + 0U, // MSKQL + 0U, // MSKQLi + 0U, // MSKWH + 0U, // MSKWHi + 0U, // MSKWL + 0U, // MSKWLi 0U, // MULLi 0U, // MULLr 0U, // MULQi @@ -1009,9 +1132,11 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // MULT 0U, // ORNOTi 0U, // ORNOTr + 0U, // RC 0U, // RETDAG 0U, // RETDAGp 0U, // RPCC + 0U, // RS 0U, // S4ADDLi 0U, // S4ADDLr 0U, // S4ADDQi @@ -1028,38 +1153,42 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // S8SUBLr 0U, // S8SUBQi 0U, // S8SUBQr - 1U, // SEXTB - 1U, // SEXTW + 4U, // SEXTB + 4U, // SEXTW 0U, // SLi 0U, // SLr - 1U, // SQRTS - 1U, // SQRTT + 4U, // SQRTS + 4U, // SQRTT 0U, // SRAi 0U, // SRAr 0U, // SRLi 0U, // SRLr 1U, // STB - 36U, // STBr - 4U, // STL - 12U, // STL_C - 36U, // STLr - 4U, // STQ - 12U, // STQ_C - 36U, // STQr - 4U, // STS - 36U, // STSr - 4U, // STT - 36U, // STTr - 4U, // STW - 36U, // STWr + 146U, // STBr + 18U, // STL + 48U, // STL_C + 146U, // STLr + 18U, // STQ + 48U, // STQ_C + 1U, // STQ_U + 146U, // STQr + 18U, // STS + 146U, // STSr + 18U, // STT + 146U, // STTr + 18U, // STW + 146U, // STWr 0U, // SUBLi 0U, // SUBLr 0U, // SUBQi 0U, // SUBQr 0U, // SUBS 0U, // SUBT + 0U, // TRAPB 0U, // UMULHi 0U, // UMULHr + 1U, // WH64 + 1U, // WH64EN 0U, // WMB 0U, // XORi 0U, // XORr @@ -1106,7 +1235,6 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { case 2: // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... printOperand(MI, 1, O); - SStream_concat1(O, ','); break; case 3: // FCMOVEQS, FCMOVEQT, FCMOVGES, FCMOVGET, FCMOVGTS, FCMOVGTT, FCMOVLES, ... @@ -1120,11 +1248,11 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { } - // Fragment 1 encoded into 4 bits for 14 unique commands. + // Fragment 1 encoded into 4 bits for 13 unique commands. switch ((Bits >> 13) & 15) { default: assert(0 && "Invalid command number."); case 0: - // ADJUSTSTACKDOWN, ADJUSTSTACKUP, BR, RPCC + // ADJUSTSTACKDOWN, ADJUSTSTACKUP, BR, RC, RPCC, RS return; break; case 1: @@ -1149,20 +1277,15 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { return; break; case 4: - // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... - printOperand(MI, 2, O); - break; - case 5: - // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... + // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BEQ, BGE, BGT, BIC... SStream_concat1(O, ','); - printOperand(MI, 1, O); break; - case 6: + case 5: // BSR SStream_concat0(O, " ..ng"); return; break; - case 7: + case 6: // COND_BRANCH_F SStream_concat0(O, ", F8RC:"); printOperand(MI, 1, O); @@ -1170,7 +1293,7 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { printOperand(MI, 2, O); return; break; - case 8: + case 7: // COND_BRANCH_I SStream_concat0(O, ", GPRC:"); printOperand(MI, 1, O); @@ -1178,17 +1301,17 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { printOperand(MI, 2, O); return; break; - case 9: - // CTLZ, CTPOP, CTTZ, CVTQS, CVTQT, CVTST, CVTTQ, CVTTS, FTOIS, FTOIT, IT... - printOperand(MI, 0, O); + case 8: + // ECB, FETCH, FETCH_M, WH64, WH64EN + SStream_concat1(O, ')'); return; break; - case 10: + case 9: // JMP SStream_concat0(O, ",0"); return; break; - case 11: + case 10: // JSR_COROUTINE SStream_concat0(O, ",( "); printOperand(MI, 1, O); @@ -1196,7 +1319,7 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { printOperand(MI, 2, O); return; break; - case 12: + case 11: // LDAHg, LDAg SStream_concat0(O, ",0("); printOperand(MI, 2, O); @@ -1204,8 +1327,8 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { printOperand(MI, 3, O); return; break; - case 13: - // STB + case 12: + // STB, STQ_U SStream_concat0(O, ", "); printOperand(MI, 1, O); SStream_concat1(O, '('); @@ -1219,6 +1342,25 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { // Fragment 2 encoded into 2 bits for 3 unique commands. switch ((Bits >> 17) & 3) { default: assert(0 && "Invalid command number."); + case 0: + // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... + printOperand(MI, 2, O); + break; + case 1: + // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... + printOperand(MI, 1, O); + break; + case 2: + // CTLZ, CTPOP, CTTZ, CVTQS, CVTQT, CVTST, CVTTQ, CVTTS, FTOIS, FTOIT, IT... + printOperand(MI, 0, O); + return; + break; + } + + + // Fragment 3 encoded into 2 bits for 3 unique commands. + switch ((Bits >> 19) & 3) { + default: assert(0 && "Invalid command number."); case 0: // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... SStream_concat1(O, ','); @@ -1236,8 +1378,8 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { } - // Fragment 3 encoded into 1 bits for 2 unique commands. - if ((Bits >> 19) & 1) { + // Fragment 4 encoded into 1 bits for 2 unique commands. + if ((Bits >> 21) & 1) { // STL_C, STQ_C printOperand(MI, 3, O); SStream_concat1(O, ')'); @@ -1248,11 +1390,11 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { } - // Fragment 4 encoded into 2 bits for 4 unique commands. - switch ((Bits >> 20) & 3) { + // Fragment 5 encoded into 2 bits for 4 unique commands. + switch ((Bits >> 22) & 3) { default: assert(0 && "Invalid command number."); case 0: - // LDA, LDAH, LDBU, LDL, LDL_L, LDQ, LDQ_L, LDS, LDT, LDWU, STL, STQ, STS... + // LDA, LDAH, LDBU, LDL, LDL_L, LDQ, LDQ_L, LDQ_U, LDS, LDT, LDWU, STL, S... SStream_concat1(O, ')'); return; break; diff --git a/arch/Alpha/AlphaGenCSMappingInsn.inc b/arch/Alpha/AlphaGenCSMappingInsn.inc index e68a274405..da7c5ef015 100644 --- a/arch/Alpha/AlphaGenCSMappingInsn.inc +++ b/arch/Alpha/AlphaGenCSMappingInsn.inc @@ -2393,814 +2393,1164 @@ { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, +{ + /* ecb ($RB) */ + Alpha_ECB /* 340 */, Alpha_INS_ECB, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, { /* eqv $RA,$L,$RC */ - Alpha_EQVi /* 340 */, Alpha_INS_EQV, + Alpha_EQVi /* 341 */, Alpha_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* eqv $RA,$RB,$RC */ - Alpha_EQVr /* 341 */, Alpha_INS_EQV, + Alpha_EQVr /* 342 */, Alpha_INS_EQV, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* excb */ + Alpha_EXCB /* 343 */, Alpha_INS_EXCB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* EXTBL $RA,$RB,$RC */ - Alpha_EXTBL /* 342 */, Alpha_INS_EXTBL, + Alpha_EXTBL /* 344 */, Alpha_INS_EXTBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTBL $RA,$L,$RC */ + Alpha_EXTBLi /* 345 */, Alpha_INS_EXTBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTLH $RA,$RB,$RC */ + Alpha_EXTLH /* 346 */, Alpha_INS_EXTLH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTLH $RA,$L,$RC */ + Alpha_EXTLHi /* 347 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* EXTLL $RA,$RB,$RC */ - Alpha_EXTLL /* 343 */, Alpha_INS_EXTLL, + Alpha_EXTLL /* 348 */, Alpha_INS_EXTLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTLL $RA,$L,$RC */ + Alpha_EXTLLi /* 349 */, Alpha_INS_EXTLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTQH $RA,$RB,$RC */ + Alpha_EXTQH /* 350 */, Alpha_INS_EXTQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTQH $RA,$L,$RC */ + Alpha_EXTQHi /* 351 */, Alpha_INS_EXTQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTQL $RA,$RB,$RC */ + Alpha_EXTQL /* 352 */, Alpha_INS_EXTQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTQL $RA,$L,$RC */ + Alpha_EXTQLi /* 353 */, Alpha_INS_EXTQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTWH $RA,$RB,$RC */ + Alpha_EXTWH /* 354 */, Alpha_INS_EXTWH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTWH $RA,$L,$RC */ + Alpha_EXTWHi /* 355 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* EXTWL $RA,$RB,$RC */ - Alpha_EXTWL /* 344 */, Alpha_INS_EXTWL, + Alpha_EXTWL /* 356 */, Alpha_INS_EXTWL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* EXTWL $RA,$L,$RC */ + Alpha_EXTWLi /* 357 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fbeq $R,$dst */ - Alpha_FBEQ /* 345 */, Alpha_INS_FBEQ, + Alpha_FBEQ /* 358 */, Alpha_INS_FBEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fbge $R,$dst */ - Alpha_FBGE /* 346 */, Alpha_INS_FBGE, + Alpha_FBGE /* 359 */, Alpha_INS_FBGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fbgt $R,$dst */ - Alpha_FBGT /* 347 */, Alpha_INS_FBGT, + Alpha_FBGT /* 360 */, Alpha_INS_FBGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fble $R,$dst */ - Alpha_FBLE /* 348 */, Alpha_INS_FBLE, + Alpha_FBLE /* 361 */, Alpha_INS_FBLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fblt $R,$dst */ - Alpha_FBLT /* 349 */, Alpha_INS_FBLT, + Alpha_FBLT /* 362 */, Alpha_INS_FBLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fbne $R,$dst */ - Alpha_FBNE /* 350 */, Alpha_INS_FBNE, + Alpha_FBNE /* 363 */, Alpha_INS_FBNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} #endif }, { /* fcmoveq $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVEQS /* 351 */, Alpha_INS_FCMOVEQ, + Alpha_FCMOVEQS /* 364 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmoveq $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVEQT /* 352 */, Alpha_INS_FCMOVEQ, + Alpha_FCMOVEQT /* 365 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovge $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVGES /* 353 */, Alpha_INS_FCMOVGE, + Alpha_FCMOVGES /* 366 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovge $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVGET /* 354 */, Alpha_INS_FCMOVGE, + Alpha_FCMOVGET /* 367 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovgt $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVGTS /* 355 */, Alpha_INS_FCMOVGT, + Alpha_FCMOVGTS /* 368 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovgt $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVGTT /* 356 */, Alpha_INS_FCMOVGT, + Alpha_FCMOVGTT /* 369 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovle $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVLES /* 357 */, Alpha_INS_FCMOVLE, + Alpha_FCMOVLES /* 370 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovle $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVLET /* 358 */, Alpha_INS_FCMOVLE, + Alpha_FCMOVLET /* 371 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovlt $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVLTS /* 359 */, Alpha_INS_FCMOVLT, + Alpha_FCMOVLTS /* 372 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovlt $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVLTT /* 360 */, Alpha_INS_FCMOVLT, + Alpha_FCMOVLTT /* 373 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovne $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVNES /* 361 */, Alpha_INS_FCMOVNE, + Alpha_FCMOVNES /* 374 */, Alpha_INS_FCMOVNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* fcmovne $RCOND,$RTRUE,$RDEST */ - Alpha_FCMOVNET /* 362 */, Alpha_INS_FCMOVNE, + Alpha_FCMOVNET /* 375 */, Alpha_INS_FCMOVNE, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fetch ($RB) */ + Alpha_FETCH /* 376 */, Alpha_INS_FETCH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* fetch_m ($RB) */ + Alpha_FETCH_M /* 377 */, Alpha_INS_FETCH_M, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ftois $RA,$RC */ - Alpha_FTOIS /* 363 */, Alpha_INS_FTOIS, + Alpha_FTOIS /* 378 */, Alpha_INS_FTOIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ftoit $RA,$RC */ - Alpha_FTOIT /* 364 */, Alpha_INS_FTOIT, + Alpha_FTOIT /* 379 */, Alpha_INS_FTOIT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSBL $RA,$RB,$RC */ + Alpha_INSBL /* 380 */, Alpha_INS_INSBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSBL $RA,$L,$RC */ + Alpha_INSBLi /* 381 */, Alpha_INS_INSBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSLH $RA,$RB,$RC */ + Alpha_INSLH /* 382 */, Alpha_INS_INSLH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSLH $RA,$L,$RC */ + Alpha_INSLHi /* 383 */, Alpha_INS_INSLH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSLL $RA,$RB,$RC */ + Alpha_INSLL /* 384 */, Alpha_INS_INSLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSLL $RA,$L,$RC */ + Alpha_INSLLi /* 385 */, Alpha_INS_INSLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSQH $RA,$RB,$RC */ + Alpha_INSQH /* 386 */, Alpha_INS_INSQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSQH $RA,$L,$RC */ + Alpha_INSQHi /* 387 */, Alpha_INS_INSQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSQL $RA,$RB,$RC */ + Alpha_INSQL /* 388 */, Alpha_INS_INSQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSQL $RA,$L,$RC */ + Alpha_INSQLi /* 389 */, Alpha_INS_INSQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSWH $RA,$RB,$RC */ + Alpha_INSWH /* 390 */, Alpha_INS_INSWH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSWH $RA,$L,$RC */ + Alpha_INSWHi /* 391 */, Alpha_INS_INSWH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSWL $RA,$RB,$RC */ + Alpha_INSWL /* 392 */, Alpha_INS_INSWL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* INSWL $RA,$L,$RC */ + Alpha_INSWLi /* 393 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* itofs $RA,$RC */ - Alpha_ITOFS /* 365 */, Alpha_INS_ITOFS, + Alpha_ITOFS /* 394 */, Alpha_INS_ITOFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* itoft $RA,$RC */ - Alpha_ITOFT /* 366 */, Alpha_INS_ITOFT, + Alpha_ITOFT /* 395 */, Alpha_INS_ITOFT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* jmp $$31,{$RS},0 */ - Alpha_JMP /* 367 */, Alpha_INS_JMP, + Alpha_JMP /* 396 */, Alpha_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 1, {{ 0 }} #endif }, { /* jsr $$26,($$27),0 */ - Alpha_JSR /* 368 */, Alpha_INS_JSR, + Alpha_JSR /* 397 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET { Alpha_REG_R27, Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} #endif }, { /* jsr_coroutine $RD,( $RS ),$DISP */ - Alpha_JSR_COROUTINE /* 369 */, Alpha_INS_JSR_COROUTINE, + Alpha_JSR_COROUTINE /* 398 */, Alpha_INS_JSR_COROUTINE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* jsr $$23,($$27),0 */ - Alpha_JSRs /* 370 */, Alpha_INS_JSR, + Alpha_JSRs /* 399 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET { Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, 0 }, { Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, Alpha_REG_R28, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} #endif }, { /* lda $RA,$DISP($RB) */ - Alpha_LDA /* 371 */, Alpha_INS_LDA, + Alpha_LDA /* 400 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldah $RA,$DISP($RB) */ - Alpha_LDAH /* 372 */, Alpha_INS_LDAH, + Alpha_LDAH /* 401 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldah $RA,0($RB) !gpdisp!$NUM */ - Alpha_LDAHg /* 373 */, Alpha_INS_LDAH, + Alpha_LDAHg /* 402 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldah $RA,$DISP($RB) !gprelhigh */ - Alpha_LDAHr /* 374 */, Alpha_INS_LDAH, + Alpha_LDAHr /* 403 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* lda $RA,0($RB) !gpdisp!$NUM */ - Alpha_LDAg /* 375 */, Alpha_INS_LDA, + Alpha_LDAg /* 404 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* lda $RA,$DISP($RB) !gprellow */ - Alpha_LDAr /* 376 */, Alpha_INS_LDA, + Alpha_LDAr /* 405 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldbu $RA,$DISP($RB) */ - Alpha_LDBU /* 377 */, Alpha_INS_LDBU, + Alpha_LDBU /* 406 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldbu $RA,$DISP($RB) !gprellow */ - Alpha_LDBUr /* 378 */, Alpha_INS_LDBU, + Alpha_LDBUr /* 407 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldl $RA,$DISP($RB) */ - Alpha_LDL /* 379 */, Alpha_INS_LDL, + Alpha_LDL /* 408 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldl/l $RA,$DISP($RB) */ - Alpha_LDL_L /* 380 */, Alpha_INS_LDLsL, + Alpha_LDL_L /* 409 */, Alpha_INS_LDLsL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldl $RA,$DISP($RB) !gprellow */ - Alpha_LDLr /* 381 */, Alpha_INS_LDL, + Alpha_LDLr /* 410 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldq $RA,$DISP($RB) */ - Alpha_LDQ /* 382 */, Alpha_INS_LDQ, + Alpha_LDQ /* 411 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldq/l $RA,$DISP($RB) */ - Alpha_LDQ_L /* 383 */, Alpha_INS_LDQsL, + Alpha_LDQ_L /* 412 */, Alpha_INS_LDQsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* ldq_u $RA,$DISP($RB) */ + Alpha_LDQ_U /* 413 */, Alpha_INS_LDQ_U, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldq $RA,$DISP($RB) !literal */ - Alpha_LDQl /* 384 */, Alpha_INS_LDQ, + Alpha_LDQl /* 414 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldq $RA,$DISP($RB) !gprellow */ - Alpha_LDQr /* 385 */, Alpha_INS_LDQ, + Alpha_LDQr /* 415 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* lds $RA,$DISP($RB) */ - Alpha_LDS /* 386 */, Alpha_INS_LDS, + Alpha_LDS /* 416 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* lds $RA,$DISP($RB) !gprellow */ - Alpha_LDSr /* 387 */, Alpha_INS_LDS, + Alpha_LDSr /* 417 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldt $RA,$DISP($RB) */ - Alpha_LDT /* 388 */, Alpha_INS_LDT, + Alpha_LDT /* 418 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldt $RA,$DISP($RB) !gprellow */ - Alpha_LDTr /* 389 */, Alpha_INS_LDT, + Alpha_LDTr /* 419 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldwu $RA,$DISP($RB) */ - Alpha_LDWU /* 390 */, Alpha_INS_LDWU, + Alpha_LDWU /* 420 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ldwu $RA,$DISP($RB) !gprellow */ - Alpha_LDWUr /* 391 */, Alpha_INS_LDWU, + Alpha_LDWUr /* 421 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mb */ - Alpha_MB /* 392 */, Alpha_INS_MB, + Alpha_MB /* 422 */, Alpha_INS_MB, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKBL $RA,$RB,$RC */ + Alpha_MSKBL /* 423 */, Alpha_INS_MSKBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKBL $RA,$L,$RC */ + Alpha_MSKBLi /* 424 */, Alpha_INS_MSKBL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKLH $RA,$RB,$RC */ + Alpha_MSKLH /* 425 */, Alpha_INS_MSKLH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKLH $RA,$L,$RC */ + Alpha_MSKLHi /* 426 */, Alpha_INS_MSKLH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKLL $RA,$RB,$RC */ + Alpha_MSKLL /* 427 */, Alpha_INS_MSKLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKLL $RA,$L,$RC */ + Alpha_MSKLLi /* 428 */, Alpha_INS_MSKLL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKQH $RA,$RB,$RC */ + Alpha_MSKQH /* 429 */, Alpha_INS_MSKQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKQH $RA,$L,$RC */ + Alpha_MSKQHi /* 430 */, Alpha_INS_MSKQH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKQL $RA,$RB,$RC */ + Alpha_MSKQL /* 431 */, Alpha_INS_MSKQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKQL $RA,$L,$RC */ + Alpha_MSKQLi /* 432 */, Alpha_INS_MSKQL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKWH $RA,$RB,$RC */ + Alpha_MSKWH /* 433 */, Alpha_INS_MSKWH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKWH $RA,$L,$RC */ + Alpha_MSKWHi /* 434 */, Alpha_INS_MSKWH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKWL $RA,$RB,$RC */ + Alpha_MSKWL /* 435 */, Alpha_INS_MSKWL, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* MSKWL $RA,$L,$RC */ + Alpha_MSKWLi /* 436 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mull $RA,$L,$RC */ - Alpha_MULLi /* 393 */, Alpha_INS_MULL, + Alpha_MULLi /* 437 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mull $RA,$RB,$RC */ - Alpha_MULLr /* 394 */, Alpha_INS_MULL, + Alpha_MULLr /* 438 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mulq $RA,$L,$RC */ - Alpha_MULQi /* 395 */, Alpha_INS_MULQ, + Alpha_MULQi /* 439 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mulq $RA,$RB,$RC */ - Alpha_MULQr /* 396 */, Alpha_INS_MULQ, + Alpha_MULQr /* 440 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* muls/su $RA,$RB,$RC */ - Alpha_MULS /* 397 */, Alpha_INS_MULSsSU, + Alpha_MULS /* 441 */, Alpha_INS_MULSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* mult/su $RA,$RB,$RC */ - Alpha_MULT /* 398 */, Alpha_INS_MULTsSU, + Alpha_MULT /* 442 */, Alpha_INS_MULTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ornot $RA,$L,$RC */ - Alpha_ORNOTi /* 399 */, Alpha_INS_ORNOT, + Alpha_ORNOTi /* 443 */, Alpha_INS_ORNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ornot $RA,$RB,$RC */ - Alpha_ORNOTr /* 400 */, Alpha_INS_ORNOT, + Alpha_ORNOTr /* 444 */, Alpha_INS_ORNOT, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* rc $RA */ + Alpha_RC /* 445 */, Alpha_INS_RC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ret $$31,($$26),1 */ - Alpha_RETDAG /* 401 */, Alpha_INS_RET, + Alpha_RETDAG /* 446 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ret $$31,($$26),1 */ - Alpha_RETDAGp /* 402 */, Alpha_INS_RET, + Alpha_RETDAGp /* 447 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* rpcc $RA */ - Alpha_RPCC /* 403 */, Alpha_INS_RPCC, + Alpha_RPCC /* 448 */, Alpha_INS_RPCC, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* rs $RA */ + Alpha_RS /* 449 */, Alpha_INS_RS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4addl $RA,$L,$RC */ - Alpha_S4ADDLi /* 404 */, Alpha_INS_S4ADDL, + Alpha_S4ADDLi /* 450 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4addl $RA,$RB,$RC */ - Alpha_S4ADDLr /* 405 */, Alpha_INS_S4ADDL, + Alpha_S4ADDLr /* 451 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4addq $RA,$L,$RC */ - Alpha_S4ADDQi /* 406 */, Alpha_INS_S4ADDQ, + Alpha_S4ADDQi /* 452 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4addq $RA,$RB,$RC */ - Alpha_S4ADDQr /* 407 */, Alpha_INS_S4ADDQ, + Alpha_S4ADDQr /* 453 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4subl $RA,$L,$RC */ - Alpha_S4SUBLi /* 408 */, Alpha_INS_S4SUBL, + Alpha_S4SUBLi /* 454 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4subl $RA,$RB,$RC */ - Alpha_S4SUBLr /* 409 */, Alpha_INS_S4SUBL, + Alpha_S4SUBLr /* 455 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4subq $RA,$L,$RC */ - Alpha_S4SUBQi /* 410 */, Alpha_INS_S4SUBQ, + Alpha_S4SUBQi /* 456 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s4subq $RA,$RB,$RC */ - Alpha_S4SUBQr /* 411 */, Alpha_INS_S4SUBQ, + Alpha_S4SUBQr /* 457 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8addl $RA,$L,$RC */ - Alpha_S8ADDLi /* 412 */, Alpha_INS_S8ADDL, + Alpha_S8ADDLi /* 458 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8addl $RA,$RB,$RC */ - Alpha_S8ADDLr /* 413 */, Alpha_INS_S8ADDL, + Alpha_S8ADDLr /* 459 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8addq $RA,$L,$RC */ - Alpha_S8ADDQi /* 414 */, Alpha_INS_S8ADDQ, + Alpha_S8ADDQi /* 460 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8addq $RA,$RB,$RC */ - Alpha_S8ADDQr /* 415 */, Alpha_INS_S8ADDQ, + Alpha_S8ADDQr /* 461 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8subl $RA,$L,$RC */ - Alpha_S8SUBLi /* 416 */, Alpha_INS_S8SUBL, + Alpha_S8SUBLi /* 462 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8subl $RA,$RB,$RC */ - Alpha_S8SUBLr /* 417 */, Alpha_INS_S8SUBL, + Alpha_S8SUBLr /* 463 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8subq $RA,$L,$RC */ - Alpha_S8SUBQi /* 418 */, Alpha_INS_S8SUBQ, + Alpha_S8SUBQi /* 464 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* s8subq $RA,$RB,$RC */ - Alpha_S8SUBQr /* 419 */, Alpha_INS_S8SUBQ, + Alpha_S8SUBQr /* 465 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sextb $RB,$RC */ - Alpha_SEXTB /* 420 */, Alpha_INS_SEXTB, + Alpha_SEXTB /* 466 */, Alpha_INS_SEXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sextw $RB,$RC */ - Alpha_SEXTW /* 421 */, Alpha_INS_SEXTW, + Alpha_SEXTW /* 467 */, Alpha_INS_SEXTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sll $RA,$L,$RC */ - Alpha_SLi /* 422 */, Alpha_INS_SLL, + Alpha_SLi /* 468 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sll $RA,$RB,$RC */ - Alpha_SLr /* 423 */, Alpha_INS_SLL, + Alpha_SLr /* 469 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sqrts/su $RB,$RC */ - Alpha_SQRTS /* 424 */, Alpha_INS_SQRTSsSU, + Alpha_SQRTS /* 470 */, Alpha_INS_SQRTSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sqrtt/su $RB,$RC */ - Alpha_SQRTT /* 425 */, Alpha_INS_SQRTTsSU, + Alpha_SQRTT /* 471 */, Alpha_INS_SQRTTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sra $RA,$L,$RC */ - Alpha_SRAi /* 426 */, Alpha_INS_SRA, + Alpha_SRAi /* 472 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sra $RA,$RB,$RC */ - Alpha_SRAr /* 427 */, Alpha_INS_SRA, + Alpha_SRAr /* 473 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* srl $RA,$L,$RC */ - Alpha_SRLi /* 428 */, Alpha_INS_SRL, + Alpha_SRLi /* 474 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* srl $RA,$RB,$RC */ - Alpha_SRLr /* 429 */, Alpha_INS_SRL, + Alpha_SRLr /* 475 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stb $RA, $DISP($RB) */ - Alpha_STB /* 430 */, Alpha_INS_STB, + Alpha_STB /* 476 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stb $RA,$DISP($RB) !gprellow */ - Alpha_STBr /* 431 */, Alpha_INS_STB, + Alpha_STBr /* 477 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stl $RA,$DISP($RB) */ - Alpha_STL /* 432 */, Alpha_INS_STL, + Alpha_STL /* 478 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stl/l $RA,$DISP($RB) */ - Alpha_STL_C /* 433 */, Alpha_INS_STLsL, + Alpha_STL_C /* 479 */, Alpha_INS_STLsL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stl $RA,$DISP($RB) !gprellow */ - Alpha_STLr /* 434 */, Alpha_INS_STL, + Alpha_STLr /* 480 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stq $RA,$DISP($RB) */ - Alpha_STQ /* 435 */, Alpha_INS_STQ, + Alpha_STQ /* 481 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stq/l $RA,$DISP($RB) */ - Alpha_STQ_C /* 436 */, Alpha_INS_STQsL, + Alpha_STQ_C /* 482 */, Alpha_INS_STQsL, + #ifndef CAPSTONE_DIET + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* stq_u $RA, $DISP($RB) */ + Alpha_STQ_U /* 483 */, Alpha_INS_STQ_U, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stq $RA,$DISP($RB) !gprellow */ - Alpha_STQr /* 437 */, Alpha_INS_STQ, + Alpha_STQr /* 484 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sts $RA,$DISP($RB) */ - Alpha_STS /* 438 */, Alpha_INS_STS, + Alpha_STS /* 485 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* sts $RA,$DISP($RB) !gprellow */ - Alpha_STSr /* 439 */, Alpha_INS_STS, + Alpha_STSr /* 486 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stt $RA,$DISP($RB) */ - Alpha_STT /* 440 */, Alpha_INS_STT, + Alpha_STT /* 487 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stt $RA,$DISP($RB) !gprellow */ - Alpha_STTr /* 441 */, Alpha_INS_STT, + Alpha_STTr /* 488 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stw $RA,$DISP($RB) */ - Alpha_STW /* 442 */, Alpha_INS_STW, + Alpha_STW /* 489 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* stw $RA,$DISP($RB) !gprellow */ - Alpha_STWr /* 443 */, Alpha_INS_STW, + Alpha_STWr /* 490 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subl $RA,$L,$RC */ - Alpha_SUBLi /* 444 */, Alpha_INS_SUBL, + Alpha_SUBLi /* 491 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subl $RA,$RB,$RC */ - Alpha_SUBLr /* 445 */, Alpha_INS_SUBL, + Alpha_SUBLr /* 492 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subq $RA,$L,$RC */ - Alpha_SUBQi /* 446 */, Alpha_INS_SUBQ, + Alpha_SUBQi /* 493 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subq $RA,$RB,$RC */ - Alpha_SUBQr /* 447 */, Alpha_INS_SUBQ, + Alpha_SUBQr /* 494 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subs/su $RA,$RB,$RC */ - Alpha_SUBS /* 448 */, Alpha_INS_SUBSsSU, + Alpha_SUBS /* 495 */, Alpha_INS_SUBSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* subt/su $RA,$RB,$RC */ - Alpha_SUBT /* 449 */, Alpha_INS_SUBTsSU, + Alpha_SUBT /* 496 */, Alpha_INS_SUBTsSU, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* trapb */ + Alpha_TRAPB /* 497 */, Alpha_INS_TRAPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* umulh $RA,$L,$RC */ - Alpha_UMULHi /* 450 */, Alpha_INS_UMULH, + Alpha_UMULHi /* 498 */, Alpha_INS_UMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* umulh $RA,$RB,$RC */ - Alpha_UMULHr /* 451 */, Alpha_INS_UMULH, + Alpha_UMULHr /* 499 */, Alpha_INS_UMULH, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* wh64 ($RB) */ + Alpha_WH64 /* 500 */, Alpha_INS_WH64, + #ifndef CAPSTONE_DIET + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + #endif +}, +{ + /* wh64en ($RB) */ + Alpha_WH64EN /* 501 */, Alpha_INS_WH64EN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* wmb */ - Alpha_WMB /* 452 */, Alpha_INS_WMB, + Alpha_WMB /* 502 */, Alpha_INS_WMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* xor $RA,$L,$RC */ - Alpha_XORi /* 453 */, Alpha_INS_XOR, + Alpha_XORi /* 503 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* xor $RA,$RB,$RC */ - Alpha_XORr /* 454 */, Alpha_INS_XOR, + Alpha_XORr /* 504 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* zapnot $RA,$L,$RC */ - Alpha_ZAPNOTi /* 455 */, Alpha_INS_ZAPNOT, + Alpha_ZAPNOTi /* 505 */, Alpha_INS_ZAPNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif diff --git a/arch/Alpha/AlphaGenCSMappingInsnName.inc b/arch/Alpha/AlphaGenCSMappingInsnName.inc index cfde97b1fc..225e7492b5 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnName.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnName.inc @@ -61,9 +61,15 @@ "cvtts/sui", // Alpha_INS_CVTTSsSUI "divs/su", // Alpha_INS_DIVSsSU "divt/su", // Alpha_INS_DIVTsSU + "ecb", // Alpha_INS_ECB "eqv", // Alpha_INS_EQV + "excb", // Alpha_INS_EXCB "EXTBL", // Alpha_INS_EXTBL + "EXTLH", // Alpha_INS_EXTLH "EXTLL", // Alpha_INS_EXTLL + "EXTQH", // Alpha_INS_EXTQH + "EXTQL", // Alpha_INS_EXTQL + "EXTWH", // Alpha_INS_EXTWH "EXTWL", // Alpha_INS_EXTWL "fbeq", // Alpha_INS_FBEQ "fbge", // Alpha_INS_FBGE @@ -77,8 +83,17 @@ "fcmovle", // Alpha_INS_FCMOVLE "fcmovlt", // Alpha_INS_FCMOVLT "fcmovne", // Alpha_INS_FCMOVNE + "fetch", // Alpha_INS_FETCH + "fetch_m", // Alpha_INS_FETCH_M "ftois", // Alpha_INS_FTOIS "ftoit", // Alpha_INS_FTOIT + "INSBL", // Alpha_INS_INSBL + "INSLH", // Alpha_INS_INSLH + "INSLL", // Alpha_INS_INSLL + "INSQH", // Alpha_INS_INSQH + "INSQL", // Alpha_INS_INSQL + "INSWH", // Alpha_INS_INSWH + "INSWL", // Alpha_INS_INSWL "itofs", // Alpha_INS_ITOFS "itoft", // Alpha_INS_ITOFT "jmp", // Alpha_INS_JMP @@ -91,17 +106,27 @@ "ldl/l", // Alpha_INS_LDLsL "ldq", // Alpha_INS_LDQ "ldq/l", // Alpha_INS_LDQsL + "ldq_u", // Alpha_INS_LDQ_U "lds", // Alpha_INS_LDS "ldt", // Alpha_INS_LDT "ldwu", // Alpha_INS_LDWU "mb", // Alpha_INS_MB + "MSKBL", // Alpha_INS_MSKBL + "MSKLH", // Alpha_INS_MSKLH + "MSKLL", // Alpha_INS_MSKLL + "MSKQH", // Alpha_INS_MSKQH + "MSKQL", // Alpha_INS_MSKQL + "MSKWH", // Alpha_INS_MSKWH + "MSKWL", // Alpha_INS_MSKWL "mull", // Alpha_INS_MULL "mulq", // Alpha_INS_MULQ "muls/su", // Alpha_INS_MULSsSU "mult/su", // Alpha_INS_MULTsSU "ornot", // Alpha_INS_ORNOT + "rc", // Alpha_INS_RC "ret", // Alpha_INS_RET "rpcc", // Alpha_INS_RPCC + "rs", // Alpha_INS_RS "s4addl", // Alpha_INS_S4ADDL "s4addq", // Alpha_INS_S4ADDQ "s4subl", // Alpha_INS_S4SUBL @@ -122,6 +147,7 @@ "stl/l", // Alpha_INS_STLsL "stq", // Alpha_INS_STQ "stq/l", // Alpha_INS_STQsL + "stq_u", // Alpha_INS_STQ_U "sts", // Alpha_INS_STS "stt", // Alpha_INS_STT "stw", // Alpha_INS_STW @@ -129,7 +155,10 @@ "subq", // Alpha_INS_SUBQ "subs/su", // Alpha_INS_SUBSsSU "subt/su", // Alpha_INS_SUBTsSU + "trapb", // Alpha_INS_TRAPB "umulh", // Alpha_INS_UMULH + "wh64", // Alpha_INS_WH64 + "wh64en", // Alpha_INS_WH64EN "wmb", // Alpha_INS_WMB "xor", // Alpha_INS_XOR "zapnot", // Alpha_INS_ZAPNOT diff --git a/arch/Alpha/AlphaGenCSMappingInsnOp.inc b/arch/Alpha/AlphaGenCSMappingInsnOp.inc index 6606725419..acb2db0602 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnOp.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnOp.inc @@ -1337,78 +1337,165 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EQVi (340) - Alpha_INS_EQV - eqv $RA,$L,$RC */ +{ /* Alpha_ECB (340) - Alpha_INS_ECB - ecb ($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EQVi (341) - Alpha_INS_EQV - eqv $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EQVr (342) - Alpha_INS_EQV - eqv $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXCB (343) - Alpha_INS_EXCB - excb */ +{ + { 0 } +}}, +{ /* Alpha_EXTBL (344) - Alpha_INS_EXTBL - EXTBL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTBLi (345) - Alpha_INS_EXTBL - EXTBL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EXTLH (346) - Alpha_INS_EXTLH - EXTLH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTLHi (347) - Alpha_INS_EXTLH - EXTLH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EXTLL (348) - Alpha_INS_EXTLL - EXTLL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_EXTLLi (349) - Alpha_INS_EXTLL - EXTLL $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EQVr (341) - Alpha_INS_EQV - eqv $RA,$RB,$RC */ +{ /* Alpha_EXTQH (350) - Alpha_INS_EXTQH - EXTQH $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTBL (342) - Alpha_INS_EXTBL - EXTBL $RA,$RB,$RC */ +{ /* Alpha_EXTQHi (351) - Alpha_INS_EXTQH - EXTQH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EXTQL (352) - Alpha_INS_EXTQL - EXTQL $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTLL (343) - Alpha_INS_EXTLL - EXTLL $RA,$RB,$RC */ +{ /* Alpha_EXTQLi (353) - Alpha_INS_EXTQL - EXTQL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EXTWH (354) - Alpha_INS_EXTWH - EXTWH $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTWL (344) - Alpha_INS_EXTWL - EXTWL $RA,$RB,$RC */ +{ /* Alpha_EXTWHi (355) - Alpha_INS_EXTWH - EXTWH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_EXTWL (356) - Alpha_INS_EXTWL - EXTWL $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_FBEQ (345) - Alpha_INS_FBEQ - fbeq $R,$dst */ +{ /* Alpha_EXTWLi (357) - Alpha_INS_EXTWL - EXTWL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_FBEQ (358) - Alpha_INS_FBEQ - fbeq $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FBGE (346) - Alpha_INS_FBGE - fbge $R,$dst */ +{ /* Alpha_FBGE (359) - Alpha_INS_FBGE - fbge $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FBGT (347) - Alpha_INS_FBGT - fbgt $R,$dst */ +{ /* Alpha_FBGT (360) - Alpha_INS_FBGT - fbgt $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FBLE (348) - Alpha_INS_FBLE - fble $R,$dst */ +{ /* Alpha_FBLE (361) - Alpha_INS_FBLE - fble $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FBLT (349) - Alpha_INS_FBLT - fblt $R,$dst */ +{ /* Alpha_FBLT (362) - Alpha_INS_FBLT - fblt $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FBNE (350) - Alpha_INS_FBNE - fbne $R,$dst */ +{ /* Alpha_FBNE (363) - Alpha_INS_FBNE - fbne $R,$dst */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ { 0 } }}, -{ /* Alpha_FCMOVEQS (351) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVEQS (364) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1416,7 +1503,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVEQT (352) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVEQT (365) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1424,7 +1511,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVGES (353) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVGES (366) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1432,7 +1519,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVGET (354) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVGET (367) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1440,7 +1527,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVGTS (355) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVGTS (368) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1448,7 +1535,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVGTT (356) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVGTT (369) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1456,7 +1543,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVLES (357) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVLES (370) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1464,7 +1551,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVLET (358) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVLET (371) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1472,7 +1559,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVLTS (359) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVLTS (372) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1480,7 +1567,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVLTT (360) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVLTT (373) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1488,7 +1575,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVNES (361) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVNES (374) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1496,7 +1583,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FCMOVNET (362) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ +{ /* Alpha_FCMOVNET (375) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ @@ -1504,65 +1591,175 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ { 0 } }}, -{ /* Alpha_FTOIS (363) - Alpha_INS_FTOIS - ftois $RA,$RC */ +{ /* Alpha_FETCH (376) - Alpha_INS_FETCH - fetch ($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_FETCH_M (377) - Alpha_INS_FETCH_M - fetch_m ($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_FTOIS (378) - Alpha_INS_FTOIS - ftois $RA,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_FTOIT (364) - Alpha_INS_FTOIT - ftoit $RA,$RC */ +{ /* Alpha_FTOIT (379) - Alpha_INS_FTOIT - ftoit $RA,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_ITOFS (365) - Alpha_INS_ITOFS - itofs $RA,$RC */ +{ /* Alpha_INSBL (380) - Alpha_INS_INSBL - INSBL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSBLi (381) - Alpha_INS_INSBL - INSBL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSLH (382) - Alpha_INS_INSLH - INSLH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSLHi (383) - Alpha_INS_INSLH - INSLH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSLL (384) - Alpha_INS_INSLL - INSLL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSLLi (385) - Alpha_INS_INSLL - INSLL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSQH (386) - Alpha_INS_INSQH - INSQH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSQHi (387) - Alpha_INS_INSQH - INSQH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSQL (388) - Alpha_INS_INSQL - INSQL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSQLi (389) - Alpha_INS_INSQL - INSQL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSWH (390) - Alpha_INS_INSWH - INSWH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSWHi (391) - Alpha_INS_INSWH - INSWH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_INSWL (392) - Alpha_INS_INSWL - INSWL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_INSWLi (393) - Alpha_INS_INSWL - INSWL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_ITOFS (394) - Alpha_INS_ITOFS - itofs $RA,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_ITOFT (366) - Alpha_INS_ITOFT - itoft $RA,$RC */ +{ /* Alpha_ITOFT (395) - Alpha_INS_ITOFT - itoft $RA,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_JMP (367) - Alpha_INS_JMP - jmp $$31,{$RS},0 */ +{ /* Alpha_JMP (396) - Alpha_INS_JMP - jmp $$31,{$RS},0 */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ { 0 } }}, -{ /* Alpha_JSR (368) - Alpha_INS_JSR - jsr $$26,($$27),0 */ +{ /* Alpha_JSR (397) - Alpha_INS_JSR - jsr $$26,($$27),0 */ { { 0 } }}, -{ /* Alpha_JSR_COROUTINE (369) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,( $RS ),$DISP */ +{ /* Alpha_JSR_COROUTINE (398) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,( $RS ),$DISP */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RD */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { 0 } }}, -{ /* Alpha_JSRs (370) - Alpha_INS_JSR - jsr $$23,($$27),0 */ +{ /* Alpha_JSRs (399) - Alpha_INS_JSR - jsr $$23,($$27),0 */ { { 0 } }}, -{ /* Alpha_LDA (371) - Alpha_INS_LDA - lda $RA,$DISP($RB) */ +{ /* Alpha_LDA (400) - Alpha_INS_LDA - lda $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDAH (372) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) */ +{ /* Alpha_LDAH (401) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDAHg (373) - Alpha_INS_LDAH - ldah $RA,0($RB) !gpdisp!$NUM */ +{ /* Alpha_LDAHg (402) - Alpha_INS_LDAH - ldah $RA,0($RB) !gpdisp!$NUM */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ @@ -1570,14 +1767,14 @@ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ { 0 } }}, -{ /* Alpha_LDAHr (374) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) !gprelhigh */ +{ /* Alpha_LDAHr (403) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) !gprelhigh */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDAg (375) - Alpha_INS_LDA - lda $RA,0($RB) !gpdisp!$NUM */ +{ /* Alpha_LDAg (404) - Alpha_INS_LDA - lda $RA,0($RB) !gpdisp!$NUM */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ @@ -1585,391 +1782,506 @@ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ { 0 } }}, -{ /* Alpha_LDAr (376) - Alpha_INS_LDA - lda $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDAr (405) - Alpha_INS_LDA - lda $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_LDBU (406) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDBU (377) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) */ +{ /* Alpha_LDBUr (407) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDBUr (378) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDL (408) - Alpha_INS_LDL - ldl $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDL (379) - Alpha_INS_LDL - ldl $RA,$DISP($RB) */ +{ /* Alpha_LDL_L (409) - Alpha_INS_LDLsL - ldl/l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDL_L (380) - Alpha_INS_LDLsL - ldl/l $RA,$DISP($RB) */ +{ /* Alpha_LDLr (410) - Alpha_INS_LDL - ldl $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDLr (381) - Alpha_INS_LDL - ldl $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDQ (411) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDQ (382) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) */ +{ /* Alpha_LDQ_L (412) - Alpha_INS_LDQsL - ldq/l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDQ_L (383) - Alpha_INS_LDQsL - ldq/l $RA,$DISP($RB) */ +{ /* Alpha_LDQ_U (413) - Alpha_INS_LDQ_U - ldq_u $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDQl (384) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !literal */ +{ /* Alpha_LDQl (414) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !literal */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDQr (385) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDQr (415) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDS (386) - Alpha_INS_LDS - lds $RA,$DISP($RB) */ +{ /* Alpha_LDS (416) - Alpha_INS_LDS - lds $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDSr (387) - Alpha_INS_LDS - lds $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDSr (417) - Alpha_INS_LDS - lds $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDT (388) - Alpha_INS_LDT - ldt $RA,$DISP($RB) */ +{ /* Alpha_LDT (418) - Alpha_INS_LDT - ldt $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDTr (389) - Alpha_INS_LDT - ldt $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDTr (419) - Alpha_INS_LDT - ldt $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDWU (390) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) */ +{ /* Alpha_LDWU (420) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDWUr (391) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) !gprellow */ +{ /* Alpha_LDWUr (421) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MB (392) - Alpha_INS_MB - mb */ +{ /* Alpha_MB (422) - Alpha_INS_MB - mb */ +{ + { 0 } +}}, +{ /* Alpha_MSKBL (423) - Alpha_INS_MSKBL - MSKBL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MSKBLi (424) - Alpha_INS_MSKBL - MSKBL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MSKLH (425) - Alpha_INS_MSKLH - MSKLH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MSKLHi (426) - Alpha_INS_MSKLH - MSKLH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MSKLL (427) - Alpha_INS_MSKLL - MSKLL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MSKLLi (428) - Alpha_INS_MSKLL - MSKLL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MSKQH (429) - Alpha_INS_MSKQH - MSKQH $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MSKQHi (430) - Alpha_INS_MSKQH - MSKQH $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MSKQL (431) - Alpha_INS_MSKQL - MSKQL $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MSKQLi (432) - Alpha_INS_MSKQL - MSKQL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MSKWH (433) - Alpha_INS_MSKWH - MSKWH $RA,$RB,$RC */ { + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MULLi (393) - Alpha_INS_MULL - mull $RA,$L,$RC */ +{ /* Alpha_MSKWHi (434) - Alpha_INS_MSKWH - MSKWH $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MULLr (394) - Alpha_INS_MULL - mull $RA,$RB,$RC */ +{ /* Alpha_MSKWL (435) - Alpha_INS_MSKWL - MSKWL $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MULQi (395) - Alpha_INS_MULQ - mulq $RA,$L,$RC */ +{ /* Alpha_MSKWLi (436) - Alpha_INS_MSKWL - MSKWL $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MULLi (437) - Alpha_INS_MULL - mull $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MULQr (396) - Alpha_INS_MULQ - mulq $RA,$RB,$RC */ +{ /* Alpha_MULLr (438) - Alpha_INS_MULL - mull $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MULS (397) - Alpha_INS_MULSsSU - muls/su $RA,$RB,$RC */ +{ /* Alpha_MULQi (439) - Alpha_INS_MULQ - mulq $RA,$L,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { 0 } +}}, +{ /* Alpha_MULQr (440) - Alpha_INS_MULQ - mulq $RA,$RB,$RC */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_MULS (441) - Alpha_INS_MULSsSU - muls/su $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MULT (398) - Alpha_INS_MULTsSU - mult/su $RA,$RB,$RC */ +{ /* Alpha_MULT (442) - Alpha_INS_MULTsSU - mult/su $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_ORNOTi (399) - Alpha_INS_ORNOT - ornot $RA,$L,$RC */ +{ /* Alpha_ORNOTi (443) - Alpha_INS_ORNOT - ornot $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_ORNOTr (400) - Alpha_INS_ORNOT - ornot $RA,$RB,$RC */ +{ /* Alpha_ORNOTr (444) - Alpha_INS_ORNOT - ornot $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_RETDAG (401) - Alpha_INS_RET - ret $$31,($$26),1 */ +{ /* Alpha_RC (445) - Alpha_INS_RC - rc $RA */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_RETDAG (446) - Alpha_INS_RET - ret $$31,($$26),1 */ { { 0 } }}, -{ /* Alpha_RETDAGp (402) - Alpha_INS_RET - ret $$31,($$26),1 */ +{ /* Alpha_RETDAGp (447) - Alpha_INS_RET - ret $$31,($$26),1 */ { { 0 } }}, -{ /* Alpha_RPCC (403) - Alpha_INS_RPCC - rpcc $RA */ +{ /* Alpha_RPCC (448) - Alpha_INS_RPCC - rpcc $RA */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_S4ADDLi (404) - Alpha_INS_S4ADDL - s4addl $RA,$L,$RC */ +{ /* Alpha_RS (449) - Alpha_INS_RS - rs $RA */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { 0 } +}}, +{ /* Alpha_S4ADDLi (450) - Alpha_INS_S4ADDL - s4addl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S4ADDLr (405) - Alpha_INS_S4ADDL - s4addl $RA,$RB,$RC */ +{ /* Alpha_S4ADDLr (451) - Alpha_INS_S4ADDL - s4addl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S4ADDQi (406) - Alpha_INS_S4ADDQ - s4addq $RA,$L,$RC */ +{ /* Alpha_S4ADDQi (452) - Alpha_INS_S4ADDQ - s4addq $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S4ADDQr (407) - Alpha_INS_S4ADDQ - s4addq $RA,$RB,$RC */ +{ /* Alpha_S4ADDQr (453) - Alpha_INS_S4ADDQ - s4addq $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S4SUBLi (408) - Alpha_INS_S4SUBL - s4subl $RA,$L,$RC */ +{ /* Alpha_S4SUBLi (454) - Alpha_INS_S4SUBL - s4subl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S4SUBLr (409) - Alpha_INS_S4SUBL - s4subl $RA,$RB,$RC */ +{ /* Alpha_S4SUBLr (455) - Alpha_INS_S4SUBL - s4subl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S4SUBQi (410) - Alpha_INS_S4SUBQ - s4subq $RA,$L,$RC */ +{ /* Alpha_S4SUBQi (456) - Alpha_INS_S4SUBQ - s4subq $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S4SUBQr (411) - Alpha_INS_S4SUBQ - s4subq $RA,$RB,$RC */ +{ /* Alpha_S4SUBQr (457) - Alpha_INS_S4SUBQ - s4subq $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S8ADDLi (412) - Alpha_INS_S8ADDL - s8addl $RA,$L,$RC */ +{ /* Alpha_S8ADDLi (458) - Alpha_INS_S8ADDL - s8addl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S8ADDLr (413) - Alpha_INS_S8ADDL - s8addl $RA,$RB,$RC */ +{ /* Alpha_S8ADDLr (459) - Alpha_INS_S8ADDL - s8addl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S8ADDQi (414) - Alpha_INS_S8ADDQ - s8addq $RA,$L,$RC */ +{ /* Alpha_S8ADDQi (460) - Alpha_INS_S8ADDQ - s8addq $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S8ADDQr (415) - Alpha_INS_S8ADDQ - s8addq $RA,$RB,$RC */ +{ /* Alpha_S8ADDQr (461) - Alpha_INS_S8ADDQ - s8addq $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S8SUBLi (416) - Alpha_INS_S8SUBL - s8subl $RA,$L,$RC */ +{ /* Alpha_S8SUBLi (462) - Alpha_INS_S8SUBL - s8subl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S8SUBLr (417) - Alpha_INS_S8SUBL - s8subl $RA,$RB,$RC */ +{ /* Alpha_S8SUBLr (463) - Alpha_INS_S8SUBL - s8subl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_S8SUBQi (418) - Alpha_INS_S8SUBQ - s8subq $RA,$L,$RC */ +{ /* Alpha_S8SUBQi (464) - Alpha_INS_S8SUBQ - s8subq $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_S8SUBQr (419) - Alpha_INS_S8SUBQ - s8subq $RA,$RB,$RC */ +{ /* Alpha_S8SUBQr (465) - Alpha_INS_S8SUBQ - s8subq $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SEXTB (420) - Alpha_INS_SEXTB - sextb $RB,$RC */ +{ /* Alpha_SEXTB (466) - Alpha_INS_SEXTB - sextb $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SEXTW (421) - Alpha_INS_SEXTW - sextw $RB,$RC */ +{ /* Alpha_SEXTW (467) - Alpha_INS_SEXTW - sextw $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SLi (422) - Alpha_INS_SLL - sll $RA,$L,$RC */ +{ /* Alpha_SLi (468) - Alpha_INS_SLL - sll $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_SLr (423) - Alpha_INS_SLL - sll $RA,$RB,$RC */ +{ /* Alpha_SLr (469) - Alpha_INS_SLL - sll $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SQRTS (424) - Alpha_INS_SQRTSsSU - sqrts/su $RB,$RC */ +{ /* Alpha_SQRTS (470) - Alpha_INS_SQRTSsSU - sqrts/su $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SQRTT (425) - Alpha_INS_SQRTTsSU - sqrtt/su $RB,$RC */ +{ /* Alpha_SQRTT (471) - Alpha_INS_SQRTTsSU - sqrtt/su $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SRAi (426) - Alpha_INS_SRA - sra $RA,$L,$RC */ +{ /* Alpha_SRAi (472) - Alpha_INS_SRA - sra $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_SRAr (427) - Alpha_INS_SRA - sra $RA,$RB,$RC */ +{ /* Alpha_SRAr (473) - Alpha_INS_SRA - sra $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SRLi (428) - Alpha_INS_SRL - srl $RA,$L,$RC */ +{ /* Alpha_SRLi (474) - Alpha_INS_SRL - srl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_SRLr (429) - Alpha_INS_SRL - srl $RA,$RB,$RC */ +{ /* Alpha_SRLr (475) - Alpha_INS_SRL - srl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STB (430) - Alpha_INS_STB - stb $RA, $DISP($RB) */ +{ /* Alpha_STB (476) - Alpha_INS_STB - stb $RA, $DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STBr (431) - Alpha_INS_STB - stb $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STBr (477) - Alpha_INS_STB - stb $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STL (432) - Alpha_INS_STL - stl $RA,$DISP($RB) */ +{ /* Alpha_STL (478) - Alpha_INS_STL - stl $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STL_C (433) - Alpha_INS_STLsL - stl/l $RA,$DISP($RB) */ +{ /* Alpha_STL_C (479) - Alpha_INS_STLsL - stl/l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -1977,21 +2289,21 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STLr (434) - Alpha_INS_STL - stl $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STLr (480) - Alpha_INS_STL - stl $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STQ (435) - Alpha_INS_STQ - stq $RA,$DISP($RB) */ +{ /* Alpha_STQ (481) - Alpha_INS_STQ - stq $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STQ_C (436) - Alpha_INS_STQsL - stq/l $RA,$DISP($RB) */ +{ /* Alpha_STQ_C (482) - Alpha_INS_STQsL - stq/l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -1999,130 +2311,153 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STQr (437) - Alpha_INS_STQ - stq $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STQ_U (483) - Alpha_INS_STQ_U - stq_u $RA, $DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STS (438) - Alpha_INS_STS - sts $RA,$DISP($RB) */ +{ /* Alpha_STQr (484) - Alpha_INS_STQ - stq $RA,$DISP($RB) !gprellow */ +{ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_STS (485) - Alpha_INS_STS - sts $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STSr (439) - Alpha_INS_STS - sts $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STSr (486) - Alpha_INS_STS - sts $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STT (440) - Alpha_INS_STT - stt $RA,$DISP($RB) */ +{ /* Alpha_STT (487) - Alpha_INS_STT - stt $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STTr (441) - Alpha_INS_STT - stt $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STTr (488) - Alpha_INS_STT - stt $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STW (442) - Alpha_INS_STW - stw $RA,$DISP($RB) */ +{ /* Alpha_STW (489) - Alpha_INS_STW - stw $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STWr (443) - Alpha_INS_STW - stw $RA,$DISP($RB) !gprellow */ +{ /* Alpha_STWr (490) - Alpha_INS_STW - stw $RA,$DISP($RB) !gprellow */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SUBLi (444) - Alpha_INS_SUBL - subl $RA,$L,$RC */ +{ /* Alpha_SUBLi (491) - Alpha_INS_SUBL - subl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_SUBLr (445) - Alpha_INS_SUBL - subl $RA,$RB,$RC */ +{ /* Alpha_SUBLr (492) - Alpha_INS_SUBL - subl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SUBQi (446) - Alpha_INS_SUBQ - subq $RA,$L,$RC */ +{ /* Alpha_SUBQi (493) - Alpha_INS_SUBQ - subq $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_SUBQr (447) - Alpha_INS_SUBQ - subq $RA,$RB,$RC */ +{ /* Alpha_SUBQr (494) - Alpha_INS_SUBQ - subq $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SUBS (448) - Alpha_INS_SUBSsSU - subs/su $RA,$RB,$RC */ +{ /* Alpha_SUBS (495) - Alpha_INS_SUBSsSU - subs/su $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_SUBT (449) - Alpha_INS_SUBTsSU - subt/su $RA,$RB,$RC */ +{ /* Alpha_SUBT (496) - Alpha_INS_SUBTsSU - subt/su $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_UMULHi (450) - Alpha_INS_UMULH - umulh $RA,$L,$RC */ +{ /* Alpha_TRAPB (497) - Alpha_INS_TRAPB - trapb */ +{ + { 0 } +}}, +{ /* Alpha_UMULHi (498) - Alpha_INS_UMULH - umulh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_UMULHr (451) - Alpha_INS_UMULH - umulh $RA,$RB,$RC */ +{ /* Alpha_UMULHr (499) - Alpha_INS_UMULH - umulh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_WMB (452) - Alpha_INS_WMB - wmb */ +{ /* Alpha_WH64 (500) - Alpha_INS_WH64 - wh64 ($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_WH64EN (501) - Alpha_INS_WH64EN - wh64en ($RB) */ +{ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { 0 } +}}, +{ /* Alpha_WMB (502) - Alpha_INS_WMB - wmb */ { { 0 } }}, -{ /* Alpha_XORi (453) - Alpha_INS_XOR - xor $RA,$L,$RC */ +{ /* Alpha_XORi (503) - Alpha_INS_XOR - xor $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_XORr (454) - Alpha_INS_XOR - xor $RA,$RB,$RC */ +{ /* Alpha_XORr (504) - Alpha_INS_XOR - xor $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_ZAPNOTi (455) - Alpha_INS_ZAPNOT - zapnot $RA,$L,$RC */ +{ /* Alpha_ZAPNOTi (505) - Alpha_INS_ZAPNOT - zapnot $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ diff --git a/arch/Alpha/AlphaGenDisassemblerTables.inc b/arch/Alpha/AlphaGenDisassemblerTables.inc index 570139def6..fe58c6768b 100644 --- a/arch/Alpha/AlphaGenDisassemblerTables.inc +++ b/arch/Alpha/AlphaGenDisassemblerTables.inc @@ -31,417 +31,540 @@ static const uint8_t DecoderTable32[] = { /* 3 */ MCD_OPC_FilterValue, 0, 4, 0, 0, // Skip to: 12 /* 8 */ MCD_OPC_Decode, 190, 2, 0, // Opcode: COND_BRANCH_I /* 12 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 21 -/* 17 */ MCD_OPC_Decode, 243, 2, 1, // Opcode: LDA +/* 17 */ MCD_OPC_Decode, 144, 3, 1, // Opcode: LDA /* 21 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 30 -/* 26 */ MCD_OPC_Decode, 244, 2, 1, // Opcode: LDAH +/* 26 */ MCD_OPC_Decode, 145, 3, 1, // Opcode: LDAH /* 30 */ MCD_OPC_FilterValue, 10, 4, 0, 0, // Skip to: 39 -/* 35 */ MCD_OPC_Decode, 249, 2, 1, // Opcode: LDBU -/* 39 */ MCD_OPC_FilterValue, 12, 4, 0, 0, // Skip to: 48 -/* 44 */ MCD_OPC_Decode, 134, 3, 1, // Opcode: LDWU -/* 48 */ MCD_OPC_FilterValue, 13, 4, 0, 0, // Skip to: 57 -/* 53 */ MCD_OPC_Decode, 186, 3, 1, // Opcode: STW -/* 57 */ MCD_OPC_FilterValue, 14, 4, 0, 0, // Skip to: 66 -/* 62 */ MCD_OPC_Decode, 174, 3, 1, // Opcode: STB -/* 66 */ MCD_OPC_FilterValue, 16, 215, 1, 0, // Skip to: 542 -/* 71 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... -/* 74 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 90 -/* 79 */ MCD_OPC_CheckField, 13, 3, 0, 180, 7, 0, // Skip to: 2058 -/* 86 */ MCD_OPC_Decode, 136, 2, 2, // Opcode: ADDLr -/* 90 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 106 -/* 95 */ MCD_OPC_CheckField, 13, 3, 0, 164, 7, 0, // Skip to: 2058 -/* 102 */ MCD_OPC_Decode, 149, 3, 2, // Opcode: S4ADDLr -/* 106 */ MCD_OPC_FilterValue, 9, 11, 0, 0, // Skip to: 122 -/* 111 */ MCD_OPC_CheckField, 13, 3, 0, 148, 7, 0, // Skip to: 2058 -/* 118 */ MCD_OPC_Decode, 189, 3, 2, // Opcode: SUBLr -/* 122 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 138 -/* 127 */ MCD_OPC_CheckField, 13, 3, 0, 132, 7, 0, // Skip to: 2058 -/* 134 */ MCD_OPC_Decode, 153, 3, 2, // Opcode: S4SUBLr -/* 138 */ MCD_OPC_FilterValue, 15, 11, 0, 0, // Skip to: 154 -/* 143 */ MCD_OPC_CheckField, 13, 3, 0, 116, 7, 0, // Skip to: 2058 -/* 150 */ MCD_OPC_Decode, 173, 2, 2, // Opcode: CMPBGE -/* 154 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 170 -/* 159 */ MCD_OPC_CheckField, 13, 3, 0, 100, 7, 0, // Skip to: 2058 -/* 166 */ MCD_OPC_Decode, 157, 3, 2, // Opcode: S8ADDLr -/* 170 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 186 -/* 175 */ MCD_OPC_CheckField, 13, 3, 0, 84, 7, 0, // Skip to: 2058 -/* 182 */ MCD_OPC_Decode, 161, 3, 2, // Opcode: S8SUBLr -/* 186 */ MCD_OPC_FilterValue, 29, 11, 0, 0, // Skip to: 202 -/* 191 */ MCD_OPC_CheckField, 13, 3, 0, 68, 7, 0, // Skip to: 2058 -/* 198 */ MCD_OPC_Decode, 187, 2, 2, // Opcode: CMPULT -/* 202 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 218 -/* 207 */ MCD_OPC_CheckField, 13, 3, 0, 52, 7, 0, // Skip to: 2058 -/* 214 */ MCD_OPC_Decode, 138, 2, 2, // Opcode: ADDQr -/* 218 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 234 -/* 223 */ MCD_OPC_CheckField, 13, 3, 0, 36, 7, 0, // Skip to: 2058 -/* 230 */ MCD_OPC_Decode, 151, 3, 2, // Opcode: S4ADDQr -/* 234 */ MCD_OPC_FilterValue, 41, 11, 0, 0, // Skip to: 250 -/* 239 */ MCD_OPC_CheckField, 13, 3, 0, 20, 7, 0, // Skip to: 2058 -/* 246 */ MCD_OPC_Decode, 191, 3, 2, // Opcode: SUBQr -/* 250 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 266 -/* 255 */ MCD_OPC_CheckField, 13, 3, 0, 4, 7, 0, // Skip to: 2058 -/* 262 */ MCD_OPC_Decode, 155, 3, 2, // Opcode: S4SUBQr -/* 266 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 282 -/* 271 */ MCD_OPC_CheckField, 13, 3, 0, 244, 6, 0, // Skip to: 2058 -/* 278 */ MCD_OPC_Decode, 175, 2, 2, // Opcode: CMPEQ -/* 282 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 298 -/* 287 */ MCD_OPC_CheckField, 13, 3, 0, 228, 6, 0, // Skip to: 2058 -/* 294 */ MCD_OPC_Decode, 159, 3, 2, // Opcode: S8ADDQr -/* 298 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 314 -/* 303 */ MCD_OPC_CheckField, 13, 3, 0, 212, 6, 0, // Skip to: 2058 -/* 310 */ MCD_OPC_Decode, 163, 3, 2, // Opcode: S8SUBQr -/* 314 */ MCD_OPC_FilterValue, 61, 11, 0, 0, // Skip to: 330 -/* 319 */ MCD_OPC_CheckField, 13, 3, 0, 196, 6, 0, // Skip to: 2058 -/* 326 */ MCD_OPC_Decode, 185, 2, 2, // Opcode: CMPULE -/* 330 */ MCD_OPC_FilterValue, 77, 11, 0, 0, // Skip to: 346 -/* 335 */ MCD_OPC_CheckField, 13, 3, 0, 180, 6, 0, // Skip to: 2058 -/* 342 */ MCD_OPC_Decode, 179, 2, 2, // Opcode: CMPLT -/* 346 */ MCD_OPC_FilterValue, 109, 11, 0, 0, // Skip to: 362 -/* 351 */ MCD_OPC_CheckField, 13, 3, 0, 164, 6, 0, // Skip to: 2058 -/* 358 */ MCD_OPC_Decode, 177, 2, 2, // Opcode: CMPLE -/* 362 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 372 -/* 368 */ MCD_OPC_Decode, 135, 2, 3, // Opcode: ADDLi -/* 372 */ MCD_OPC_FilterValue, 130, 1, 4, 0, 0, // Skip to: 382 -/* 378 */ MCD_OPC_Decode, 148, 3, 3, // Opcode: S4ADDLi -/* 382 */ MCD_OPC_FilterValue, 137, 1, 4, 0, 0, // Skip to: 392 -/* 388 */ MCD_OPC_Decode, 188, 3, 3, // Opcode: SUBLi -/* 392 */ MCD_OPC_FilterValue, 139, 1, 4, 0, 0, // Skip to: 402 -/* 398 */ MCD_OPC_Decode, 152, 3, 3, // Opcode: S4SUBLi -/* 402 */ MCD_OPC_FilterValue, 143, 1, 4, 0, 0, // Skip to: 412 -/* 408 */ MCD_OPC_Decode, 174, 2, 3, // Opcode: CMPBGEi -/* 412 */ MCD_OPC_FilterValue, 146, 1, 4, 0, 0, // Skip to: 422 -/* 418 */ MCD_OPC_Decode, 156, 3, 3, // Opcode: S8ADDLi -/* 422 */ MCD_OPC_FilterValue, 155, 1, 4, 0, 0, // Skip to: 432 -/* 428 */ MCD_OPC_Decode, 160, 3, 3, // Opcode: S8SUBLi -/* 432 */ MCD_OPC_FilterValue, 157, 1, 4, 0, 0, // Skip to: 442 -/* 438 */ MCD_OPC_Decode, 188, 2, 3, // Opcode: CMPULTi -/* 442 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 452 -/* 448 */ MCD_OPC_Decode, 137, 2, 3, // Opcode: ADDQi -/* 452 */ MCD_OPC_FilterValue, 162, 1, 4, 0, 0, // Skip to: 462 -/* 458 */ MCD_OPC_Decode, 150, 3, 3, // Opcode: S4ADDQi -/* 462 */ MCD_OPC_FilterValue, 169, 1, 4, 0, 0, // Skip to: 472 -/* 468 */ MCD_OPC_Decode, 190, 3, 3, // Opcode: SUBQi -/* 472 */ MCD_OPC_FilterValue, 171, 1, 4, 0, 0, // Skip to: 482 -/* 478 */ MCD_OPC_Decode, 154, 3, 3, // Opcode: S4SUBQi -/* 482 */ MCD_OPC_FilterValue, 173, 1, 4, 0, 0, // Skip to: 492 -/* 488 */ MCD_OPC_Decode, 176, 2, 3, // Opcode: CMPEQi -/* 492 */ MCD_OPC_FilterValue, 178, 1, 4, 0, 0, // Skip to: 502 -/* 498 */ MCD_OPC_Decode, 158, 3, 3, // Opcode: S8ADDQi -/* 502 */ MCD_OPC_FilterValue, 187, 1, 4, 0, 0, // Skip to: 512 -/* 508 */ MCD_OPC_Decode, 162, 3, 3, // Opcode: S8SUBQi -/* 512 */ MCD_OPC_FilterValue, 189, 1, 4, 0, 0, // Skip to: 522 -/* 518 */ MCD_OPC_Decode, 186, 2, 3, // Opcode: CMPULEi -/* 522 */ MCD_OPC_FilterValue, 205, 1, 4, 0, 0, // Skip to: 532 -/* 528 */ MCD_OPC_Decode, 180, 2, 3, // Opcode: CMPLTi -/* 532 */ MCD_OPC_FilterValue, 237, 1, 240, 5, 0, // Skip to: 2058 -/* 538 */ MCD_OPC_Decode, 178, 2, 3, // Opcode: CMPLEi -/* 542 */ MCD_OPC_FilterValue, 17, 111, 1, 0, // Skip to: 914 -/* 547 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... -/* 550 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 566 -/* 555 */ MCD_OPC_CheckField, 13, 3, 0, 216, 5, 0, // Skip to: 2058 -/* 562 */ MCD_OPC_Decode, 142, 2, 2, // Opcode: ANDr -/* 566 */ MCD_OPC_FilterValue, 8, 11, 0, 0, // Skip to: 582 -/* 571 */ MCD_OPC_CheckField, 13, 3, 0, 200, 5, 0, // Skip to: 2058 -/* 578 */ MCD_OPC_Decode, 147, 2, 2, // Opcode: BICr -/* 582 */ MCD_OPC_FilterValue, 20, 11, 0, 0, // Skip to: 598 -/* 587 */ MCD_OPC_CheckField, 13, 3, 0, 184, 5, 0, // Skip to: 2058 -/* 594 */ MCD_OPC_Decode, 166, 2, 4, // Opcode: CMOVLBSr -/* 598 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 614 -/* 603 */ MCD_OPC_CheckField, 13, 3, 0, 168, 5, 0, // Skip to: 2058 -/* 610 */ MCD_OPC_Decode, 164, 2, 4, // Opcode: CMOVLBCr -/* 614 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 630 -/* 619 */ MCD_OPC_CheckField, 13, 3, 0, 152, 5, 0, // Skip to: 2058 -/* 626 */ MCD_OPC_Decode, 149, 2, 2, // Opcode: BISr -/* 630 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 646 -/* 635 */ MCD_OPC_CheckField, 13, 3, 0, 136, 5, 0, // Skip to: 2058 -/* 642 */ MCD_OPC_Decode, 158, 2, 4, // Opcode: CMOVEQr -/* 646 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 662 -/* 651 */ MCD_OPC_CheckField, 13, 3, 0, 120, 5, 0, // Skip to: 2058 -/* 658 */ MCD_OPC_Decode, 172, 2, 4, // Opcode: CMOVNEr -/* 662 */ MCD_OPC_FilterValue, 40, 11, 0, 0, // Skip to: 678 -/* 667 */ MCD_OPC_CheckField, 13, 3, 0, 104, 5, 0, // Skip to: 2058 -/* 674 */ MCD_OPC_Decode, 144, 3, 2, // Opcode: ORNOTr -/* 678 */ MCD_OPC_FilterValue, 64, 11, 0, 0, // Skip to: 694 -/* 683 */ MCD_OPC_CheckField, 13, 3, 0, 88, 5, 0, // Skip to: 2058 -/* 690 */ MCD_OPC_Decode, 198, 3, 2, // Opcode: XORr -/* 694 */ MCD_OPC_FilterValue, 68, 11, 0, 0, // Skip to: 710 -/* 699 */ MCD_OPC_CheckField, 13, 3, 0, 72, 5, 0, // Skip to: 2058 -/* 706 */ MCD_OPC_Decode, 170, 2, 4, // Opcode: CMOVLTr -/* 710 */ MCD_OPC_FilterValue, 70, 11, 0, 0, // Skip to: 726 -/* 715 */ MCD_OPC_CheckField, 13, 3, 0, 56, 5, 0, // Skip to: 2058 -/* 722 */ MCD_OPC_Decode, 160, 2, 4, // Opcode: CMOVGEr -/* 726 */ MCD_OPC_FilterValue, 72, 11, 0, 0, // Skip to: 742 -/* 731 */ MCD_OPC_CheckField, 13, 3, 0, 40, 5, 0, // Skip to: 2058 -/* 738 */ MCD_OPC_Decode, 213, 2, 2, // Opcode: EQVr -/* 742 */ MCD_OPC_FilterValue, 100, 11, 0, 0, // Skip to: 758 -/* 747 */ MCD_OPC_CheckField, 13, 3, 0, 24, 5, 0, // Skip to: 2058 -/* 754 */ MCD_OPC_Decode, 168, 2, 4, // Opcode: CMOVLEr -/* 758 */ MCD_OPC_FilterValue, 102, 11, 0, 0, // Skip to: 774 -/* 763 */ MCD_OPC_CheckField, 13, 3, 0, 8, 5, 0, // Skip to: 2058 -/* 770 */ MCD_OPC_Decode, 162, 2, 4, // Opcode: CMOVGTr -/* 774 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 784 -/* 780 */ MCD_OPC_Decode, 141, 2, 3, // Opcode: ANDi -/* 784 */ MCD_OPC_FilterValue, 136, 1, 4, 0, 0, // Skip to: 794 -/* 790 */ MCD_OPC_Decode, 146, 2, 3, // Opcode: BICi -/* 794 */ MCD_OPC_FilterValue, 148, 1, 4, 0, 0, // Skip to: 804 -/* 800 */ MCD_OPC_Decode, 165, 2, 5, // Opcode: CMOVLBSi -/* 804 */ MCD_OPC_FilterValue, 150, 1, 4, 0, 0, // Skip to: 814 -/* 810 */ MCD_OPC_Decode, 163, 2, 5, // Opcode: CMOVLBCi -/* 814 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 824 -/* 820 */ MCD_OPC_Decode, 148, 2, 3, // Opcode: BISi -/* 824 */ MCD_OPC_FilterValue, 164, 1, 4, 0, 0, // Skip to: 834 -/* 830 */ MCD_OPC_Decode, 157, 2, 5, // Opcode: CMOVEQi -/* 834 */ MCD_OPC_FilterValue, 166, 1, 4, 0, 0, // Skip to: 844 -/* 840 */ MCD_OPC_Decode, 171, 2, 5, // Opcode: CMOVNEi -/* 844 */ MCD_OPC_FilterValue, 168, 1, 4, 0, 0, // Skip to: 854 -/* 850 */ MCD_OPC_Decode, 143, 3, 3, // Opcode: ORNOTi -/* 854 */ MCD_OPC_FilterValue, 192, 1, 4, 0, 0, // Skip to: 864 -/* 860 */ MCD_OPC_Decode, 197, 3, 3, // Opcode: XORi -/* 864 */ MCD_OPC_FilterValue, 196, 1, 4, 0, 0, // Skip to: 874 -/* 870 */ MCD_OPC_Decode, 169, 2, 5, // Opcode: CMOVLTi -/* 874 */ MCD_OPC_FilterValue, 198, 1, 4, 0, 0, // Skip to: 884 -/* 880 */ MCD_OPC_Decode, 159, 2, 5, // Opcode: CMOVGEi -/* 884 */ MCD_OPC_FilterValue, 200, 1, 4, 0, 0, // Skip to: 894 -/* 890 */ MCD_OPC_Decode, 212, 2, 3, // Opcode: EQVi -/* 894 */ MCD_OPC_FilterValue, 228, 1, 4, 0, 0, // Skip to: 904 -/* 900 */ MCD_OPC_Decode, 167, 2, 5, // Opcode: CMOVLEi -/* 904 */ MCD_OPC_FilterValue, 230, 1, 124, 4, 0, // Skip to: 2058 -/* 910 */ MCD_OPC_Decode, 161, 2, 5, // Opcode: CMOVGTi -/* 914 */ MCD_OPC_FilterValue, 18, 139, 0, 0, // Skip to: 1058 -/* 919 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... -/* 922 */ MCD_OPC_FilterValue, 6, 11, 0, 0, // Skip to: 938 -/* 927 */ MCD_OPC_CheckField, 13, 3, 0, 100, 4, 0, // Skip to: 2058 -/* 934 */ MCD_OPC_Decode, 214, 2, 2, // Opcode: EXTBL -/* 938 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 954 -/* 943 */ MCD_OPC_CheckField, 13, 3, 0, 84, 4, 0, // Skip to: 2058 -/* 950 */ MCD_OPC_Decode, 216, 2, 2, // Opcode: EXTWL -/* 954 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 970 -/* 959 */ MCD_OPC_CheckField, 13, 3, 0, 68, 4, 0, // Skip to: 2058 -/* 966 */ MCD_OPC_Decode, 215, 2, 2, // Opcode: EXTLL -/* 970 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 986 -/* 975 */ MCD_OPC_CheckField, 13, 3, 0, 52, 4, 0, // Skip to: 2058 -/* 982 */ MCD_OPC_Decode, 173, 3, 2, // Opcode: SRLr -/* 986 */ MCD_OPC_FilterValue, 57, 11, 0, 0, // Skip to: 1002 -/* 991 */ MCD_OPC_CheckField, 13, 3, 0, 36, 4, 0, // Skip to: 2058 -/* 998 */ MCD_OPC_Decode, 167, 3, 2, // Opcode: SLr -/* 1002 */ MCD_OPC_FilterValue, 60, 11, 0, 0, // Skip to: 1018 -/* 1007 */ MCD_OPC_CheckField, 13, 3, 0, 20, 4, 0, // Skip to: 2058 -/* 1014 */ MCD_OPC_Decode, 171, 3, 2, // Opcode: SRAr -/* 1018 */ MCD_OPC_FilterValue, 177, 1, 4, 0, 0, // Skip to: 1028 -/* 1024 */ MCD_OPC_Decode, 199, 3, 3, // Opcode: ZAPNOTi -/* 1028 */ MCD_OPC_FilterValue, 180, 1, 4, 0, 0, // Skip to: 1038 -/* 1034 */ MCD_OPC_Decode, 172, 3, 3, // Opcode: SRLi -/* 1038 */ MCD_OPC_FilterValue, 185, 1, 4, 0, 0, // Skip to: 1048 -/* 1044 */ MCD_OPC_Decode, 166, 3, 3, // Opcode: SLi -/* 1048 */ MCD_OPC_FilterValue, 188, 1, 236, 3, 0, // Skip to: 2058 -/* 1054 */ MCD_OPC_Decode, 170, 3, 3, // Opcode: SRAi -/* 1058 */ MCD_OPC_FilterValue, 19, 81, 0, 0, // Skip to: 1144 -/* 1063 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... -/* 1066 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1082 -/* 1071 */ MCD_OPC_CheckField, 13, 3, 0, 212, 3, 0, // Skip to: 2058 -/* 1078 */ MCD_OPC_Decode, 138, 3, 2, // Opcode: MULLr -/* 1082 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 1098 -/* 1087 */ MCD_OPC_CheckField, 13, 3, 0, 196, 3, 0, // Skip to: 2058 -/* 1094 */ MCD_OPC_Decode, 140, 3, 2, // Opcode: MULQr -/* 1098 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1114 -/* 1103 */ MCD_OPC_CheckField, 13, 3, 0, 180, 3, 0, // Skip to: 2058 -/* 1110 */ MCD_OPC_Decode, 195, 3, 2, // Opcode: UMULHr -/* 1114 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 1124 -/* 1120 */ MCD_OPC_Decode, 137, 3, 3, // Opcode: MULLi -/* 1124 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 1134 -/* 1130 */ MCD_OPC_Decode, 139, 3, 3, // Opcode: MULQi -/* 1134 */ MCD_OPC_FilterValue, 176, 1, 150, 3, 0, // Skip to: 2058 -/* 1140 */ MCD_OPC_Decode, 194, 3, 3, // Opcode: UMULHi -/* 1144 */ MCD_OPC_FilterValue, 20, 69, 0, 0, // Skip to: 1218 -/* 1149 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... -/* 1152 */ MCD_OPC_FilterValue, 4, 11, 0, 0, // Skip to: 1168 -/* 1157 */ MCD_OPC_CheckField, 16, 5, 31, 126, 3, 0, // Skip to: 2058 -/* 1164 */ MCD_OPC_Decode, 237, 2, 6, // Opcode: ITOFS -/* 1168 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 1184 -/* 1173 */ MCD_OPC_CheckField, 16, 5, 31, 110, 3, 0, // Skip to: 2058 -/* 1180 */ MCD_OPC_Decode, 238, 2, 7, // Opcode: ITOFT -/* 1184 */ MCD_OPC_FilterValue, 139, 11, 11, 0, 0, // Skip to: 1201 -/* 1190 */ MCD_OPC_CheckField, 21, 5, 31, 93, 3, 0, // Skip to: 2058 -/* 1197 */ MCD_OPC_Decode, 168, 3, 8, // Opcode: SQRTS -/* 1201 */ MCD_OPC_FilterValue, 171, 11, 83, 3, 0, // Skip to: 2058 -/* 1207 */ MCD_OPC_CheckField, 21, 5, 31, 76, 3, 0, // Skip to: 2058 -/* 1214 */ MCD_OPC_Decode, 169, 3, 9, // Opcode: SQRTT -/* 1218 */ MCD_OPC_FilterValue, 22, 208, 0, 0, // Skip to: 1431 -/* 1223 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... -/* 1226 */ MCD_OPC_FilterValue, 175, 10, 11, 0, 0, // Skip to: 1243 -/* 1232 */ MCD_OPC_CheckField, 21, 5, 31, 51, 3, 0, // Skip to: 2058 -/* 1239 */ MCD_OPC_Decode, 208, 2, 9, // Opcode: CVTTQ -/* 1243 */ MCD_OPC_FilterValue, 128, 11, 4, 0, 0, // Skip to: 1253 -/* 1249 */ MCD_OPC_Decode, 139, 2, 10, // Opcode: ADDS -/* 1253 */ MCD_OPC_FilterValue, 129, 11, 4, 0, 0, // Skip to: 1263 -/* 1259 */ MCD_OPC_Decode, 192, 3, 10, // Opcode: SUBS -/* 1263 */ MCD_OPC_FilterValue, 130, 11, 4, 0, 0, // Skip to: 1273 -/* 1269 */ MCD_OPC_Decode, 141, 3, 10, // Opcode: MULS -/* 1273 */ MCD_OPC_FilterValue, 131, 11, 4, 0, 0, // Skip to: 1283 -/* 1279 */ MCD_OPC_Decode, 210, 2, 10, // Opcode: DIVS -/* 1283 */ MCD_OPC_FilterValue, 160, 11, 4, 0, 0, // Skip to: 1293 -/* 1289 */ MCD_OPC_Decode, 140, 2, 11, // Opcode: ADDT -/* 1293 */ MCD_OPC_FilterValue, 161, 11, 4, 0, 0, // Skip to: 1303 -/* 1299 */ MCD_OPC_Decode, 193, 3, 11, // Opcode: SUBT -/* 1303 */ MCD_OPC_FilterValue, 162, 11, 4, 0, 0, // Skip to: 1313 -/* 1309 */ MCD_OPC_Decode, 142, 3, 11, // Opcode: MULT -/* 1313 */ MCD_OPC_FilterValue, 163, 11, 4, 0, 0, // Skip to: 1323 -/* 1319 */ MCD_OPC_Decode, 211, 2, 11, // Opcode: DIVT -/* 1323 */ MCD_OPC_FilterValue, 164, 11, 4, 0, 0, // Skip to: 1333 -/* 1329 */ MCD_OPC_Decode, 184, 2, 11, // Opcode: CMPTUN -/* 1333 */ MCD_OPC_FilterValue, 165, 11, 4, 0, 0, // Skip to: 1343 -/* 1339 */ MCD_OPC_Decode, 181, 2, 11, // Opcode: CMPTEQ -/* 1343 */ MCD_OPC_FilterValue, 166, 11, 4, 0, 0, // Skip to: 1353 -/* 1349 */ MCD_OPC_Decode, 183, 2, 11, // Opcode: CMPTLT -/* 1353 */ MCD_OPC_FilterValue, 167, 11, 4, 0, 0, // Skip to: 1363 -/* 1359 */ MCD_OPC_Decode, 182, 2, 11, // Opcode: CMPTLE -/* 1363 */ MCD_OPC_FilterValue, 172, 13, 11, 0, 0, // Skip to: 1380 -/* 1369 */ MCD_OPC_CheckField, 21, 5, 31, 170, 2, 0, // Skip to: 2058 -/* 1376 */ MCD_OPC_Decode, 207, 2, 12, // Opcode: CVTST -/* 1380 */ MCD_OPC_FilterValue, 172, 15, 11, 0, 0, // Skip to: 1397 -/* 1386 */ MCD_OPC_CheckField, 21, 5, 31, 153, 2, 0, // Skip to: 2058 -/* 1393 */ MCD_OPC_Decode, 209, 2, 13, // Opcode: CVTTS -/* 1397 */ MCD_OPC_FilterValue, 188, 15, 11, 0, 0, // Skip to: 1414 -/* 1403 */ MCD_OPC_CheckField, 21, 5, 31, 136, 2, 0, // Skip to: 2058 -/* 1410 */ MCD_OPC_Decode, 205, 2, 13, // Opcode: CVTQS -/* 1414 */ MCD_OPC_FilterValue, 190, 15, 126, 2, 0, // Skip to: 2058 -/* 1420 */ MCD_OPC_CheckField, 21, 5, 31, 119, 2, 0, // Skip to: 2058 -/* 1427 */ MCD_OPC_Decode, 206, 2, 9, // Opcode: CVTQT -/* 1431 */ MCD_OPC_FilterValue, 23, 84, 0, 0, // Skip to: 1520 -/* 1436 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... -/* 1439 */ MCD_OPC_FilterValue, 32, 4, 0, 0, // Skip to: 1448 -/* 1444 */ MCD_OPC_Decode, 198, 2, 10, // Opcode: CPYSS -/* 1448 */ MCD_OPC_FilterValue, 33, 4, 0, 0, // Skip to: 1457 -/* 1453 */ MCD_OPC_Decode, 196, 2, 11, // Opcode: CPYSNT -/* 1457 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 1466 -/* 1462 */ MCD_OPC_Decode, 191, 2, 10, // Opcode: CPYSES -/* 1466 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 1475 -/* 1471 */ MCD_OPC_Decode, 223, 2, 10, // Opcode: FCMOVEQS -/* 1475 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 1484 -/* 1480 */ MCD_OPC_Decode, 234, 2, 11, // Opcode: FCMOVNET -/* 1484 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 1493 -/* 1489 */ MCD_OPC_Decode, 231, 2, 10, // Opcode: FCMOVLTS -/* 1493 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 1502 -/* 1498 */ MCD_OPC_Decode, 225, 2, 10, // Opcode: FCMOVGES -/* 1502 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 1511 -/* 1507 */ MCD_OPC_Decode, 229, 2, 10, // Opcode: FCMOVLES -/* 1511 */ MCD_OPC_FilterValue, 47, 30, 2, 0, // Skip to: 2058 -/* 1516 */ MCD_OPC_Decode, 227, 2, 10, // Opcode: FCMOVGTS -/* 1520 */ MCD_OPC_FilterValue, 24, 50, 0, 0, // Skip to: 1575 -/* 1525 */ MCD_OPC_ExtractField, 0, 21, // Inst{20-0} ... -/* 1528 */ MCD_OPC_FilterValue, 128, 128, 1, 11, 0, 0, // Skip to: 1546 -/* 1535 */ MCD_OPC_CheckField, 21, 5, 0, 4, 2, 0, // Skip to: 2058 -/* 1542 */ MCD_OPC_Decode, 136, 3, 14, // Opcode: MB -/* 1546 */ MCD_OPC_FilterValue, 128, 136, 1, 11, 0, 0, // Skip to: 1564 -/* 1553 */ MCD_OPC_CheckField, 21, 5, 0, 242, 1, 0, // Skip to: 2058 -/* 1560 */ MCD_OPC_Decode, 196, 3, 14, // Opcode: WMB -/* 1564 */ MCD_OPC_FilterValue, 128, 128, 3, 231, 1, 0, // Skip to: 2058 -/* 1571 */ MCD_OPC_Decode, 147, 3, 15, // Opcode: RPCC -/* 1575 */ MCD_OPC_FilterValue, 26, 101, 0, 0, // Skip to: 1681 -/* 1580 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... -/* 1583 */ MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 1606 -/* 1588 */ MCD_OPC_CheckField, 21, 5, 31, 207, 1, 0, // Skip to: 2058 -/* 1595 */ MCD_OPC_CheckField, 0, 14, 0, 200, 1, 0, // Skip to: 2058 -/* 1602 */ MCD_OPC_Decode, 239, 2, 16, // Opcode: JMP -/* 1606 */ MCD_OPC_FilterValue, 1, 37, 0, 0, // Skip to: 1648 -/* 1611 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... -/* 1614 */ MCD_OPC_FilterValue, 251, 5, 11, 0, 0, // Skip to: 1631 -/* 1620 */ MCD_OPC_CheckField, 0, 14, 0, 175, 1, 0, // Skip to: 2058 -/* 1627 */ MCD_OPC_Decode, 242, 2, 14, // Opcode: JSRs -/* 1631 */ MCD_OPC_FilterValue, 219, 6, 165, 1, 0, // Skip to: 2058 -/* 1637 */ MCD_OPC_CheckField, 0, 14, 0, 158, 1, 0, // Skip to: 2058 -/* 1644 */ MCD_OPC_Decode, 240, 2, 14, // Opcode: JSR -/* 1648 */ MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 1672 -/* 1653 */ MCD_OPC_CheckField, 16, 10, 250, 7, 141, 1, 0, // Skip to: 2058 -/* 1661 */ MCD_OPC_CheckField, 0, 14, 1, 134, 1, 0, // Skip to: 2058 -/* 1668 */ MCD_OPC_Decode, 145, 3, 14, // Opcode: RETDAG -/* 1672 */ MCD_OPC_FilterValue, 3, 125, 1, 0, // Skip to: 2058 -/* 1677 */ MCD_OPC_Decode, 241, 2, 17, // Opcode: JSR_COROUTINE -/* 1681 */ MCD_OPC_FilterValue, 28, 115, 0, 0, // Skip to: 1801 -/* 1686 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... -/* 1689 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1705 -/* 1694 */ MCD_OPC_CheckField, 21, 5, 31, 101, 1, 0, // Skip to: 2058 -/* 1701 */ MCD_OPC_Decode, 164, 3, 18, // Opcode: SEXTB -/* 1705 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 1721 -/* 1710 */ MCD_OPC_CheckField, 21, 5, 31, 85, 1, 0, // Skip to: 2058 -/* 1717 */ MCD_OPC_Decode, 165, 3, 18, // Opcode: SEXTW -/* 1721 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1737 -/* 1726 */ MCD_OPC_CheckField, 21, 5, 31, 69, 1, 0, // Skip to: 2058 -/* 1733 */ MCD_OPC_Decode, 203, 2, 18, // Opcode: CTPOP -/* 1737 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 1753 -/* 1742 */ MCD_OPC_CheckField, 21, 5, 31, 53, 1, 0, // Skip to: 2058 -/* 1749 */ MCD_OPC_Decode, 202, 2, 18, // Opcode: CTLZ -/* 1753 */ MCD_OPC_FilterValue, 51, 11, 0, 0, // Skip to: 1769 -/* 1758 */ MCD_OPC_CheckField, 21, 5, 31, 37, 1, 0, // Skip to: 2058 -/* 1765 */ MCD_OPC_Decode, 204, 2, 18, // Opcode: CTTZ -/* 1769 */ MCD_OPC_FilterValue, 112, 11, 0, 0, // Skip to: 1785 -/* 1774 */ MCD_OPC_CheckField, 16, 5, 31, 21, 1, 0, // Skip to: 2058 -/* 1781 */ MCD_OPC_Decode, 236, 2, 19, // Opcode: FTOIT -/* 1785 */ MCD_OPC_FilterValue, 120, 12, 1, 0, // Skip to: 2058 -/* 1790 */ MCD_OPC_CheckField, 16, 5, 31, 5, 1, 0, // Skip to: 2058 -/* 1797 */ MCD_OPC_Decode, 235, 2, 20, // Opcode: FTOIS -/* 1801 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 1810 -/* 1806 */ MCD_OPC_Decode, 130, 3, 21, // Opcode: LDS -/* 1810 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 1819 -/* 1815 */ MCD_OPC_Decode, 132, 3, 22, // Opcode: LDT -/* 1819 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 1828 -/* 1824 */ MCD_OPC_Decode, 182, 3, 21, // Opcode: STS -/* 1828 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 1837 -/* 1833 */ MCD_OPC_Decode, 184, 3, 22, // Opcode: STT -/* 1837 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 1846 -/* 1842 */ MCD_OPC_Decode, 251, 2, 1, // Opcode: LDL -/* 1846 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 1855 -/* 1851 */ MCD_OPC_Decode, 254, 2, 1, // Opcode: LDQ -/* 1855 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 1864 -/* 1860 */ MCD_OPC_Decode, 252, 2, 1, // Opcode: LDL_L -/* 1864 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 1873 -/* 1869 */ MCD_OPC_Decode, 255, 2, 1, // Opcode: LDQ_L -/* 1873 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 1882 -/* 1878 */ MCD_OPC_Decode, 176, 3, 1, // Opcode: STL -/* 1882 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 1891 -/* 1887 */ MCD_OPC_Decode, 179, 3, 1, // Opcode: STQ -/* 1891 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 1900 -/* 1896 */ MCD_OPC_Decode, 177, 3, 23, // Opcode: STL_C -/* 1900 */ MCD_OPC_FilterValue, 47, 4, 0, 0, // Skip to: 1909 -/* 1905 */ MCD_OPC_Decode, 180, 3, 23, // Opcode: STQ_C -/* 1909 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1925 -/* 1914 */ MCD_OPC_CheckField, 21, 5, 31, 137, 0, 0, // Skip to: 2058 -/* 1921 */ MCD_OPC_Decode, 155, 2, 24, // Opcode: BR -/* 1925 */ MCD_OPC_FilterValue, 49, 4, 0, 0, // Skip to: 1934 -/* 1930 */ MCD_OPC_Decode, 217, 2, 25, // Opcode: FBEQ -/* 1934 */ MCD_OPC_FilterValue, 50, 4, 0, 0, // Skip to: 1943 -/* 1939 */ MCD_OPC_Decode, 221, 2, 25, // Opcode: FBLT -/* 1943 */ MCD_OPC_FilterValue, 51, 4, 0, 0, // Skip to: 1952 -/* 1948 */ MCD_OPC_Decode, 220, 2, 25, // Opcode: FBLE -/* 1952 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 1968 -/* 1957 */ MCD_OPC_CheckField, 21, 5, 26, 94, 0, 0, // Skip to: 2058 -/* 1964 */ MCD_OPC_Decode, 156, 2, 24, // Opcode: BSR -/* 1968 */ MCD_OPC_FilterValue, 54, 4, 0, 0, // Skip to: 1977 -/* 1973 */ MCD_OPC_Decode, 218, 2, 25, // Opcode: FBGE -/* 1977 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 1986 -/* 1982 */ MCD_OPC_Decode, 219, 2, 25, // Opcode: FBGT -/* 1986 */ MCD_OPC_FilterValue, 56, 4, 0, 0, // Skip to: 1995 -/* 1991 */ MCD_OPC_Decode, 150, 2, 26, // Opcode: BLBC -/* 1995 */ MCD_OPC_FilterValue, 57, 4, 0, 0, // Skip to: 2004 -/* 2000 */ MCD_OPC_Decode, 143, 2, 26, // Opcode: BEQ -/* 2004 */ MCD_OPC_FilterValue, 58, 4, 0, 0, // Skip to: 2013 -/* 2009 */ MCD_OPC_Decode, 153, 2, 26, // Opcode: BLT -/* 2013 */ MCD_OPC_FilterValue, 59, 4, 0, 0, // Skip to: 2022 -/* 2018 */ MCD_OPC_Decode, 152, 2, 26, // Opcode: BLE -/* 2022 */ MCD_OPC_FilterValue, 60, 4, 0, 0, // Skip to: 2031 -/* 2027 */ MCD_OPC_Decode, 151, 2, 26, // Opcode: BLBS -/* 2031 */ MCD_OPC_FilterValue, 61, 4, 0, 0, // Skip to: 2040 -/* 2036 */ MCD_OPC_Decode, 154, 2, 26, // Opcode: BNE -/* 2040 */ MCD_OPC_FilterValue, 62, 4, 0, 0, // Skip to: 2049 -/* 2045 */ MCD_OPC_Decode, 144, 2, 26, // Opcode: BGE -/* 2049 */ MCD_OPC_FilterValue, 63, 4, 0, 0, // Skip to: 2058 -/* 2054 */ MCD_OPC_Decode, 145, 2, 26, // Opcode: BGT -/* 2058 */ MCD_OPC_Fail, +/* 35 */ MCD_OPC_Decode, 150, 3, 1, // Opcode: LDBU +/* 39 */ MCD_OPC_FilterValue, 11, 4, 0, 0, // Skip to: 48 +/* 44 */ MCD_OPC_Decode, 157, 3, 1, // Opcode: LDQ_U +/* 48 */ MCD_OPC_FilterValue, 12, 4, 0, 0, // Skip to: 57 +/* 53 */ MCD_OPC_Decode, 164, 3, 1, // Opcode: LDWU +/* 57 */ MCD_OPC_FilterValue, 13, 4, 0, 0, // Skip to: 66 +/* 62 */ MCD_OPC_Decode, 233, 3, 1, // Opcode: STW +/* 66 */ MCD_OPC_FilterValue, 14, 4, 0, 0, // Skip to: 75 +/* 71 */ MCD_OPC_Decode, 220, 3, 1, // Opcode: STB +/* 75 */ MCD_OPC_FilterValue, 15, 4, 0, 0, // Skip to: 84 +/* 80 */ MCD_OPC_Decode, 227, 3, 1, // Opcode: STQ_U +/* 84 */ MCD_OPC_FilterValue, 16, 215, 1, 0, // Skip to: 560 +/* 89 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 92 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 108 +/* 97 */ MCD_OPC_CheckField, 13, 3, 0, 41, 10, 0, // Skip to: 2705 +/* 104 */ MCD_OPC_Decode, 136, 2, 2, // Opcode: ADDLr +/* 108 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 124 +/* 113 */ MCD_OPC_CheckField, 13, 3, 0, 25, 10, 0, // Skip to: 2705 +/* 120 */ MCD_OPC_Decode, 195, 3, 2, // Opcode: S4ADDLr +/* 124 */ MCD_OPC_FilterValue, 9, 11, 0, 0, // Skip to: 140 +/* 129 */ MCD_OPC_CheckField, 13, 3, 0, 9, 10, 0, // Skip to: 2705 +/* 136 */ MCD_OPC_Decode, 236, 3, 2, // Opcode: SUBLr +/* 140 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 156 +/* 145 */ MCD_OPC_CheckField, 13, 3, 0, 249, 9, 0, // Skip to: 2705 +/* 152 */ MCD_OPC_Decode, 199, 3, 2, // Opcode: S4SUBLr +/* 156 */ MCD_OPC_FilterValue, 15, 11, 0, 0, // Skip to: 172 +/* 161 */ MCD_OPC_CheckField, 13, 3, 0, 233, 9, 0, // Skip to: 2705 +/* 168 */ MCD_OPC_Decode, 173, 2, 2, // Opcode: CMPBGE +/* 172 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 188 +/* 177 */ MCD_OPC_CheckField, 13, 3, 0, 217, 9, 0, // Skip to: 2705 +/* 184 */ MCD_OPC_Decode, 203, 3, 2, // Opcode: S8ADDLr +/* 188 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 204 +/* 193 */ MCD_OPC_CheckField, 13, 3, 0, 201, 9, 0, // Skip to: 2705 +/* 200 */ MCD_OPC_Decode, 207, 3, 2, // Opcode: S8SUBLr +/* 204 */ MCD_OPC_FilterValue, 29, 11, 0, 0, // Skip to: 220 +/* 209 */ MCD_OPC_CheckField, 13, 3, 0, 185, 9, 0, // Skip to: 2705 +/* 216 */ MCD_OPC_Decode, 187, 2, 2, // Opcode: CMPULT +/* 220 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 236 +/* 225 */ MCD_OPC_CheckField, 13, 3, 0, 169, 9, 0, // Skip to: 2705 +/* 232 */ MCD_OPC_Decode, 138, 2, 2, // Opcode: ADDQr +/* 236 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 252 +/* 241 */ MCD_OPC_CheckField, 13, 3, 0, 153, 9, 0, // Skip to: 2705 +/* 248 */ MCD_OPC_Decode, 197, 3, 2, // Opcode: S4ADDQr +/* 252 */ MCD_OPC_FilterValue, 41, 11, 0, 0, // Skip to: 268 +/* 257 */ MCD_OPC_CheckField, 13, 3, 0, 137, 9, 0, // Skip to: 2705 +/* 264 */ MCD_OPC_Decode, 238, 3, 2, // Opcode: SUBQr +/* 268 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 284 +/* 273 */ MCD_OPC_CheckField, 13, 3, 0, 121, 9, 0, // Skip to: 2705 +/* 280 */ MCD_OPC_Decode, 201, 3, 2, // Opcode: S4SUBQr +/* 284 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 300 +/* 289 */ MCD_OPC_CheckField, 13, 3, 0, 105, 9, 0, // Skip to: 2705 +/* 296 */ MCD_OPC_Decode, 175, 2, 2, // Opcode: CMPEQ +/* 300 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 316 +/* 305 */ MCD_OPC_CheckField, 13, 3, 0, 89, 9, 0, // Skip to: 2705 +/* 312 */ MCD_OPC_Decode, 205, 3, 2, // Opcode: S8ADDQr +/* 316 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 332 +/* 321 */ MCD_OPC_CheckField, 13, 3, 0, 73, 9, 0, // Skip to: 2705 +/* 328 */ MCD_OPC_Decode, 209, 3, 2, // Opcode: S8SUBQr +/* 332 */ MCD_OPC_FilterValue, 61, 11, 0, 0, // Skip to: 348 +/* 337 */ MCD_OPC_CheckField, 13, 3, 0, 57, 9, 0, // Skip to: 2705 +/* 344 */ MCD_OPC_Decode, 185, 2, 2, // Opcode: CMPULE +/* 348 */ MCD_OPC_FilterValue, 77, 11, 0, 0, // Skip to: 364 +/* 353 */ MCD_OPC_CheckField, 13, 3, 0, 41, 9, 0, // Skip to: 2705 +/* 360 */ MCD_OPC_Decode, 179, 2, 2, // Opcode: CMPLT +/* 364 */ MCD_OPC_FilterValue, 109, 11, 0, 0, // Skip to: 380 +/* 369 */ MCD_OPC_CheckField, 13, 3, 0, 25, 9, 0, // Skip to: 2705 +/* 376 */ MCD_OPC_Decode, 177, 2, 2, // Opcode: CMPLE +/* 380 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 390 +/* 386 */ MCD_OPC_Decode, 135, 2, 3, // Opcode: ADDLi +/* 390 */ MCD_OPC_FilterValue, 130, 1, 4, 0, 0, // Skip to: 400 +/* 396 */ MCD_OPC_Decode, 194, 3, 3, // Opcode: S4ADDLi +/* 400 */ MCD_OPC_FilterValue, 137, 1, 4, 0, 0, // Skip to: 410 +/* 406 */ MCD_OPC_Decode, 235, 3, 3, // Opcode: SUBLi +/* 410 */ MCD_OPC_FilterValue, 139, 1, 4, 0, 0, // Skip to: 420 +/* 416 */ MCD_OPC_Decode, 198, 3, 3, // Opcode: S4SUBLi +/* 420 */ MCD_OPC_FilterValue, 143, 1, 4, 0, 0, // Skip to: 430 +/* 426 */ MCD_OPC_Decode, 174, 2, 3, // Opcode: CMPBGEi +/* 430 */ MCD_OPC_FilterValue, 146, 1, 4, 0, 0, // Skip to: 440 +/* 436 */ MCD_OPC_Decode, 202, 3, 3, // Opcode: S8ADDLi +/* 440 */ MCD_OPC_FilterValue, 155, 1, 4, 0, 0, // Skip to: 450 +/* 446 */ MCD_OPC_Decode, 206, 3, 3, // Opcode: S8SUBLi +/* 450 */ MCD_OPC_FilterValue, 157, 1, 4, 0, 0, // Skip to: 460 +/* 456 */ MCD_OPC_Decode, 188, 2, 3, // Opcode: CMPULTi +/* 460 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 470 +/* 466 */ MCD_OPC_Decode, 137, 2, 3, // Opcode: ADDQi +/* 470 */ MCD_OPC_FilterValue, 162, 1, 4, 0, 0, // Skip to: 480 +/* 476 */ MCD_OPC_Decode, 196, 3, 3, // Opcode: S4ADDQi +/* 480 */ MCD_OPC_FilterValue, 169, 1, 4, 0, 0, // Skip to: 490 +/* 486 */ MCD_OPC_Decode, 237, 3, 3, // Opcode: SUBQi +/* 490 */ MCD_OPC_FilterValue, 171, 1, 4, 0, 0, // Skip to: 500 +/* 496 */ MCD_OPC_Decode, 200, 3, 3, // Opcode: S4SUBQi +/* 500 */ MCD_OPC_FilterValue, 173, 1, 4, 0, 0, // Skip to: 510 +/* 506 */ MCD_OPC_Decode, 176, 2, 3, // Opcode: CMPEQi +/* 510 */ MCD_OPC_FilterValue, 178, 1, 4, 0, 0, // Skip to: 520 +/* 516 */ MCD_OPC_Decode, 204, 3, 3, // Opcode: S8ADDQi +/* 520 */ MCD_OPC_FilterValue, 187, 1, 4, 0, 0, // Skip to: 530 +/* 526 */ MCD_OPC_Decode, 208, 3, 3, // Opcode: S8SUBQi +/* 530 */ MCD_OPC_FilterValue, 189, 1, 4, 0, 0, // Skip to: 540 +/* 536 */ MCD_OPC_Decode, 186, 2, 3, // Opcode: CMPULEi +/* 540 */ MCD_OPC_FilterValue, 205, 1, 4, 0, 0, // Skip to: 550 +/* 546 */ MCD_OPC_Decode, 180, 2, 3, // Opcode: CMPLTi +/* 550 */ MCD_OPC_FilterValue, 237, 1, 101, 8, 0, // Skip to: 2705 +/* 556 */ MCD_OPC_Decode, 178, 2, 3, // Opcode: CMPLEi +/* 560 */ MCD_OPC_FilterValue, 17, 111, 1, 0, // Skip to: 932 +/* 565 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 568 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 584 +/* 573 */ MCD_OPC_CheckField, 13, 3, 0, 77, 8, 0, // Skip to: 2705 +/* 580 */ MCD_OPC_Decode, 142, 2, 2, // Opcode: ANDr +/* 584 */ MCD_OPC_FilterValue, 8, 11, 0, 0, // Skip to: 600 +/* 589 */ MCD_OPC_CheckField, 13, 3, 0, 61, 8, 0, // Skip to: 2705 +/* 596 */ MCD_OPC_Decode, 147, 2, 2, // Opcode: BICr +/* 600 */ MCD_OPC_FilterValue, 20, 11, 0, 0, // Skip to: 616 +/* 605 */ MCD_OPC_CheckField, 13, 3, 0, 45, 8, 0, // Skip to: 2705 +/* 612 */ MCD_OPC_Decode, 166, 2, 4, // Opcode: CMOVLBSr +/* 616 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 632 +/* 621 */ MCD_OPC_CheckField, 13, 3, 0, 29, 8, 0, // Skip to: 2705 +/* 628 */ MCD_OPC_Decode, 164, 2, 4, // Opcode: CMOVLBCr +/* 632 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 648 +/* 637 */ MCD_OPC_CheckField, 13, 3, 0, 13, 8, 0, // Skip to: 2705 +/* 644 */ MCD_OPC_Decode, 149, 2, 2, // Opcode: BISr +/* 648 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 664 +/* 653 */ MCD_OPC_CheckField, 13, 3, 0, 253, 7, 0, // Skip to: 2705 +/* 660 */ MCD_OPC_Decode, 158, 2, 4, // Opcode: CMOVEQr +/* 664 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 680 +/* 669 */ MCD_OPC_CheckField, 13, 3, 0, 237, 7, 0, // Skip to: 2705 +/* 676 */ MCD_OPC_Decode, 172, 2, 4, // Opcode: CMOVNEr +/* 680 */ MCD_OPC_FilterValue, 40, 11, 0, 0, // Skip to: 696 +/* 685 */ MCD_OPC_CheckField, 13, 3, 0, 221, 7, 0, // Skip to: 2705 +/* 692 */ MCD_OPC_Decode, 188, 3, 2, // Opcode: ORNOTr +/* 696 */ MCD_OPC_FilterValue, 64, 11, 0, 0, // Skip to: 712 +/* 701 */ MCD_OPC_CheckField, 13, 3, 0, 205, 7, 0, // Skip to: 2705 +/* 708 */ MCD_OPC_Decode, 248, 3, 2, // Opcode: XORr +/* 712 */ MCD_OPC_FilterValue, 68, 11, 0, 0, // Skip to: 728 +/* 717 */ MCD_OPC_CheckField, 13, 3, 0, 189, 7, 0, // Skip to: 2705 +/* 724 */ MCD_OPC_Decode, 170, 2, 4, // Opcode: CMOVLTr +/* 728 */ MCD_OPC_FilterValue, 70, 11, 0, 0, // Skip to: 744 +/* 733 */ MCD_OPC_CheckField, 13, 3, 0, 173, 7, 0, // Skip to: 2705 +/* 740 */ MCD_OPC_Decode, 160, 2, 4, // Opcode: CMOVGEr +/* 744 */ MCD_OPC_FilterValue, 72, 11, 0, 0, // Skip to: 760 +/* 749 */ MCD_OPC_CheckField, 13, 3, 0, 157, 7, 0, // Skip to: 2705 +/* 756 */ MCD_OPC_Decode, 214, 2, 2, // Opcode: EQVr +/* 760 */ MCD_OPC_FilterValue, 100, 11, 0, 0, // Skip to: 776 +/* 765 */ MCD_OPC_CheckField, 13, 3, 0, 141, 7, 0, // Skip to: 2705 +/* 772 */ MCD_OPC_Decode, 168, 2, 4, // Opcode: CMOVLEr +/* 776 */ MCD_OPC_FilterValue, 102, 11, 0, 0, // Skip to: 792 +/* 781 */ MCD_OPC_CheckField, 13, 3, 0, 125, 7, 0, // Skip to: 2705 +/* 788 */ MCD_OPC_Decode, 162, 2, 4, // Opcode: CMOVGTr +/* 792 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 802 +/* 798 */ MCD_OPC_Decode, 141, 2, 3, // Opcode: ANDi +/* 802 */ MCD_OPC_FilterValue, 136, 1, 4, 0, 0, // Skip to: 812 +/* 808 */ MCD_OPC_Decode, 146, 2, 3, // Opcode: BICi +/* 812 */ MCD_OPC_FilterValue, 148, 1, 4, 0, 0, // Skip to: 822 +/* 818 */ MCD_OPC_Decode, 165, 2, 5, // Opcode: CMOVLBSi +/* 822 */ MCD_OPC_FilterValue, 150, 1, 4, 0, 0, // Skip to: 832 +/* 828 */ MCD_OPC_Decode, 163, 2, 5, // Opcode: CMOVLBCi +/* 832 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 842 +/* 838 */ MCD_OPC_Decode, 148, 2, 3, // Opcode: BISi +/* 842 */ MCD_OPC_FilterValue, 164, 1, 4, 0, 0, // Skip to: 852 +/* 848 */ MCD_OPC_Decode, 157, 2, 5, // Opcode: CMOVEQi +/* 852 */ MCD_OPC_FilterValue, 166, 1, 4, 0, 0, // Skip to: 862 +/* 858 */ MCD_OPC_Decode, 171, 2, 5, // Opcode: CMOVNEi +/* 862 */ MCD_OPC_FilterValue, 168, 1, 4, 0, 0, // Skip to: 872 +/* 868 */ MCD_OPC_Decode, 187, 3, 3, // Opcode: ORNOTi +/* 872 */ MCD_OPC_FilterValue, 192, 1, 4, 0, 0, // Skip to: 882 +/* 878 */ MCD_OPC_Decode, 247, 3, 3, // Opcode: XORi +/* 882 */ MCD_OPC_FilterValue, 196, 1, 4, 0, 0, // Skip to: 892 +/* 888 */ MCD_OPC_Decode, 169, 2, 5, // Opcode: CMOVLTi +/* 892 */ MCD_OPC_FilterValue, 198, 1, 4, 0, 0, // Skip to: 902 +/* 898 */ MCD_OPC_Decode, 159, 2, 5, // Opcode: CMOVGEi +/* 902 */ MCD_OPC_FilterValue, 200, 1, 4, 0, 0, // Skip to: 912 +/* 908 */ MCD_OPC_Decode, 213, 2, 3, // Opcode: EQVi +/* 912 */ MCD_OPC_FilterValue, 228, 1, 4, 0, 0, // Skip to: 922 +/* 918 */ MCD_OPC_Decode, 167, 2, 5, // Opcode: CMOVLEi +/* 922 */ MCD_OPC_FilterValue, 230, 1, 241, 6, 0, // Skip to: 2705 +/* 928 */ MCD_OPC_Decode, 161, 2, 5, // Opcode: CMOVGTi +/* 932 */ MCD_OPC_FilterValue, 18, 125, 2, 0, // Skip to: 1574 +/* 937 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 940 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 956 +/* 945 */ MCD_OPC_CheckField, 13, 3, 0, 217, 6, 0, // Skip to: 2705 +/* 952 */ MCD_OPC_Decode, 167, 3, 2, // Opcode: MSKBL +/* 956 */ MCD_OPC_FilterValue, 6, 11, 0, 0, // Skip to: 972 +/* 961 */ MCD_OPC_CheckField, 13, 3, 0, 201, 6, 0, // Skip to: 2705 +/* 968 */ MCD_OPC_Decode, 216, 2, 2, // Opcode: EXTBL +/* 972 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 988 +/* 977 */ MCD_OPC_CheckField, 13, 3, 0, 185, 6, 0, // Skip to: 2705 +/* 984 */ MCD_OPC_Decode, 252, 2, 2, // Opcode: INSBL +/* 988 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 1004 +/* 993 */ MCD_OPC_CheckField, 13, 3, 0, 169, 6, 0, // Skip to: 2705 +/* 1000 */ MCD_OPC_Decode, 179, 3, 2, // Opcode: MSKWL +/* 1004 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 1020 +/* 1009 */ MCD_OPC_CheckField, 13, 3, 0, 153, 6, 0, // Skip to: 2705 +/* 1016 */ MCD_OPC_Decode, 228, 2, 2, // Opcode: EXTWL +/* 1020 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 1036 +/* 1025 */ MCD_OPC_CheckField, 13, 3, 0, 137, 6, 0, // Skip to: 2705 +/* 1032 */ MCD_OPC_Decode, 136, 3, 2, // Opcode: INSWL +/* 1036 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 1052 +/* 1041 */ MCD_OPC_CheckField, 13, 3, 0, 121, 6, 0, // Skip to: 2705 +/* 1048 */ MCD_OPC_Decode, 171, 3, 2, // Opcode: MSKLL +/* 1052 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 1068 +/* 1057 */ MCD_OPC_CheckField, 13, 3, 0, 105, 6, 0, // Skip to: 2705 +/* 1064 */ MCD_OPC_Decode, 220, 2, 2, // Opcode: EXTLL +/* 1068 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 1084 +/* 1073 */ MCD_OPC_CheckField, 13, 3, 0, 89, 6, 0, // Skip to: 2705 +/* 1080 */ MCD_OPC_Decode, 128, 3, 2, // Opcode: INSLL +/* 1084 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 1100 +/* 1089 */ MCD_OPC_CheckField, 13, 3, 0, 73, 6, 0, // Skip to: 2705 +/* 1096 */ MCD_OPC_Decode, 175, 3, 2, // Opcode: MSKQL +/* 1100 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 1116 +/* 1105 */ MCD_OPC_CheckField, 13, 3, 0, 57, 6, 0, // Skip to: 2705 +/* 1112 */ MCD_OPC_Decode, 219, 3, 2, // Opcode: SRLr +/* 1116 */ MCD_OPC_FilterValue, 54, 11, 0, 0, // Skip to: 1132 +/* 1121 */ MCD_OPC_CheckField, 13, 3, 0, 41, 6, 0, // Skip to: 2705 +/* 1128 */ MCD_OPC_Decode, 224, 2, 2, // Opcode: EXTQL +/* 1132 */ MCD_OPC_FilterValue, 57, 11, 0, 0, // Skip to: 1148 +/* 1137 */ MCD_OPC_CheckField, 13, 3, 0, 25, 6, 0, // Skip to: 2705 +/* 1144 */ MCD_OPC_Decode, 213, 3, 2, // Opcode: SLr +/* 1148 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 1164 +/* 1153 */ MCD_OPC_CheckField, 13, 3, 0, 9, 6, 0, // Skip to: 2705 +/* 1160 */ MCD_OPC_Decode, 132, 3, 2, // Opcode: INSQL +/* 1164 */ MCD_OPC_FilterValue, 60, 11, 0, 0, // Skip to: 1180 +/* 1169 */ MCD_OPC_CheckField, 13, 3, 0, 249, 5, 0, // Skip to: 2705 +/* 1176 */ MCD_OPC_Decode, 217, 3, 2, // Opcode: SRAr +/* 1180 */ MCD_OPC_FilterValue, 82, 11, 0, 0, // Skip to: 1196 +/* 1185 */ MCD_OPC_CheckField, 13, 3, 0, 233, 5, 0, // Skip to: 2705 +/* 1192 */ MCD_OPC_Decode, 177, 3, 2, // Opcode: MSKWH +/* 1196 */ MCD_OPC_FilterValue, 87, 11, 0, 0, // Skip to: 1212 +/* 1201 */ MCD_OPC_CheckField, 13, 3, 0, 217, 5, 0, // Skip to: 2705 +/* 1208 */ MCD_OPC_Decode, 134, 3, 2, // Opcode: INSWH +/* 1212 */ MCD_OPC_FilterValue, 90, 11, 0, 0, // Skip to: 1228 +/* 1217 */ MCD_OPC_CheckField, 13, 3, 0, 201, 5, 0, // Skip to: 2705 +/* 1224 */ MCD_OPC_Decode, 226, 2, 2, // Opcode: EXTWH +/* 1228 */ MCD_OPC_FilterValue, 98, 11, 0, 0, // Skip to: 1244 +/* 1233 */ MCD_OPC_CheckField, 13, 3, 0, 185, 5, 0, // Skip to: 2705 +/* 1240 */ MCD_OPC_Decode, 169, 3, 2, // Opcode: MSKLH +/* 1244 */ MCD_OPC_FilterValue, 103, 11, 0, 0, // Skip to: 1260 +/* 1249 */ MCD_OPC_CheckField, 13, 3, 0, 169, 5, 0, // Skip to: 2705 +/* 1256 */ MCD_OPC_Decode, 254, 2, 2, // Opcode: INSLH +/* 1260 */ MCD_OPC_FilterValue, 106, 11, 0, 0, // Skip to: 1276 +/* 1265 */ MCD_OPC_CheckField, 13, 3, 0, 153, 5, 0, // Skip to: 2705 +/* 1272 */ MCD_OPC_Decode, 218, 2, 2, // Opcode: EXTLH +/* 1276 */ MCD_OPC_FilterValue, 114, 11, 0, 0, // Skip to: 1292 +/* 1281 */ MCD_OPC_CheckField, 13, 3, 0, 137, 5, 0, // Skip to: 2705 +/* 1288 */ MCD_OPC_Decode, 173, 3, 2, // Opcode: MSKQH +/* 1292 */ MCD_OPC_FilterValue, 119, 11, 0, 0, // Skip to: 1308 +/* 1297 */ MCD_OPC_CheckField, 13, 3, 0, 121, 5, 0, // Skip to: 2705 +/* 1304 */ MCD_OPC_Decode, 130, 3, 2, // Opcode: INSQH +/* 1308 */ MCD_OPC_FilterValue, 122, 11, 0, 0, // Skip to: 1324 +/* 1313 */ MCD_OPC_CheckField, 13, 3, 0, 105, 5, 0, // Skip to: 2705 +/* 1320 */ MCD_OPC_Decode, 222, 2, 2, // Opcode: EXTQH +/* 1324 */ MCD_OPC_FilterValue, 130, 1, 4, 0, 0, // Skip to: 1334 +/* 1330 */ MCD_OPC_Decode, 168, 3, 3, // Opcode: MSKBLi +/* 1334 */ MCD_OPC_FilterValue, 134, 1, 4, 0, 0, // Skip to: 1344 +/* 1340 */ MCD_OPC_Decode, 217, 2, 3, // Opcode: EXTBLi +/* 1344 */ MCD_OPC_FilterValue, 139, 1, 4, 0, 0, // Skip to: 1354 +/* 1350 */ MCD_OPC_Decode, 253, 2, 3, // Opcode: INSBLi +/* 1354 */ MCD_OPC_FilterValue, 146, 1, 4, 0, 0, // Skip to: 1364 +/* 1360 */ MCD_OPC_Decode, 180, 3, 3, // Opcode: MSKWLi +/* 1364 */ MCD_OPC_FilterValue, 150, 1, 4, 0, 0, // Skip to: 1374 +/* 1370 */ MCD_OPC_Decode, 229, 2, 3, // Opcode: EXTWLi +/* 1374 */ MCD_OPC_FilterValue, 155, 1, 4, 0, 0, // Skip to: 1384 +/* 1380 */ MCD_OPC_Decode, 137, 3, 3, // Opcode: INSWLi +/* 1384 */ MCD_OPC_FilterValue, 162, 1, 4, 0, 0, // Skip to: 1394 +/* 1390 */ MCD_OPC_Decode, 172, 3, 3, // Opcode: MSKLLi +/* 1394 */ MCD_OPC_FilterValue, 166, 1, 4, 0, 0, // Skip to: 1404 +/* 1400 */ MCD_OPC_Decode, 221, 2, 3, // Opcode: EXTLLi +/* 1404 */ MCD_OPC_FilterValue, 171, 1, 4, 0, 0, // Skip to: 1414 +/* 1410 */ MCD_OPC_Decode, 129, 3, 3, // Opcode: INSLLi +/* 1414 */ MCD_OPC_FilterValue, 177, 1, 4, 0, 0, // Skip to: 1424 +/* 1420 */ MCD_OPC_Decode, 249, 3, 3, // Opcode: ZAPNOTi +/* 1424 */ MCD_OPC_FilterValue, 178, 1, 4, 0, 0, // Skip to: 1434 +/* 1430 */ MCD_OPC_Decode, 176, 3, 3, // Opcode: MSKQLi +/* 1434 */ MCD_OPC_FilterValue, 180, 1, 4, 0, 0, // Skip to: 1444 +/* 1440 */ MCD_OPC_Decode, 218, 3, 3, // Opcode: SRLi +/* 1444 */ MCD_OPC_FilterValue, 182, 1, 4, 0, 0, // Skip to: 1454 +/* 1450 */ MCD_OPC_Decode, 225, 2, 3, // Opcode: EXTQLi +/* 1454 */ MCD_OPC_FilterValue, 185, 1, 4, 0, 0, // Skip to: 1464 +/* 1460 */ MCD_OPC_Decode, 212, 3, 3, // Opcode: SLi +/* 1464 */ MCD_OPC_FilterValue, 187, 1, 4, 0, 0, // Skip to: 1474 +/* 1470 */ MCD_OPC_Decode, 133, 3, 3, // Opcode: INSQLi +/* 1474 */ MCD_OPC_FilterValue, 188, 1, 4, 0, 0, // Skip to: 1484 +/* 1480 */ MCD_OPC_Decode, 216, 3, 3, // Opcode: SRAi +/* 1484 */ MCD_OPC_FilterValue, 210, 1, 4, 0, 0, // Skip to: 1494 +/* 1490 */ MCD_OPC_Decode, 178, 3, 3, // Opcode: MSKWHi +/* 1494 */ MCD_OPC_FilterValue, 215, 1, 4, 0, 0, // Skip to: 1504 +/* 1500 */ MCD_OPC_Decode, 135, 3, 3, // Opcode: INSWHi +/* 1504 */ MCD_OPC_FilterValue, 218, 1, 4, 0, 0, // Skip to: 1514 +/* 1510 */ MCD_OPC_Decode, 227, 2, 3, // Opcode: EXTWHi +/* 1514 */ MCD_OPC_FilterValue, 226, 1, 4, 0, 0, // Skip to: 1524 +/* 1520 */ MCD_OPC_Decode, 170, 3, 3, // Opcode: MSKLHi +/* 1524 */ MCD_OPC_FilterValue, 231, 1, 4, 0, 0, // Skip to: 1534 +/* 1530 */ MCD_OPC_Decode, 255, 2, 3, // Opcode: INSLHi +/* 1534 */ MCD_OPC_FilterValue, 234, 1, 4, 0, 0, // Skip to: 1544 +/* 1540 */ MCD_OPC_Decode, 219, 2, 3, // Opcode: EXTLHi +/* 1544 */ MCD_OPC_FilterValue, 242, 1, 4, 0, 0, // Skip to: 1554 +/* 1550 */ MCD_OPC_Decode, 174, 3, 3, // Opcode: MSKQHi +/* 1554 */ MCD_OPC_FilterValue, 247, 1, 4, 0, 0, // Skip to: 1564 +/* 1560 */ MCD_OPC_Decode, 131, 3, 3, // Opcode: INSQHi +/* 1564 */ MCD_OPC_FilterValue, 250, 1, 111, 4, 0, // Skip to: 2705 +/* 1570 */ MCD_OPC_Decode, 223, 2, 3, // Opcode: EXTQHi +/* 1574 */ MCD_OPC_FilterValue, 19, 81, 0, 0, // Skip to: 1660 +/* 1579 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... +/* 1582 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1598 +/* 1587 */ MCD_OPC_CheckField, 13, 3, 0, 87, 4, 0, // Skip to: 2705 +/* 1594 */ MCD_OPC_Decode, 182, 3, 2, // Opcode: MULLr +/* 1598 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 1614 +/* 1603 */ MCD_OPC_CheckField, 13, 3, 0, 71, 4, 0, // Skip to: 2705 +/* 1610 */ MCD_OPC_Decode, 184, 3, 2, // Opcode: MULQr +/* 1614 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1630 +/* 1619 */ MCD_OPC_CheckField, 13, 3, 0, 55, 4, 0, // Skip to: 2705 +/* 1626 */ MCD_OPC_Decode, 243, 3, 2, // Opcode: UMULHr +/* 1630 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 1640 +/* 1636 */ MCD_OPC_Decode, 181, 3, 3, // Opcode: MULLi +/* 1640 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 1650 +/* 1646 */ MCD_OPC_Decode, 183, 3, 3, // Opcode: MULQi +/* 1650 */ MCD_OPC_FilterValue, 176, 1, 25, 4, 0, // Skip to: 2705 +/* 1656 */ MCD_OPC_Decode, 242, 3, 3, // Opcode: UMULHi +/* 1660 */ MCD_OPC_FilterValue, 20, 69, 0, 0, // Skip to: 1734 +/* 1665 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1668 */ MCD_OPC_FilterValue, 4, 11, 0, 0, // Skip to: 1684 +/* 1673 */ MCD_OPC_CheckField, 16, 5, 31, 1, 4, 0, // Skip to: 2705 +/* 1680 */ MCD_OPC_Decode, 138, 3, 6, // Opcode: ITOFS +/* 1684 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 1700 +/* 1689 */ MCD_OPC_CheckField, 16, 5, 31, 241, 3, 0, // Skip to: 2705 +/* 1696 */ MCD_OPC_Decode, 139, 3, 7, // Opcode: ITOFT +/* 1700 */ MCD_OPC_FilterValue, 139, 11, 11, 0, 0, // Skip to: 1717 +/* 1706 */ MCD_OPC_CheckField, 21, 5, 31, 224, 3, 0, // Skip to: 2705 +/* 1713 */ MCD_OPC_Decode, 214, 3, 8, // Opcode: SQRTS +/* 1717 */ MCD_OPC_FilterValue, 171, 11, 214, 3, 0, // Skip to: 2705 +/* 1723 */ MCD_OPC_CheckField, 21, 5, 31, 207, 3, 0, // Skip to: 2705 +/* 1730 */ MCD_OPC_Decode, 215, 3, 9, // Opcode: SQRTT +/* 1734 */ MCD_OPC_FilterValue, 22, 208, 0, 0, // Skip to: 1947 +/* 1739 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1742 */ MCD_OPC_FilterValue, 175, 10, 11, 0, 0, // Skip to: 1759 +/* 1748 */ MCD_OPC_CheckField, 21, 5, 31, 182, 3, 0, // Skip to: 2705 +/* 1755 */ MCD_OPC_Decode, 208, 2, 9, // Opcode: CVTTQ +/* 1759 */ MCD_OPC_FilterValue, 128, 11, 4, 0, 0, // Skip to: 1769 +/* 1765 */ MCD_OPC_Decode, 139, 2, 10, // Opcode: ADDS +/* 1769 */ MCD_OPC_FilterValue, 129, 11, 4, 0, 0, // Skip to: 1779 +/* 1775 */ MCD_OPC_Decode, 239, 3, 10, // Opcode: SUBS +/* 1779 */ MCD_OPC_FilterValue, 130, 11, 4, 0, 0, // Skip to: 1789 +/* 1785 */ MCD_OPC_Decode, 185, 3, 10, // Opcode: MULS +/* 1789 */ MCD_OPC_FilterValue, 131, 11, 4, 0, 0, // Skip to: 1799 +/* 1795 */ MCD_OPC_Decode, 210, 2, 10, // Opcode: DIVS +/* 1799 */ MCD_OPC_FilterValue, 160, 11, 4, 0, 0, // Skip to: 1809 +/* 1805 */ MCD_OPC_Decode, 140, 2, 11, // Opcode: ADDT +/* 1809 */ MCD_OPC_FilterValue, 161, 11, 4, 0, 0, // Skip to: 1819 +/* 1815 */ MCD_OPC_Decode, 240, 3, 11, // Opcode: SUBT +/* 1819 */ MCD_OPC_FilterValue, 162, 11, 4, 0, 0, // Skip to: 1829 +/* 1825 */ MCD_OPC_Decode, 186, 3, 11, // Opcode: MULT +/* 1829 */ MCD_OPC_FilterValue, 163, 11, 4, 0, 0, // Skip to: 1839 +/* 1835 */ MCD_OPC_Decode, 211, 2, 11, // Opcode: DIVT +/* 1839 */ MCD_OPC_FilterValue, 164, 11, 4, 0, 0, // Skip to: 1849 +/* 1845 */ MCD_OPC_Decode, 184, 2, 11, // Opcode: CMPTUN +/* 1849 */ MCD_OPC_FilterValue, 165, 11, 4, 0, 0, // Skip to: 1859 +/* 1855 */ MCD_OPC_Decode, 181, 2, 11, // Opcode: CMPTEQ +/* 1859 */ MCD_OPC_FilterValue, 166, 11, 4, 0, 0, // Skip to: 1869 +/* 1865 */ MCD_OPC_Decode, 183, 2, 11, // Opcode: CMPTLT +/* 1869 */ MCD_OPC_FilterValue, 167, 11, 4, 0, 0, // Skip to: 1879 +/* 1875 */ MCD_OPC_Decode, 182, 2, 11, // Opcode: CMPTLE +/* 1879 */ MCD_OPC_FilterValue, 172, 13, 11, 0, 0, // Skip to: 1896 +/* 1885 */ MCD_OPC_CheckField, 21, 5, 31, 45, 3, 0, // Skip to: 2705 +/* 1892 */ MCD_OPC_Decode, 207, 2, 12, // Opcode: CVTST +/* 1896 */ MCD_OPC_FilterValue, 172, 15, 11, 0, 0, // Skip to: 1913 +/* 1902 */ MCD_OPC_CheckField, 21, 5, 31, 28, 3, 0, // Skip to: 2705 +/* 1909 */ MCD_OPC_Decode, 209, 2, 13, // Opcode: CVTTS +/* 1913 */ MCD_OPC_FilterValue, 188, 15, 11, 0, 0, // Skip to: 1930 +/* 1919 */ MCD_OPC_CheckField, 21, 5, 31, 11, 3, 0, // Skip to: 2705 +/* 1926 */ MCD_OPC_Decode, 205, 2, 13, // Opcode: CVTQS +/* 1930 */ MCD_OPC_FilterValue, 190, 15, 1, 3, 0, // Skip to: 2705 +/* 1936 */ MCD_OPC_CheckField, 21, 5, 31, 250, 2, 0, // Skip to: 2705 +/* 1943 */ MCD_OPC_Decode, 206, 2, 9, // Opcode: CVTQT +/* 1947 */ MCD_OPC_FilterValue, 23, 84, 0, 0, // Skip to: 2036 +/* 1952 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 1955 */ MCD_OPC_FilterValue, 32, 4, 0, 0, // Skip to: 1964 +/* 1960 */ MCD_OPC_Decode, 198, 2, 10, // Opcode: CPYSS +/* 1964 */ MCD_OPC_FilterValue, 33, 4, 0, 0, // Skip to: 1973 +/* 1969 */ MCD_OPC_Decode, 196, 2, 11, // Opcode: CPYSNT +/* 1973 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 1982 +/* 1978 */ MCD_OPC_Decode, 191, 2, 10, // Opcode: CPYSES +/* 1982 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 1991 +/* 1987 */ MCD_OPC_Decode, 236, 2, 10, // Opcode: FCMOVEQS +/* 1991 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 2000 +/* 1996 */ MCD_OPC_Decode, 247, 2, 11, // Opcode: FCMOVNET +/* 2000 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 2009 +/* 2005 */ MCD_OPC_Decode, 244, 2, 10, // Opcode: FCMOVLTS +/* 2009 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 2018 +/* 2014 */ MCD_OPC_Decode, 238, 2, 10, // Opcode: FCMOVGES +/* 2018 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 2027 +/* 2023 */ MCD_OPC_Decode, 242, 2, 10, // Opcode: FCMOVLES +/* 2027 */ MCD_OPC_FilterValue, 47, 161, 2, 0, // Skip to: 2705 +/* 2032 */ MCD_OPC_Decode, 240, 2, 10, // Opcode: FCMOVGTS +/* 2036 */ MCD_OPC_FilterValue, 24, 181, 0, 0, // Skip to: 2222 +/* 2041 */ MCD_OPC_ExtractField, 0, 16, // Inst{15-0} ... +/* 2044 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 2060 +/* 2049 */ MCD_OPC_CheckField, 16, 10, 0, 137, 2, 0, // Skip to: 2705 +/* 2056 */ MCD_OPC_Decode, 241, 3, 14, // Opcode: TRAPB +/* 2060 */ MCD_OPC_FilterValue, 128, 8, 11, 0, 0, // Skip to: 2077 +/* 2066 */ MCD_OPC_CheckField, 16, 10, 0, 120, 2, 0, // Skip to: 2705 +/* 2073 */ MCD_OPC_Decode, 215, 2, 14, // Opcode: EXCB +/* 2077 */ MCD_OPC_FilterValue, 128, 128, 1, 11, 0, 0, // Skip to: 2095 +/* 2084 */ MCD_OPC_CheckField, 16, 10, 0, 102, 2, 0, // Skip to: 2705 +/* 2091 */ MCD_OPC_Decode, 166, 3, 14, // Opcode: MB +/* 2095 */ MCD_OPC_FilterValue, 128, 136, 1, 11, 0, 0, // Skip to: 2113 +/* 2102 */ MCD_OPC_CheckField, 16, 10, 0, 84, 2, 0, // Skip to: 2705 +/* 2109 */ MCD_OPC_Decode, 246, 3, 14, // Opcode: WMB +/* 2113 */ MCD_OPC_FilterValue, 128, 128, 2, 4, 0, 0, // Skip to: 2124 +/* 2120 */ MCD_OPC_Decode, 248, 2, 15, // Opcode: FETCH +/* 2124 */ MCD_OPC_FilterValue, 128, 192, 2, 4, 0, 0, // Skip to: 2135 +/* 2131 */ MCD_OPC_Decode, 249, 2, 15, // Opcode: FETCH_M +/* 2135 */ MCD_OPC_FilterValue, 128, 128, 3, 11, 0, 0, // Skip to: 2153 +/* 2142 */ MCD_OPC_CheckField, 16, 5, 0, 44, 2, 0, // Skip to: 2705 +/* 2149 */ MCD_OPC_Decode, 192, 3, 16, // Opcode: RPCC +/* 2153 */ MCD_OPC_FilterValue, 128, 192, 3, 11, 0, 0, // Skip to: 2171 +/* 2160 */ MCD_OPC_CheckField, 16, 5, 0, 26, 2, 0, // Skip to: 2705 +/* 2167 */ MCD_OPC_Decode, 189, 3, 16, // Opcode: RC +/* 2171 */ MCD_OPC_FilterValue, 128, 208, 3, 4, 0, 0, // Skip to: 2182 +/* 2178 */ MCD_OPC_Decode, 212, 2, 15, // Opcode: ECB +/* 2182 */ MCD_OPC_FilterValue, 128, 224, 3, 11, 0, 0, // Skip to: 2200 +/* 2189 */ MCD_OPC_CheckField, 16, 5, 0, 253, 1, 0, // Skip to: 2705 +/* 2196 */ MCD_OPC_Decode, 193, 3, 16, // Opcode: RS +/* 2200 */ MCD_OPC_FilterValue, 128, 240, 3, 4, 0, 0, // Skip to: 2211 +/* 2207 */ MCD_OPC_Decode, 244, 3, 15, // Opcode: WH64 +/* 2211 */ MCD_OPC_FilterValue, 128, 248, 3, 231, 1, 0, // Skip to: 2705 +/* 2218 */ MCD_OPC_Decode, 245, 3, 15, // Opcode: WH64EN +/* 2222 */ MCD_OPC_FilterValue, 26, 101, 0, 0, // Skip to: 2328 +/* 2227 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... +/* 2230 */ MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 2253 +/* 2235 */ MCD_OPC_CheckField, 21, 5, 31, 207, 1, 0, // Skip to: 2705 +/* 2242 */ MCD_OPC_CheckField, 0, 14, 0, 200, 1, 0, // Skip to: 2705 +/* 2249 */ MCD_OPC_Decode, 140, 3, 17, // Opcode: JMP +/* 2253 */ MCD_OPC_FilterValue, 1, 37, 0, 0, // Skip to: 2295 +/* 2258 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... +/* 2261 */ MCD_OPC_FilterValue, 251, 5, 11, 0, 0, // Skip to: 2278 +/* 2267 */ MCD_OPC_CheckField, 0, 14, 0, 175, 1, 0, // Skip to: 2705 +/* 2274 */ MCD_OPC_Decode, 143, 3, 14, // Opcode: JSRs +/* 2278 */ MCD_OPC_FilterValue, 219, 6, 165, 1, 0, // Skip to: 2705 +/* 2284 */ MCD_OPC_CheckField, 0, 14, 0, 158, 1, 0, // Skip to: 2705 +/* 2291 */ MCD_OPC_Decode, 141, 3, 14, // Opcode: JSR +/* 2295 */ MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 2319 +/* 2300 */ MCD_OPC_CheckField, 16, 10, 250, 7, 141, 1, 0, // Skip to: 2705 +/* 2308 */ MCD_OPC_CheckField, 0, 14, 1, 134, 1, 0, // Skip to: 2705 +/* 2315 */ MCD_OPC_Decode, 190, 3, 14, // Opcode: RETDAG +/* 2319 */ MCD_OPC_FilterValue, 3, 125, 1, 0, // Skip to: 2705 +/* 2324 */ MCD_OPC_Decode, 142, 3, 18, // Opcode: JSR_COROUTINE +/* 2328 */ MCD_OPC_FilterValue, 28, 115, 0, 0, // Skip to: 2448 +/* 2333 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 2336 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 2352 +/* 2341 */ MCD_OPC_CheckField, 21, 5, 31, 101, 1, 0, // Skip to: 2705 +/* 2348 */ MCD_OPC_Decode, 210, 3, 19, // Opcode: SEXTB +/* 2352 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 2368 +/* 2357 */ MCD_OPC_CheckField, 21, 5, 31, 85, 1, 0, // Skip to: 2705 +/* 2364 */ MCD_OPC_Decode, 211, 3, 19, // Opcode: SEXTW +/* 2368 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2384 +/* 2373 */ MCD_OPC_CheckField, 21, 5, 31, 69, 1, 0, // Skip to: 2705 +/* 2380 */ MCD_OPC_Decode, 203, 2, 19, // Opcode: CTPOP +/* 2384 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 2400 +/* 2389 */ MCD_OPC_CheckField, 21, 5, 31, 53, 1, 0, // Skip to: 2705 +/* 2396 */ MCD_OPC_Decode, 202, 2, 19, // Opcode: CTLZ +/* 2400 */ MCD_OPC_FilterValue, 51, 11, 0, 0, // Skip to: 2416 +/* 2405 */ MCD_OPC_CheckField, 21, 5, 31, 37, 1, 0, // Skip to: 2705 +/* 2412 */ MCD_OPC_Decode, 204, 2, 19, // Opcode: CTTZ +/* 2416 */ MCD_OPC_FilterValue, 112, 11, 0, 0, // Skip to: 2432 +/* 2421 */ MCD_OPC_CheckField, 16, 5, 31, 21, 1, 0, // Skip to: 2705 +/* 2428 */ MCD_OPC_Decode, 251, 2, 20, // Opcode: FTOIT +/* 2432 */ MCD_OPC_FilterValue, 120, 12, 1, 0, // Skip to: 2705 +/* 2437 */ MCD_OPC_CheckField, 16, 5, 31, 5, 1, 0, // Skip to: 2705 +/* 2444 */ MCD_OPC_Decode, 250, 2, 21, // Opcode: FTOIS +/* 2448 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 2457 +/* 2453 */ MCD_OPC_Decode, 160, 3, 22, // Opcode: LDS +/* 2457 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 2466 +/* 2462 */ MCD_OPC_Decode, 162, 3, 23, // Opcode: LDT +/* 2466 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 2475 +/* 2471 */ MCD_OPC_Decode, 229, 3, 22, // Opcode: STS +/* 2475 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 2484 +/* 2480 */ MCD_OPC_Decode, 231, 3, 23, // Opcode: STT +/* 2484 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 2493 +/* 2489 */ MCD_OPC_Decode, 152, 3, 1, // Opcode: LDL +/* 2493 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 2502 +/* 2498 */ MCD_OPC_Decode, 155, 3, 1, // Opcode: LDQ +/* 2502 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 2511 +/* 2507 */ MCD_OPC_Decode, 153, 3, 1, // Opcode: LDL_L +/* 2511 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 2520 +/* 2516 */ MCD_OPC_Decode, 156, 3, 1, // Opcode: LDQ_L +/* 2520 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 2529 +/* 2525 */ MCD_OPC_Decode, 222, 3, 1, // Opcode: STL +/* 2529 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 2538 +/* 2534 */ MCD_OPC_Decode, 225, 3, 1, // Opcode: STQ +/* 2538 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 2547 +/* 2543 */ MCD_OPC_Decode, 223, 3, 24, // Opcode: STL_C +/* 2547 */ MCD_OPC_FilterValue, 47, 4, 0, 0, // Skip to: 2556 +/* 2552 */ MCD_OPC_Decode, 226, 3, 24, // Opcode: STQ_C +/* 2556 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2572 +/* 2561 */ MCD_OPC_CheckField, 21, 5, 31, 137, 0, 0, // Skip to: 2705 +/* 2568 */ MCD_OPC_Decode, 155, 2, 25, // Opcode: BR +/* 2572 */ MCD_OPC_FilterValue, 49, 4, 0, 0, // Skip to: 2581 +/* 2577 */ MCD_OPC_Decode, 230, 2, 26, // Opcode: FBEQ +/* 2581 */ MCD_OPC_FilterValue, 50, 4, 0, 0, // Skip to: 2590 +/* 2586 */ MCD_OPC_Decode, 234, 2, 26, // Opcode: FBLT +/* 2590 */ MCD_OPC_FilterValue, 51, 4, 0, 0, // Skip to: 2599 +/* 2595 */ MCD_OPC_Decode, 233, 2, 26, // Opcode: FBLE +/* 2599 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 2615 +/* 2604 */ MCD_OPC_CheckField, 21, 5, 26, 94, 0, 0, // Skip to: 2705 +/* 2611 */ MCD_OPC_Decode, 156, 2, 25, // Opcode: BSR +/* 2615 */ MCD_OPC_FilterValue, 54, 4, 0, 0, // Skip to: 2624 +/* 2620 */ MCD_OPC_Decode, 231, 2, 26, // Opcode: FBGE +/* 2624 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 2633 +/* 2629 */ MCD_OPC_Decode, 232, 2, 26, // Opcode: FBGT +/* 2633 */ MCD_OPC_FilterValue, 56, 4, 0, 0, // Skip to: 2642 +/* 2638 */ MCD_OPC_Decode, 150, 2, 27, // Opcode: BLBC +/* 2642 */ MCD_OPC_FilterValue, 57, 4, 0, 0, // Skip to: 2651 +/* 2647 */ MCD_OPC_Decode, 143, 2, 27, // Opcode: BEQ +/* 2651 */ MCD_OPC_FilterValue, 58, 4, 0, 0, // Skip to: 2660 +/* 2656 */ MCD_OPC_Decode, 153, 2, 27, // Opcode: BLT +/* 2660 */ MCD_OPC_FilterValue, 59, 4, 0, 0, // Skip to: 2669 +/* 2665 */ MCD_OPC_Decode, 152, 2, 27, // Opcode: BLE +/* 2669 */ MCD_OPC_FilterValue, 60, 4, 0, 0, // Skip to: 2678 +/* 2674 */ MCD_OPC_Decode, 151, 2, 27, // Opcode: BLBS +/* 2678 */ MCD_OPC_FilterValue, 61, 4, 0, 0, // Skip to: 2687 +/* 2683 */ MCD_OPC_Decode, 154, 2, 27, // Opcode: BNE +/* 2687 */ MCD_OPC_FilterValue, 62, 4, 0, 0, // Skip to: 2696 +/* 2692 */ MCD_OPC_Decode, 144, 2, 27, // Opcode: BGE +/* 2696 */ MCD_OPC_FilterValue, 63, 4, 0, 0, // Skip to: 2705 +/* 2701 */ MCD_OPC_Decode, 145, 2, 27, // Opcode: BGT +/* 2705 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableCondBranchF32[] = { /* 0 */ MCD_OPC_CheckField, 26, 6, 0, 4, 0, 0, // Skip to: 11 -/* 7 */ MCD_OPC_Decode, 189, 2, 27, // Opcode: COND_BRANCH_F +/* 7 */ MCD_OPC_Decode, 189, 2, 28, // Opcode: COND_BRANCH_F /* 11 */ MCD_OPC_Fail, 0 }; @@ -450,13 +573,13 @@ static const uint8_t DecoderTableCpys32[] = { /* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 3 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 19 /* 8 */ MCD_OPC_CheckField, 26, 6, 23, 36, 0, 0, // Skip to: 51 -/* 15 */ MCD_OPC_Decode, 199, 2, 28, // Opcode: CPYSSt +/* 15 */ MCD_OPC_Decode, 199, 2, 29, // Opcode: CPYSSt /* 19 */ MCD_OPC_FilterValue, 33, 11, 0, 0, // Skip to: 35 /* 24 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 51 -/* 31 */ MCD_OPC_Decode, 195, 2, 28, // Opcode: CPYSNSt +/* 31 */ MCD_OPC_Decode, 195, 2, 29, // Opcode: CPYSNSt /* 35 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 51 /* 40 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 51 -/* 47 */ MCD_OPC_Decode, 192, 2, 28, // Opcode: CPYSESt +/* 47 */ MCD_OPC_Decode, 192, 2, 29, // Opcode: CPYSESt /* 51 */ MCD_OPC_Fail, 0 }; @@ -489,17 +612,17 @@ static const uint8_t DecoderTableCpysTs32[] = { /* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 3 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 19 /* 8 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 35 -/* 15 */ MCD_OPC_Decode, 201, 2, 29, // Opcode: CPYSTs +/* 15 */ MCD_OPC_Decode, 201, 2, 30, // Opcode: CPYSTs /* 19 */ MCD_OPC_FilterValue, 33, 11, 0, 0, // Skip to: 35 /* 24 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 35 -/* 31 */ MCD_OPC_Decode, 197, 2, 29, // Opcode: CPYSNTs +/* 31 */ MCD_OPC_Decode, 197, 2, 30, // Opcode: CPYSNTs /* 35 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableFb32[] = { /* 0 */ MCD_OPC_CheckField, 26, 6, 54, 4, 0, 0, // Skip to: 11 -/* 7 */ MCD_OPC_Decode, 222, 2, 25, // Opcode: FBNE +/* 7 */ MCD_OPC_Decode, 235, 2, 26, // Opcode: FBNE /* 11 */ MCD_OPC_Fail, 0 }; @@ -508,22 +631,22 @@ static const uint8_t DecoderTableFcmov32[] = { /* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 3 */ MCD_OPC_FilterValue, 42, 11, 0, 0, // Skip to: 19 /* 8 */ MCD_OPC_CheckField, 26, 6, 23, 84, 0, 0, // Skip to: 99 -/* 15 */ MCD_OPC_Decode, 224, 2, 11, // Opcode: FCMOVEQT +/* 15 */ MCD_OPC_Decode, 237, 2, 11, // Opcode: FCMOVEQT /* 19 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 35 /* 24 */ MCD_OPC_CheckField, 26, 6, 23, 68, 0, 0, // Skip to: 99 -/* 31 */ MCD_OPC_Decode, 233, 2, 10, // Opcode: FCMOVNES +/* 31 */ MCD_OPC_Decode, 246, 2, 10, // Opcode: FCMOVNES /* 35 */ MCD_OPC_FilterValue, 44, 11, 0, 0, // Skip to: 51 /* 40 */ MCD_OPC_CheckField, 26, 6, 23, 52, 0, 0, // Skip to: 99 -/* 47 */ MCD_OPC_Decode, 232, 2, 11, // Opcode: FCMOVLTT +/* 47 */ MCD_OPC_Decode, 245, 2, 11, // Opcode: FCMOVLTT /* 51 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 67 /* 56 */ MCD_OPC_CheckField, 26, 6, 23, 36, 0, 0, // Skip to: 99 -/* 63 */ MCD_OPC_Decode, 226, 2, 11, // Opcode: FCMOVGET +/* 63 */ MCD_OPC_Decode, 239, 2, 11, // Opcode: FCMOVGET /* 67 */ MCD_OPC_FilterValue, 46, 11, 0, 0, // Skip to: 83 /* 72 */ MCD_OPC_CheckField, 26, 6, 23, 20, 0, 0, // Skip to: 99 -/* 79 */ MCD_OPC_Decode, 230, 2, 11, // Opcode: FCMOVLET +/* 79 */ MCD_OPC_Decode, 243, 2, 11, // Opcode: FCMOVLET /* 83 */ MCD_OPC_FilterValue, 47, 11, 0, 0, // Skip to: 99 /* 88 */ MCD_OPC_CheckField, 26, 6, 23, 4, 0, 0, // Skip to: 99 -/* 95 */ MCD_OPC_Decode, 228, 2, 11, // Opcode: FCMOVGTT +/* 95 */ MCD_OPC_Decode, 241, 2, 11, // Opcode: FCMOVGTT /* 99 */ MCD_OPC_Fail, 0 }; @@ -531,16 +654,16 @@ static const uint8_t DecoderTableFcmov32[] = { static const uint8_t DecoderTableLDg32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12 -/* 8 */ MCD_OPC_Decode, 247, 2, 1, // Opcode: LDAg +/* 8 */ MCD_OPC_Decode, 148, 3, 1, // Opcode: LDAg /* 12 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21 -/* 17 */ MCD_OPC_Decode, 245, 2, 1, // Opcode: LDAHg +/* 17 */ MCD_OPC_Decode, 146, 3, 1, // Opcode: LDAHg /* 21 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableLDl32[] = { /* 0 */ MCD_OPC_CheckField, 26, 6, 41, 4, 0, 0, // Skip to: 11 -/* 7 */ MCD_OPC_Decode, 128, 3, 1, // Opcode: LDQl +/* 7 */ MCD_OPC_Decode, 158, 3, 1, // Opcode: LDQl /* 11 */ MCD_OPC_Fail, 0 }; @@ -548,28 +671,28 @@ static const uint8_t DecoderTableLDl32[] = { static const uint8_t DecoderTableLDr32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12 -/* 8 */ MCD_OPC_Decode, 248, 2, 1, // Opcode: LDAr +/* 8 */ MCD_OPC_Decode, 149, 3, 1, // Opcode: LDAr /* 12 */ MCD_OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21 -/* 17 */ MCD_OPC_Decode, 246, 2, 1, // Opcode: LDAHr +/* 17 */ MCD_OPC_Decode, 147, 3, 1, // Opcode: LDAHr /* 21 */ MCD_OPC_FilterValue, 10, 4, 0, 0, // Skip to: 30 -/* 26 */ MCD_OPC_Decode, 250, 2, 1, // Opcode: LDBUr +/* 26 */ MCD_OPC_Decode, 151, 3, 1, // Opcode: LDBUr /* 30 */ MCD_OPC_FilterValue, 12, 4, 0, 0, // Skip to: 39 -/* 35 */ MCD_OPC_Decode, 135, 3, 1, // Opcode: LDWUr +/* 35 */ MCD_OPC_Decode, 165, 3, 1, // Opcode: LDWUr /* 39 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 48 -/* 44 */ MCD_OPC_Decode, 131, 3, 21, // Opcode: LDSr +/* 44 */ MCD_OPC_Decode, 161, 3, 22, // Opcode: LDSr /* 48 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 57 -/* 53 */ MCD_OPC_Decode, 133, 3, 22, // Opcode: LDTr +/* 53 */ MCD_OPC_Decode, 163, 3, 23, // Opcode: LDTr /* 57 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 66 -/* 62 */ MCD_OPC_Decode, 253, 2, 1, // Opcode: LDLr +/* 62 */ MCD_OPC_Decode, 154, 3, 1, // Opcode: LDLr /* 66 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 75 -/* 71 */ MCD_OPC_Decode, 129, 3, 1, // Opcode: LDQr +/* 71 */ MCD_OPC_Decode, 159, 3, 1, // Opcode: LDQr /* 75 */ MCD_OPC_Fail, 0 }; static const uint8_t DecoderTableRet32[] = { /* 0 */ MCD_OPC_CheckField, 0, 32, 129, 128, 234, 223, 6, 4, 0, 0, // Skip to: 15 -/* 11 */ MCD_OPC_Decode, 146, 3, 14, // Opcode: RETDAGp +/* 11 */ MCD_OPC_Decode, 191, 3, 14, // Opcode: RETDAGp /* 15 */ MCD_OPC_Fail, 0 }; @@ -577,17 +700,17 @@ static const uint8_t DecoderTableRet32[] = { static const uint8_t DecoderTableSTr32[] = { /* 0 */ MCD_OPC_ExtractField, 26, 6, // Inst{31-26} ... /* 3 */ MCD_OPC_FilterValue, 13, 4, 0, 0, // Skip to: 12 -/* 8 */ MCD_OPC_Decode, 187, 3, 1, // Opcode: STWr +/* 8 */ MCD_OPC_Decode, 234, 3, 1, // Opcode: STWr /* 12 */ MCD_OPC_FilterValue, 14, 4, 0, 0, // Skip to: 21 -/* 17 */ MCD_OPC_Decode, 175, 3, 1, // Opcode: STBr +/* 17 */ MCD_OPC_Decode, 221, 3, 1, // Opcode: STBr /* 21 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 30 -/* 26 */ MCD_OPC_Decode, 183, 3, 21, // Opcode: STSr +/* 26 */ MCD_OPC_Decode, 230, 3, 22, // Opcode: STSr /* 30 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 39 -/* 35 */ MCD_OPC_Decode, 185, 3, 22, // Opcode: STTr +/* 35 */ MCD_OPC_Decode, 232, 3, 23, // Opcode: STTr /* 39 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 48 -/* 44 */ MCD_OPC_Decode, 178, 3, 1, // Opcode: STLr +/* 44 */ MCD_OPC_Decode, 224, 3, 1, // Opcode: STLr /* 48 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 57 -/* 53 */ MCD_OPC_Decode, 181, 3, 1, // Opcode: STQr +/* 53 */ MCD_OPC_Decode, 228, 3, 1, // Opcode: STQr /* 57 */ MCD_OPC_Fail, 0 }; @@ -710,12 +833,18 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M case 15: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ case 16: \ - tmp = fieldname(insn, 16, 5); \ + tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ case 17: \ + tmp = fieldname(insn, 16, 5); \ + if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ + return S; \ + case 18: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 16, 5); \ @@ -723,25 +852,25 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M tmp = fieldname(insn, 0, 14); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ - case 18: \ + case 19: \ tmp = fieldname(insn, 0, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 19: \ + case 20: \ tmp = fieldname(insn, 0, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 20: \ + case 21: \ tmp = fieldname(insn, 0, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 21: \ + case 22: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 0, 16); \ @@ -749,7 +878,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 22: \ + case 23: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 0, 16); \ @@ -757,7 +886,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 23: \ + case 24: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 21, 5); \ @@ -767,29 +896,29 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M tmp = fieldname(insn, 16, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 24: \ + case 25: \ tmp = fieldname(insn, 0, 21); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ - case 25: \ + case 26: \ tmp = fieldname(insn, 21, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 0, 21); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ - case 26: \ + case 27: \ tmp = fieldname(insn, 21, 5); \ if (DecodeGPRCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 0, 21); \ MCOperand_CreateImm0(MI, tmp); \ return S; \ - case 27: \ + case 28: \ tmp = fieldname(insn, 21, 5); \ MCOperand_CreateImm0(MI, tmp); \ tmp = fieldname(insn, 0, 21); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 28: \ + case 29: \ tmp = fieldname(insn, 0, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 21, 5); \ @@ -797,7 +926,7 @@ static DecodeStatus fname(DecodeStatus S, unsigned Idx, InsnType insn, MCInst *M tmp = fieldname(insn, 16, 5); \ if (DecodeF4RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ return S; \ - case 29: \ + case 30: \ tmp = fieldname(insn, 0, 5); \ if (DecodeF8RCRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) { return MCDisassembler_Fail; } \ tmp = fieldname(insn, 21, 5); \ diff --git a/arch/Alpha/AlphaGenInstrInfo.inc b/arch/Alpha/AlphaGenInstrInfo.inc index dc0da68aa6..465df47b62 100644 --- a/arch/Alpha/AlphaGenInstrInfo.inc +++ b/arch/Alpha/AlphaGenInstrInfo.inc @@ -355,123 +355,173 @@ Alpha_CVTTS = 337, Alpha_DIVS = 338, Alpha_DIVT = 339, - Alpha_EQVi = 340, - Alpha_EQVr = 341, - Alpha_EXTBL = 342, - Alpha_EXTLL = 343, - Alpha_EXTWL = 344, - Alpha_FBEQ = 345, - Alpha_FBGE = 346, - Alpha_FBGT = 347, - Alpha_FBLE = 348, - Alpha_FBLT = 349, - Alpha_FBNE = 350, - Alpha_FCMOVEQS = 351, - Alpha_FCMOVEQT = 352, - Alpha_FCMOVGES = 353, - Alpha_FCMOVGET = 354, - Alpha_FCMOVGTS = 355, - Alpha_FCMOVGTT = 356, - Alpha_FCMOVLES = 357, - Alpha_FCMOVLET = 358, - Alpha_FCMOVLTS = 359, - Alpha_FCMOVLTT = 360, - Alpha_FCMOVNES = 361, - Alpha_FCMOVNET = 362, - Alpha_FTOIS = 363, - Alpha_FTOIT = 364, - Alpha_ITOFS = 365, - Alpha_ITOFT = 366, - Alpha_JMP = 367, - Alpha_JSR = 368, - Alpha_JSR_COROUTINE = 369, - Alpha_JSRs = 370, - Alpha_LDA = 371, - Alpha_LDAH = 372, - Alpha_LDAHg = 373, - Alpha_LDAHr = 374, - Alpha_LDAg = 375, - Alpha_LDAr = 376, - Alpha_LDBU = 377, - Alpha_LDBUr = 378, - Alpha_LDL = 379, - Alpha_LDL_L = 380, - Alpha_LDLr = 381, - Alpha_LDQ = 382, - Alpha_LDQ_L = 383, - Alpha_LDQl = 384, - Alpha_LDQr = 385, - Alpha_LDS = 386, - Alpha_LDSr = 387, - Alpha_LDT = 388, - Alpha_LDTr = 389, - Alpha_LDWU = 390, - Alpha_LDWUr = 391, - Alpha_MB = 392, - Alpha_MULLi = 393, - Alpha_MULLr = 394, - Alpha_MULQi = 395, - Alpha_MULQr = 396, - Alpha_MULS = 397, - Alpha_MULT = 398, - Alpha_ORNOTi = 399, - Alpha_ORNOTr = 400, - Alpha_RETDAG = 401, - Alpha_RETDAGp = 402, - Alpha_RPCC = 403, - Alpha_S4ADDLi = 404, - Alpha_S4ADDLr = 405, - Alpha_S4ADDQi = 406, - Alpha_S4ADDQr = 407, - Alpha_S4SUBLi = 408, - Alpha_S4SUBLr = 409, - Alpha_S4SUBQi = 410, - Alpha_S4SUBQr = 411, - Alpha_S8ADDLi = 412, - Alpha_S8ADDLr = 413, - Alpha_S8ADDQi = 414, - Alpha_S8ADDQr = 415, - Alpha_S8SUBLi = 416, - Alpha_S8SUBLr = 417, - Alpha_S8SUBQi = 418, - Alpha_S8SUBQr = 419, - Alpha_SEXTB = 420, - Alpha_SEXTW = 421, - Alpha_SLi = 422, - Alpha_SLr = 423, - Alpha_SQRTS = 424, - Alpha_SQRTT = 425, - Alpha_SRAi = 426, - Alpha_SRAr = 427, - Alpha_SRLi = 428, - Alpha_SRLr = 429, - Alpha_STB = 430, - Alpha_STBr = 431, - Alpha_STL = 432, - Alpha_STL_C = 433, - Alpha_STLr = 434, - Alpha_STQ = 435, - Alpha_STQ_C = 436, - Alpha_STQr = 437, - Alpha_STS = 438, - Alpha_STSr = 439, - Alpha_STT = 440, - Alpha_STTr = 441, - Alpha_STW = 442, - Alpha_STWr = 443, - Alpha_SUBLi = 444, - Alpha_SUBLr = 445, - Alpha_SUBQi = 446, - Alpha_SUBQr = 447, - Alpha_SUBS = 448, - Alpha_SUBT = 449, - Alpha_UMULHi = 450, - Alpha_UMULHr = 451, - Alpha_WMB = 452, - Alpha_XORi = 453, - Alpha_XORr = 454, - Alpha_ZAPNOTi = 455, - INSTRUCTION_LIST_END = 456 + Alpha_ECB = 340, + Alpha_EQVi = 341, + Alpha_EQVr = 342, + Alpha_EXCB = 343, + Alpha_EXTBL = 344, + Alpha_EXTBLi = 345, + Alpha_EXTLH = 346, + Alpha_EXTLHi = 347, + Alpha_EXTLL = 348, + Alpha_EXTLLi = 349, + Alpha_EXTQH = 350, + Alpha_EXTQHi = 351, + Alpha_EXTQL = 352, + Alpha_EXTQLi = 353, + Alpha_EXTWH = 354, + Alpha_EXTWHi = 355, + Alpha_EXTWL = 356, + Alpha_EXTWLi = 357, + Alpha_FBEQ = 358, + Alpha_FBGE = 359, + Alpha_FBGT = 360, + Alpha_FBLE = 361, + Alpha_FBLT = 362, + Alpha_FBNE = 363, + Alpha_FCMOVEQS = 364, + Alpha_FCMOVEQT = 365, + Alpha_FCMOVGES = 366, + Alpha_FCMOVGET = 367, + Alpha_FCMOVGTS = 368, + Alpha_FCMOVGTT = 369, + Alpha_FCMOVLES = 370, + Alpha_FCMOVLET = 371, + Alpha_FCMOVLTS = 372, + Alpha_FCMOVLTT = 373, + Alpha_FCMOVNES = 374, + Alpha_FCMOVNET = 375, + Alpha_FETCH = 376, + Alpha_FETCH_M = 377, + Alpha_FTOIS = 378, + Alpha_FTOIT = 379, + Alpha_INSBL = 380, + Alpha_INSBLi = 381, + Alpha_INSLH = 382, + Alpha_INSLHi = 383, + Alpha_INSLL = 384, + Alpha_INSLLi = 385, + Alpha_INSQH = 386, + Alpha_INSQHi = 387, + Alpha_INSQL = 388, + Alpha_INSQLi = 389, + Alpha_INSWH = 390, + Alpha_INSWHi = 391, + Alpha_INSWL = 392, + Alpha_INSWLi = 393, + Alpha_ITOFS = 394, + Alpha_ITOFT = 395, + Alpha_JMP = 396, + Alpha_JSR = 397, + Alpha_JSR_COROUTINE = 398, + Alpha_JSRs = 399, + Alpha_LDA = 400, + Alpha_LDAH = 401, + Alpha_LDAHg = 402, + Alpha_LDAHr = 403, + Alpha_LDAg = 404, + Alpha_LDAr = 405, + Alpha_LDBU = 406, + Alpha_LDBUr = 407, + Alpha_LDL = 408, + Alpha_LDL_L = 409, + Alpha_LDLr = 410, + Alpha_LDQ = 411, + Alpha_LDQ_L = 412, + Alpha_LDQ_U = 413, + Alpha_LDQl = 414, + Alpha_LDQr = 415, + Alpha_LDS = 416, + Alpha_LDSr = 417, + Alpha_LDT = 418, + Alpha_LDTr = 419, + Alpha_LDWU = 420, + Alpha_LDWUr = 421, + Alpha_MB = 422, + Alpha_MSKBL = 423, + Alpha_MSKBLi = 424, + Alpha_MSKLH = 425, + Alpha_MSKLHi = 426, + Alpha_MSKLL = 427, + Alpha_MSKLLi = 428, + Alpha_MSKQH = 429, + Alpha_MSKQHi = 430, + Alpha_MSKQL = 431, + Alpha_MSKQLi = 432, + Alpha_MSKWH = 433, + Alpha_MSKWHi = 434, + Alpha_MSKWL = 435, + Alpha_MSKWLi = 436, + Alpha_MULLi = 437, + Alpha_MULLr = 438, + Alpha_MULQi = 439, + Alpha_MULQr = 440, + Alpha_MULS = 441, + Alpha_MULT = 442, + Alpha_ORNOTi = 443, + Alpha_ORNOTr = 444, + Alpha_RC = 445, + Alpha_RETDAG = 446, + Alpha_RETDAGp = 447, + Alpha_RPCC = 448, + Alpha_RS = 449, + Alpha_S4ADDLi = 450, + Alpha_S4ADDLr = 451, + Alpha_S4ADDQi = 452, + Alpha_S4ADDQr = 453, + Alpha_S4SUBLi = 454, + Alpha_S4SUBLr = 455, + Alpha_S4SUBQi = 456, + Alpha_S4SUBQr = 457, + Alpha_S8ADDLi = 458, + Alpha_S8ADDLr = 459, + Alpha_S8ADDQi = 460, + Alpha_S8ADDQr = 461, + Alpha_S8SUBLi = 462, + Alpha_S8SUBLr = 463, + Alpha_S8SUBQi = 464, + Alpha_S8SUBQr = 465, + Alpha_SEXTB = 466, + Alpha_SEXTW = 467, + Alpha_SLi = 468, + Alpha_SLr = 469, + Alpha_SQRTS = 470, + Alpha_SQRTT = 471, + Alpha_SRAi = 472, + Alpha_SRAr = 473, + Alpha_SRLi = 474, + Alpha_SRLr = 475, + Alpha_STB = 476, + Alpha_STBr = 477, + Alpha_STL = 478, + Alpha_STL_C = 479, + Alpha_STLr = 480, + Alpha_STQ = 481, + Alpha_STQ_C = 482, + Alpha_STQ_U = 483, + Alpha_STQr = 484, + Alpha_STS = 485, + Alpha_STSr = 486, + Alpha_STT = 487, + Alpha_STTr = 488, + Alpha_STW = 489, + Alpha_STWr = 490, + Alpha_SUBLi = 491, + Alpha_SUBLr = 492, + Alpha_SUBQi = 493, + Alpha_SUBQr = 494, + Alpha_SUBS = 495, + Alpha_SUBT = 496, + Alpha_TRAPB = 497, + Alpha_UMULHi = 498, + Alpha_UMULHr = 499, + Alpha_WH64 = 500, + Alpha_WH64EN = 501, + Alpha_WMB = 502, + Alpha_XORi = 503, + Alpha_XORr = 504, + Alpha_ZAPNOTi = 505, + INSTRUCTION_LIST_END = 506 }; #endif // GET_INSTRINFO_ENUM @@ -896,122 +946,172 @@ static const MCInstrDesc AlphaInsts[] = { { 2, OperandInfo59 }, // Inst #337 = CVTTS { 3, OperandInfo49 }, // Inst #338 = DIVS { 3, OperandInfo50 }, // Inst #339 = DIVT - { 3, OperandInfo48 }, // Inst #340 = EQVi - { 3, OperandInfo46 }, // Inst #341 = EQVr - { 3, OperandInfo46 }, // Inst #342 = EXTBL - { 3, OperandInfo46 }, // Inst #343 = EXTLL - { 3, OperandInfo46 }, // Inst #344 = EXTWL - { 2, OperandInfo62 }, // Inst #345 = FBEQ - { 2, OperandInfo62 }, // Inst #346 = FBGE - { 2, OperandInfo62 }, // Inst #347 = FBGT - { 2, OperandInfo62 }, // Inst #348 = FBLE - { 2, OperandInfo62 }, // Inst #349 = FBLT - { 2, OperandInfo62 }, // Inst #350 = FBNE - { 4, OperandInfo63 }, // Inst #351 = FCMOVEQS - { 4, OperandInfo64 }, // Inst #352 = FCMOVEQT - { 4, OperandInfo63 }, // Inst #353 = FCMOVGES - { 4, OperandInfo64 }, // Inst #354 = FCMOVGET - { 4, OperandInfo63 }, // Inst #355 = FCMOVGTS - { 4, OperandInfo64 }, // Inst #356 = FCMOVGTT - { 4, OperandInfo63 }, // Inst #357 = FCMOVLES - { 4, OperandInfo64 }, // Inst #358 = FCMOVLET - { 4, OperandInfo63 }, // Inst #359 = FCMOVLTS - { 4, OperandInfo64 }, // Inst #360 = FCMOVLTT - { 4, OperandInfo63 }, // Inst #361 = FCMOVNES - { 4, OperandInfo64 }, // Inst #362 = FCMOVNET - { 2, OperandInfo65 }, // Inst #363 = FTOIS - { 2, OperandInfo66 }, // Inst #364 = FTOIT - { 2, OperandInfo67 }, // Inst #365 = ITOFS - { 2, OperandInfo68 }, // Inst #366 = ITOFT - { 1, OperandInfo69 }, // Inst #367 = JMP - { 0, 0 }, // Inst #368 = JSR - { 3, OperandInfo48 }, // Inst #369 = JSR_COROUTINE - { 0, 0 }, // Inst #370 = JSRs - { 3, OperandInfo70 }, // Inst #371 = LDA - { 3, OperandInfo70 }, // Inst #372 = LDAH - { 4, OperandInfo71 }, // Inst #373 = LDAHg - { 3, OperandInfo70 }, // Inst #374 = LDAHr - { 4, OperandInfo71 }, // Inst #375 = LDAg - { 3, OperandInfo70 }, // Inst #376 = LDAr - { 3, OperandInfo70 }, // Inst #377 = LDBU - { 3, OperandInfo70 }, // Inst #378 = LDBUr - { 3, OperandInfo70 }, // Inst #379 = LDL - { 3, OperandInfo70 }, // Inst #380 = LDL_L - { 3, OperandInfo70 }, // Inst #381 = LDLr - { 3, OperandInfo70 }, // Inst #382 = LDQ - { 3, OperandInfo70 }, // Inst #383 = LDQ_L - { 3, OperandInfo70 }, // Inst #384 = LDQl - { 3, OperandInfo70 }, // Inst #385 = LDQr - { 3, OperandInfo72 }, // Inst #386 = LDS - { 3, OperandInfo72 }, // Inst #387 = LDSr - { 3, OperandInfo73 }, // Inst #388 = LDT - { 3, OperandInfo73 }, // Inst #389 = LDTr - { 3, OperandInfo70 }, // Inst #390 = LDWU - { 3, OperandInfo70 }, // Inst #391 = LDWUr - { 0, 0 }, // Inst #392 = MB - { 3, OperandInfo48 }, // Inst #393 = MULLi - { 3, OperandInfo46 }, // Inst #394 = MULLr - { 3, OperandInfo48 }, // Inst #395 = MULQi - { 3, OperandInfo46 }, // Inst #396 = MULQr - { 3, OperandInfo49 }, // Inst #397 = MULS - { 3, OperandInfo50 }, // Inst #398 = MULT - { 3, OperandInfo48 }, // Inst #399 = ORNOTi - { 3, OperandInfo46 }, // Inst #400 = ORNOTr - { 0, 0 }, // Inst #401 = RETDAG - { 0, 0 }, // Inst #402 = RETDAGp - { 1, OperandInfo69 }, // Inst #403 = RPCC - { 3, OperandInfo48 }, // Inst #404 = S4ADDLi - { 3, OperandInfo46 }, // Inst #405 = S4ADDLr - { 3, OperandInfo48 }, // Inst #406 = S4ADDQi - { 3, OperandInfo46 }, // Inst #407 = S4ADDQr - { 3, OperandInfo48 }, // Inst #408 = S4SUBLi - { 3, OperandInfo46 }, // Inst #409 = S4SUBLr - { 3, OperandInfo48 }, // Inst #410 = S4SUBQi - { 3, OperandInfo46 }, // Inst #411 = S4SUBQr - { 3, OperandInfo48 }, // Inst #412 = S8ADDLi - { 3, OperandInfo46 }, // Inst #413 = S8ADDLr - { 3, OperandInfo48 }, // Inst #414 = S8ADDQi - { 3, OperandInfo46 }, // Inst #415 = S8ADDQr - { 3, OperandInfo48 }, // Inst #416 = S8SUBLi - { 3, OperandInfo46 }, // Inst #417 = S8SUBLr - { 3, OperandInfo48 }, // Inst #418 = S8SUBQi - { 3, OperandInfo46 }, // Inst #419 = S8SUBQr - { 2, OperandInfo58 }, // Inst #420 = SEXTB - { 2, OperandInfo58 }, // Inst #421 = SEXTW - { 3, OperandInfo48 }, // Inst #422 = SLi - { 3, OperandInfo46 }, // Inst #423 = SLr - { 2, OperandInfo74 }, // Inst #424 = SQRTS - { 2, OperandInfo60 }, // Inst #425 = SQRTT - { 3, OperandInfo48 }, // Inst #426 = SRAi - { 3, OperandInfo46 }, // Inst #427 = SRAr - { 3, OperandInfo48 }, // Inst #428 = SRLi - { 3, OperandInfo46 }, // Inst #429 = SRLr - { 3, OperandInfo70 }, // Inst #430 = STB - { 3, OperandInfo70 }, // Inst #431 = STBr - { 3, OperandInfo70 }, // Inst #432 = STL - { 4, OperandInfo75 }, // Inst #433 = STL_C - { 3, OperandInfo70 }, // Inst #434 = STLr - { 3, OperandInfo70 }, // Inst #435 = STQ - { 4, OperandInfo75 }, // Inst #436 = STQ_C - { 3, OperandInfo70 }, // Inst #437 = STQr - { 3, OperandInfo72 }, // Inst #438 = STS - { 3, OperandInfo72 }, // Inst #439 = STSr - { 3, OperandInfo73 }, // Inst #440 = STT - { 3, OperandInfo73 }, // Inst #441 = STTr - { 3, OperandInfo70 }, // Inst #442 = STW - { 3, OperandInfo70 }, // Inst #443 = STWr - { 3, OperandInfo48 }, // Inst #444 = SUBLi - { 3, OperandInfo46 }, // Inst #445 = SUBLr - { 3, OperandInfo48 }, // Inst #446 = SUBQi - { 3, OperandInfo46 }, // Inst #447 = SUBQr - { 3, OperandInfo49 }, // Inst #448 = SUBS - { 3, OperandInfo50 }, // Inst #449 = SUBT - { 3, OperandInfo48 }, // Inst #450 = UMULHi - { 3, OperandInfo46 }, // Inst #451 = UMULHr - { 0, 0 }, // Inst #452 = WMB - { 3, OperandInfo48 }, // Inst #453 = XORi - { 3, OperandInfo46 }, // Inst #454 = XORr - { 3, OperandInfo48 }, // Inst #455 = ZAPNOTi + { 2, OperandInfo58 }, // Inst #340 = ECB + { 3, OperandInfo48 }, // Inst #341 = EQVi + { 3, OperandInfo46 }, // Inst #342 = EQVr + { 0, 0 }, // Inst #343 = EXCB + { 3, OperandInfo46 }, // Inst #344 = EXTBL + { 3, OperandInfo48 }, // Inst #345 = EXTBLi + { 3, OperandInfo46 }, // Inst #346 = EXTLH + { 3, OperandInfo48 }, // Inst #347 = EXTLHi + { 3, OperandInfo46 }, // Inst #348 = EXTLL + { 3, OperandInfo48 }, // Inst #349 = EXTLLi + { 3, OperandInfo46 }, // Inst #350 = EXTQH + { 3, OperandInfo48 }, // Inst #351 = EXTQHi + { 3, OperandInfo46 }, // Inst #352 = EXTQL + { 3, OperandInfo48 }, // Inst #353 = EXTQLi + { 3, OperandInfo46 }, // Inst #354 = EXTWH + { 3, OperandInfo48 }, // Inst #355 = EXTWHi + { 3, OperandInfo46 }, // Inst #356 = EXTWL + { 3, OperandInfo48 }, // Inst #357 = EXTWLi + { 2, OperandInfo62 }, // Inst #358 = FBEQ + { 2, OperandInfo62 }, // Inst #359 = FBGE + { 2, OperandInfo62 }, // Inst #360 = FBGT + { 2, OperandInfo62 }, // Inst #361 = FBLE + { 2, OperandInfo62 }, // Inst #362 = FBLT + { 2, OperandInfo62 }, // Inst #363 = FBNE + { 4, OperandInfo63 }, // Inst #364 = FCMOVEQS + { 4, OperandInfo64 }, // Inst #365 = FCMOVEQT + { 4, OperandInfo63 }, // Inst #366 = FCMOVGES + { 4, OperandInfo64 }, // Inst #367 = FCMOVGET + { 4, OperandInfo63 }, // Inst #368 = FCMOVGTS + { 4, OperandInfo64 }, // Inst #369 = FCMOVGTT + { 4, OperandInfo63 }, // Inst #370 = FCMOVLES + { 4, OperandInfo64 }, // Inst #371 = FCMOVLET + { 4, OperandInfo63 }, // Inst #372 = FCMOVLTS + { 4, OperandInfo64 }, // Inst #373 = FCMOVLTT + { 4, OperandInfo63 }, // Inst #374 = FCMOVNES + { 4, OperandInfo64 }, // Inst #375 = FCMOVNET + { 2, OperandInfo58 }, // Inst #376 = FETCH + { 2, OperandInfo58 }, // Inst #377 = FETCH_M + { 2, OperandInfo65 }, // Inst #378 = FTOIS + { 2, OperandInfo66 }, // Inst #379 = FTOIT + { 3, OperandInfo46 }, // Inst #380 = INSBL + { 3, OperandInfo48 }, // Inst #381 = INSBLi + { 3, OperandInfo46 }, // Inst #382 = INSLH + { 3, OperandInfo48 }, // Inst #383 = INSLHi + { 3, OperandInfo46 }, // Inst #384 = INSLL + { 3, OperandInfo48 }, // Inst #385 = INSLLi + { 3, OperandInfo46 }, // Inst #386 = INSQH + { 3, OperandInfo48 }, // Inst #387 = INSQHi + { 3, OperandInfo46 }, // Inst #388 = INSQL + { 3, OperandInfo48 }, // Inst #389 = INSQLi + { 3, OperandInfo46 }, // Inst #390 = INSWH + { 3, OperandInfo48 }, // Inst #391 = INSWHi + { 3, OperandInfo46 }, // Inst #392 = INSWL + { 3, OperandInfo48 }, // Inst #393 = INSWLi + { 2, OperandInfo67 }, // Inst #394 = ITOFS + { 2, OperandInfo68 }, // Inst #395 = ITOFT + { 1, OperandInfo69 }, // Inst #396 = JMP + { 0, 0 }, // Inst #397 = JSR + { 3, OperandInfo48 }, // Inst #398 = JSR_COROUTINE + { 0, 0 }, // Inst #399 = JSRs + { 3, OperandInfo70 }, // Inst #400 = LDA + { 3, OperandInfo70 }, // Inst #401 = LDAH + { 4, OperandInfo71 }, // Inst #402 = LDAHg + { 3, OperandInfo70 }, // Inst #403 = LDAHr + { 4, OperandInfo71 }, // Inst #404 = LDAg + { 3, OperandInfo70 }, // Inst #405 = LDAr + { 3, OperandInfo70 }, // Inst #406 = LDBU + { 3, OperandInfo70 }, // Inst #407 = LDBUr + { 3, OperandInfo70 }, // Inst #408 = LDL + { 3, OperandInfo70 }, // Inst #409 = LDL_L + { 3, OperandInfo70 }, // Inst #410 = LDLr + { 3, OperandInfo70 }, // Inst #411 = LDQ + { 3, OperandInfo70 }, // Inst #412 = LDQ_L + { 3, OperandInfo70 }, // Inst #413 = LDQ_U + { 3, OperandInfo70 }, // Inst #414 = LDQl + { 3, OperandInfo70 }, // Inst #415 = LDQr + { 3, OperandInfo72 }, // Inst #416 = LDS + { 3, OperandInfo72 }, // Inst #417 = LDSr + { 3, OperandInfo73 }, // Inst #418 = LDT + { 3, OperandInfo73 }, // Inst #419 = LDTr + { 3, OperandInfo70 }, // Inst #420 = LDWU + { 3, OperandInfo70 }, // Inst #421 = LDWUr + { 0, 0 }, // Inst #422 = MB + { 3, OperandInfo46 }, // Inst #423 = MSKBL + { 3, OperandInfo48 }, // Inst #424 = MSKBLi + { 3, OperandInfo46 }, // Inst #425 = MSKLH + { 3, OperandInfo48 }, // Inst #426 = MSKLHi + { 3, OperandInfo46 }, // Inst #427 = MSKLL + { 3, OperandInfo48 }, // Inst #428 = MSKLLi + { 3, OperandInfo46 }, // Inst #429 = MSKQH + { 3, OperandInfo48 }, // Inst #430 = MSKQHi + { 3, OperandInfo46 }, // Inst #431 = MSKQL + { 3, OperandInfo48 }, // Inst #432 = MSKQLi + { 3, OperandInfo46 }, // Inst #433 = MSKWH + { 3, OperandInfo48 }, // Inst #434 = MSKWHi + { 3, OperandInfo46 }, // Inst #435 = MSKWL + { 3, OperandInfo48 }, // Inst #436 = MSKWLi + { 3, OperandInfo48 }, // Inst #437 = MULLi + { 3, OperandInfo46 }, // Inst #438 = MULLr + { 3, OperandInfo48 }, // Inst #439 = MULQi + { 3, OperandInfo46 }, // Inst #440 = MULQr + { 3, OperandInfo49 }, // Inst #441 = MULS + { 3, OperandInfo50 }, // Inst #442 = MULT + { 3, OperandInfo48 }, // Inst #443 = ORNOTi + { 3, OperandInfo46 }, // Inst #444 = ORNOTr + { 1, OperandInfo69 }, // Inst #445 = RC + { 0, 0 }, // Inst #446 = RETDAG + { 0, 0 }, // Inst #447 = RETDAGp + { 1, OperandInfo69 }, // Inst #448 = RPCC + { 1, OperandInfo69 }, // Inst #449 = RS + { 3, OperandInfo48 }, // Inst #450 = S4ADDLi + { 3, OperandInfo46 }, // Inst #451 = S4ADDLr + { 3, OperandInfo48 }, // Inst #452 = S4ADDQi + { 3, OperandInfo46 }, // Inst #453 = S4ADDQr + { 3, OperandInfo48 }, // Inst #454 = S4SUBLi + { 3, OperandInfo46 }, // Inst #455 = S4SUBLr + { 3, OperandInfo48 }, // Inst #456 = S4SUBQi + { 3, OperandInfo46 }, // Inst #457 = S4SUBQr + { 3, OperandInfo48 }, // Inst #458 = S8ADDLi + { 3, OperandInfo46 }, // Inst #459 = S8ADDLr + { 3, OperandInfo48 }, // Inst #460 = S8ADDQi + { 3, OperandInfo46 }, // Inst #461 = S8ADDQr + { 3, OperandInfo48 }, // Inst #462 = S8SUBLi + { 3, OperandInfo46 }, // Inst #463 = S8SUBLr + { 3, OperandInfo48 }, // Inst #464 = S8SUBQi + { 3, OperandInfo46 }, // Inst #465 = S8SUBQr + { 2, OperandInfo58 }, // Inst #466 = SEXTB + { 2, OperandInfo58 }, // Inst #467 = SEXTW + { 3, OperandInfo48 }, // Inst #468 = SLi + { 3, OperandInfo46 }, // Inst #469 = SLr + { 2, OperandInfo74 }, // Inst #470 = SQRTS + { 2, OperandInfo60 }, // Inst #471 = SQRTT + { 3, OperandInfo48 }, // Inst #472 = SRAi + { 3, OperandInfo46 }, // Inst #473 = SRAr + { 3, OperandInfo48 }, // Inst #474 = SRLi + { 3, OperandInfo46 }, // Inst #475 = SRLr + { 3, OperandInfo70 }, // Inst #476 = STB + { 3, OperandInfo70 }, // Inst #477 = STBr + { 3, OperandInfo70 }, // Inst #478 = STL + { 4, OperandInfo75 }, // Inst #479 = STL_C + { 3, OperandInfo70 }, // Inst #480 = STLr + { 3, OperandInfo70 }, // Inst #481 = STQ + { 4, OperandInfo75 }, // Inst #482 = STQ_C + { 3, OperandInfo70 }, // Inst #483 = STQ_U + { 3, OperandInfo70 }, // Inst #484 = STQr + { 3, OperandInfo72 }, // Inst #485 = STS + { 3, OperandInfo72 }, // Inst #486 = STSr + { 3, OperandInfo73 }, // Inst #487 = STT + { 3, OperandInfo73 }, // Inst #488 = STTr + { 3, OperandInfo70 }, // Inst #489 = STW + { 3, OperandInfo70 }, // Inst #490 = STWr + { 3, OperandInfo48 }, // Inst #491 = SUBLi + { 3, OperandInfo46 }, // Inst #492 = SUBLr + { 3, OperandInfo48 }, // Inst #493 = SUBQi + { 3, OperandInfo46 }, // Inst #494 = SUBQr + { 3, OperandInfo49 }, // Inst #495 = SUBS + { 3, OperandInfo50 }, // Inst #496 = SUBT + { 0, 0 }, // Inst #497 = TRAPB + { 3, OperandInfo48 }, // Inst #498 = UMULHi + { 3, OperandInfo46 }, // Inst #499 = UMULHr + { 2, OperandInfo58 }, // Inst #500 = WH64 + { 2, OperandInfo58 }, // Inst #501 = WH64EN + { 0, 0 }, // Inst #502 = WMB + { 3, OperandInfo48 }, // Inst #503 = XORi + { 3, OperandInfo46 }, // Inst #504 = XORr + { 3, OperandInfo48 }, // Inst #505 = ZAPNOTi }; #endif // GET_INSTRINFO_MC_DESC From b46a35826bf68d0e2f3e81d21a20bdd154af44b1 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 11 Jul 2023 17:14:13 +0300 Subject: [PATCH 04/26] Update bindings/Alpha header --- bindings/python/capstone/alpha_const.py | 183 ++++++++++++++---------- include/capstone/alpha.h | 33 ++++- 2 files changed, 137 insertions(+), 79 deletions(-) diff --git a/bindings/python/capstone/alpha_const.py b/bindings/python/capstone/alpha_const.py index 581635e722..d4fffa78d7 100644 --- a/bindings/python/capstone/alpha_const.py +++ b/bindings/python/capstone/alpha_const.py @@ -125,87 +125,116 @@ Alpha_INS_CVTTSsSUI = 113 Alpha_INS_DIVSsSU = 114 Alpha_INS_DIVTsSU = 115 -Alpha_INS_EQV = 116 -Alpha_INS_EXTBL = 117 -Alpha_INS_EXTLL = 118 -Alpha_INS_EXTWL = 119 -Alpha_INS_FBEQ = 120 -Alpha_INS_FBGE = 121 -Alpha_INS_FBGT = 122 -Alpha_INS_FBLE = 123 -Alpha_INS_FBLT = 124 -Alpha_INS_FBNE = 125 -Alpha_INS_FCMOVEQ = 126 -Alpha_INS_FCMOVGE = 127 -Alpha_INS_FCMOVGT = 128 -Alpha_INS_FCMOVLE = 129 -Alpha_INS_FCMOVLT = 130 -Alpha_INS_FCMOVNE = 131 -Alpha_INS_FTOIS = 132 -Alpha_INS_FTOIT = 133 -Alpha_INS_ITOFS = 134 -Alpha_INS_ITOFT = 135 -Alpha_INS_JMP = 136 -Alpha_INS_JSR = 137 -Alpha_INS_JSR_COROUTINE = 138 -Alpha_INS_LDA = 139 -Alpha_INS_LDAH = 140 -Alpha_INS_LDBU = 141 -Alpha_INS_LDL = 142 -Alpha_INS_LDLsL = 143 -Alpha_INS_LDQ = 144 -Alpha_INS_LDQsL = 145 -Alpha_INS_LDS = 146 -Alpha_INS_LDT = 147 -Alpha_INS_LDWU = 148 -Alpha_INS_MB = 149 -Alpha_INS_MULL = 150 -Alpha_INS_MULQ = 151 -Alpha_INS_MULSsSU = 152 -Alpha_INS_MULTsSU = 153 -Alpha_INS_ORNOT = 154 -Alpha_INS_RET = 155 -Alpha_INS_RPCC = 156 -Alpha_INS_S4ADDL = 157 -Alpha_INS_S4ADDQ = 158 -Alpha_INS_S4SUBL = 159 -Alpha_INS_S4SUBQ = 160 -Alpha_INS_S8ADDL = 161 -Alpha_INS_S8ADDQ = 162 -Alpha_INS_S8SUBL = 163 -Alpha_INS_S8SUBQ = 164 -Alpha_INS_SEXTB = 165 -Alpha_INS_SEXTW = 166 -Alpha_INS_SLL = 167 -Alpha_INS_SQRTSsSU = 168 -Alpha_INS_SQRTTsSU = 169 -Alpha_INS_SRA = 170 -Alpha_INS_SRL = 171 -Alpha_INS_STB = 172 -Alpha_INS_STL = 173 -Alpha_INS_STLsL = 174 -Alpha_INS_STQ = 175 -Alpha_INS_STQsL = 176 -Alpha_INS_STS = 177 -Alpha_INS_STT = 178 -Alpha_INS_STW = 179 -Alpha_INS_SUBL = 180 -Alpha_INS_SUBQ = 181 -Alpha_INS_SUBSsSU = 182 -Alpha_INS_SUBTsSU = 183 -Alpha_INS_UMULH = 184 -Alpha_INS_WMB = 185 -Alpha_INS_XOR = 186 -Alpha_INS_ZAPNOT = 187 -ALPHA_INS_ENDING = 188 +Alpha_INS_ECB = 116 +Alpha_INS_EQV = 117 +Alpha_INS_EXCB = 118 +Alpha_INS_EXTBL = 119 +Alpha_INS_EXTLH = 120 +Alpha_INS_EXTLL = 121 +Alpha_INS_EXTQH = 122 +Alpha_INS_EXTQL = 123 +Alpha_INS_EXTWH = 124 +Alpha_INS_EXTWL = 125 +Alpha_INS_FBEQ = 126 +Alpha_INS_FBGE = 127 +Alpha_INS_FBGT = 128 +Alpha_INS_FBLE = 129 +Alpha_INS_FBLT = 130 +Alpha_INS_FBNE = 131 +Alpha_INS_FCMOVEQ = 132 +Alpha_INS_FCMOVGE = 133 +Alpha_INS_FCMOVGT = 134 +Alpha_INS_FCMOVLE = 135 +Alpha_INS_FCMOVLT = 136 +Alpha_INS_FCMOVNE = 137 +Alpha_INS_FETCH = 138 +Alpha_INS_FETCH_M = 139 +Alpha_INS_FTOIS = 140 +Alpha_INS_FTOIT = 141 +Alpha_INS_INSBL = 142 +Alpha_INS_INSLH = 143 +Alpha_INS_INSLL = 144 +Alpha_INS_INSQH = 145 +Alpha_INS_INSQL = 146 +Alpha_INS_INSWH = 147 +Alpha_INS_INSWL = 148 +Alpha_INS_ITOFS = 149 +Alpha_INS_ITOFT = 150 +Alpha_INS_JMP = 151 +Alpha_INS_JSR = 152 +Alpha_INS_JSR_COROUTINE = 153 +Alpha_INS_LDA = 154 +Alpha_INS_LDAH = 155 +Alpha_INS_LDBU = 156 +Alpha_INS_LDL = 157 +Alpha_INS_LDLsL = 158 +Alpha_INS_LDQ = 159 +Alpha_INS_LDQsL = 160 +Alpha_INS_LDQ_U = 161 +Alpha_INS_LDS = 162 +Alpha_INS_LDT = 163 +Alpha_INS_LDWU = 164 +Alpha_INS_MB = 165 +Alpha_INS_MSKBL = 166 +Alpha_INS_MSKLH = 167 +Alpha_INS_MSKLL = 168 +Alpha_INS_MSKQH = 169 +Alpha_INS_MSKQL = 170 +Alpha_INS_MSKWH = 171 +Alpha_INS_MSKWL = 172 +Alpha_INS_MULL = 173 +Alpha_INS_MULQ = 174 +Alpha_INS_MULSsSU = 175 +Alpha_INS_MULTsSU = 176 +Alpha_INS_ORNOT = 177 +Alpha_INS_RC = 178 +Alpha_INS_RET = 179 +Alpha_INS_RPCC = 180 +Alpha_INS_RS = 181 +Alpha_INS_S4ADDL = 182 +Alpha_INS_S4ADDQ = 183 +Alpha_INS_S4SUBL = 184 +Alpha_INS_S4SUBQ = 185 +Alpha_INS_S8ADDL = 186 +Alpha_INS_S8ADDQ = 187 +Alpha_INS_S8SUBL = 188 +Alpha_INS_S8SUBQ = 189 +Alpha_INS_SEXTB = 190 +Alpha_INS_SEXTW = 191 +Alpha_INS_SLL = 192 +Alpha_INS_SQRTSsSU = 193 +Alpha_INS_SQRTTsSU = 194 +Alpha_INS_SRA = 195 +Alpha_INS_SRL = 196 +Alpha_INS_STB = 197 +Alpha_INS_STL = 198 +Alpha_INS_STLsL = 199 +Alpha_INS_STQ = 200 +Alpha_INS_STQsL = 201 +Alpha_INS_STQ_U = 202 +Alpha_INS_STS = 203 +Alpha_INS_STT = 204 +Alpha_INS_STW = 205 +Alpha_INS_SUBL = 206 +Alpha_INS_SUBQ = 207 +Alpha_INS_SUBSsSU = 208 +Alpha_INS_SUBTsSU = 209 +Alpha_INS_TRAPB = 210 +Alpha_INS_UMULH = 211 +Alpha_INS_WH64 = 212 +Alpha_INS_WH64EN = 213 +Alpha_INS_WMB = 214 +Alpha_INS_XOR = 215 +Alpha_INS_ZAPNOT = 216 +ALPHA_INS_ENDING = 217 # Group of Alpha instructions -Alpha_GRP_INVALID = 189 +Alpha_GRP_INVALID = 218 # Generic groups -Alpha_GRP_CALL = 190 -Alpha_GRP_JUMP = 191 -Alpha_GRP_ENDING = 192 +Alpha_GRP_CALL = 219 +Alpha_GRP_JUMP = 220 +Alpha_GRP_ENDING = 221 ALPHA_FEATURE_INVALID = 0 ALPHA_FEATURE_ENDING = 1 diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index 09484a1d09..00d7d3bb62 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -124,7 +124,7 @@ typedef enum alpha_reg { //> Alpha instruction typedef enum alpha_insn { - // generated content begin + // generated content begin // clang-format off Alpha_INS_INVALID, @@ -177,9 +177,15 @@ typedef enum alpha_insn { Alpha_INS_CVTTSsSUI, Alpha_INS_DIVSsSU, Alpha_INS_DIVTsSU, + Alpha_INS_ECB, Alpha_INS_EQV, + Alpha_INS_EXCB, Alpha_INS_EXTBL, + Alpha_INS_EXTLH, Alpha_INS_EXTLL, + Alpha_INS_EXTQH, + Alpha_INS_EXTQL, + Alpha_INS_EXTWH, Alpha_INS_EXTWL, Alpha_INS_FBEQ, Alpha_INS_FBGE, @@ -193,8 +199,17 @@ typedef enum alpha_insn { Alpha_INS_FCMOVLE, Alpha_INS_FCMOVLT, Alpha_INS_FCMOVNE, + Alpha_INS_FETCH, + Alpha_INS_FETCH_M, Alpha_INS_FTOIS, Alpha_INS_FTOIT, + Alpha_INS_INSBL, + Alpha_INS_INSLH, + Alpha_INS_INSLL, + Alpha_INS_INSQH, + Alpha_INS_INSQL, + Alpha_INS_INSWH, + Alpha_INS_INSWL, Alpha_INS_ITOFS, Alpha_INS_ITOFT, Alpha_INS_JMP, @@ -207,17 +222,27 @@ typedef enum alpha_insn { Alpha_INS_LDLsL, Alpha_INS_LDQ, Alpha_INS_LDQsL, + Alpha_INS_LDQ_U, Alpha_INS_LDS, Alpha_INS_LDT, Alpha_INS_LDWU, Alpha_INS_MB, + Alpha_INS_MSKBL, + Alpha_INS_MSKLH, + Alpha_INS_MSKLL, + Alpha_INS_MSKQH, + Alpha_INS_MSKQL, + Alpha_INS_MSKWH, + Alpha_INS_MSKWL, Alpha_INS_MULL, Alpha_INS_MULQ, Alpha_INS_MULSsSU, Alpha_INS_MULTsSU, Alpha_INS_ORNOT, + Alpha_INS_RC, Alpha_INS_RET, Alpha_INS_RPCC, + Alpha_INS_RS, Alpha_INS_S4ADDL, Alpha_INS_S4ADDQ, Alpha_INS_S4SUBL, @@ -238,6 +263,7 @@ typedef enum alpha_insn { Alpha_INS_STLsL, Alpha_INS_STQ, Alpha_INS_STQsL, + Alpha_INS_STQ_U, Alpha_INS_STS, Alpha_INS_STT, Alpha_INS_STW, @@ -245,13 +271,16 @@ typedef enum alpha_insn { Alpha_INS_SUBQ, Alpha_INS_SUBSsSU, Alpha_INS_SUBTsSU, + Alpha_INS_TRAPB, Alpha_INS_UMULH, + Alpha_INS_WH64, + Alpha_INS_WH64EN, Alpha_INS_WMB, Alpha_INS_XOR, Alpha_INS_ZAPNOT, // clang-format on - // generated content end + // generated content end ALPHA_INS_ENDING, // <-- mark the end of the list of instructions } alpha_insn; From 33aa526113233c07e450fd016e4568f923588a13 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 23 Jul 2023 17:14:53 +0300 Subject: [PATCH 05/26] Fix alpha instruction names & rpcc instruction format --- arch/Alpha/AlphaGenAsmWriter.inc | 843 +++++++++++----------- arch/Alpha/AlphaGenCSMappingInsn.inc | 108 +-- arch/Alpha/AlphaGenCSMappingInsnName.inc | 56 +- arch/Alpha/AlphaGenCSMappingInsnOp.inc | 101 +-- arch/Alpha/AlphaGenDisassemblerTables.inc | 398 +++++----- arch/Alpha/AlphaGenInstrInfo.inc | 2 +- cstool/cstool.c | 8 +- include/capstone/alpha.h | 8 +- 8 files changed, 759 insertions(+), 765 deletions(-) diff --git a/arch/Alpha/AlphaGenAsmWriter.inc b/arch/Alpha/AlphaGenAsmWriter.inc index 8b55c2058f..76bc5e2a3c 100644 --- a/arch/Alpha/AlphaGenAsmWriter.inc +++ b/arch/Alpha/AlphaGenAsmWriter.inc @@ -19,161 +19,160 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { #ifndef CAPSTONE_DIET static const char AsmStrs[] = { - /* 0 */ "MSKLH \0" - /* 7 */ "INSLH \0" - /* 14 */ "EXTLH \0" - /* 21 */ "MSKQH \0" - /* 28 */ "INSQH \0" - /* 35 */ "EXTQH \0" - /* 42 */ "MSKWH \0" - /* 49 */ "INSWH \0" - /* 56 */ "EXTWH \0" - /* 63 */ "MSKBL \0" - /* 70 */ "INSBL \0" - /* 77 */ "EXTBL \0" - /* 84 */ "MSKLL \0" - /* 91 */ "INSLL \0" - /* 98 */ "EXTLL \0" - /* 105 */ "MSKQL \0" - /* 112 */ "INSQL \0" - /* 119 */ "EXTQL \0" - /* 126 */ "MSKWL \0" - /* 133 */ "INSWL \0" - /* 140 */ "EXTWL \0" - /* 147 */ "; ADJDOWN \0" - /* 158 */ "CTPOP \0" - /* 165 */ "; ADJUP \0" - /* 174 */ "CTLZ \0" - /* 180 */ "CTTZ \0" - /* 186 */ "lda \0" - /* 191 */ "sra \0" - /* 196 */ "stb \0" - /* 201 */ "sextb \0" - /* 208 */ "blbc \0" - /* 214 */ "cmovlbc \0" - /* 223 */ "rpcc \0" - /* 229 */ "bic \0" - /* 234 */ "rc \0" - /* 238 */ "cvttq/svc \0" - /* 249 */ "and \0" - /* 254 */ "fbge \0" - /* 260 */ "cmpbge \0" - /* 268 */ "fcmovge \0" - /* 277 */ "fble \0" - /* 283 */ "cmple \0" - /* 290 */ "cmpule \0" - /* 298 */ "fcmovle \0" - /* 307 */ "fbne \0" - /* 313 */ "jsr_coroutine \0" - /* 328 */ "fcmovne \0" - /* 337 */ "cpyse \0" - /* 344 */ "ldah \0" - /* 350 */ "umulh \0" - /* 357 */ "cvtqs/sui \0" - /* 368 */ "cvtts/sui \0" - /* 379 */ "cvtqt/sui \0" - /* 390 */ "ldl/l \0" - /* 397 */ "stl/l \0" - /* 404 */ "ldq/l \0" - /* 411 */ "stq/l \0" - /* 418 */ "s4subl \0" - /* 426 */ "s8subl \0" - /* 434 */ "s4addl \0" - /* 442 */ "s8addl \0" - /* 450 */ "ldl \0" - /* 455 */ "sll \0" - /* 460 */ "mull \0" - /* 466 */ "srl \0" - /* 471 */ "stl \0" - /* 476 */ "cpysn \0" - /* 483 */ "s4subq \0" - /* 491 */ "s8subq \0" - /* 499 */ "s4addq \0" - /* 507 */ "s8addq \0" - /* 515 */ "ldq \0" - /* 520 */ "fbeq \0" - /* 526 */ "cmpeq \0" - /* 533 */ "fcmoveq \0" - /* 542 */ "mulq \0" - /* 548 */ "stq \0" - /* 553 */ "xor \0" - /* 558 */ "cvtst/s \0" - /* 567 */ "blbs \0" - /* 573 */ "cmovlbs \0" - /* 582 */ "lds \0" - /* 587 */ "itofs \0" - /* 594 */ "bis \0" - /* 599 */ "ftois \0" - /* 606 */ "rs \0" - /* 610 */ "sts \0" - /* 615 */ "cpys \0" - /* 621 */ "ldt \0" - /* 626 */ "itoft \0" - /* 633 */ "fbgt \0" - /* 639 */ "fcmovgt \0" - /* 648 */ "ftoit \0" - /* 655 */ "fblt \0" - /* 661 */ "cmplt \0" - /* 668 */ "cmpult \0" - /* 676 */ "fcmovlt \0" - /* 685 */ "zapnot \0" - /* 693 */ "ornot \0" - /* 700 */ "stt \0" - /* 705 */ "ldq_u \0" - /* 712 */ "stq_u \0" - /* 719 */ "ldbu \0" - /* 725 */ "cmptle/su \0" - /* 736 */ "cmptun/su \0" - /* 747 */ "cmpteq/su \0" - /* 758 */ "subs/su \0" - /* 767 */ "adds/su \0" - /* 776 */ "muls/su \0" - /* 785 */ "sqrts/su \0" - /* 795 */ "divs/su \0" - /* 804 */ "subt/su \0" - /* 813 */ "addt/su \0" - /* 822 */ "cmptlt/su \0" - /* 833 */ "mult/su \0" - /* 842 */ "sqrtt/su \0" - /* 852 */ "divt/su \0" - /* 861 */ "ldwu \0" - /* 867 */ "eqv \0" - /* 872 */ "stw \0" - /* 877 */ "sextw \0" - /* 884 */ "bsr $26,$\0" - /* 894 */ "LSMARKER$\0" - /* 904 */ "wh64 (\0" - /* 911 */ "ecb (\0" - /* 917 */ "fetch (\0" - /* 925 */ "fetch_m (\0" - /* 935 */ "wh64en (\0" - /* 944 */ "jmp $31,\0" - /* 953 */ "br $31,\0" - /* 961 */ "# XRay Function Patchable RET.\0" - /* 992 */ "# XRay Typed Event Log.\0" - /* 1016 */ "# XRay Custom Event Log.\0" - /* 1041 */ "# XRay Function Enter.\0" - /* 1064 */ "# XRay Tail Call Exit.\0" - /* 1087 */ "# XRay Function Exit.\0" - /* 1109 */ "jsr $23,($27),0\0" - /* 1125 */ "jsr $26,($27),0\0" - /* 1141 */ "ret $31,($26),1\0" - /* 1157 */ "COND_BRANCH imm:\0" - /* 1174 */ "LIFETIME_END\0" - /* 1187 */ "PSEUDO_PROBE\0" - /* 1200 */ "BUNDLE\0" - /* 1207 */ "DBG_VALUE\0" - /* 1217 */ "DBG_INSTR_REF\0" - /* 1231 */ "DBG_PHI\0" - /* 1239 */ "DBG_LABEL\0" - /* 1249 */ "LIFETIME_START\0" - /* 1264 */ "DBG_VALUE_LIST\0" - /* 1279 */ "PCMARKER_\0" - /* 1289 */ "excb\0" - /* 1294 */ "wmb\0" - /* 1298 */ "trapb\0" - /* 1304 */ "#wtf\0" - /* 1309 */ "# FEntry call\0" + /* 0 */ "; ADJDOWN \0" + /* 11 */ "; ADJUP \0" + /* 20 */ "lda \0" + /* 25 */ "sra \0" + /* 30 */ "stb \0" + /* 35 */ "sextb \0" + /* 42 */ "stl_c \0" + /* 49 */ "stq_c \0" + /* 56 */ "blbc \0" + /* 62 */ "cmovlbc \0" + /* 71 */ "rpcc \0" + /* 77 */ "bic \0" + /* 82 */ "rc \0" + /* 86 */ "cvttq/svc \0" + /* 97 */ "and \0" + /* 102 */ "fbge \0" + /* 108 */ "cmpbge \0" + /* 116 */ "fcmovge \0" + /* 125 */ "fble \0" + /* 131 */ "cmple \0" + /* 138 */ "cmpule \0" + /* 146 */ "fcmovle \0" + /* 155 */ "fbne \0" + /* 161 */ "jsr_coroutine \0" + /* 176 */ "fcmovne \0" + /* 185 */ "cpyse \0" + /* 192 */ "ldah \0" + /* 198 */ "msklh \0" + /* 205 */ "inslh \0" + /* 212 */ "extlh \0" + /* 219 */ "umulh \0" + /* 226 */ "mskqh \0" + /* 233 */ "insqh \0" + /* 240 */ "extqh \0" + /* 247 */ "mskwh \0" + /* 254 */ "inswh \0" + /* 261 */ "extwh \0" + /* 268 */ "cvtqs/sui \0" + /* 279 */ "cvtts/sui \0" + /* 290 */ "cvtqt/sui \0" + /* 301 */ "ldl_l \0" + /* 308 */ "ldq_l \0" + /* 315 */ "mskbl \0" + /* 322 */ "insbl \0" + /* 329 */ "extbl \0" + /* 336 */ "s4subl \0" + /* 344 */ "s8subl \0" + /* 352 */ "s4addl \0" + /* 360 */ "s8addl \0" + /* 368 */ "ldl \0" + /* 373 */ "mskll \0" + /* 380 */ "insll \0" + /* 387 */ "extll \0" + /* 394 */ "mull \0" + /* 400 */ "mskql \0" + /* 407 */ "insql \0" + /* 414 */ "extql \0" + /* 421 */ "srl \0" + /* 426 */ "stl \0" + /* 431 */ "mskwl \0" + /* 438 */ "inswl \0" + /* 445 */ "extwl \0" + /* 452 */ "cpysn \0" + /* 459 */ "ctpop \0" + /* 466 */ "s4subq \0" + /* 474 */ "s8subq \0" + /* 482 */ "s4addq \0" + /* 490 */ "s8addq \0" + /* 498 */ "ldq \0" + /* 503 */ "fbeq \0" + /* 509 */ "cmpeq \0" + /* 516 */ "fcmoveq \0" + /* 525 */ "mulq \0" + /* 531 */ "stq \0" + /* 536 */ "xor \0" + /* 541 */ "cvtst/s \0" + /* 550 */ "blbs \0" + /* 556 */ "cmovlbs \0" + /* 565 */ "lds \0" + /* 570 */ "itofs \0" + /* 577 */ "bis \0" + /* 582 */ "ftois \0" + /* 589 */ "rs \0" + /* 593 */ "sts \0" + /* 598 */ "cpys \0" + /* 604 */ "ldt \0" + /* 609 */ "itoft \0" + /* 616 */ "fbgt \0" + /* 622 */ "fcmovgt \0" + /* 631 */ "ftoit \0" + /* 638 */ "fblt \0" + /* 644 */ "cmplt \0" + /* 651 */ "cmpult \0" + /* 659 */ "fcmovlt \0" + /* 668 */ "zapnot \0" + /* 676 */ "ornot \0" + /* 683 */ "stt \0" + /* 688 */ "ldq_u \0" + /* 695 */ "stq_u \0" + /* 702 */ "ldbu \0" + /* 708 */ "cmptle/su \0" + /* 719 */ "cmptun/su \0" + /* 730 */ "cmpteq/su \0" + /* 741 */ "subs/su \0" + /* 750 */ "adds/su \0" + /* 759 */ "muls/su \0" + /* 768 */ "sqrts/su \0" + /* 778 */ "divs/su \0" + /* 787 */ "subt/su \0" + /* 796 */ "addt/su \0" + /* 805 */ "cmptlt/su \0" + /* 816 */ "mult/su \0" + /* 825 */ "sqrtt/su \0" + /* 835 */ "divt/su \0" + /* 844 */ "ldwu \0" + /* 850 */ "eqv \0" + /* 855 */ "stw \0" + /* 860 */ "sextw \0" + /* 867 */ "ctlz \0" + /* 873 */ "cttz \0" + /* 879 */ "bsr $26,$\0" + /* 889 */ "LSMARKER$\0" + /* 899 */ "wh64 (\0" + /* 906 */ "ecb (\0" + /* 912 */ "fetch (\0" + /* 920 */ "fetch_m (\0" + /* 930 */ "wh64en (\0" + /* 939 */ "jmp $31,\0" + /* 948 */ "br $31,\0" + /* 956 */ "# XRay Function Patchable RET.\0" + /* 987 */ "# XRay Typed Event Log.\0" + /* 1011 */ "# XRay Custom Event Log.\0" + /* 1036 */ "# XRay Function Enter.\0" + /* 1059 */ "# XRay Tail Call Exit.\0" + /* 1082 */ "# XRay Function Exit.\0" + /* 1104 */ "jsr $23,($27),0\0" + /* 1120 */ "jsr $26,($27),0\0" + /* 1136 */ "ret $31,($26),1\0" + /* 1152 */ "COND_BRANCH imm:\0" + /* 1169 */ "LIFETIME_END\0" + /* 1182 */ "PSEUDO_PROBE\0" + /* 1195 */ "BUNDLE\0" + /* 1202 */ "DBG_VALUE\0" + /* 1212 */ "DBG_INSTR_REF\0" + /* 1226 */ "DBG_PHI\0" + /* 1234 */ "DBG_LABEL\0" + /* 1244 */ "LIFETIME_START\0" + /* 1259 */ "DBG_VALUE_LIST\0" + /* 1274 */ "PCMARKER_\0" + /* 1284 */ "excb\0" + /* 1289 */ "wmb\0" + /* 1293 */ "trapb\0" + /* 1299 */ "#wtf\0" + /* 1304 */ "# FEntry call\0" }; #endif // CAPSTONE_DIET @@ -191,20 +190,20 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // IMPLICIT_DEF 0U, // SUBREG_TO_REG 0U, // COPY_TO_REGCLASS - 1208U, // DBG_VALUE - 1265U, // DBG_VALUE_LIST - 1218U, // DBG_INSTR_REF - 1232U, // DBG_PHI - 1240U, // DBG_LABEL + 1203U, // DBG_VALUE + 1260U, // DBG_VALUE_LIST + 1213U, // DBG_INSTR_REF + 1227U, // DBG_PHI + 1235U, // DBG_LABEL 0U, // REG_SEQUENCE 0U, // COPY - 1201U, // BUNDLE - 1250U, // LIFETIME_START - 1175U, // LIFETIME_END - 1188U, // PSEUDO_PROBE + 1196U, // BUNDLE + 1245U, // LIFETIME_START + 1170U, // LIFETIME_END + 1183U, // PSEUDO_PROBE 0U, // ARITH_FENCE 0U, // STACKMAP - 1310U, // FENTRY_CALL + 1305U, // FENTRY_CALL 0U, // PATCHPOINT 0U, // LOAD_STACK_GUARD 0U, // PREALLOCATED_SETUP @@ -213,12 +212,12 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // LOCAL_ESCAPE 0U, // FAULTING_OP 0U, // PATCHABLE_OP - 1042U, // PATCHABLE_FUNCTION_ENTER - 962U, // PATCHABLE_RET - 1088U, // PATCHABLE_FUNCTION_EXIT - 1065U, // PATCHABLE_TAIL_CALL - 1017U, // PATCHABLE_EVENT_CALL - 993U, // PATCHABLE_TYPED_EVENT_CALL + 1037U, // PATCHABLE_FUNCTION_ENTER + 957U, // PATCHABLE_RET + 1083U, // PATCHABLE_FUNCTION_EXIT + 1060U, // PATCHABLE_TAIL_CALL + 1012U, // PATCHABLE_EVENT_CALL + 988U, // PATCHABLE_TYPED_EVENT_CALL 0U, // ICALL_BRANCH_FUNNEL 0U, // MEMBARRIER 0U, // G_ASSERT_SEXT @@ -429,261 +428,261 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // G_VECREDUCE_UMIN 0U, // G_SBFX 0U, // G_UBFX - 2196U, // ADJUSTSTACKDOWN - 2214U, // ADJUSTSTACKUP - 11133U, // ALTENT + 2049U, // ADJUSTSTACKDOWN + 2060U, // ADJUSTSTACKUP + 11128U, // ALTENT 0U, // CAS32 0U, // CAS64 0U, // LAS32 0U, // LAS64 - 19327U, // MEMLABEL - 27904U, // PCLABEL + 19322U, // MEMLABEL + 27899U, // PCLABEL 0U, // SWAP32 0U, // SWAP64 - 1305U, // WTF - 37301U, // ADDLi - 37301U, // ADDLr - 37366U, // ADDQi - 37366U, // ADDQr - 37632U, // ADDS - 37678U, // ADDT - 37114U, // ANDi - 37114U, // ANDr - 35338U, // BEQ - 35072U, // BGE - 35451U, // BGT - 37094U, // BICi - 37094U, // BICr - 37459U, // BISi - 37459U, // BISr - 35025U, // BLBC - 35384U, // BLBS - 35095U, // BLE - 35473U, // BLT - 35125U, // BNE - 3002U, // BR - 43893U, // BSR - 37399U, // CMOVEQi - 37399U, // CMOVEQr - 37134U, // CMOVGEi - 37134U, // CMOVGEr - 37505U, // CMOVGTi - 37505U, // CMOVGTr - 37079U, // CMOVLBCi - 37079U, // CMOVLBCr - 37438U, // CMOVLBSi - 37438U, // CMOVLBSr - 37164U, // CMOVLEi - 37164U, // CMOVLEr - 37542U, // CMOVLTi - 37542U, // CMOVLTr - 37194U, // CMOVNEi - 37194U, // CMOVNEr - 37125U, // CMPBGE - 37125U, // CMPBGEi - 37391U, // CMPEQ - 37391U, // CMPEQi - 37148U, // CMPLE - 37148U, // CMPLEi - 37526U, // CMPLT - 37526U, // CMPLTi - 37612U, // CMPTEQ - 37590U, // CMPTLE - 37687U, // CMPTLT - 37601U, // CMPTUN - 37155U, // CMPULE - 37155U, // CMPULEi - 37533U, // CMPULT - 37533U, // CMPULTi - 52358U, // COND_BRANCH_F - 60550U, // COND_BRANCH_I - 37202U, // CPYSES - 37202U, // CPYSESt - 37202U, // CPYSET - 37341U, // CPYSNS - 37341U, // CPYSNSt - 37341U, // CPYSNT - 37341U, // CPYSNTs - 37480U, // CPYSS - 37480U, // CPYSSt - 37480U, // CPYST - 37480U, // CPYSTs - 37039U, // CTLZ - 37023U, // CTPOP - 37045U, // CTTZ - 37222U, // CVTQS - 37244U, // CVTQT - 37423U, // CVTST - 37103U, // CVTTQ - 37233U, // CVTTS - 37660U, // DIVS - 37717U, // DIVT - 5008U, // ECB - 37732U, // EQVi - 37732U, // EQVr - 1290U, // EXCB - 36942U, // EXTBL - 36942U, // EXTBLi - 36879U, // EXTLH - 36879U, // EXTLHi - 36963U, // EXTLL - 36963U, // EXTLLi - 36900U, // EXTQH - 36900U, // EXTQHi - 36984U, // EXTQL - 36984U, // EXTQLi - 36921U, // EXTWH - 36921U, // EXTWHi - 37005U, // EXTWL - 37005U, // EXTWLi - 35337U, // FBEQ - 35071U, // FBGE - 35450U, // FBGT - 35094U, // FBLE - 35472U, // FBLT - 35124U, // FBNE - 6678U, // FCMOVEQS - 6678U, // FCMOVEQT - 6413U, // FCMOVGES - 6413U, // FCMOVGET - 6784U, // FCMOVGTS - 6784U, // FCMOVGTT - 6443U, // FCMOVLES - 6443U, // FCMOVLET - 6821U, // FCMOVLTS - 6821U, // FCMOVLTT - 6473U, // FCMOVNES - 6473U, // FCMOVNET - 5014U, // FETCH - 5022U, // FETCH_M - 37464U, // FTOIS - 37513U, // FTOIT - 36935U, // INSBL - 36935U, // INSBLi - 36872U, // INSLH - 36872U, // INSLHi - 36956U, // INSLL - 36956U, // INSLLi - 36893U, // INSQH - 36893U, // INSQHi - 36977U, // INSQL - 36977U, // INSQLi - 36914U, // INSWH - 36914U, // INSWHi - 36998U, // INSWL - 36998U, // INSWLi - 37452U, // ITOFS - 37491U, // ITOFT - 11185U, // JMP - 1126U, // JSR - 18746U, // JSR_COROUTINE - 1110U, // JSRs - 35003U, // LDA - 35161U, // LDAH - 26969U, // LDAHg - 35161U, // LDAHr - 26811U, // LDAg - 35003U, // LDAr - 35536U, // LDBU - 35536U, // LDBUr - 35267U, // LDL - 35207U, // LDL_L - 35267U, // LDLr - 35332U, // LDQ - 35221U, // LDQ_L - 35522U, // LDQ_U - 35332U, // LDQl - 35332U, // LDQr - 35399U, // LDS - 35399U, // LDSr - 35438U, // LDT - 35438U, // LDTr - 35678U, // LDWU - 35678U, // LDWUr - 1296U, // MB - 36928U, // MSKBL - 36928U, // MSKBLi - 36865U, // MSKLH - 36865U, // MSKLHi - 36949U, // MSKLL - 36949U, // MSKLLi - 36886U, // MSKQH - 36886U, // MSKQHi - 36970U, // MSKQL - 36970U, // MSKQLi - 36907U, // MSKWH - 36907U, // MSKWHi - 36991U, // MSKWL - 36991U, // MSKWLi - 37325U, // MULLi - 37325U, // MULLr - 37407U, // MULQi - 37407U, // MULQr - 37641U, // MULS - 37698U, // MULT - 37558U, // ORNOTi - 37558U, // ORNOTr - 2283U, // RC - 1142U, // RETDAG - 1142U, // RETDAGp - 2272U, // RPCC - 2655U, // RS - 37299U, // S4ADDLi - 37299U, // S4ADDLr - 37364U, // S4ADDQi - 37364U, // S4ADDQr - 37283U, // S4SUBLi - 37283U, // S4SUBLr - 37348U, // S4SUBQi - 37348U, // S4SUBQr - 37307U, // S8ADDLi - 37307U, // S8ADDLr - 37372U, // S8ADDQi - 37372U, // S8ADDQr - 37291U, // S8SUBLi - 37291U, // S8SUBLr - 37356U, // S8SUBQi - 37356U, // S8SUBQr - 37066U, // SEXTB - 37742U, // SEXTW - 37320U, // SLi - 37320U, // SLr - 37650U, // SQRTS - 37707U, // SQRTT - 37056U, // SRAi - 37056U, // SRAr - 37331U, // SRLi - 37331U, // SRLr - 35013U, // STB - 35013U, // STBr - 35288U, // STL - 37262U, // STL_C - 35288U, // STLr - 35365U, // STQ - 37276U, // STQ_C - 35529U, // STQ_U - 35365U, // STQr - 35427U, // STS - 35427U, // STSr - 35517U, // STT - 35517U, // STTr - 35689U, // STW - 35689U, // STWr - 37285U, // SUBLi - 37285U, // SUBLr - 37350U, // SUBQi - 37350U, // SUBQr - 37623U, // SUBS - 37669U, // SUBT - 1299U, // TRAPB - 37215U, // UMULHi - 37215U, // UMULHr - 5001U, // WH64 - 5032U, // WH64EN - 1295U, // WMB - 37418U, // XORi - 37418U, // XORr - 37550U, // ZAPNOTi + 1300U, // WTF + 37219U, // ADDLi + 37219U, // ADDLr + 37349U, // ADDQi + 37349U, // ADDQr + 37615U, // ADDS + 37661U, // ADDT + 36962U, // ANDi + 36962U, // ANDr + 35321U, // BEQ + 34920U, // BGE + 35434U, // BGT + 36942U, // BICi + 36942U, // BICr + 37442U, // BISi + 37442U, // BISr + 34873U, // BLBC + 35367U, // BLBS + 34943U, // BLE + 35456U, // BLT + 34973U, // BNE + 2997U, // BR + 43888U, // BSR + 37382U, // CMOVEQi + 37382U, // CMOVEQr + 36982U, // CMOVGEi + 36982U, // CMOVGEr + 37488U, // CMOVGTi + 37488U, // CMOVGTr + 36927U, // CMOVLBCi + 36927U, // CMOVLBCr + 37421U, // CMOVLBSi + 37421U, // CMOVLBSr + 37012U, // CMOVLEi + 37012U, // CMOVLEr + 37525U, // CMOVLTi + 37525U, // CMOVLTr + 37042U, // CMOVNEi + 37042U, // CMOVNEr + 36973U, // CMPBGE + 36973U, // CMPBGEi + 37374U, // CMPEQ + 37374U, // CMPEQi + 36996U, // CMPLE + 36996U, // CMPLEi + 37509U, // CMPLT + 37509U, // CMPLTi + 37595U, // CMPTEQ + 37573U, // CMPTLE + 37670U, // CMPTLT + 37584U, // CMPTUN + 37003U, // CMPULE + 37003U, // CMPULEi + 37516U, // CMPULT + 37516U, // CMPULTi + 52353U, // COND_BRANCH_F + 60545U, // COND_BRANCH_I + 37050U, // CPYSES + 37050U, // CPYSESt + 37050U, // CPYSET + 37317U, // CPYSNS + 37317U, // CPYSNSt + 37317U, // CPYSNT + 37317U, // CPYSNTs + 37463U, // CPYSS + 37463U, // CPYSSt + 37463U, // CPYST + 37463U, // CPYSTs + 37732U, // CTLZ + 37324U, // CTPOP + 37738U, // CTTZ + 37133U, // CVTQS + 37155U, // CVTQT + 37406U, // CVTST + 36951U, // CVTTQ + 37144U, // CVTTS + 37643U, // DIVS + 37700U, // DIVT + 5003U, // ECB + 37715U, // EQVi + 37715U, // EQVr + 1285U, // EXCB + 37194U, // EXTBL + 37194U, // EXTBLi + 37077U, // EXTLH + 37077U, // EXTLHi + 37252U, // EXTLL + 37252U, // EXTLLi + 37105U, // EXTQH + 37105U, // EXTQHi + 37279U, // EXTQL + 37279U, // EXTQLi + 37126U, // EXTWH + 37126U, // EXTWHi + 37310U, // EXTWL + 37310U, // EXTWLi + 35320U, // FBEQ + 34919U, // FBGE + 35433U, // FBGT + 34942U, // FBLE + 35455U, // FBLT + 34972U, // FBNE + 6661U, // FCMOVEQS + 6661U, // FCMOVEQT + 6261U, // FCMOVGES + 6261U, // FCMOVGET + 6767U, // FCMOVGTS + 6767U, // FCMOVGTT + 6291U, // FCMOVLES + 6291U, // FCMOVLET + 6804U, // FCMOVLTS + 6804U, // FCMOVLTT + 6321U, // FCMOVNES + 6321U, // FCMOVNET + 5009U, // FETCH + 5017U, // FETCH_M + 37447U, // FTOIS + 37496U, // FTOIT + 37187U, // INSBL + 37187U, // INSBLi + 37070U, // INSLH + 37070U, // INSLHi + 37245U, // INSLL + 37245U, // INSLLi + 37098U, // INSQH + 37098U, // INSQHi + 37272U, // INSQL + 37272U, // INSQLi + 37119U, // INSWH + 37119U, // INSWHi + 37303U, // INSWL + 37303U, // INSWLi + 37435U, // ITOFS + 37474U, // ITOFT + 11180U, // JMP + 1121U, // JSR + 18594U, // JSR_COROUTINE + 1105U, // JSRs + 34837U, // LDA + 35009U, // LDAH + 26817U, // LDAHg + 35009U, // LDAHr + 26645U, // LDAg + 34837U, // LDAr + 35519U, // LDBU + 35519U, // LDBUr + 35185U, // LDL + 35118U, // LDL_L + 35185U, // LDLr + 35315U, // LDQ + 35125U, // LDQ_L + 35505U, // LDQ_U + 35315U, // LDQl + 35315U, // LDQr + 35382U, // LDS + 35382U, // LDSr + 35421U, // LDT + 35421U, // LDTr + 35661U, // LDWU + 35661U, // LDWUr + 1291U, // MB + 37180U, // MSKBL + 37180U, // MSKBLi + 37063U, // MSKLH + 37063U, // MSKLHi + 37238U, // MSKLL + 37238U, // MSKLLi + 37091U, // MSKQH + 37091U, // MSKQHi + 37265U, // MSKQL + 37265U, // MSKQLi + 37112U, // MSKWH + 37112U, // MSKWHi + 37296U, // MSKWL + 37296U, // MSKWLi + 37259U, // MULLi + 37259U, // MULLr + 37390U, // MULQi + 37390U, // MULQr + 37624U, // MULS + 37681U, // MULT + 37541U, // ORNOTi + 37541U, // ORNOTr + 2131U, // RC + 1137U, // RETDAG + 1137U, // RETDAGp + 2120U, // RPCC + 2638U, // RS + 37217U, // S4ADDLi + 37217U, // S4ADDLr + 37347U, // S4ADDQi + 37347U, // S4ADDQr + 37201U, // S4SUBLi + 37201U, // S4SUBLr + 37331U, // S4SUBQi + 37331U, // S4SUBQr + 37225U, // S8ADDLi + 37225U, // S8ADDLr + 37355U, // S8ADDQi + 37355U, // S8ADDQr + 37209U, // S8SUBLi + 37209U, // S8SUBLr + 37339U, // S8SUBQi + 37339U, // S8SUBQr + 36900U, // SEXTB + 37725U, // SEXTW + 37247U, // SLi + 37247U, // SLr + 37633U, // SQRTS + 37690U, // SQRTT + 36890U, // SRAi + 36890U, // SRAr + 37286U, // SRLi + 37286U, // SRLr + 34847U, // STB + 34847U, // STBr + 35243U, // STL + 36907U, // STL_C + 35243U, // STLr + 35348U, // STQ + 36914U, // STQ_C + 35512U, // STQ_U + 35348U, // STQr + 35410U, // STS + 35410U, // STSr + 35500U, // STT + 35500U, // STTr + 35672U, // STW + 35672U, // STWr + 37203U, // SUBLi + 37203U, // SUBLr + 37333U, // SUBQi + 37333U, // SUBQr + 37606U, // SUBS + 37652U, // SUBT + 1294U, // TRAPB + 37084U, // UMULHi + 37084U, // UMULHr + 4996U, // WH64 + 5027U, // WH64EN + 1290U, // WMB + 37401U, // XORi + 37401U, // XORr + 37533U, // ZAPNOTi }; static const uint8_t OpInfo1[] = { @@ -1313,9 +1312,9 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { break; case 10: // JSR_COROUTINE - SStream_concat0(O, ",( "); + SStream_concat0(O, ",("); printOperand(MI, 1, O); - SStream_concat0(O, " ),"); + SStream_concat0(O, "),"); printOperand(MI, 2, O); return; break; diff --git a/arch/Alpha/AlphaGenCSMappingInsn.inc b/arch/Alpha/AlphaGenCSMappingInsn.inc index da7c5ef015..d6acaa549f 100644 --- a/arch/Alpha/AlphaGenCSMappingInsn.inc +++ b/arch/Alpha/AlphaGenCSMappingInsn.inc @@ -2324,21 +2324,21 @@ #endif }, { - /* CTLZ $RB,$RC */ + /* ctlz $RB,$RC */ Alpha_CTLZ /* 330 */, Alpha_INS_CTLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* CTPOP $RB,$RC */ + /* ctpop $RB,$RC */ Alpha_CTPOP /* 331 */, Alpha_INS_CTPOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* CTTZ $RB,$RC */ + /* cttz $RB,$RC */ Alpha_CTTZ /* 332 */, Alpha_INS_CTTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} @@ -2422,98 +2422,98 @@ #endif }, { - /* EXTBL $RA,$RB,$RC */ + /* extbl $RA,$RB,$RC */ Alpha_EXTBL /* 344 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTBL $RA,$L,$RC */ + /* extbl $RA,$L,$RC */ Alpha_EXTBLi /* 345 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTLH $RA,$RB,$RC */ + /* extlh $RA,$RB,$RC */ Alpha_EXTLH /* 346 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTLH $RA,$L,$RC */ + /* extlh $RA,$L,$RC */ Alpha_EXTLHi /* 347 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTLL $RA,$RB,$RC */ + /* extll $RA,$RB,$RC */ Alpha_EXTLL /* 348 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTLL $RA,$L,$RC */ + /* extll $RA,$L,$RC */ Alpha_EXTLLi /* 349 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTQH $RA,$RB,$RC */ + /* extqh $RA,$RB,$RC */ Alpha_EXTQH /* 350 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTQH $RA,$L,$RC */ + /* extqh $RA,$L,$RC */ Alpha_EXTQHi /* 351 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTQL $RA,$RB,$RC */ + /* extql $RA,$RB,$RC */ Alpha_EXTQL /* 352 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTQL $RA,$L,$RC */ + /* extql $RA,$L,$RC */ Alpha_EXTQLi /* 353 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTWH $RA,$RB,$RC */ + /* extwh $RA,$RB,$RC */ Alpha_EXTWH /* 354 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTWH $RA,$L,$RC */ + /* extwh $RA,$L,$RC */ Alpha_EXTWHi /* 355 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTWL $RA,$RB,$RC */ + /* extwl $RA,$RB,$RC */ Alpha_EXTWL /* 356 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* EXTWL $RA,$L,$RC */ + /* extwl $RA,$L,$RC */ Alpha_EXTWLi /* 357 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} @@ -2674,98 +2674,98 @@ #endif }, { - /* INSBL $RA,$RB,$RC */ + /* insbl $RA,$RB,$RC */ Alpha_INSBL /* 380 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSBL $RA,$L,$RC */ + /* insbl $RA,$L,$RC */ Alpha_INSBLi /* 381 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSLH $RA,$RB,$RC */ + /* inslh $RA,$RB,$RC */ Alpha_INSLH /* 382 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSLH $RA,$L,$RC */ + /* inslh $RA,$L,$RC */ Alpha_INSLHi /* 383 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSLL $RA,$RB,$RC */ + /* insll $RA,$RB,$RC */ Alpha_INSLL /* 384 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSLL $RA,$L,$RC */ + /* insll $RA,$L,$RC */ Alpha_INSLLi /* 385 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSQH $RA,$RB,$RC */ + /* insqh $RA,$RB,$RC */ Alpha_INSQH /* 386 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSQH $RA,$L,$RC */ + /* insqh $RA,$L,$RC */ Alpha_INSQHi /* 387 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSQL $RA,$RB,$RC */ + /* insql $RA,$RB,$RC */ Alpha_INSQL /* 388 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSQL $RA,$L,$RC */ + /* insql $RA,$L,$RC */ Alpha_INSQLi /* 389 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSWH $RA,$RB,$RC */ + /* inswh $RA,$RB,$RC */ Alpha_INSWH /* 390 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSWH $RA,$L,$RC */ + /* inswh $RA,$L,$RC */ Alpha_INSWHi /* 391 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSWL $RA,$RB,$RC */ + /* inswl $RA,$RB,$RC */ Alpha_INSWL /* 392 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* INSWL $RA,$L,$RC */ + /* inswl $RA,$L,$RC */ Alpha_INSWLi /* 393 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} @@ -2800,7 +2800,7 @@ #endif }, { - /* jsr_coroutine $RD,( $RS ),$DISP */ + /* jsr_coroutine $RD,($RS),$DISP */ Alpha_JSR_COROUTINE /* 398 */, Alpha_INS_JSR_COROUTINE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} @@ -2877,8 +2877,8 @@ #endif }, { - /* ldl/l $RA,$DISP($RB) */ - Alpha_LDL_L /* 409 */, Alpha_INS_LDLsL, + /* ldl_l $RA,$DISP($RB) */ + Alpha_LDL_L /* 409 */, Alpha_INS_LDL_L, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif @@ -2898,8 +2898,8 @@ #endif }, { - /* ldq/l $RA,$DISP($RB) */ - Alpha_LDQ_L /* 412 */, Alpha_INS_LDQsL, + /* ldq_l $RA,$DISP($RB) */ + Alpha_LDQ_L /* 412 */, Alpha_INS_LDQ_L, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif @@ -2975,98 +2975,98 @@ #endif }, { - /* MSKBL $RA,$RB,$RC */ + /* mskbl $RA,$RB,$RC */ Alpha_MSKBL /* 423 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKBL $RA,$L,$RC */ + /* mskbl $RA,$L,$RC */ Alpha_MSKBLi /* 424 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKLH $RA,$RB,$RC */ + /* msklh $RA,$RB,$RC */ Alpha_MSKLH /* 425 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKLH $RA,$L,$RC */ + /* msklh $RA,$L,$RC */ Alpha_MSKLHi /* 426 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKLL $RA,$RB,$RC */ + /* mskll $RA,$RB,$RC */ Alpha_MSKLL /* 427 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKLL $RA,$L,$RC */ + /* mskll $RA,$L,$RC */ Alpha_MSKLLi /* 428 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKQH $RA,$RB,$RC */ + /* mskqh $RA,$RB,$RC */ Alpha_MSKQH /* 429 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKQH $RA,$L,$RC */ + /* mskqh $RA,$L,$RC */ Alpha_MSKQHi /* 430 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKQL $RA,$RB,$RC */ + /* mskql $RA,$RB,$RC */ Alpha_MSKQL /* 431 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKQL $RA,$L,$RC */ + /* mskql $RA,$L,$RC */ Alpha_MSKQLi /* 432 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKWH $RA,$RB,$RC */ + /* mskwh $RA,$RB,$RC */ Alpha_MSKWH /* 433 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKWH $RA,$L,$RC */ + /* mskwh $RA,$L,$RC */ Alpha_MSKWHi /* 434 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKWL $RA,$RB,$RC */ + /* mskwl $RA,$RB,$RC */ Alpha_MSKWL /* 435 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { - /* MSKWL $RA,$L,$RC */ + /* mskwl $RA,$L,$RC */ Alpha_MSKWLi /* 436 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} @@ -3367,8 +3367,8 @@ #endif }, { - /* stl/l $RA,$DISP($RB) */ - Alpha_STL_C /* 479 */, Alpha_INS_STLsL, + /* stl_c $RA,$DISP($RB) */ + Alpha_STL_C /* 479 */, Alpha_INS_STL_C, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif @@ -3388,8 +3388,8 @@ #endif }, { - /* stq/l $RA,$DISP($RB) */ - Alpha_STQ_C /* 482 */, Alpha_INS_STQsL, + /* stq_c $RA,$DISP($RB) */ + Alpha_STQ_C /* 482 */, Alpha_INS_STQ_C, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} #endif diff --git a/arch/Alpha/AlphaGenCSMappingInsnName.inc b/arch/Alpha/AlphaGenCSMappingInsnName.inc index 225e7492b5..3bcfba0aa3 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnName.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnName.inc @@ -51,9 +51,9 @@ "cpyse", // Alpha_INS_CPYSE "cpysn", // Alpha_INS_CPYSN "cpys", // Alpha_INS_CPYS - "CTLZ", // Alpha_INS_CTLZ - "CTPOP", // Alpha_INS_CTPOP - "CTTZ", // Alpha_INS_CTTZ + "ctlz", // Alpha_INS_CTLZ + "ctpop", // Alpha_INS_CTPOP + "cttz", // Alpha_INS_CTTZ "cvtqs/sui", // Alpha_INS_CVTQSsSUI "cvtqt/sui", // Alpha_INS_CVTQTsSUI "cvtst/s", // Alpha_INS_CVTSTsS @@ -64,13 +64,13 @@ "ecb", // Alpha_INS_ECB "eqv", // Alpha_INS_EQV "excb", // Alpha_INS_EXCB - "EXTBL", // Alpha_INS_EXTBL - "EXTLH", // Alpha_INS_EXTLH - "EXTLL", // Alpha_INS_EXTLL - "EXTQH", // Alpha_INS_EXTQH - "EXTQL", // Alpha_INS_EXTQL - "EXTWH", // Alpha_INS_EXTWH - "EXTWL", // Alpha_INS_EXTWL + "extbl", // Alpha_INS_EXTBL + "extlh", // Alpha_INS_EXTLH + "extll", // Alpha_INS_EXTLL + "extqh", // Alpha_INS_EXTQH + "extql", // Alpha_INS_EXTQL + "extwh", // Alpha_INS_EXTWH + "extwl", // Alpha_INS_EXTWL "fbeq", // Alpha_INS_FBEQ "fbge", // Alpha_INS_FBGE "fbgt", // Alpha_INS_FBGT @@ -87,13 +87,13 @@ "fetch_m", // Alpha_INS_FETCH_M "ftois", // Alpha_INS_FTOIS "ftoit", // Alpha_INS_FTOIT - "INSBL", // Alpha_INS_INSBL - "INSLH", // Alpha_INS_INSLH - "INSLL", // Alpha_INS_INSLL - "INSQH", // Alpha_INS_INSQH - "INSQL", // Alpha_INS_INSQL - "INSWH", // Alpha_INS_INSWH - "INSWL", // Alpha_INS_INSWL + "insbl", // Alpha_INS_INSBL + "inslh", // Alpha_INS_INSLH + "insll", // Alpha_INS_INSLL + "insqh", // Alpha_INS_INSQH + "insql", // Alpha_INS_INSQL + "inswh", // Alpha_INS_INSWH + "inswl", // Alpha_INS_INSWL "itofs", // Alpha_INS_ITOFS "itoft", // Alpha_INS_ITOFT "jmp", // Alpha_INS_JMP @@ -103,21 +103,21 @@ "ldah", // Alpha_INS_LDAH "ldbu", // Alpha_INS_LDBU "ldl", // Alpha_INS_LDL - "ldl/l", // Alpha_INS_LDLsL + "ldl_l", // Alpha_INS_LDL_L "ldq", // Alpha_INS_LDQ - "ldq/l", // Alpha_INS_LDQsL + "ldq_l", // Alpha_INS_LDQ_L "ldq_u", // Alpha_INS_LDQ_U "lds", // Alpha_INS_LDS "ldt", // Alpha_INS_LDT "ldwu", // Alpha_INS_LDWU "mb", // Alpha_INS_MB - "MSKBL", // Alpha_INS_MSKBL - "MSKLH", // Alpha_INS_MSKLH - "MSKLL", // Alpha_INS_MSKLL - "MSKQH", // Alpha_INS_MSKQH - "MSKQL", // Alpha_INS_MSKQL - "MSKWH", // Alpha_INS_MSKWH - "MSKWL", // Alpha_INS_MSKWL + "mskbl", // Alpha_INS_MSKBL + "msklh", // Alpha_INS_MSKLH + "mskll", // Alpha_INS_MSKLL + "mskqh", // Alpha_INS_MSKQH + "mskql", // Alpha_INS_MSKQL + "mskwh", // Alpha_INS_MSKWH + "mskwl", // Alpha_INS_MSKWL "mull", // Alpha_INS_MULL "mulq", // Alpha_INS_MULQ "muls/su", // Alpha_INS_MULSsSU @@ -144,9 +144,9 @@ "srl", // Alpha_INS_SRL "stb", // Alpha_INS_STB "stl", // Alpha_INS_STL - "stl/l", // Alpha_INS_STLsL + "stl_c", // Alpha_INS_STL_C "stq", // Alpha_INS_STQ - "stq/l", // Alpha_INS_STQsL + "stq_c", // Alpha_INS_STQ_C "stq_u", // Alpha_INS_STQ_U "sts", // Alpha_INS_STS "stt", // Alpha_INS_STT diff --git a/arch/Alpha/AlphaGenCSMappingInsnOp.inc b/arch/Alpha/AlphaGenCSMappingInsnOp.inc index acb2db0602..8fcb6bc0a8 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnOp.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnOp.inc @@ -1275,19 +1275,19 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_CTLZ (330) - Alpha_INS_CTLZ - CTLZ $RB,$RC */ +{ /* Alpha_CTLZ (330) - Alpha_INS_CTLZ - ctlz $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_CTPOP (331) - Alpha_INS_CTPOP - CTPOP $RB,$RC */ +{ /* Alpha_CTPOP (331) - Alpha_INS_CTPOP - ctpop $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_CTTZ (332) - Alpha_INS_CTTZ - CTTZ $RB,$RC */ +{ /* Alpha_CTTZ (332) - Alpha_INS_CTTZ - cttz $RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ @@ -1361,98 +1361,98 @@ { { 0 } }}, -{ /* Alpha_EXTBL (344) - Alpha_INS_EXTBL - EXTBL $RA,$RB,$RC */ +{ /* Alpha_EXTBL (344) - Alpha_INS_EXTBL - extbl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTBLi (345) - Alpha_INS_EXTBL - EXTBL $RA,$L,$RC */ +{ /* Alpha_EXTBLi (345) - Alpha_INS_EXTBL - extbl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTLH (346) - Alpha_INS_EXTLH - EXTLH $RA,$RB,$RC */ +{ /* Alpha_EXTLH (346) - Alpha_INS_EXTLH - extlh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTLHi (347) - Alpha_INS_EXTLH - EXTLH $RA,$L,$RC */ +{ /* Alpha_EXTLHi (347) - Alpha_INS_EXTLH - extlh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTLL (348) - Alpha_INS_EXTLL - EXTLL $RA,$RB,$RC */ +{ /* Alpha_EXTLL (348) - Alpha_INS_EXTLL - extll $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTLLi (349) - Alpha_INS_EXTLL - EXTLL $RA,$L,$RC */ +{ /* Alpha_EXTLLi (349) - Alpha_INS_EXTLL - extll $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTQH (350) - Alpha_INS_EXTQH - EXTQH $RA,$RB,$RC */ +{ /* Alpha_EXTQH (350) - Alpha_INS_EXTQH - extqh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTQHi (351) - Alpha_INS_EXTQH - EXTQH $RA,$L,$RC */ +{ /* Alpha_EXTQHi (351) - Alpha_INS_EXTQH - extqh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTQL (352) - Alpha_INS_EXTQL - EXTQL $RA,$RB,$RC */ +{ /* Alpha_EXTQL (352) - Alpha_INS_EXTQL - extql $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTQLi (353) - Alpha_INS_EXTQL - EXTQL $RA,$L,$RC */ +{ /* Alpha_EXTQLi (353) - Alpha_INS_EXTQL - extql $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTWH (354) - Alpha_INS_EXTWH - EXTWH $RA,$RB,$RC */ +{ /* Alpha_EXTWH (354) - Alpha_INS_EXTWH - extwh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTWHi (355) - Alpha_INS_EXTWH - EXTWH $RA,$L,$RC */ +{ /* Alpha_EXTWHi (355) - Alpha_INS_EXTWH - extwh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_EXTWL (356) - Alpha_INS_EXTWL - EXTWL $RA,$RB,$RC */ +{ /* Alpha_EXTWL (356) - Alpha_INS_EXTWL - extwl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_EXTWLi (357) - Alpha_INS_EXTWL - EXTWL $RA,$L,$RC */ +{ /* Alpha_EXTWLi (357) - Alpha_INS_EXTWL - extwl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -1615,98 +1615,98 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ { 0 } }}, -{ /* Alpha_INSBL (380) - Alpha_INS_INSBL - INSBL $RA,$RB,$RC */ +{ /* Alpha_INSBL (380) - Alpha_INS_INSBL - insbl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSBLi (381) - Alpha_INS_INSBL - INSBL $RA,$L,$RC */ +{ /* Alpha_INSBLi (381) - Alpha_INS_INSBL - insbl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSLH (382) - Alpha_INS_INSLH - INSLH $RA,$RB,$RC */ +{ /* Alpha_INSLH (382) - Alpha_INS_INSLH - inslh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSLHi (383) - Alpha_INS_INSLH - INSLH $RA,$L,$RC */ +{ /* Alpha_INSLHi (383) - Alpha_INS_INSLH - inslh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSLL (384) - Alpha_INS_INSLL - INSLL $RA,$RB,$RC */ +{ /* Alpha_INSLL (384) - Alpha_INS_INSLL - insll $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSLLi (385) - Alpha_INS_INSLL - INSLL $RA,$L,$RC */ +{ /* Alpha_INSLLi (385) - Alpha_INS_INSLL - insll $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSQH (386) - Alpha_INS_INSQH - INSQH $RA,$RB,$RC */ +{ /* Alpha_INSQH (386) - Alpha_INS_INSQH - insqh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSQHi (387) - Alpha_INS_INSQH - INSQH $RA,$L,$RC */ +{ /* Alpha_INSQHi (387) - Alpha_INS_INSQH - insqh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSQL (388) - Alpha_INS_INSQL - INSQL $RA,$RB,$RC */ +{ /* Alpha_INSQL (388) - Alpha_INS_INSQL - insql $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSQLi (389) - Alpha_INS_INSQL - INSQL $RA,$L,$RC */ +{ /* Alpha_INSQLi (389) - Alpha_INS_INSQL - insql $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSWH (390) - Alpha_INS_INSWH - INSWH $RA,$RB,$RC */ +{ /* Alpha_INSWH (390) - Alpha_INS_INSWH - inswh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSWHi (391) - Alpha_INS_INSWH - INSWH $RA,$L,$RC */ +{ /* Alpha_INSWHi (391) - Alpha_INS_INSWH - inswh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_INSWL (392) - Alpha_INS_INSWL - INSWL $RA,$RB,$RC */ +{ /* Alpha_INSWL (392) - Alpha_INS_INSWL - inswl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_INSWLi (393) - Alpha_INS_INSWL - INSWL $RA,$L,$RC */ +{ /* Alpha_INSWLi (393) - Alpha_INS_INSWL - inswl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -1734,7 +1734,7 @@ { { 0 } }}, -{ /* Alpha_JSR_COROUTINE (398) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,( $RS ),$DISP */ +{ /* Alpha_JSR_COROUTINE (398) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,($RS),$DISP */ { { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RD */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ @@ -1810,7 +1810,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDL_L (409) - Alpha_INS_LDLsL - ldl/l $RA,$DISP($RB) */ +{ /* Alpha_LDL_L (409) - Alpha_INS_LDL_L - ldl_l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ @@ -1831,7 +1831,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_LDQ_L (412) - Alpha_INS_LDQsL - ldq/l $RA,$DISP($RB) */ +{ /* Alpha_LDQ_L (412) - Alpha_INS_LDQ_L - ldq_l $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ @@ -1905,98 +1905,98 @@ { { 0 } }}, -{ /* Alpha_MSKBL (423) - Alpha_INS_MSKBL - MSKBL $RA,$RB,$RC */ +{ /* Alpha_MSKBL (423) - Alpha_INS_MSKBL - mskbl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKBLi (424) - Alpha_INS_MSKBL - MSKBL $RA,$L,$RC */ +{ /* Alpha_MSKBLi (424) - Alpha_INS_MSKBL - mskbl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKLH (425) - Alpha_INS_MSKLH - MSKLH $RA,$RB,$RC */ +{ /* Alpha_MSKLH (425) - Alpha_INS_MSKLH - msklh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKLHi (426) - Alpha_INS_MSKLH - MSKLH $RA,$L,$RC */ +{ /* Alpha_MSKLHi (426) - Alpha_INS_MSKLH - msklh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKLL (427) - Alpha_INS_MSKLL - MSKLL $RA,$RB,$RC */ +{ /* Alpha_MSKLL (427) - Alpha_INS_MSKLL - mskll $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKLLi (428) - Alpha_INS_MSKLL - MSKLL $RA,$L,$RC */ +{ /* Alpha_MSKLLi (428) - Alpha_INS_MSKLL - mskll $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKQH (429) - Alpha_INS_MSKQH - MSKQH $RA,$RB,$RC */ +{ /* Alpha_MSKQH (429) - Alpha_INS_MSKQH - mskqh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKQHi (430) - Alpha_INS_MSKQH - MSKQH $RA,$L,$RC */ +{ /* Alpha_MSKQHi (430) - Alpha_INS_MSKQH - mskqh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKQL (431) - Alpha_INS_MSKQL - MSKQL $RA,$RB,$RC */ +{ /* Alpha_MSKQL (431) - Alpha_INS_MSKQL - mskql $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKQLi (432) - Alpha_INS_MSKQL - MSKQL $RA,$L,$RC */ +{ /* Alpha_MSKQLi (432) - Alpha_INS_MSKQL - mskql $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKWH (433) - Alpha_INS_MSKWH - MSKWH $RA,$RB,$RC */ +{ /* Alpha_MSKWH (433) - Alpha_INS_MSKWH - mskwh $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKWHi (434) - Alpha_INS_MSKWH - MSKWH $RA,$L,$RC */ +{ /* Alpha_MSKWHi (434) - Alpha_INS_MSKWH - mskwh $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ { 0 } }}, -{ /* Alpha_MSKWL (435) - Alpha_INS_MSKWL - MSKWL $RA,$RB,$RC */ +{ /* Alpha_MSKWL (435) - Alpha_INS_MSKWL - mskwl $RA,$RB,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_MSKWLi (436) - Alpha_INS_MSKWL - MSKWL $RA,$L,$RC */ +{ /* Alpha_MSKWLi (436) - Alpha_INS_MSKWL - mskwl $RA,$L,$RC */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -2075,6 +2075,7 @@ { /* Alpha_RPCC (448) - Alpha_INS_RPCC - rpcc $RA */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, { /* Alpha_RS (449) - Alpha_INS_RS - rs $RA */ @@ -2281,7 +2282,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STL_C (479) - Alpha_INS_STLsL - stl/l $RA,$DISP($RB) */ +{ /* Alpha_STL_C (479) - Alpha_INS_STL_C - stl_c $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ @@ -2303,7 +2304,7 @@ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ { 0 } }}, -{ /* Alpha_STQ_C (482) - Alpha_INS_STQsL - stq/l $RA,$DISP($RB) */ +{ /* Alpha_STQ_C (482) - Alpha_INS_STQ_C - stq_c $RA,$DISP($RB) */ { { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ diff --git a/arch/Alpha/AlphaGenDisassemblerTables.inc b/arch/Alpha/AlphaGenDisassemblerTables.inc index fe58c6768b..697f07e520 100644 --- a/arch/Alpha/AlphaGenDisassemblerTables.inc +++ b/arch/Alpha/AlphaGenDisassemblerTables.inc @@ -49,58 +49,58 @@ static const uint8_t DecoderTable32[] = { /* 84 */ MCD_OPC_FilterValue, 16, 215, 1, 0, // Skip to: 560 /* 89 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... /* 92 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 108 -/* 97 */ MCD_OPC_CheckField, 13, 3, 0, 41, 10, 0, // Skip to: 2705 +/* 97 */ MCD_OPC_CheckField, 13, 3, 0, 43, 10, 0, // Skip to: 2707 /* 104 */ MCD_OPC_Decode, 136, 2, 2, // Opcode: ADDLr /* 108 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 124 -/* 113 */ MCD_OPC_CheckField, 13, 3, 0, 25, 10, 0, // Skip to: 2705 +/* 113 */ MCD_OPC_CheckField, 13, 3, 0, 27, 10, 0, // Skip to: 2707 /* 120 */ MCD_OPC_Decode, 195, 3, 2, // Opcode: S4ADDLr /* 124 */ MCD_OPC_FilterValue, 9, 11, 0, 0, // Skip to: 140 -/* 129 */ MCD_OPC_CheckField, 13, 3, 0, 9, 10, 0, // Skip to: 2705 +/* 129 */ MCD_OPC_CheckField, 13, 3, 0, 11, 10, 0, // Skip to: 2707 /* 136 */ MCD_OPC_Decode, 236, 3, 2, // Opcode: SUBLr /* 140 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 156 -/* 145 */ MCD_OPC_CheckField, 13, 3, 0, 249, 9, 0, // Skip to: 2705 +/* 145 */ MCD_OPC_CheckField, 13, 3, 0, 251, 9, 0, // Skip to: 2707 /* 152 */ MCD_OPC_Decode, 199, 3, 2, // Opcode: S4SUBLr /* 156 */ MCD_OPC_FilterValue, 15, 11, 0, 0, // Skip to: 172 -/* 161 */ MCD_OPC_CheckField, 13, 3, 0, 233, 9, 0, // Skip to: 2705 +/* 161 */ MCD_OPC_CheckField, 13, 3, 0, 235, 9, 0, // Skip to: 2707 /* 168 */ MCD_OPC_Decode, 173, 2, 2, // Opcode: CMPBGE /* 172 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 188 -/* 177 */ MCD_OPC_CheckField, 13, 3, 0, 217, 9, 0, // Skip to: 2705 +/* 177 */ MCD_OPC_CheckField, 13, 3, 0, 219, 9, 0, // Skip to: 2707 /* 184 */ MCD_OPC_Decode, 203, 3, 2, // Opcode: S8ADDLr /* 188 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 204 -/* 193 */ MCD_OPC_CheckField, 13, 3, 0, 201, 9, 0, // Skip to: 2705 +/* 193 */ MCD_OPC_CheckField, 13, 3, 0, 203, 9, 0, // Skip to: 2707 /* 200 */ MCD_OPC_Decode, 207, 3, 2, // Opcode: S8SUBLr /* 204 */ MCD_OPC_FilterValue, 29, 11, 0, 0, // Skip to: 220 -/* 209 */ MCD_OPC_CheckField, 13, 3, 0, 185, 9, 0, // Skip to: 2705 +/* 209 */ MCD_OPC_CheckField, 13, 3, 0, 187, 9, 0, // Skip to: 2707 /* 216 */ MCD_OPC_Decode, 187, 2, 2, // Opcode: CMPULT /* 220 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 236 -/* 225 */ MCD_OPC_CheckField, 13, 3, 0, 169, 9, 0, // Skip to: 2705 +/* 225 */ MCD_OPC_CheckField, 13, 3, 0, 171, 9, 0, // Skip to: 2707 /* 232 */ MCD_OPC_Decode, 138, 2, 2, // Opcode: ADDQr /* 236 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 252 -/* 241 */ MCD_OPC_CheckField, 13, 3, 0, 153, 9, 0, // Skip to: 2705 +/* 241 */ MCD_OPC_CheckField, 13, 3, 0, 155, 9, 0, // Skip to: 2707 /* 248 */ MCD_OPC_Decode, 197, 3, 2, // Opcode: S4ADDQr /* 252 */ MCD_OPC_FilterValue, 41, 11, 0, 0, // Skip to: 268 -/* 257 */ MCD_OPC_CheckField, 13, 3, 0, 137, 9, 0, // Skip to: 2705 +/* 257 */ MCD_OPC_CheckField, 13, 3, 0, 139, 9, 0, // Skip to: 2707 /* 264 */ MCD_OPC_Decode, 238, 3, 2, // Opcode: SUBQr /* 268 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 284 -/* 273 */ MCD_OPC_CheckField, 13, 3, 0, 121, 9, 0, // Skip to: 2705 +/* 273 */ MCD_OPC_CheckField, 13, 3, 0, 123, 9, 0, // Skip to: 2707 /* 280 */ MCD_OPC_Decode, 201, 3, 2, // Opcode: S4SUBQr /* 284 */ MCD_OPC_FilterValue, 45, 11, 0, 0, // Skip to: 300 -/* 289 */ MCD_OPC_CheckField, 13, 3, 0, 105, 9, 0, // Skip to: 2705 +/* 289 */ MCD_OPC_CheckField, 13, 3, 0, 107, 9, 0, // Skip to: 2707 /* 296 */ MCD_OPC_Decode, 175, 2, 2, // Opcode: CMPEQ /* 300 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 316 -/* 305 */ MCD_OPC_CheckField, 13, 3, 0, 89, 9, 0, // Skip to: 2705 +/* 305 */ MCD_OPC_CheckField, 13, 3, 0, 91, 9, 0, // Skip to: 2707 /* 312 */ MCD_OPC_Decode, 205, 3, 2, // Opcode: S8ADDQr /* 316 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 332 -/* 321 */ MCD_OPC_CheckField, 13, 3, 0, 73, 9, 0, // Skip to: 2705 +/* 321 */ MCD_OPC_CheckField, 13, 3, 0, 75, 9, 0, // Skip to: 2707 /* 328 */ MCD_OPC_Decode, 209, 3, 2, // Opcode: S8SUBQr /* 332 */ MCD_OPC_FilterValue, 61, 11, 0, 0, // Skip to: 348 -/* 337 */ MCD_OPC_CheckField, 13, 3, 0, 57, 9, 0, // Skip to: 2705 +/* 337 */ MCD_OPC_CheckField, 13, 3, 0, 59, 9, 0, // Skip to: 2707 /* 344 */ MCD_OPC_Decode, 185, 2, 2, // Opcode: CMPULE /* 348 */ MCD_OPC_FilterValue, 77, 11, 0, 0, // Skip to: 364 -/* 353 */ MCD_OPC_CheckField, 13, 3, 0, 41, 9, 0, // Skip to: 2705 +/* 353 */ MCD_OPC_CheckField, 13, 3, 0, 43, 9, 0, // Skip to: 2707 /* 360 */ MCD_OPC_Decode, 179, 2, 2, // Opcode: CMPLT /* 364 */ MCD_OPC_FilterValue, 109, 11, 0, 0, // Skip to: 380 -/* 369 */ MCD_OPC_CheckField, 13, 3, 0, 25, 9, 0, // Skip to: 2705 +/* 369 */ MCD_OPC_CheckField, 13, 3, 0, 27, 9, 0, // Skip to: 2707 /* 376 */ MCD_OPC_Decode, 177, 2, 2, // Opcode: CMPLE /* 380 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 390 /* 386 */ MCD_OPC_Decode, 135, 2, 3, // Opcode: ADDLi @@ -136,51 +136,51 @@ static const uint8_t DecoderTable32[] = { /* 536 */ MCD_OPC_Decode, 186, 2, 3, // Opcode: CMPULEi /* 540 */ MCD_OPC_FilterValue, 205, 1, 4, 0, 0, // Skip to: 550 /* 546 */ MCD_OPC_Decode, 180, 2, 3, // Opcode: CMPLTi -/* 550 */ MCD_OPC_FilterValue, 237, 1, 101, 8, 0, // Skip to: 2705 +/* 550 */ MCD_OPC_FilterValue, 237, 1, 103, 8, 0, // Skip to: 2707 /* 556 */ MCD_OPC_Decode, 178, 2, 3, // Opcode: CMPLEi /* 560 */ MCD_OPC_FilterValue, 17, 111, 1, 0, // Skip to: 932 /* 565 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... /* 568 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 584 -/* 573 */ MCD_OPC_CheckField, 13, 3, 0, 77, 8, 0, // Skip to: 2705 +/* 573 */ MCD_OPC_CheckField, 13, 3, 0, 79, 8, 0, // Skip to: 2707 /* 580 */ MCD_OPC_Decode, 142, 2, 2, // Opcode: ANDr /* 584 */ MCD_OPC_FilterValue, 8, 11, 0, 0, // Skip to: 600 -/* 589 */ MCD_OPC_CheckField, 13, 3, 0, 61, 8, 0, // Skip to: 2705 +/* 589 */ MCD_OPC_CheckField, 13, 3, 0, 63, 8, 0, // Skip to: 2707 /* 596 */ MCD_OPC_Decode, 147, 2, 2, // Opcode: BICr /* 600 */ MCD_OPC_FilterValue, 20, 11, 0, 0, // Skip to: 616 -/* 605 */ MCD_OPC_CheckField, 13, 3, 0, 45, 8, 0, // Skip to: 2705 +/* 605 */ MCD_OPC_CheckField, 13, 3, 0, 47, 8, 0, // Skip to: 2707 /* 612 */ MCD_OPC_Decode, 166, 2, 4, // Opcode: CMOVLBSr /* 616 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 632 -/* 621 */ MCD_OPC_CheckField, 13, 3, 0, 29, 8, 0, // Skip to: 2705 +/* 621 */ MCD_OPC_CheckField, 13, 3, 0, 31, 8, 0, // Skip to: 2707 /* 628 */ MCD_OPC_Decode, 164, 2, 4, // Opcode: CMOVLBCr /* 632 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 648 -/* 637 */ MCD_OPC_CheckField, 13, 3, 0, 13, 8, 0, // Skip to: 2705 +/* 637 */ MCD_OPC_CheckField, 13, 3, 0, 15, 8, 0, // Skip to: 2707 /* 644 */ MCD_OPC_Decode, 149, 2, 2, // Opcode: BISr /* 648 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 664 -/* 653 */ MCD_OPC_CheckField, 13, 3, 0, 253, 7, 0, // Skip to: 2705 +/* 653 */ MCD_OPC_CheckField, 13, 3, 0, 255, 7, 0, // Skip to: 2707 /* 660 */ MCD_OPC_Decode, 158, 2, 4, // Opcode: CMOVEQr /* 664 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 680 -/* 669 */ MCD_OPC_CheckField, 13, 3, 0, 237, 7, 0, // Skip to: 2705 +/* 669 */ MCD_OPC_CheckField, 13, 3, 0, 239, 7, 0, // Skip to: 2707 /* 676 */ MCD_OPC_Decode, 172, 2, 4, // Opcode: CMOVNEr /* 680 */ MCD_OPC_FilterValue, 40, 11, 0, 0, // Skip to: 696 -/* 685 */ MCD_OPC_CheckField, 13, 3, 0, 221, 7, 0, // Skip to: 2705 +/* 685 */ MCD_OPC_CheckField, 13, 3, 0, 223, 7, 0, // Skip to: 2707 /* 692 */ MCD_OPC_Decode, 188, 3, 2, // Opcode: ORNOTr /* 696 */ MCD_OPC_FilterValue, 64, 11, 0, 0, // Skip to: 712 -/* 701 */ MCD_OPC_CheckField, 13, 3, 0, 205, 7, 0, // Skip to: 2705 +/* 701 */ MCD_OPC_CheckField, 13, 3, 0, 207, 7, 0, // Skip to: 2707 /* 708 */ MCD_OPC_Decode, 248, 3, 2, // Opcode: XORr /* 712 */ MCD_OPC_FilterValue, 68, 11, 0, 0, // Skip to: 728 -/* 717 */ MCD_OPC_CheckField, 13, 3, 0, 189, 7, 0, // Skip to: 2705 +/* 717 */ MCD_OPC_CheckField, 13, 3, 0, 191, 7, 0, // Skip to: 2707 /* 724 */ MCD_OPC_Decode, 170, 2, 4, // Opcode: CMOVLTr /* 728 */ MCD_OPC_FilterValue, 70, 11, 0, 0, // Skip to: 744 -/* 733 */ MCD_OPC_CheckField, 13, 3, 0, 173, 7, 0, // Skip to: 2705 +/* 733 */ MCD_OPC_CheckField, 13, 3, 0, 175, 7, 0, // Skip to: 2707 /* 740 */ MCD_OPC_Decode, 160, 2, 4, // Opcode: CMOVGEr /* 744 */ MCD_OPC_FilterValue, 72, 11, 0, 0, // Skip to: 760 -/* 749 */ MCD_OPC_CheckField, 13, 3, 0, 157, 7, 0, // Skip to: 2705 +/* 749 */ MCD_OPC_CheckField, 13, 3, 0, 159, 7, 0, // Skip to: 2707 /* 756 */ MCD_OPC_Decode, 214, 2, 2, // Opcode: EQVr /* 760 */ MCD_OPC_FilterValue, 100, 11, 0, 0, // Skip to: 776 -/* 765 */ MCD_OPC_CheckField, 13, 3, 0, 141, 7, 0, // Skip to: 2705 +/* 765 */ MCD_OPC_CheckField, 13, 3, 0, 143, 7, 0, // Skip to: 2707 /* 772 */ MCD_OPC_Decode, 168, 2, 4, // Opcode: CMOVLEr /* 776 */ MCD_OPC_FilterValue, 102, 11, 0, 0, // Skip to: 792 -/* 781 */ MCD_OPC_CheckField, 13, 3, 0, 125, 7, 0, // Skip to: 2705 +/* 781 */ MCD_OPC_CheckField, 13, 3, 0, 127, 7, 0, // Skip to: 2707 /* 788 */ MCD_OPC_Decode, 162, 2, 4, // Opcode: CMOVGTr /* 792 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 802 /* 798 */ MCD_OPC_Decode, 141, 2, 3, // Opcode: ANDi @@ -208,81 +208,81 @@ static const uint8_t DecoderTable32[] = { /* 908 */ MCD_OPC_Decode, 213, 2, 3, // Opcode: EQVi /* 912 */ MCD_OPC_FilterValue, 228, 1, 4, 0, 0, // Skip to: 922 /* 918 */ MCD_OPC_Decode, 167, 2, 5, // Opcode: CMOVLEi -/* 922 */ MCD_OPC_FilterValue, 230, 1, 241, 6, 0, // Skip to: 2705 +/* 922 */ MCD_OPC_FilterValue, 230, 1, 243, 6, 0, // Skip to: 2707 /* 928 */ MCD_OPC_Decode, 161, 2, 5, // Opcode: CMOVGTi /* 932 */ MCD_OPC_FilterValue, 18, 125, 2, 0, // Skip to: 1574 /* 937 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... /* 940 */ MCD_OPC_FilterValue, 2, 11, 0, 0, // Skip to: 956 -/* 945 */ MCD_OPC_CheckField, 13, 3, 0, 217, 6, 0, // Skip to: 2705 +/* 945 */ MCD_OPC_CheckField, 13, 3, 0, 219, 6, 0, // Skip to: 2707 /* 952 */ MCD_OPC_Decode, 167, 3, 2, // Opcode: MSKBL /* 956 */ MCD_OPC_FilterValue, 6, 11, 0, 0, // Skip to: 972 -/* 961 */ MCD_OPC_CheckField, 13, 3, 0, 201, 6, 0, // Skip to: 2705 +/* 961 */ MCD_OPC_CheckField, 13, 3, 0, 203, 6, 0, // Skip to: 2707 /* 968 */ MCD_OPC_Decode, 216, 2, 2, // Opcode: EXTBL /* 972 */ MCD_OPC_FilterValue, 11, 11, 0, 0, // Skip to: 988 -/* 977 */ MCD_OPC_CheckField, 13, 3, 0, 185, 6, 0, // Skip to: 2705 +/* 977 */ MCD_OPC_CheckField, 13, 3, 0, 187, 6, 0, // Skip to: 2707 /* 984 */ MCD_OPC_Decode, 252, 2, 2, // Opcode: INSBL /* 988 */ MCD_OPC_FilterValue, 18, 11, 0, 0, // Skip to: 1004 -/* 993 */ MCD_OPC_CheckField, 13, 3, 0, 169, 6, 0, // Skip to: 2705 +/* 993 */ MCD_OPC_CheckField, 13, 3, 0, 171, 6, 0, // Skip to: 2707 /* 1000 */ MCD_OPC_Decode, 179, 3, 2, // Opcode: MSKWL /* 1004 */ MCD_OPC_FilterValue, 22, 11, 0, 0, // Skip to: 1020 -/* 1009 */ MCD_OPC_CheckField, 13, 3, 0, 153, 6, 0, // Skip to: 2705 +/* 1009 */ MCD_OPC_CheckField, 13, 3, 0, 155, 6, 0, // Skip to: 2707 /* 1016 */ MCD_OPC_Decode, 228, 2, 2, // Opcode: EXTWL /* 1020 */ MCD_OPC_FilterValue, 27, 11, 0, 0, // Skip to: 1036 -/* 1025 */ MCD_OPC_CheckField, 13, 3, 0, 137, 6, 0, // Skip to: 2705 +/* 1025 */ MCD_OPC_CheckField, 13, 3, 0, 139, 6, 0, // Skip to: 2707 /* 1032 */ MCD_OPC_Decode, 136, 3, 2, // Opcode: INSWL /* 1036 */ MCD_OPC_FilterValue, 34, 11, 0, 0, // Skip to: 1052 -/* 1041 */ MCD_OPC_CheckField, 13, 3, 0, 121, 6, 0, // Skip to: 2705 +/* 1041 */ MCD_OPC_CheckField, 13, 3, 0, 123, 6, 0, // Skip to: 2707 /* 1048 */ MCD_OPC_Decode, 171, 3, 2, // Opcode: MSKLL /* 1052 */ MCD_OPC_FilterValue, 38, 11, 0, 0, // Skip to: 1068 -/* 1057 */ MCD_OPC_CheckField, 13, 3, 0, 105, 6, 0, // Skip to: 2705 +/* 1057 */ MCD_OPC_CheckField, 13, 3, 0, 107, 6, 0, // Skip to: 2707 /* 1064 */ MCD_OPC_Decode, 220, 2, 2, // Opcode: EXTLL /* 1068 */ MCD_OPC_FilterValue, 43, 11, 0, 0, // Skip to: 1084 -/* 1073 */ MCD_OPC_CheckField, 13, 3, 0, 89, 6, 0, // Skip to: 2705 +/* 1073 */ MCD_OPC_CheckField, 13, 3, 0, 91, 6, 0, // Skip to: 2707 /* 1080 */ MCD_OPC_Decode, 128, 3, 2, // Opcode: INSLL /* 1084 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 1100 -/* 1089 */ MCD_OPC_CheckField, 13, 3, 0, 73, 6, 0, // Skip to: 2705 +/* 1089 */ MCD_OPC_CheckField, 13, 3, 0, 75, 6, 0, // Skip to: 2707 /* 1096 */ MCD_OPC_Decode, 175, 3, 2, // Opcode: MSKQL /* 1100 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 1116 -/* 1105 */ MCD_OPC_CheckField, 13, 3, 0, 57, 6, 0, // Skip to: 2705 +/* 1105 */ MCD_OPC_CheckField, 13, 3, 0, 59, 6, 0, // Skip to: 2707 /* 1112 */ MCD_OPC_Decode, 219, 3, 2, // Opcode: SRLr /* 1116 */ MCD_OPC_FilterValue, 54, 11, 0, 0, // Skip to: 1132 -/* 1121 */ MCD_OPC_CheckField, 13, 3, 0, 41, 6, 0, // Skip to: 2705 +/* 1121 */ MCD_OPC_CheckField, 13, 3, 0, 43, 6, 0, // Skip to: 2707 /* 1128 */ MCD_OPC_Decode, 224, 2, 2, // Opcode: EXTQL /* 1132 */ MCD_OPC_FilterValue, 57, 11, 0, 0, // Skip to: 1148 -/* 1137 */ MCD_OPC_CheckField, 13, 3, 0, 25, 6, 0, // Skip to: 2705 +/* 1137 */ MCD_OPC_CheckField, 13, 3, 0, 27, 6, 0, // Skip to: 2707 /* 1144 */ MCD_OPC_Decode, 213, 3, 2, // Opcode: SLr /* 1148 */ MCD_OPC_FilterValue, 59, 11, 0, 0, // Skip to: 1164 -/* 1153 */ MCD_OPC_CheckField, 13, 3, 0, 9, 6, 0, // Skip to: 2705 +/* 1153 */ MCD_OPC_CheckField, 13, 3, 0, 11, 6, 0, // Skip to: 2707 /* 1160 */ MCD_OPC_Decode, 132, 3, 2, // Opcode: INSQL /* 1164 */ MCD_OPC_FilterValue, 60, 11, 0, 0, // Skip to: 1180 -/* 1169 */ MCD_OPC_CheckField, 13, 3, 0, 249, 5, 0, // Skip to: 2705 +/* 1169 */ MCD_OPC_CheckField, 13, 3, 0, 251, 5, 0, // Skip to: 2707 /* 1176 */ MCD_OPC_Decode, 217, 3, 2, // Opcode: SRAr /* 1180 */ MCD_OPC_FilterValue, 82, 11, 0, 0, // Skip to: 1196 -/* 1185 */ MCD_OPC_CheckField, 13, 3, 0, 233, 5, 0, // Skip to: 2705 +/* 1185 */ MCD_OPC_CheckField, 13, 3, 0, 235, 5, 0, // Skip to: 2707 /* 1192 */ MCD_OPC_Decode, 177, 3, 2, // Opcode: MSKWH /* 1196 */ MCD_OPC_FilterValue, 87, 11, 0, 0, // Skip to: 1212 -/* 1201 */ MCD_OPC_CheckField, 13, 3, 0, 217, 5, 0, // Skip to: 2705 +/* 1201 */ MCD_OPC_CheckField, 13, 3, 0, 219, 5, 0, // Skip to: 2707 /* 1208 */ MCD_OPC_Decode, 134, 3, 2, // Opcode: INSWH /* 1212 */ MCD_OPC_FilterValue, 90, 11, 0, 0, // Skip to: 1228 -/* 1217 */ MCD_OPC_CheckField, 13, 3, 0, 201, 5, 0, // Skip to: 2705 +/* 1217 */ MCD_OPC_CheckField, 13, 3, 0, 203, 5, 0, // Skip to: 2707 /* 1224 */ MCD_OPC_Decode, 226, 2, 2, // Opcode: EXTWH /* 1228 */ MCD_OPC_FilterValue, 98, 11, 0, 0, // Skip to: 1244 -/* 1233 */ MCD_OPC_CheckField, 13, 3, 0, 185, 5, 0, // Skip to: 2705 +/* 1233 */ MCD_OPC_CheckField, 13, 3, 0, 187, 5, 0, // Skip to: 2707 /* 1240 */ MCD_OPC_Decode, 169, 3, 2, // Opcode: MSKLH /* 1244 */ MCD_OPC_FilterValue, 103, 11, 0, 0, // Skip to: 1260 -/* 1249 */ MCD_OPC_CheckField, 13, 3, 0, 169, 5, 0, // Skip to: 2705 +/* 1249 */ MCD_OPC_CheckField, 13, 3, 0, 171, 5, 0, // Skip to: 2707 /* 1256 */ MCD_OPC_Decode, 254, 2, 2, // Opcode: INSLH /* 1260 */ MCD_OPC_FilterValue, 106, 11, 0, 0, // Skip to: 1276 -/* 1265 */ MCD_OPC_CheckField, 13, 3, 0, 153, 5, 0, // Skip to: 2705 +/* 1265 */ MCD_OPC_CheckField, 13, 3, 0, 155, 5, 0, // Skip to: 2707 /* 1272 */ MCD_OPC_Decode, 218, 2, 2, // Opcode: EXTLH /* 1276 */ MCD_OPC_FilterValue, 114, 11, 0, 0, // Skip to: 1292 -/* 1281 */ MCD_OPC_CheckField, 13, 3, 0, 137, 5, 0, // Skip to: 2705 +/* 1281 */ MCD_OPC_CheckField, 13, 3, 0, 139, 5, 0, // Skip to: 2707 /* 1288 */ MCD_OPC_Decode, 173, 3, 2, // Opcode: MSKQH /* 1292 */ MCD_OPC_FilterValue, 119, 11, 0, 0, // Skip to: 1308 -/* 1297 */ MCD_OPC_CheckField, 13, 3, 0, 121, 5, 0, // Skip to: 2705 +/* 1297 */ MCD_OPC_CheckField, 13, 3, 0, 123, 5, 0, // Skip to: 2707 /* 1304 */ MCD_OPC_Decode, 130, 3, 2, // Opcode: INSQH /* 1308 */ MCD_OPC_FilterValue, 122, 11, 0, 0, // Skip to: 1324 -/* 1313 */ MCD_OPC_CheckField, 13, 3, 0, 105, 5, 0, // Skip to: 2705 +/* 1313 */ MCD_OPC_CheckField, 13, 3, 0, 107, 5, 0, // Skip to: 2707 /* 1320 */ MCD_OPC_Decode, 222, 2, 2, // Opcode: EXTQH /* 1324 */ MCD_OPC_FilterValue, 130, 1, 4, 0, 0, // Skip to: 1334 /* 1330 */ MCD_OPC_Decode, 168, 3, 3, // Opcode: MSKBLi @@ -332,43 +332,43 @@ static const uint8_t DecoderTable32[] = { /* 1550 */ MCD_OPC_Decode, 174, 3, 3, // Opcode: MSKQHi /* 1554 */ MCD_OPC_FilterValue, 247, 1, 4, 0, 0, // Skip to: 1564 /* 1560 */ MCD_OPC_Decode, 131, 3, 3, // Opcode: INSQHi -/* 1564 */ MCD_OPC_FilterValue, 250, 1, 111, 4, 0, // Skip to: 2705 +/* 1564 */ MCD_OPC_FilterValue, 250, 1, 113, 4, 0, // Skip to: 2707 /* 1570 */ MCD_OPC_Decode, 223, 2, 3, // Opcode: EXTQHi /* 1574 */ MCD_OPC_FilterValue, 19, 81, 0, 0, // Skip to: 1660 /* 1579 */ MCD_OPC_ExtractField, 5, 8, // Inst{12-5} ... /* 1582 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 1598 -/* 1587 */ MCD_OPC_CheckField, 13, 3, 0, 87, 4, 0, // Skip to: 2705 +/* 1587 */ MCD_OPC_CheckField, 13, 3, 0, 89, 4, 0, // Skip to: 2707 /* 1594 */ MCD_OPC_Decode, 182, 3, 2, // Opcode: MULLr /* 1598 */ MCD_OPC_FilterValue, 32, 11, 0, 0, // Skip to: 1614 -/* 1603 */ MCD_OPC_CheckField, 13, 3, 0, 71, 4, 0, // Skip to: 2705 +/* 1603 */ MCD_OPC_CheckField, 13, 3, 0, 73, 4, 0, // Skip to: 2707 /* 1610 */ MCD_OPC_Decode, 184, 3, 2, // Opcode: MULQr /* 1614 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 1630 -/* 1619 */ MCD_OPC_CheckField, 13, 3, 0, 55, 4, 0, // Skip to: 2705 +/* 1619 */ MCD_OPC_CheckField, 13, 3, 0, 57, 4, 0, // Skip to: 2707 /* 1626 */ MCD_OPC_Decode, 243, 3, 2, // Opcode: UMULHr /* 1630 */ MCD_OPC_FilterValue, 128, 1, 4, 0, 0, // Skip to: 1640 /* 1636 */ MCD_OPC_Decode, 181, 3, 3, // Opcode: MULLi /* 1640 */ MCD_OPC_FilterValue, 160, 1, 4, 0, 0, // Skip to: 1650 /* 1646 */ MCD_OPC_Decode, 183, 3, 3, // Opcode: MULQi -/* 1650 */ MCD_OPC_FilterValue, 176, 1, 25, 4, 0, // Skip to: 2705 +/* 1650 */ MCD_OPC_FilterValue, 176, 1, 27, 4, 0, // Skip to: 2707 /* 1656 */ MCD_OPC_Decode, 242, 3, 3, // Opcode: UMULHi /* 1660 */ MCD_OPC_FilterValue, 20, 69, 0, 0, // Skip to: 1734 /* 1665 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 1668 */ MCD_OPC_FilterValue, 4, 11, 0, 0, // Skip to: 1684 -/* 1673 */ MCD_OPC_CheckField, 16, 5, 31, 1, 4, 0, // Skip to: 2705 +/* 1673 */ MCD_OPC_CheckField, 16, 5, 31, 3, 4, 0, // Skip to: 2707 /* 1680 */ MCD_OPC_Decode, 138, 3, 6, // Opcode: ITOFS /* 1684 */ MCD_OPC_FilterValue, 36, 11, 0, 0, // Skip to: 1700 -/* 1689 */ MCD_OPC_CheckField, 16, 5, 31, 241, 3, 0, // Skip to: 2705 +/* 1689 */ MCD_OPC_CheckField, 16, 5, 31, 243, 3, 0, // Skip to: 2707 /* 1696 */ MCD_OPC_Decode, 139, 3, 7, // Opcode: ITOFT /* 1700 */ MCD_OPC_FilterValue, 139, 11, 11, 0, 0, // Skip to: 1717 -/* 1706 */ MCD_OPC_CheckField, 21, 5, 31, 224, 3, 0, // Skip to: 2705 +/* 1706 */ MCD_OPC_CheckField, 21, 5, 31, 226, 3, 0, // Skip to: 2707 /* 1713 */ MCD_OPC_Decode, 214, 3, 8, // Opcode: SQRTS -/* 1717 */ MCD_OPC_FilterValue, 171, 11, 214, 3, 0, // Skip to: 2705 -/* 1723 */ MCD_OPC_CheckField, 21, 5, 31, 207, 3, 0, // Skip to: 2705 +/* 1717 */ MCD_OPC_FilterValue, 171, 11, 216, 3, 0, // Skip to: 2707 +/* 1723 */ MCD_OPC_CheckField, 21, 5, 31, 209, 3, 0, // Skip to: 2707 /* 1730 */ MCD_OPC_Decode, 215, 3, 9, // Opcode: SQRTT /* 1734 */ MCD_OPC_FilterValue, 22, 208, 0, 0, // Skip to: 1947 /* 1739 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 1742 */ MCD_OPC_FilterValue, 175, 10, 11, 0, 0, // Skip to: 1759 -/* 1748 */ MCD_OPC_CheckField, 21, 5, 31, 182, 3, 0, // Skip to: 2705 +/* 1748 */ MCD_OPC_CheckField, 21, 5, 31, 184, 3, 0, // Skip to: 2707 /* 1755 */ MCD_OPC_Decode, 208, 2, 9, // Opcode: CVTTQ /* 1759 */ MCD_OPC_FilterValue, 128, 11, 4, 0, 0, // Skip to: 1769 /* 1765 */ MCD_OPC_Decode, 139, 2, 10, // Opcode: ADDS @@ -395,16 +395,16 @@ static const uint8_t DecoderTable32[] = { /* 1869 */ MCD_OPC_FilterValue, 167, 11, 4, 0, 0, // Skip to: 1879 /* 1875 */ MCD_OPC_Decode, 182, 2, 11, // Opcode: CMPTLE /* 1879 */ MCD_OPC_FilterValue, 172, 13, 11, 0, 0, // Skip to: 1896 -/* 1885 */ MCD_OPC_CheckField, 21, 5, 31, 45, 3, 0, // Skip to: 2705 +/* 1885 */ MCD_OPC_CheckField, 21, 5, 31, 47, 3, 0, // Skip to: 2707 /* 1892 */ MCD_OPC_Decode, 207, 2, 12, // Opcode: CVTST /* 1896 */ MCD_OPC_FilterValue, 172, 15, 11, 0, 0, // Skip to: 1913 -/* 1902 */ MCD_OPC_CheckField, 21, 5, 31, 28, 3, 0, // Skip to: 2705 +/* 1902 */ MCD_OPC_CheckField, 21, 5, 31, 30, 3, 0, // Skip to: 2707 /* 1909 */ MCD_OPC_Decode, 209, 2, 13, // Opcode: CVTTS /* 1913 */ MCD_OPC_FilterValue, 188, 15, 11, 0, 0, // Skip to: 1930 -/* 1919 */ MCD_OPC_CheckField, 21, 5, 31, 11, 3, 0, // Skip to: 2705 +/* 1919 */ MCD_OPC_CheckField, 21, 5, 31, 13, 3, 0, // Skip to: 2707 /* 1926 */ MCD_OPC_Decode, 205, 2, 13, // Opcode: CVTQS -/* 1930 */ MCD_OPC_FilterValue, 190, 15, 1, 3, 0, // Skip to: 2705 -/* 1936 */ MCD_OPC_CheckField, 21, 5, 31, 250, 2, 0, // Skip to: 2705 +/* 1930 */ MCD_OPC_FilterValue, 190, 15, 3, 3, 0, // Skip to: 2707 +/* 1936 */ MCD_OPC_CheckField, 21, 5, 31, 252, 2, 0, // Skip to: 2707 /* 1943 */ MCD_OPC_Decode, 206, 2, 9, // Opcode: CVTQT /* 1947 */ MCD_OPC_FilterValue, 23, 84, 0, 0, // Skip to: 2036 /* 1952 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... @@ -424,141 +424,142 @@ static const uint8_t DecoderTable32[] = { /* 2014 */ MCD_OPC_Decode, 238, 2, 10, // Opcode: FCMOVGES /* 2018 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 2027 /* 2023 */ MCD_OPC_Decode, 242, 2, 10, // Opcode: FCMOVLES -/* 2027 */ MCD_OPC_FilterValue, 47, 161, 2, 0, // Skip to: 2705 +/* 2027 */ MCD_OPC_FilterValue, 47, 163, 2, 0, // Skip to: 2707 /* 2032 */ MCD_OPC_Decode, 240, 2, 10, // Opcode: FCMOVGTS -/* 2036 */ MCD_OPC_FilterValue, 24, 181, 0, 0, // Skip to: 2222 +/* 2036 */ MCD_OPC_FilterValue, 24, 174, 0, 0, // Skip to: 2215 /* 2041 */ MCD_OPC_ExtractField, 0, 16, // Inst{15-0} ... /* 2044 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 2060 -/* 2049 */ MCD_OPC_CheckField, 16, 10, 0, 137, 2, 0, // Skip to: 2705 +/* 2049 */ MCD_OPC_CheckField, 16, 10, 0, 139, 2, 0, // Skip to: 2707 /* 2056 */ MCD_OPC_Decode, 241, 3, 14, // Opcode: TRAPB /* 2060 */ MCD_OPC_FilterValue, 128, 8, 11, 0, 0, // Skip to: 2077 -/* 2066 */ MCD_OPC_CheckField, 16, 10, 0, 120, 2, 0, // Skip to: 2705 +/* 2066 */ MCD_OPC_CheckField, 16, 10, 0, 122, 2, 0, // Skip to: 2707 /* 2073 */ MCD_OPC_Decode, 215, 2, 14, // Opcode: EXCB /* 2077 */ MCD_OPC_FilterValue, 128, 128, 1, 11, 0, 0, // Skip to: 2095 -/* 2084 */ MCD_OPC_CheckField, 16, 10, 0, 102, 2, 0, // Skip to: 2705 +/* 2084 */ MCD_OPC_CheckField, 16, 10, 0, 104, 2, 0, // Skip to: 2707 /* 2091 */ MCD_OPC_Decode, 166, 3, 14, // Opcode: MB /* 2095 */ MCD_OPC_FilterValue, 128, 136, 1, 11, 0, 0, // Skip to: 2113 -/* 2102 */ MCD_OPC_CheckField, 16, 10, 0, 84, 2, 0, // Skip to: 2705 +/* 2102 */ MCD_OPC_CheckField, 16, 10, 0, 86, 2, 0, // Skip to: 2707 /* 2109 */ MCD_OPC_Decode, 246, 3, 14, // Opcode: WMB /* 2113 */ MCD_OPC_FilterValue, 128, 128, 2, 4, 0, 0, // Skip to: 2124 /* 2120 */ MCD_OPC_Decode, 248, 2, 15, // Opcode: FETCH /* 2124 */ MCD_OPC_FilterValue, 128, 192, 2, 4, 0, 0, // Skip to: 2135 /* 2131 */ MCD_OPC_Decode, 249, 2, 15, // Opcode: FETCH_M -/* 2135 */ MCD_OPC_FilterValue, 128, 128, 3, 11, 0, 0, // Skip to: 2153 -/* 2142 */ MCD_OPC_CheckField, 16, 5, 0, 44, 2, 0, // Skip to: 2705 -/* 2149 */ MCD_OPC_Decode, 192, 3, 16, // Opcode: RPCC -/* 2153 */ MCD_OPC_FilterValue, 128, 192, 3, 11, 0, 0, // Skip to: 2171 -/* 2160 */ MCD_OPC_CheckField, 16, 5, 0, 26, 2, 0, // Skip to: 2705 -/* 2167 */ MCD_OPC_Decode, 189, 3, 16, // Opcode: RC -/* 2171 */ MCD_OPC_FilterValue, 128, 208, 3, 4, 0, 0, // Skip to: 2182 -/* 2178 */ MCD_OPC_Decode, 212, 2, 15, // Opcode: ECB -/* 2182 */ MCD_OPC_FilterValue, 128, 224, 3, 11, 0, 0, // Skip to: 2200 -/* 2189 */ MCD_OPC_CheckField, 16, 5, 0, 253, 1, 0, // Skip to: 2705 -/* 2196 */ MCD_OPC_Decode, 193, 3, 16, // Opcode: RS -/* 2200 */ MCD_OPC_FilterValue, 128, 240, 3, 4, 0, 0, // Skip to: 2211 -/* 2207 */ MCD_OPC_Decode, 244, 3, 15, // Opcode: WH64 -/* 2211 */ MCD_OPC_FilterValue, 128, 248, 3, 231, 1, 0, // Skip to: 2705 -/* 2218 */ MCD_OPC_Decode, 245, 3, 15, // Opcode: WH64EN -/* 2222 */ MCD_OPC_FilterValue, 26, 101, 0, 0, // Skip to: 2328 -/* 2227 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... -/* 2230 */ MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 2253 -/* 2235 */ MCD_OPC_CheckField, 21, 5, 31, 207, 1, 0, // Skip to: 2705 -/* 2242 */ MCD_OPC_CheckField, 0, 14, 0, 200, 1, 0, // Skip to: 2705 -/* 2249 */ MCD_OPC_Decode, 140, 3, 17, // Opcode: JMP -/* 2253 */ MCD_OPC_FilterValue, 1, 37, 0, 0, // Skip to: 2295 -/* 2258 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... -/* 2261 */ MCD_OPC_FilterValue, 251, 5, 11, 0, 0, // Skip to: 2278 -/* 2267 */ MCD_OPC_CheckField, 0, 14, 0, 175, 1, 0, // Skip to: 2705 -/* 2274 */ MCD_OPC_Decode, 143, 3, 14, // Opcode: JSRs -/* 2278 */ MCD_OPC_FilterValue, 219, 6, 165, 1, 0, // Skip to: 2705 -/* 2284 */ MCD_OPC_CheckField, 0, 14, 0, 158, 1, 0, // Skip to: 2705 -/* 2291 */ MCD_OPC_Decode, 141, 3, 14, // Opcode: JSR -/* 2295 */ MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 2319 -/* 2300 */ MCD_OPC_CheckField, 16, 10, 250, 7, 141, 1, 0, // Skip to: 2705 -/* 2308 */ MCD_OPC_CheckField, 0, 14, 1, 134, 1, 0, // Skip to: 2705 -/* 2315 */ MCD_OPC_Decode, 190, 3, 14, // Opcode: RETDAG -/* 2319 */ MCD_OPC_FilterValue, 3, 125, 1, 0, // Skip to: 2705 -/* 2324 */ MCD_OPC_Decode, 142, 3, 18, // Opcode: JSR_COROUTINE -/* 2328 */ MCD_OPC_FilterValue, 28, 115, 0, 0, // Skip to: 2448 -/* 2333 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... -/* 2336 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 2352 -/* 2341 */ MCD_OPC_CheckField, 21, 5, 31, 101, 1, 0, // Skip to: 2705 -/* 2348 */ MCD_OPC_Decode, 210, 3, 19, // Opcode: SEXTB -/* 2352 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 2368 -/* 2357 */ MCD_OPC_CheckField, 21, 5, 31, 85, 1, 0, // Skip to: 2705 -/* 2364 */ MCD_OPC_Decode, 211, 3, 19, // Opcode: SEXTW -/* 2368 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2384 -/* 2373 */ MCD_OPC_CheckField, 21, 5, 31, 69, 1, 0, // Skip to: 2705 -/* 2380 */ MCD_OPC_Decode, 203, 2, 19, // Opcode: CTPOP -/* 2384 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 2400 -/* 2389 */ MCD_OPC_CheckField, 21, 5, 31, 53, 1, 0, // Skip to: 2705 -/* 2396 */ MCD_OPC_Decode, 202, 2, 19, // Opcode: CTLZ -/* 2400 */ MCD_OPC_FilterValue, 51, 11, 0, 0, // Skip to: 2416 -/* 2405 */ MCD_OPC_CheckField, 21, 5, 31, 37, 1, 0, // Skip to: 2705 -/* 2412 */ MCD_OPC_Decode, 204, 2, 19, // Opcode: CTTZ -/* 2416 */ MCD_OPC_FilterValue, 112, 11, 0, 0, // Skip to: 2432 -/* 2421 */ MCD_OPC_CheckField, 16, 5, 31, 21, 1, 0, // Skip to: 2705 -/* 2428 */ MCD_OPC_Decode, 251, 2, 20, // Opcode: FTOIT -/* 2432 */ MCD_OPC_FilterValue, 120, 12, 1, 0, // Skip to: 2705 -/* 2437 */ MCD_OPC_CheckField, 16, 5, 31, 5, 1, 0, // Skip to: 2705 -/* 2444 */ MCD_OPC_Decode, 250, 2, 21, // Opcode: FTOIS -/* 2448 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 2457 -/* 2453 */ MCD_OPC_Decode, 160, 3, 22, // Opcode: LDS -/* 2457 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 2466 -/* 2462 */ MCD_OPC_Decode, 162, 3, 23, // Opcode: LDT -/* 2466 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 2475 -/* 2471 */ MCD_OPC_Decode, 229, 3, 22, // Opcode: STS -/* 2475 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 2484 -/* 2480 */ MCD_OPC_Decode, 231, 3, 23, // Opcode: STT -/* 2484 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 2493 -/* 2489 */ MCD_OPC_Decode, 152, 3, 1, // Opcode: LDL -/* 2493 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 2502 -/* 2498 */ MCD_OPC_Decode, 155, 3, 1, // Opcode: LDQ -/* 2502 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 2511 -/* 2507 */ MCD_OPC_Decode, 153, 3, 1, // Opcode: LDL_L -/* 2511 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 2520 -/* 2516 */ MCD_OPC_Decode, 156, 3, 1, // Opcode: LDQ_L -/* 2520 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 2529 -/* 2525 */ MCD_OPC_Decode, 222, 3, 1, // Opcode: STL -/* 2529 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 2538 -/* 2534 */ MCD_OPC_Decode, 225, 3, 1, // Opcode: STQ -/* 2538 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 2547 -/* 2543 */ MCD_OPC_Decode, 223, 3, 24, // Opcode: STL_C -/* 2547 */ MCD_OPC_FilterValue, 47, 4, 0, 0, // Skip to: 2556 -/* 2552 */ MCD_OPC_Decode, 226, 3, 24, // Opcode: STQ_C -/* 2556 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2572 -/* 2561 */ MCD_OPC_CheckField, 21, 5, 31, 137, 0, 0, // Skip to: 2705 -/* 2568 */ MCD_OPC_Decode, 155, 2, 25, // Opcode: BR -/* 2572 */ MCD_OPC_FilterValue, 49, 4, 0, 0, // Skip to: 2581 -/* 2577 */ MCD_OPC_Decode, 230, 2, 26, // Opcode: FBEQ -/* 2581 */ MCD_OPC_FilterValue, 50, 4, 0, 0, // Skip to: 2590 -/* 2586 */ MCD_OPC_Decode, 234, 2, 26, // Opcode: FBLT -/* 2590 */ MCD_OPC_FilterValue, 51, 4, 0, 0, // Skip to: 2599 -/* 2595 */ MCD_OPC_Decode, 233, 2, 26, // Opcode: FBLE -/* 2599 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 2615 -/* 2604 */ MCD_OPC_CheckField, 21, 5, 26, 94, 0, 0, // Skip to: 2705 -/* 2611 */ MCD_OPC_Decode, 156, 2, 25, // Opcode: BSR -/* 2615 */ MCD_OPC_FilterValue, 54, 4, 0, 0, // Skip to: 2624 -/* 2620 */ MCD_OPC_Decode, 231, 2, 26, // Opcode: FBGE -/* 2624 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 2633 -/* 2629 */ MCD_OPC_Decode, 232, 2, 26, // Opcode: FBGT -/* 2633 */ MCD_OPC_FilterValue, 56, 4, 0, 0, // Skip to: 2642 -/* 2638 */ MCD_OPC_Decode, 150, 2, 27, // Opcode: BLBC -/* 2642 */ MCD_OPC_FilterValue, 57, 4, 0, 0, // Skip to: 2651 -/* 2647 */ MCD_OPC_Decode, 143, 2, 27, // Opcode: BEQ -/* 2651 */ MCD_OPC_FilterValue, 58, 4, 0, 0, // Skip to: 2660 -/* 2656 */ MCD_OPC_Decode, 153, 2, 27, // Opcode: BLT -/* 2660 */ MCD_OPC_FilterValue, 59, 4, 0, 0, // Skip to: 2669 -/* 2665 */ MCD_OPC_Decode, 152, 2, 27, // Opcode: BLE -/* 2669 */ MCD_OPC_FilterValue, 60, 4, 0, 0, // Skip to: 2678 -/* 2674 */ MCD_OPC_Decode, 151, 2, 27, // Opcode: BLBS -/* 2678 */ MCD_OPC_FilterValue, 61, 4, 0, 0, // Skip to: 2687 -/* 2683 */ MCD_OPC_Decode, 154, 2, 27, // Opcode: BNE -/* 2687 */ MCD_OPC_FilterValue, 62, 4, 0, 0, // Skip to: 2696 -/* 2692 */ MCD_OPC_Decode, 144, 2, 27, // Opcode: BGE -/* 2696 */ MCD_OPC_FilterValue, 63, 4, 0, 0, // Skip to: 2705 -/* 2701 */ MCD_OPC_Decode, 145, 2, 27, // Opcode: BGT -/* 2705 */ MCD_OPC_Fail, +/* 2135 */ MCD_OPC_FilterValue, 128, 128, 3, 4, 0, 0, // Skip to: 2146 +/* 2142 */ MCD_OPC_Decode, 192, 3, 15, // Opcode: RPCC +/* 2146 */ MCD_OPC_FilterValue, 128, 192, 3, 11, 0, 0, // Skip to: 2164 +/* 2153 */ MCD_OPC_CheckField, 16, 5, 0, 35, 2, 0, // Skip to: 2707 +/* 2160 */ MCD_OPC_Decode, 189, 3, 16, // Opcode: RC +/* 2164 */ MCD_OPC_FilterValue, 128, 208, 3, 4, 0, 0, // Skip to: 2175 +/* 2171 */ MCD_OPC_Decode, 212, 2, 15, // Opcode: ECB +/* 2175 */ MCD_OPC_FilterValue, 128, 224, 3, 11, 0, 0, // Skip to: 2193 +/* 2182 */ MCD_OPC_CheckField, 16, 5, 0, 6, 2, 0, // Skip to: 2707 +/* 2189 */ MCD_OPC_Decode, 193, 3, 16, // Opcode: RS +/* 2193 */ MCD_OPC_FilterValue, 128, 240, 3, 4, 0, 0, // Skip to: 2204 +/* 2200 */ MCD_OPC_Decode, 244, 3, 15, // Opcode: WH64 +/* 2204 */ MCD_OPC_FilterValue, 128, 248, 3, 240, 1, 0, // Skip to: 2707 +/* 2211 */ MCD_OPC_Decode, 245, 3, 15, // Opcode: WH64EN +/* 2215 */ MCD_OPC_FilterValue, 26, 101, 0, 0, // Skip to: 2321 +/* 2220 */ MCD_OPC_ExtractField, 14, 2, // Inst{15-14} ... +/* 2223 */ MCD_OPC_FilterValue, 0, 18, 0, 0, // Skip to: 2246 +/* 2228 */ MCD_OPC_CheckField, 21, 5, 31, 216, 1, 0, // Skip to: 2707 +/* 2235 */ MCD_OPC_CheckField, 0, 14, 0, 209, 1, 0, // Skip to: 2707 +/* 2242 */ MCD_OPC_Decode, 140, 3, 17, // Opcode: JMP +/* 2246 */ MCD_OPC_FilterValue, 1, 37, 0, 0, // Skip to: 2288 +/* 2251 */ MCD_OPC_ExtractField, 16, 10, // Inst{25-16} ... +/* 2254 */ MCD_OPC_FilterValue, 251, 5, 11, 0, 0, // Skip to: 2271 +/* 2260 */ MCD_OPC_CheckField, 0, 14, 0, 184, 1, 0, // Skip to: 2707 +/* 2267 */ MCD_OPC_Decode, 143, 3, 14, // Opcode: JSRs +/* 2271 */ MCD_OPC_FilterValue, 219, 6, 174, 1, 0, // Skip to: 2707 +/* 2277 */ MCD_OPC_CheckField, 0, 14, 0, 167, 1, 0, // Skip to: 2707 +/* 2284 */ MCD_OPC_Decode, 141, 3, 14, // Opcode: JSR +/* 2288 */ MCD_OPC_FilterValue, 2, 19, 0, 0, // Skip to: 2312 +/* 2293 */ MCD_OPC_CheckField, 16, 10, 250, 7, 150, 1, 0, // Skip to: 2707 +/* 2301 */ MCD_OPC_CheckField, 0, 14, 1, 143, 1, 0, // Skip to: 2707 +/* 2308 */ MCD_OPC_Decode, 190, 3, 14, // Opcode: RETDAG +/* 2312 */ MCD_OPC_FilterValue, 3, 134, 1, 0, // Skip to: 2707 +/* 2317 */ MCD_OPC_Decode, 142, 3, 18, // Opcode: JSR_COROUTINE +/* 2321 */ MCD_OPC_FilterValue, 28, 115, 0, 0, // Skip to: 2441 +/* 2326 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... +/* 2329 */ MCD_OPC_FilterValue, 0, 11, 0, 0, // Skip to: 2345 +/* 2334 */ MCD_OPC_CheckField, 21, 5, 31, 110, 1, 0, // Skip to: 2707 +/* 2341 */ MCD_OPC_Decode, 210, 3, 19, // Opcode: SEXTB +/* 2345 */ MCD_OPC_FilterValue, 1, 11, 0, 0, // Skip to: 2361 +/* 2350 */ MCD_OPC_CheckField, 21, 5, 31, 94, 1, 0, // Skip to: 2707 +/* 2357 */ MCD_OPC_Decode, 211, 3, 19, // Opcode: SEXTW +/* 2361 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2377 +/* 2366 */ MCD_OPC_CheckField, 21, 5, 31, 78, 1, 0, // Skip to: 2707 +/* 2373 */ MCD_OPC_Decode, 203, 2, 19, // Opcode: CTPOP +/* 2377 */ MCD_OPC_FilterValue, 50, 11, 0, 0, // Skip to: 2393 +/* 2382 */ MCD_OPC_CheckField, 21, 5, 31, 62, 1, 0, // Skip to: 2707 +/* 2389 */ MCD_OPC_Decode, 202, 2, 19, // Opcode: CTLZ +/* 2393 */ MCD_OPC_FilterValue, 51, 11, 0, 0, // Skip to: 2409 +/* 2398 */ MCD_OPC_CheckField, 21, 5, 31, 46, 1, 0, // Skip to: 2707 +/* 2405 */ MCD_OPC_Decode, 204, 2, 19, // Opcode: CTTZ +/* 2409 */ MCD_OPC_FilterValue, 112, 11, 0, 0, // Skip to: 2425 +/* 2414 */ MCD_OPC_CheckField, 16, 5, 31, 30, 1, 0, // Skip to: 2707 +/* 2421 */ MCD_OPC_Decode, 251, 2, 20, // Opcode: FTOIT +/* 2425 */ MCD_OPC_FilterValue, 120, 21, 1, 0, // Skip to: 2707 +/* 2430 */ MCD_OPC_CheckField, 16, 5, 31, 14, 1, 0, // Skip to: 2707 +/* 2437 */ MCD_OPC_Decode, 250, 2, 21, // Opcode: FTOIS +/* 2441 */ MCD_OPC_FilterValue, 34, 4, 0, 0, // Skip to: 2450 +/* 2446 */ MCD_OPC_Decode, 160, 3, 22, // Opcode: LDS +/* 2450 */ MCD_OPC_FilterValue, 35, 4, 0, 0, // Skip to: 2459 +/* 2455 */ MCD_OPC_Decode, 162, 3, 23, // Opcode: LDT +/* 2459 */ MCD_OPC_FilterValue, 38, 4, 0, 0, // Skip to: 2468 +/* 2464 */ MCD_OPC_Decode, 229, 3, 22, // Opcode: STS +/* 2468 */ MCD_OPC_FilterValue, 39, 4, 0, 0, // Skip to: 2477 +/* 2473 */ MCD_OPC_Decode, 231, 3, 23, // Opcode: STT +/* 2477 */ MCD_OPC_FilterValue, 40, 4, 0, 0, // Skip to: 2486 +/* 2482 */ MCD_OPC_Decode, 152, 3, 1, // Opcode: LDL +/* 2486 */ MCD_OPC_FilterValue, 41, 4, 0, 0, // Skip to: 2495 +/* 2491 */ MCD_OPC_Decode, 155, 3, 1, // Opcode: LDQ +/* 2495 */ MCD_OPC_FilterValue, 42, 4, 0, 0, // Skip to: 2504 +/* 2500 */ MCD_OPC_Decode, 153, 3, 1, // Opcode: LDL_L +/* 2504 */ MCD_OPC_FilterValue, 43, 4, 0, 0, // Skip to: 2513 +/* 2509 */ MCD_OPC_Decode, 156, 3, 1, // Opcode: LDQ_L +/* 2513 */ MCD_OPC_FilterValue, 44, 4, 0, 0, // Skip to: 2522 +/* 2518 */ MCD_OPC_Decode, 222, 3, 1, // Opcode: STL +/* 2522 */ MCD_OPC_FilterValue, 45, 4, 0, 0, // Skip to: 2531 +/* 2527 */ MCD_OPC_Decode, 225, 3, 1, // Opcode: STQ +/* 2531 */ MCD_OPC_FilterValue, 46, 4, 0, 0, // Skip to: 2540 +/* 2536 */ MCD_OPC_Decode, 223, 3, 24, // Opcode: STL_C +/* 2540 */ MCD_OPC_FilterValue, 47, 4, 0, 0, // Skip to: 2549 +/* 2545 */ MCD_OPC_Decode, 226, 3, 24, // Opcode: STQ_C +/* 2549 */ MCD_OPC_FilterValue, 48, 11, 0, 0, // Skip to: 2565 +/* 2554 */ MCD_OPC_CheckField, 21, 5, 31, 146, 0, 0, // Skip to: 2707 +/* 2561 */ MCD_OPC_Decode, 155, 2, 25, // Opcode: BR +/* 2565 */ MCD_OPC_FilterValue, 49, 4, 0, 0, // Skip to: 2574 +/* 2570 */ MCD_OPC_Decode, 230, 2, 26, // Opcode: FBEQ +/* 2574 */ MCD_OPC_FilterValue, 50, 4, 0, 0, // Skip to: 2583 +/* 2579 */ MCD_OPC_Decode, 234, 2, 26, // Opcode: FBLT +/* 2583 */ MCD_OPC_FilterValue, 51, 4, 0, 0, // Skip to: 2592 +/* 2588 */ MCD_OPC_Decode, 233, 2, 26, // Opcode: FBLE +/* 2592 */ MCD_OPC_FilterValue, 52, 11, 0, 0, // Skip to: 2608 +/* 2597 */ MCD_OPC_CheckField, 21, 5, 26, 103, 0, 0, // Skip to: 2707 +/* 2604 */ MCD_OPC_Decode, 156, 2, 25, // Opcode: BSR +/* 2608 */ MCD_OPC_FilterValue, 53, 4, 0, 0, // Skip to: 2617 +/* 2613 */ MCD_OPC_Decode, 235, 2, 26, // Opcode: FBNE +/* 2617 */ MCD_OPC_FilterValue, 54, 4, 0, 0, // Skip to: 2626 +/* 2622 */ MCD_OPC_Decode, 231, 2, 26, // Opcode: FBGE +/* 2626 */ MCD_OPC_FilterValue, 55, 4, 0, 0, // Skip to: 2635 +/* 2631 */ MCD_OPC_Decode, 232, 2, 26, // Opcode: FBGT +/* 2635 */ MCD_OPC_FilterValue, 56, 4, 0, 0, // Skip to: 2644 +/* 2640 */ MCD_OPC_Decode, 150, 2, 27, // Opcode: BLBC +/* 2644 */ MCD_OPC_FilterValue, 57, 4, 0, 0, // Skip to: 2653 +/* 2649 */ MCD_OPC_Decode, 143, 2, 27, // Opcode: BEQ +/* 2653 */ MCD_OPC_FilterValue, 58, 4, 0, 0, // Skip to: 2662 +/* 2658 */ MCD_OPC_Decode, 153, 2, 27, // Opcode: BLT +/* 2662 */ MCD_OPC_FilterValue, 59, 4, 0, 0, // Skip to: 2671 +/* 2667 */ MCD_OPC_Decode, 152, 2, 27, // Opcode: BLE +/* 2671 */ MCD_OPC_FilterValue, 60, 4, 0, 0, // Skip to: 2680 +/* 2676 */ MCD_OPC_Decode, 151, 2, 27, // Opcode: BLBS +/* 2680 */ MCD_OPC_FilterValue, 61, 4, 0, 0, // Skip to: 2689 +/* 2685 */ MCD_OPC_Decode, 154, 2, 27, // Opcode: BNE +/* 2689 */ MCD_OPC_FilterValue, 62, 4, 0, 0, // Skip to: 2698 +/* 2694 */ MCD_OPC_Decode, 144, 2, 27, // Opcode: BGE +/* 2698 */ MCD_OPC_FilterValue, 63, 4, 0, 0, // Skip to: 2707 +/* 2703 */ MCD_OPC_Decode, 145, 2, 27, // Opcode: BGT +/* 2707 */ MCD_OPC_Fail, 0 }; @@ -620,13 +621,6 @@ static const uint8_t DecoderTableCpysTs32[] = { 0 }; -static const uint8_t DecoderTableFb32[] = { -/* 0 */ MCD_OPC_CheckField, 26, 6, 54, 4, 0, 0, // Skip to: 11 -/* 7 */ MCD_OPC_Decode, 235, 2, 26, // Opcode: FBNE -/* 11 */ MCD_OPC_Fail, - 0 -}; - static const uint8_t DecoderTableFcmov32[] = { /* 0 */ MCD_OPC_ExtractField, 5, 11, // Inst{15-5} ... /* 3 */ MCD_OPC_FilterValue, 42, 11, 0, 0, // Skip to: 19 diff --git a/arch/Alpha/AlphaGenInstrInfo.inc b/arch/Alpha/AlphaGenInstrInfo.inc index 465df47b62..ec74f73221 100644 --- a/arch/Alpha/AlphaGenInstrInfo.inc +++ b/arch/Alpha/AlphaGenInstrInfo.inc @@ -1054,7 +1054,7 @@ static const MCInstrDesc AlphaInsts[] = { { 1, OperandInfo69 }, // Inst #445 = RC { 0, 0 }, // Inst #446 = RETDAG { 0, 0 }, // Inst #447 = RETDAGp - { 1, OperandInfo69 }, // Inst #448 = RPCC + { 2, OperandInfo58 }, // Inst #448 = RPCC { 1, OperandInfo69 }, // Inst #449 = RS { 3, OperandInfo48 }, // Inst #450 = S4ADDLi { 3, OperandInfo46 }, // Inst #451 = S4ADDLr diff --git a/cstool/cstool.c b/cstool/cstool.c index 053e41e118..297dd95bc1 100644 --- a/cstool/cstool.c +++ b/cstool/cstool.c @@ -209,6 +209,10 @@ static void usage(char *prog) printf(" aarch64be aarch64 + big endian\n"); } + if (cs_support(CS_ARCH_ALPHA)) { + printf(" alpha alpha\n"); + } + if (cs_support(CS_ARCH_MIPS)) { printf(" mips mips32 + little endian\n"); printf(" mipsbe mips32 + big endian\n"); @@ -321,10 +325,6 @@ static void usage(char *prog) printf(" tc162 tricore V1.6.2\n"); } - if (cs_support(CS_ARCH_ALPHA)) { - printf(" alpha: Alpha\n"); - } - printf("\nExtra options:\n"); printf(" -d show detailed information of the instructions\n"); printf(" -r show detailed information of the real instructions (even for alias)\n"); diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index 00d7d3bb62..56aba680b1 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -219,9 +219,9 @@ typedef enum alpha_insn { Alpha_INS_LDAH, Alpha_INS_LDBU, Alpha_INS_LDL, - Alpha_INS_LDLsL, + Alpha_INS_LDL_L, Alpha_INS_LDQ, - Alpha_INS_LDQsL, + Alpha_INS_LDQ_L, Alpha_INS_LDQ_U, Alpha_INS_LDS, Alpha_INS_LDT, @@ -260,9 +260,9 @@ typedef enum alpha_insn { Alpha_INS_SRL, Alpha_INS_STB, Alpha_INS_STL, - Alpha_INS_STLsL, + Alpha_INS_STL_C, Alpha_INS_STQ, - Alpha_INS_STQsL, + Alpha_INS_STQ_C, Alpha_INS_STQ_U, Alpha_INS_STS, Alpha_INS_STT, From 20d395b21d8a3d717e8bc024a41704c9f19ab80c Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 23 Jul 2023 17:17:18 +0300 Subject: [PATCH 06/26] Add test for all alpha instructions --- suite/MC/Alpha/insn-alpha.s.cs | 199 +++++++++++++++++++++++++++++++++ 1 file changed, 199 insertions(+) create mode 100644 suite/MC/Alpha/insn-alpha.s.cs diff --git a/suite/MC/Alpha/insn-alpha.s.cs b/suite/MC/Alpha/insn-alpha.s.cs new file mode 100644 index 0000000000..e530fab86c --- /dev/null +++ b/suite/MC/Alpha/insn-alpha.s.cs @@ -0,0 +1,199 @@ +# CS_ARCH_ALPHA, 0, None +0x03,0x00,0x22,0x40 = addl $1,$2,$3 +0x03,0xd0,0x3b,0x40 = addl $1,0xde,$3 +0x03,0x04,0x22,0x40 = addq $1,$2,$3 +0x03,0xd4,0x3b,0x40 = addq $1,0xde,$3 +0x03,0xb0,0x22,0x58 = adds/su $f1,$f10,$f11 +0x03,0xb4,0x22,0x58 = addt/su $f1,$f10,$f11 +0x03,0x00,0x22,0x44 = and $1,$2,$3 +0x03,0xd0,0x3b,0x44 = and $1,0xde,$3 +0xfc,0x3f,0x20,0xe4 = beq $1,0x3ffc +0xfc,0x3f,0x20,0xf8 = bge $1,0x3ffc +0xfc,0x3f,0x20,0xfc = bgt $1,0x3ffc +0x03,0x01,0x22,0x44 = bic $1,$2,$3 +0x03,0xd1,0x3b,0x44 = bic $1,0xde,$3 +0x03,0x04,0x22,0x44 = bis $1,$2,$3 +0x03,0xd4,0x3b,0x44 = bis $1,0xde,$3 +0xfc,0x3f,0x20,0xe0 = blbc $1,0x3ffc +0xfc,0x3f,0x20,0xf0 = blbs $1,0x3ffc +0xfc,0x3f,0x20,0xec = ble $1,0x3ffc +0xfc,0x3f,0x20,0xe8 = blt $1,0x3ffc +0xfc,0x3f,0x20,0xf4 = bne $1,0x3ffc +0xfc,0x3f,0xe0,0xc3 = br $31,0x3ffc +0xfc,0x3f,0x40,0xd3 = bsr $26,$0x3ffc ..ng +0x83,0x04,0x22,0x44 = cmoveq $1,$2,$3 +0xc3,0x08,0x22,0x44 = cmovge $1,$2,$3 +0xc3,0x0c,0x22,0x44 = cmovgt $1,$2,$3 +0xc3,0x02,0x22,0x44 = cmovlbc $1,$2,$3 +0x83,0x02,0x22,0x44 = cmovlbs $1,$2,$3 +0x83,0x0c,0x22,0x44 = cmovle $1,$2,$3 +0x83,0x08,0x22,0x44 = cmovlt $1,$2,$3 +0xc3,0x04,0x22,0x44 = cmovne $1,$2,$3 +0xe3,0x01,0x22,0x40 = cmpbge $1,$2,$3 +0xe3,0xd1,0x3b,0x40 = cmpbge $1,0xde,$3 +0xa3,0x05,0x22,0x40 = cmpeq $1,$2,$3 +0xa3,0xd5,0x3b,0x40 = cmpeq $1,0xde,$3 +0xa3,0x0d,0x22,0x40 = cmple $1,$2,$3 +0xa3,0xdd,0x3b,0x40 = cmple $1,0xde,$3 +0xa3,0x09,0x22,0x40 = cmplt $1,$2,$3 +0xa3,0xd9,0x3b,0x40 = cmplt $1,0xde,$3 +0xa3,0xb4,0x22,0x58 = cmpteq/su $f1,$f10,$f11 +0xe3,0xb4,0x22,0x58 = cmptle/su $f1,$f10,$f11 +0xc3,0xb4,0x22,0x58 = cmptlt/su $f1,$f10,$f11 +0x83,0xb4,0x22,0x58 = cmptun/su $f1,$f10,$f11 +0xa3,0x07,0x22,0x40 = cmpule $1,$2,$3 +0xa3,0xd7,0x3b,0x40 = cmpule $1,0xde,$3 +0xa3,0x03,0x22,0x40 = cmpult $1,$2,$3 +0xa3,0xd3,0x3b,0x40 = cmpult $1,0xde,$3 +0x43,0x04,0x22,0x5c = cpyse $f1,$f10,$f11 +0x23,0x04,0x22,0x5c = cpysn $f1,$f10,$f11 +0x03,0x04,0x22,0x5c = cpys $f1,$f10,$f11 +0x42,0x06,0xe1,0x73 = ctlz $1,$2 +0x02,0x06,0xe1,0x73 = ctpop $1,$2 +0x62,0x06,0xe1,0x73 = cttz $1,$2 +0x82,0xf7,0xe1,0x5b = cvtqs/sui $f1,$f10 +0xc2,0xf7,0xe1,0x5b = cvtqt/sui $f1,$f10 +0x82,0xd5,0xe1,0x5b = cvtst/s $f1,$f10 +0xe2,0xa5,0xe1,0x5b = cvttq/svc $f1,$f10 +0x82,0xf5,0xe1,0x5b = cvtts/sui $f1,$f10 +0x63,0xb0,0x22,0x58 = divs/su $f1,$f10,$f11 +0x63,0xb4,0x22,0x58 = divt/su $f1,$f10,$f11 +0x00,0xe8,0xe1,0x63 = ecb ($1) +0x03,0x09,0x22,0x44 = eqv $1,$2,$3 +0x03,0xd9,0x3b,0x44 = eqv $1,0xde,$3 +0x00,0x04,0x00,0x60 = excb +0xc3,0x00,0x22,0x48 = extbl $1,$2,$3 +0xc3,0xd0,0x3b,0x48 = extbl $1,0xde,$3 +0x43,0x0d,0x22,0x48 = extlh $1,$2,$3 +0x43,0xdd,0x3b,0x48 = extlh $1,0xde,$3 +0xc3,0x04,0x22,0x48 = extll $1,$2,$3 +0xc3,0xd4,0x3b,0x48 = extll $1,0xde,$3 +0x43,0x0f,0x22,0x48 = extqh $1,$2,$3 +0x43,0xdf,0x3b,0x48 = extqh $1,0xde,$3 +0xc3,0x06,0x22,0x48 = extql $1,$2,$3 +0xc3,0xd6,0x3b,0x48 = extql $1,0xde,$3 +0x43,0x0b,0x22,0x48 = extwh $1,$2,$3 +0x43,0xdb,0x3b,0x48 = extwh $1,0xde,$3 +0xc3,0x02,0x22,0x48 = extwl $1,$2,$3 +0xc3,0xd2,0x3b,0x48 = extwl $1,0xde,$3 +0xfc,0x3f,0x20,0xc4 = fbeq $f1,0x3ffc +0xfc,0x3f,0x20,0xd8 = fbge $f1,0x3ffc +0xfc,0x3f,0x20,0xdc = fbgt $f1,0x3ffc +0xfc,0x3f,0x20,0xcc = fble $f1,0x3ffc +0xfc,0x3f,0x20,0xc8 = fblt $f1,0x3ffc +0xfc,0x3f,0x20,0xd4 = fbne $f1,0x3ffc +0x43,0x05,0x22,0x5c = fcmoveq ,$f10,$f11 +0xa3,0x05,0x22,0x5c = fcmovge ,$f10,$f11 +0xe3,0x05,0x22,0x5c = fcmovgt ,$f10,$f11 +0xc3,0x05,0x22,0x5c = fcmovle ,$f10,$f11 +0x83,0x05,0x22,0x5c = fcmovlt ,$f10,$f11 +0x63,0x05,0x22,0x5c = fcmovne ,$f10,$f11 +0x00,0x80,0xe1,0x63 = fetch ($1) +0x00,0xa0,0xe1,0x63 = fetch_m ($1) +0x01,0x0f,0x3f,0x70 = ftois $f1,$1 +0x01,0x0e,0x3f,0x70 = ftoit $f1,$1 +0x63,0x01,0x22,0x48 = insbl $1,$2,$3 +0x63,0xd1,0x3b,0x48 = insbl $1,0xde,$3 +0xe3,0x0c,0x22,0x48 = inslh $1,$2,$3 +0xe3,0xdc,0x3b,0x48 = inslh $1,0xde,$3 +0x63,0x05,0x22,0x48 = insll $1,$2,$3 +0x63,0xd5,0x3b,0x48 = insll $1,0xde,$3 +0xe3,0x0e,0x22,0x48 = insqh $1,$2,$3 +0xe3,0xde,0x3b,0x48 = insqh $1,0xde,$3 +0x63,0x07,0x22,0x48 = insql $1,$2,$3 +0x63,0xd7,0x3b,0x48 = insql $1,0xde,$3 +0xe3,0x0a,0x22,0x48 = inswh $1,$2,$3 +0xe3,0xda,0x3b,0x48 = inswh $1,0xde,$3 +0x63,0x03,0x22,0x48 = inswl $1,$2,$3 +0x63,0xd3,0x3b,0x48 = inswl $1,0xde,$3 +0x81,0x00,0x3f,0x50 = itofs $1,$f1 +0x81,0x04,0x3f,0x50 = itoft $1,$f1 +0x00,0x00,0xfa,0x6b = jmp $31,$12,0 +0x00,0x40,0x5b,0x6b = jsr $26,($27),0 +0xff,0xcf,0x22,0x68 = jsr_coroutine $1,($2),0xfff +0x10,0x00,0x22,0x20 = lda $1,0x10($2) +0x10,0x00,0x22,0x24 = ldah $1,0x10($2) +0x10,0x00,0x22,0x28 = ldbu $1,0x10($2) +0x10,0x00,0x22,0xa0 = ldl $1,0x10($2) +0x10,0x00,0x22,0xa8 = ldl_l $1,0x10($2) +0x10,0x00,0x22,0xa4 = ldq $1,0x10($2) +0x10,0x00,0x22,0xac = ldq_l $1,0x10($2) +0x10,0x00,0x22,0x2c = ldq_u $1,0x10($2) +0x10,0x00,0x22,0x88 = lds $f1,0x10($2) +0x10,0x00,0x22,0x8c = ldt $f1,0x10($2) +0x10,0x00,0x22,0x30 = ldwu $1,0x10($2) +0x00,0x40,0x00,0x60 = mb +0x43,0x00,0x22,0x48 = mskbl $1,$2,$3 +0x43,0xd0,0x3b,0x48 = mskbl $1,0xde,$3 +0x43,0x0c,0x22,0x48 = msklh $1,$2,$3 +0x43,0xdc,0x3b,0x48 = msklh $1,0xde,$3 +0x43,0x04,0x22,0x48 = mskll $1,$2,$3 +0x43,0xd4,0x3b,0x48 = mskll $1,0xde,$3 +0x43,0x0e,0x22,0x48 = mskqh $1,$2,$3 +0x43,0xde,0x3b,0x48 = mskqh $1,0xde,$3 +0x43,0x06,0x22,0x48 = mskql $1,$2,$3 +0x43,0xd6,0x3b,0x48 = mskql $1,0xde,$3 +0x43,0x0a,0x22,0x48 = mskwh $1,$2,$3 +0x43,0xda,0x3b,0x48 = mskwh $1,0xde,$3 +0x43,0x02,0x22,0x48 = mskwl $1,$2,$3 +0x43,0xd2,0x3b,0x48 = mskwl $1,0xde,$3 +0x03,0x00,0x22,0x4c = mull $1,$2,$3 +0x03,0xd0,0x3b,0x4c = mull $1,0xde,$3 +0x03,0x04,0x22,0x4c = mulq $1,$2,$3 +0x03,0xd4,0x3b,0x4c = mulq $1,0xde,$3 +0x43,0xb0,0x22,0x58 = muls/su $f1,$f10,$f11 +0x43,0xb4,0x22,0x58 = mult/su $f1,$f10,$f11 +0x03,0x05,0x22,0x44 = ornot $1,$2,$3 +0x03,0xd5,0x3b,0x44 = ornot $1,0xde,$3 +0x00,0xe0,0x20,0x60 = rc $1 +0x01,0x80,0xfa,0x6b = ret $31,($26),1 +0x00,0xc0,0x1f,0x60 = rpcc $1 +0x00,0xf0,0x20,0x60 = rs $1 +0x43,0x00,0x22,0x40 = s4addl $1,$2,$3 +0x43,0xd0,0x3b,0x40 = s4addl $1,0xde,$3 +0x63,0x01,0x22,0x40 = s4subl $1,$2,$3 +0x63,0xd1,0x3b,0x40 = s4subl $1,0xde,$3 +0x63,0x05,0x22,0x40 = s4subq $1,$2,$3 +0x63,0xd5,0x3b,0x40 = s4subq $1,0xde,$3 +0x43,0x02,0x22,0x40 = s8addl $1,$2,$3 +0x43,0xd2,0x3b,0x40 = s8addl $1,0xde,$3 +0x43,0x06,0x22,0x40 = s8addq $1,$2,$3 +0x43,0xd6,0x3b,0x40 = s8addq $1,0xde,$3 +0x63,0x03,0x22,0x40 = s8subl $1,$2,$3 +0x63,0xd3,0x3b,0x40 = s8subl $1,0xde,$3 +0x63,0x07,0x22,0x40 = s8subq $1,$2,$3 +0x63,0xd7,0x3b,0x40 = s8subq $1,0xde,$3 +0x02,0x00,0xe1,0x73 = sextb $1,$2 +0x22,0x00,0xe1,0x73 = sextw $1,$2 +0x23,0x07,0x22,0x48 = sll $1,$2,$3 +0x23,0xd7,0x3b,0x48 = sll $1,0xde,$3 +0x62,0xb1,0xe1,0x53 = sqrts/su $f1,$f10 +0x62,0xb5,0xe1,0x53 = sqrtt/su $f1,$f10 +0x83,0x07,0x22,0x48 = sra $1,$2,$3 +0x83,0xd7,0x3b,0x48 = sra $1,0xde,$3 +0x83,0x06,0x22,0x48 = srl $1,$2,$3 +0x83,0xd6,0x3b,0x48 = srl $1,0xde,$3 +0x10,0x00,0x22,0x38 = stb $1, 0x10($2) +0x10,0x00,0x22,0xb0 = stl $1,0x10($2) +0x10,0x00,0x22,0xb8 = stl_c $1,0x10($2) +0x10,0x00,0x22,0xb4 = stq $1,0x10($2) +0x10,0x00,0x22,0xbc = stq_c $1,0x10($2) +0x10,0x00,0x22,0x3c = stq_u $1, 0x10($2) +0x10,0x00,0x22,0x98 = sts $f1,0x10($2) +0x10,0x00,0x22,0x9c = stt $f1,0x10($2) +0x10,0x00,0x22,0x34 = stw $1,0x10($2) +0x23,0x01,0x22,0x40 = subl $1,$2,$3 +0x23,0xd1,0x3b,0x40 = subl $1,0xde,$3 +0x23,0x05,0x22,0x40 = subq $1,$2,$3 +0x23,0xd5,0x3b,0x40 = subq $1,0xde,$3 +0x23,0xb0,0x22,0x58 = subs/su $f1,$f10,$f11 +0x23,0xb4,0x22,0x58 = subt/su $f1,$f10,$f11 +0x00,0x00,0x00,0x60 = trapb +0x03,0x06,0x22,0x4c = umulh $1,$2,$3 +0x03,0xd6,0x3b,0x4c = umulh $1,0xde,$3 +0x00,0xf8,0xe1,0x63 = wh64 ($1) +0x00,0xfc,0xe1,0x63 = wh64en ($1) +0x00,0x44,0x00,0x60 = wmb +0x03,0x08,0x22,0x44 = xor $1,$2,$3 +0x03,0xd8,0x3b,0x44 = xor $1,0xde,$3 +0x23,0xd6,0x3b,0x48 = zapnot $1,0xde,$3 \ No newline at end of file From 612b732bfc9bbe64f99433415b3a320ba5d544a7 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 6 Aug 2023 15:32:52 +0300 Subject: [PATCH 07/26] Refactor Alpha files --- CMakeLists.txt | 3 + Mapping.h | 2 + arch/Alpha/AlphaDisassembler.c | 85 +- arch/Alpha/AlphaDisassembler.h | 9 +- arch/Alpha/AlphaGenAsmWriter.inc | 974 +++++++-------- arch/Alpha/AlphaGenCSFeatureName.inc | 6 +- arch/Alpha/AlphaGenCSMappingInsn.inc | 1261 +++++++++++-------- arch/Alpha/AlphaGenCSMappingInsnName.inc | 6 +- arch/Alpha/AlphaGenCSMappingInsnOp.inc | 1388 ++++++++++----------- arch/Alpha/AlphaGenCSOpGroup.inc | 6 +- arch/Alpha/AlphaGenDisassemblerTables.inc | 6 +- arch/Alpha/AlphaGenInstrInfo.inc | 206 +-- arch/Alpha/AlphaGenRegisterInfo.inc | 6 +- arch/Alpha/AlphaGenSubtargetInfo.inc | 6 +- arch/Alpha/AlphaInstPrinter.c | 44 +- arch/Alpha/AlphaLinkage.h | 7 +- arch/Alpha/AlphaMapping.c | 113 +- arch/Alpha/AlphaMapping.h | 13 + include/capstone/alpha.h | 2 + suite/MC/Alpha/insn-alpha.s.cs | 32 +- 20 files changed, 2235 insertions(+), 1940 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0a7ba4607a..132641681b 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -587,6 +587,9 @@ if (CAPSTONE_ALPHA_SUPPORT) arch/Alpha/AlphaLinkage.h arch/Alpha/AlphaMapping.h arch/Alpha/AlphaModule.h + arch/Alpha/AlphaGenCSMappingInsnOp.inc + arch/Alpha/AlphaGenCSMappingInsn.inc + arch/Alpha/AlphaGenCSMappingInsnName.inc ) set(TEST_SOURCES ${TEST_SOURCES} test_alpha.c) endif () diff --git a/Mapping.h b/Mapping.h index bcfa9becb9..31e7231d0a 100644 --- a/Mapping.h +++ b/Mapping.h @@ -121,6 +121,7 @@ DECL_get_detail_op(arm, ARM); DECL_get_detail_op(ppc, PPC); DECL_get_detail_op(tricore, TriCore); DECL_get_detail_op(aarch64, AArch64); +DECL_get_detail_op(alpha, Alpha); /// Increments the detail->arch.op_count by one. #define DEFINE_inc_detail_op_count(arch, ARCH) \ @@ -245,6 +246,7 @@ static inline void set_doing_mem(const MCInst *MI, bool status) DEFINE_get_arch_detail(arm, ARM); DEFINE_get_arch_detail(ppc, PPC); DEFINE_get_arch_detail(aarch64, AArch64); +DEFINE_get_arch_detail(alpha, Alpha); static inline bool detail_is_set(const MCInst *MI) { diff --git a/arch/Alpha/AlphaDisassembler.c b/arch/Alpha/AlphaDisassembler.c index 5e28f31157..5c7c3413db 100644 --- a/arch/Alpha/AlphaDisassembler.c +++ b/arch/Alpha/AlphaDisassembler.c @@ -10,22 +10,22 @@ #include "../../utils.h" #include "../../MCFixedLenDisassembler.h" -#include "../../MCDisassembler.h" +#include "../../Mapping.h" #include "AlphaDisassembler.h" #include "AlphaLinkage.h" static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder); + uint64_t Address, + const void *Decoder); static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder); - + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder); + uint64_t Address, + const void *Decoder); #include "AlphaGenDisassemblerTables.inc" @@ -35,10 +35,10 @@ static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, #include "AlphaGenRegisterInfo.inc" static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder) + uint64_t Address, + const void *Decoder) { - if (RegNo > 31) + if (RegNo > 31) return MCDisassembler_Fail; unsigned Register = GPRC[RegNo]; @@ -47,10 +47,10 @@ static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, unsigned RegNo, } static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder) + uint64_t Address, + const void *Decoder) { - if (RegNo > 31) + if (RegNo > 31) return MCDisassembler_Fail; unsigned Register = F4RC[RegNo]; @@ -59,10 +59,10 @@ static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, unsigned RegNo, } static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder) + uint64_t Address, + const void *Decoder) { - if (RegNo > 31) + if (RegNo > 31) return MCDisassembler_Fail; unsigned Register = F8RC[RegNo]; @@ -74,49 +74,40 @@ static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, unsigned RegNo, #include "AlphaGenInstrInfo.inc" -static inline bool tryGetInstruction32(const uint8_t *code, size_t code_len, - MCInst *MI, uint16_t *size, - uint64_t address, void *info, - const uint8_t *decoderTable32) +DecodeStatus Alpha_LLVM_getInstruction(csh handle, const uint8_t *Bytes, + size_t ByteLen, MCInst *MI, + uint16_t *Size, uint64_t Address, + void *Info) { - uint32_t insn = readBytes32(MI, code); - DecodeStatus Result; - - // Calling the auto-generated decoder function. - Result = decodeInstruction_4(decoderTable32, MI, insn, address, NULL); - if (Result != MCDisassembler_Fail) { - *size = 4; - return true; + if (!handle) { + return MCDisassembler_Fail; } - return false; -} -bool Alpha_getInstruction(csh handle, const uint8_t *Bytes, size_t ByteLen, - MCInst *MI, uint16_t *Size, uint64_t Address, - void *Info) -{ - if (!handle) { - return false; + if (ByteLen < 4) { + *Size = 0; + return MCDisassembler_Fail; } - if (MI->flat_insn->detail) { - memset(MI->flat_insn->detail, 0, sizeof(cs_detail)); - } + uint32_t Insn = readBytes32(MI, Bytes); + // Calling the auto-generated decoder function. + DecodeStatus Result = + decodeInstruction_4(DecoderTable32, MI, Insn, Address, NULL); - if (ByteLen < 4) { - return MCDisassembler_Fail; + if (Result != MCDisassembler_Fail) { + *Size = 4; + return Result; } - return tryGetInstruction32(Bytes, ByteLen, MI, Size, Address, Info, - DecoderTable32); + *Size = 4; + return MCDisassembler_Fail; } void Alpha_init(MCRegisterInfo *MRI) { MCRegisterInfo_InitMCRegisterInfo( - MRI, AlphaRegDesc, ARR_SIZE(AlphaRegDesc), 0, 0, - AlphaMCRegisterClasses, ARR_SIZE(AlphaMCRegisterClasses), 0, - 0, AlphaRegDiffLists, 0, AlphaSubRegIdxLists, 1, 0); + MRI, AlphaRegDesc, ARR_SIZE(AlphaRegDesc), 0, 0, AlphaMCRegisterClasses, + ARR_SIZE(AlphaMCRegisterClasses), 0, 0, AlphaRegDiffLists, 0, + AlphaSubRegIdxLists, 1, 0); } #endif \ No newline at end of file diff --git a/arch/Alpha/AlphaDisassembler.h b/arch/Alpha/AlphaDisassembler.h index 9bc20c9dc8..72b08c509b 100644 --- a/arch/Alpha/AlphaDisassembler.h +++ b/arch/Alpha/AlphaDisassembler.h @@ -8,14 +8,11 @@ #include #endif -#include -#include "../../MCRegisterInfo.h" +#include "../../MCDisassembler.h" #include "../../MCInst.h" +#include "../../MCRegisterInfo.h" +#include void Alpha_init(MCRegisterInfo *MRI); -bool Alpha_getInstruction(csh ud, const uint8_t *code, size_t code_len, - MCInst *instr, uint16_t *size, uint64_t address, - void *info); - #endif // CS_ALPHADISASSEMBLER_H \ No newline at end of file diff --git a/arch/Alpha/AlphaGenAsmWriter.inc b/arch/Alpha/AlphaGenAsmWriter.inc index 76bc5e2a3c..fcb3fcf0fc 100644 --- a/arch/Alpha/AlphaGenAsmWriter.inc +++ b/arch/Alpha/AlphaGenAsmWriter.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ @@ -430,259 +430,259 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // G_UBFX 2049U, // ADJUSTSTACKDOWN 2060U, // ADJUSTSTACKUP - 11128U, // ALTENT + 19320U, // ALTENT 0U, // CAS32 0U, // CAS64 0U, // LAS32 0U, // LAS64 - 19322U, // MEMLABEL - 27899U, // PCLABEL + 35706U, // MEMLABEL + 52475U, // PCLABEL 0U, // SWAP32 0U, // SWAP64 1300U, // WTF - 37219U, // ADDLi - 37219U, // ADDLr - 37349U, // ADDQi - 37349U, // ADDQr - 37615U, // ADDS - 37661U, // ADDT - 36962U, // ANDi - 36962U, // ANDr - 35321U, // BEQ - 34920U, // BGE - 35434U, // BGT - 36942U, // BICi - 36942U, // BICr - 37442U, // BISi - 37442U, // BISr - 34873U, // BLBC - 35367U, // BLBS - 34943U, // BLE - 35456U, // BLT - 34973U, // BNE - 2997U, // BR - 43888U, // BSR - 37382U, // CMOVEQi - 37382U, // CMOVEQr - 36982U, // CMOVGEi - 36982U, // CMOVGEr - 37488U, // CMOVGTi - 37488U, // CMOVGTr - 36927U, // CMOVLBCi - 36927U, // CMOVLBCr - 37421U, // CMOVLBSi - 37421U, // CMOVLBSr - 37012U, // CMOVLEi - 37012U, // CMOVLEr - 37525U, // CMOVLTi - 37525U, // CMOVLTr - 37042U, // CMOVNEi - 37042U, // CMOVNEr - 36973U, // CMPBGE - 36973U, // CMPBGEi - 37374U, // CMPEQ - 37374U, // CMPEQi - 36996U, // CMPLE - 36996U, // CMPLEi - 37509U, // CMPLT - 37509U, // CMPLTi - 37595U, // CMPTEQ - 37573U, // CMPTLE - 37670U, // CMPTLT - 37584U, // CMPTUN - 37003U, // CMPULE - 37003U, // CMPULEi - 37516U, // CMPULT - 37516U, // CMPULTi - 52353U, // COND_BRANCH_F - 60545U, // COND_BRANCH_I - 37050U, // CPYSES - 37050U, // CPYSESt - 37050U, // CPYSET - 37317U, // CPYSNS - 37317U, // CPYSNSt - 37317U, // CPYSNT - 37317U, // CPYSNTs - 37463U, // CPYSS - 37463U, // CPYSSt - 37463U, // CPYST - 37463U, // CPYSTs - 37732U, // CTLZ - 37324U, // CTPOP - 37738U, // CTTZ - 37133U, // CVTQS - 37155U, // CVTQT - 37406U, // CVTST - 36951U, // CVTTQ - 37144U, // CVTTS - 37643U, // DIVS - 37700U, // DIVT + 4451U, // ADDLi + 4451U, // ADDLr + 4581U, // ADDQi + 4581U, // ADDQr + 4847U, // ADDS + 4893U, // ADDT + 4194U, // ANDi + 4194U, // ANDr + 2553U, // BEQ + 2152U, // BGE + 2666U, // BGT + 4174U, // BICi + 4174U, // BICr + 4674U, // BISi + 4674U, // BISr + 2105U, // BLBC + 2599U, // BLBS + 2175U, // BLE + 2688U, // BLT + 2205U, // BNE + 7093U, // BR + 23408U, // BSR + 4614U, // CMOVEQi + 4614U, // CMOVEQr + 4214U, // CMOVGEi + 4214U, // CMOVGEr + 4720U, // CMOVGTi + 4720U, // CMOVGTr + 4159U, // CMOVLBCi + 4159U, // CMOVLBCr + 4653U, // CMOVLBSi + 4653U, // CMOVLBSr + 4244U, // CMOVLEi + 4244U, // CMOVLEr + 4757U, // CMOVLTi + 4757U, // CMOVLTr + 4274U, // CMOVNEi + 4274U, // CMOVNEr + 4205U, // CMPBGE + 4205U, // CMPBGEi + 4606U, // CMPEQ + 4606U, // CMPEQi + 4228U, // CMPLE + 4228U, // CMPLEi + 4741U, // CMPLT + 4741U, // CMPLTi + 4827U, // CMPTEQ + 4805U, // CMPTLE + 4902U, // CMPTLT + 4816U, // CMPTUN + 4235U, // CMPULE + 4235U, // CMPULEi + 4748U, // CMPULT + 4748U, // CMPULTi + 35969U, // COND_BRANCH_F + 52353U, // COND_BRANCH_I + 4282U, // CPYSES + 4282U, // CPYSESt + 4282U, // CPYSET + 4549U, // CPYSNS + 4549U, // CPYSNSt + 4549U, // CPYSNT + 4549U, // CPYSNTs + 4695U, // CPYSS + 4695U, // CPYSSt + 4695U, // CPYST + 4695U, // CPYSTs + 4964U, // CTLZ + 4556U, // CTPOP + 4970U, // CTTZ + 4365U, // CVTQS + 4387U, // CVTQT + 4638U, // CVTST + 4183U, // CVTTQ + 4376U, // CVTTS + 4875U, // DIVS + 4932U, // DIVT 5003U, // ECB - 37715U, // EQVi - 37715U, // EQVr + 4947U, // EQVi + 4947U, // EQVr 1285U, // EXCB - 37194U, // EXTBL - 37194U, // EXTBLi - 37077U, // EXTLH - 37077U, // EXTLHi - 37252U, // EXTLL - 37252U, // EXTLLi - 37105U, // EXTQH - 37105U, // EXTQHi - 37279U, // EXTQL - 37279U, // EXTQLi - 37126U, // EXTWH - 37126U, // EXTWHi - 37310U, // EXTWL - 37310U, // EXTWLi - 35320U, // FBEQ - 34919U, // FBGE - 35433U, // FBGT - 34942U, // FBLE - 35455U, // FBLT - 34972U, // FBNE - 6661U, // FCMOVEQS - 6661U, // FCMOVEQT - 6261U, // FCMOVGES - 6261U, // FCMOVGET - 6767U, // FCMOVGTS - 6767U, // FCMOVGTT - 6291U, // FCMOVLES - 6291U, // FCMOVLET - 6804U, // FCMOVLTS - 6804U, // FCMOVLTT - 6321U, // FCMOVNES - 6321U, // FCMOVNET + 4426U, // EXTBL + 4426U, // EXTBLi + 4309U, // EXTLH + 4309U, // EXTLHi + 4484U, // EXTLL + 4484U, // EXTLLi + 4337U, // EXTQH + 4337U, // EXTQHi + 4511U, // EXTQL + 4511U, // EXTQLi + 4358U, // EXTWH + 4358U, // EXTWHi + 4542U, // EXTWL + 4542U, // EXTWLi + 2552U, // FBEQ + 2151U, // FBGE + 2665U, // FBGT + 2174U, // FBLE + 2687U, // FBLT + 2204U, // FBNE + 8709U, // FCMOVEQS + 8709U, // FCMOVEQT + 8309U, // FCMOVGES + 8309U, // FCMOVGET + 8815U, // FCMOVGTS + 8815U, // FCMOVGTT + 8339U, // FCMOVLES + 8339U, // FCMOVLET + 8852U, // FCMOVLTS + 8852U, // FCMOVLTT + 8369U, // FCMOVNES + 8369U, // FCMOVNET 5009U, // FETCH 5017U, // FETCH_M - 37447U, // FTOIS - 37496U, // FTOIT - 37187U, // INSBL - 37187U, // INSBLi - 37070U, // INSLH - 37070U, // INSLHi - 37245U, // INSLL - 37245U, // INSLLi - 37098U, // INSQH - 37098U, // INSQHi - 37272U, // INSQL - 37272U, // INSQLi - 37119U, // INSWH - 37119U, // INSWHi - 37303U, // INSWL - 37303U, // INSWLi - 37435U, // ITOFS - 37474U, // ITOFT - 11180U, // JMP + 4679U, // FTOIS + 4728U, // FTOIT + 4419U, // INSBL + 4419U, // INSBLi + 4302U, // INSLH + 4302U, // INSLHi + 4477U, // INSLL + 4477U, // INSLLi + 4330U, // INSQH + 4330U, // INSQHi + 4504U, // INSQL + 4504U, // INSQLi + 4351U, // INSWH + 4351U, // INSWHi + 4535U, // INSWL + 4535U, // INSWLi + 4667U, // ITOFS + 4706U, // ITOFT + 19372U, // JMP 1121U, // JSR - 18594U, // JSR_COROUTINE + 34978U, // JSR_COROUTINE 1105U, // JSRs - 34837U, // LDA - 35009U, // LDAH - 26817U, // LDAHg - 35009U, // LDAHr - 26645U, // LDAg - 34837U, // LDAr - 35519U, // LDBU - 35519U, // LDBUr - 35185U, // LDL - 35118U, // LDL_L - 35185U, // LDLr - 35315U, // LDQ - 35125U, // LDQ_L - 35505U, // LDQ_U - 35315U, // LDQl - 35315U, // LDQr - 35382U, // LDS - 35382U, // LDSr - 35421U, // LDT - 35421U, // LDTr - 35661U, // LDWU - 35661U, // LDWUr + 2069U, // LDA + 2241U, // LDAH + 51393U, // LDAHg + 2241U, // LDAHr + 51221U, // LDAg + 2069U, // LDAr + 2751U, // LDBU + 2751U, // LDBUr + 2417U, // LDL + 2350U, // LDL_L + 2417U, // LDLr + 2547U, // LDQ + 2357U, // LDQ_L + 2737U, // LDQ_U + 2547U, // LDQl + 2547U, // LDQr + 2614U, // LDS + 2614U, // LDSr + 2653U, // LDT + 2653U, // LDTr + 2893U, // LDWU + 2893U, // LDWUr 1291U, // MB - 37180U, // MSKBL - 37180U, // MSKBLi - 37063U, // MSKLH - 37063U, // MSKLHi - 37238U, // MSKLL - 37238U, // MSKLLi - 37091U, // MSKQH - 37091U, // MSKQHi - 37265U, // MSKQL - 37265U, // MSKQLi - 37112U, // MSKWH - 37112U, // MSKWHi - 37296U, // MSKWL - 37296U, // MSKWLi - 37259U, // MULLi - 37259U, // MULLr - 37390U, // MULQi - 37390U, // MULQr - 37624U, // MULS - 37681U, // MULT - 37541U, // ORNOTi - 37541U, // ORNOTr + 4412U, // MSKBL + 4412U, // MSKBLi + 4295U, // MSKLH + 4295U, // MSKLHi + 4470U, // MSKLL + 4470U, // MSKLLi + 4323U, // MSKQH + 4323U, // MSKQHi + 4497U, // MSKQL + 4497U, // MSKQLi + 4344U, // MSKWH + 4344U, // MSKWHi + 4528U, // MSKWL + 4528U, // MSKWLi + 4491U, // MULLi + 4491U, // MULLr + 4622U, // MULQi + 4622U, // MULQr + 4856U, // MULS + 4913U, // MULT + 4773U, // ORNOTi + 4773U, // ORNOTr 2131U, // RC 1137U, // RETDAG 1137U, // RETDAGp 2120U, // RPCC 2638U, // RS - 37217U, // S4ADDLi - 37217U, // S4ADDLr - 37347U, // S4ADDQi - 37347U, // S4ADDQr - 37201U, // S4SUBLi - 37201U, // S4SUBLr - 37331U, // S4SUBQi - 37331U, // S4SUBQr - 37225U, // S8ADDLi - 37225U, // S8ADDLr - 37355U, // S8ADDQi - 37355U, // S8ADDQr - 37209U, // S8SUBLi - 37209U, // S8SUBLr - 37339U, // S8SUBQi - 37339U, // S8SUBQr - 36900U, // SEXTB - 37725U, // SEXTW - 37247U, // SLi - 37247U, // SLr - 37633U, // SQRTS - 37690U, // SQRTT - 36890U, // SRAi - 36890U, // SRAr - 37286U, // SRLi - 37286U, // SRLr - 34847U, // STB - 34847U, // STBr - 35243U, // STL - 36907U, // STL_C - 35243U, // STLr - 35348U, // STQ - 36914U, // STQ_C - 35512U, // STQ_U - 35348U, // STQr - 35410U, // STS - 35410U, // STSr - 35500U, // STT - 35500U, // STTr - 35672U, // STW - 35672U, // STWr - 37203U, // SUBLi - 37203U, // SUBLr - 37333U, // SUBQi - 37333U, // SUBQr - 37606U, // SUBS - 37652U, // SUBT + 4449U, // S4ADDLi + 4449U, // S4ADDLr + 4579U, // S4ADDQi + 4579U, // S4ADDQr + 4433U, // S4SUBLi + 4433U, // S4SUBLr + 4563U, // S4SUBQi + 4563U, // S4SUBQr + 4457U, // S8ADDLi + 4457U, // S8ADDLr + 4587U, // S8ADDQi + 4587U, // S8ADDQr + 4441U, // S8SUBLi + 4441U, // S8SUBLr + 4571U, // S8SUBQi + 4571U, // S8SUBQr + 4132U, // SEXTB + 4957U, // SEXTW + 4479U, // SLi + 4479U, // SLr + 4865U, // SQRTS + 4922U, // SQRTT + 4122U, // SRAi + 4122U, // SRAr + 4518U, // SRLi + 4518U, // SRLr + 2079U, // STB + 2079U, // STBr + 2475U, // STL + 4139U, // STL_C + 2475U, // STLr + 2580U, // STQ + 4146U, // STQ_C + 2744U, // STQ_U + 2580U, // STQr + 2642U, // STS + 2642U, // STSr + 2732U, // STT + 2732U, // STTr + 2904U, // STW + 2904U, // STWr + 4435U, // SUBLi + 4435U, // SUBLr + 4565U, // SUBQi + 4565U, // SUBQr + 4838U, // SUBS + 4884U, // SUBT 1294U, // TRAPB - 37084U, // UMULHi - 37084U, // UMULHr + 4316U, // UMULHi + 4316U, // UMULHr 4996U, // WH64 5027U, // WH64EN 1290U, // WMB - 37401U, // XORi - 37401U, // XORr - 37533U, // ZAPNOTi + 4633U, // XORi + 4633U, // XORr + 4765U, // ZAPNOTi }; static const uint8_t OpInfo1[] = { @@ -949,107 +949,107 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // SWAP32 0U, // SWAP64 0U, // WTF - 0U, // ADDLi - 0U, // ADDLr - 0U, // ADDQi - 0U, // ADDQr - 0U, // ADDS - 0U, // ADDT - 0U, // ANDi - 0U, // ANDr - 10U, // BEQ - 10U, // BGE - 10U, // BGT - 0U, // BICi - 0U, // BICr - 0U, // BISi - 0U, // BISr - 10U, // BLBC - 10U, // BLBS - 10U, // BLE - 10U, // BLT - 10U, // BNE + 1U, // ADDLi + 1U, // ADDLr + 1U, // ADDQi + 1U, // ADDQr + 1U, // ADDS + 1U, // ADDT + 1U, // ANDi + 1U, // ANDr + 5U, // BEQ + 5U, // BGE + 5U, // BGT + 1U, // BICi + 1U, // BICr + 1U, // BISi + 1U, // BISr + 5U, // BLBC + 5U, // BLBS + 5U, // BLE + 5U, // BLT + 5U, // BNE 0U, // BR - 0U, // BSR - 0U, // CMOVEQi - 0U, // CMOVEQr - 0U, // CMOVGEi - 0U, // CMOVGEr - 0U, // CMOVGTi - 0U, // CMOVGTr - 0U, // CMOVLBCi - 0U, // CMOVLBCr - 0U, // CMOVLBSi - 0U, // CMOVLBSr - 0U, // CMOVLEi - 0U, // CMOVLEr - 0U, // CMOVLTi - 0U, // CMOVLTr - 0U, // CMOVNEi - 0U, // CMOVNEr - 0U, // CMPBGE - 0U, // CMPBGEi - 0U, // CMPEQ - 0U, // CMPEQi - 0U, // CMPLE - 0U, // CMPLEi - 0U, // CMPLT - 0U, // CMPLTi - 0U, // CMPTEQ - 0U, // CMPTLE - 0U, // CMPTLT - 0U, // CMPTUN - 0U, // CMPULE - 0U, // CMPULEi - 0U, // CMPULT - 0U, // CMPULTi - 0U, // COND_BRANCH_F - 0U, // COND_BRANCH_I - 0U, // CPYSES - 0U, // CPYSESt - 0U, // CPYSET - 0U, // CPYSNS - 0U, // CPYSNSt - 0U, // CPYSNT - 0U, // CPYSNTs - 0U, // CPYSS - 0U, // CPYSSt - 0U, // CPYST - 0U, // CPYSTs - 4U, // CTLZ - 4U, // CTPOP - 4U, // CTTZ - 4U, // CVTQS - 4U, // CVTQT - 4U, // CVTST - 4U, // CVTTQ - 4U, // CVTTS - 0U, // DIVS - 0U, // DIVT - 1U, // ECB - 0U, // EQVi - 0U, // EQVr + 1U, // BSR + 1U, // CMOVEQi + 1U, // CMOVEQr + 1U, // CMOVGEi + 1U, // CMOVGEr + 1U, // CMOVGTi + 1U, // CMOVGTr + 1U, // CMOVLBCi + 1U, // CMOVLBCr + 1U, // CMOVLBSi + 1U, // CMOVLBSr + 1U, // CMOVLEi + 1U, // CMOVLEr + 1U, // CMOVLTi + 1U, // CMOVLTr + 1U, // CMOVNEi + 1U, // CMOVNEr + 1U, // CMPBGE + 1U, // CMPBGEi + 1U, // CMPEQ + 1U, // CMPEQi + 1U, // CMPLE + 1U, // CMPLEi + 1U, // CMPLT + 1U, // CMPLTi + 1U, // CMPTEQ + 1U, // CMPTLE + 1U, // CMPTLT + 1U, // CMPTUN + 1U, // CMPULE + 1U, // CMPULEi + 1U, // CMPULT + 1U, // CMPULTi + 1U, // COND_BRANCH_F + 1U, // COND_BRANCH_I + 1U, // CPYSES + 1U, // CPYSESt + 1U, // CPYSET + 1U, // CPYSNS + 1U, // CPYSNSt + 1U, // CPYSNT + 1U, // CPYSNTs + 1U, // CPYSS + 1U, // CPYSSt + 1U, // CPYST + 1U, // CPYSTs + 9U, // CTLZ + 9U, // CTPOP + 9U, // CTTZ + 9U, // CVTQS + 9U, // CVTQT + 9U, // CVTST + 9U, // CVTTQ + 9U, // CVTTS + 1U, // DIVS + 1U, // DIVT + 2U, // ECB + 1U, // EQVi + 1U, // EQVr 0U, // EXCB - 0U, // EXTBL - 0U, // EXTBLi - 0U, // EXTLH - 0U, // EXTLHi - 0U, // EXTLL - 0U, // EXTLLi - 0U, // EXTQH - 0U, // EXTQHi - 0U, // EXTQL - 0U, // EXTQLi - 0U, // EXTWH - 0U, // EXTWHi - 0U, // EXTWL - 0U, // EXTWLi - 10U, // FBEQ - 10U, // FBGE - 10U, // FBGT - 10U, // FBLE - 10U, // FBLT - 10U, // FBNE + 1U, // EXTBL + 1U, // EXTBLi + 1U, // EXTLH + 1U, // EXTLHi + 1U, // EXTLL + 1U, // EXTLLi + 1U, // EXTQH + 1U, // EXTQHi + 1U, // EXTQL + 1U, // EXTQLi + 1U, // EXTWH + 1U, // EXTWHi + 1U, // EXTWL + 1U, // EXTWLi + 5U, // FBEQ + 5U, // FBGE + 5U, // FBGT + 5U, // FBLE + 5U, // FBLT + 5U, // FBNE 0U, // FCMOVEQS 0U, // FCMOVEQT 0U, // FCMOVGES @@ -1062,136 +1062,136 @@ static MnemonicBitsInfo getMnemonic(MCInst *MI, SStream *O) { 0U, // FCMOVLTT 0U, // FCMOVNES 0U, // FCMOVNET - 1U, // FETCH - 1U, // FETCH_M - 4U, // FTOIS - 4U, // FTOIT - 0U, // INSBL - 0U, // INSBLi - 0U, // INSLH - 0U, // INSLHi - 0U, // INSLL - 0U, // INSLLi - 0U, // INSQH - 0U, // INSQHi - 0U, // INSQL - 0U, // INSQLi - 0U, // INSWH - 0U, // INSWHi - 0U, // INSWL - 0U, // INSWLi - 4U, // ITOFS - 4U, // ITOFT - 1U, // JMP + 2U, // FETCH + 2U, // FETCH_M + 9U, // FTOIS + 9U, // FTOIT + 1U, // INSBL + 1U, // INSBLi + 1U, // INSLH + 1U, // INSLHi + 1U, // INSLL + 1U, // INSLLi + 1U, // INSQH + 1U, // INSQHi + 1U, // INSQL + 1U, // INSQLi + 1U, // INSWH + 1U, // INSWHi + 1U, // INSWL + 1U, // INSWLi + 9U, // ITOFS + 9U, // ITOFT + 2U, // JMP 0U, // JSR - 1U, // JSR_COROUTINE + 2U, // JSR_COROUTINE 0U, // JSRs - 18U, // LDA - 18U, // LDAH - 1U, // LDAHg - 82U, // LDAHr - 1U, // LDAg - 146U, // LDAr - 18U, // LDBU - 146U, // LDBUr - 18U, // LDL - 18U, // LDL_L - 146U, // LDLr - 18U, // LDQ - 18U, // LDQ_L - 18U, // LDQ_U - 210U, // LDQl - 146U, // LDQr - 18U, // LDS - 146U, // LDSr - 18U, // LDT - 146U, // LDTr - 18U, // LDWU - 146U, // LDWUr + 29U, // LDA + 29U, // LDAH + 2U, // LDAHg + 45U, // LDAHr + 2U, // LDAg + 61U, // LDAr + 29U, // LDBU + 61U, // LDBUr + 29U, // LDL + 29U, // LDL_L + 61U, // LDLr + 29U, // LDQ + 29U, // LDQ_L + 29U, // LDQ_U + 77U, // LDQl + 61U, // LDQr + 29U, // LDS + 61U, // LDSr + 29U, // LDT + 61U, // LDTr + 29U, // LDWU + 61U, // LDWUr 0U, // MB - 0U, // MSKBL - 0U, // MSKBLi - 0U, // MSKLH - 0U, // MSKLHi - 0U, // MSKLL - 0U, // MSKLLi - 0U, // MSKQH - 0U, // MSKQHi - 0U, // MSKQL - 0U, // MSKQLi - 0U, // MSKWH - 0U, // MSKWHi - 0U, // MSKWL - 0U, // MSKWLi - 0U, // MULLi - 0U, // MULLr - 0U, // MULQi - 0U, // MULQr - 0U, // MULS - 0U, // MULT - 0U, // ORNOTi - 0U, // ORNOTr + 1U, // MSKBL + 1U, // MSKBLi + 1U, // MSKLH + 1U, // MSKLHi + 1U, // MSKLL + 1U, // MSKLLi + 1U, // MSKQH + 1U, // MSKQHi + 1U, // MSKQL + 1U, // MSKQLi + 1U, // MSKWH + 1U, // MSKWHi + 1U, // MSKWL + 1U, // MSKWLi + 1U, // MULLi + 1U, // MULLr + 1U, // MULQi + 1U, // MULQr + 1U, // MULS + 1U, // MULT + 1U, // ORNOTi + 1U, // ORNOTr 0U, // RC 0U, // RETDAG 0U, // RETDAGp 0U, // RPCC 0U, // RS - 0U, // S4ADDLi - 0U, // S4ADDLr - 0U, // S4ADDQi - 0U, // S4ADDQr - 0U, // S4SUBLi - 0U, // S4SUBLr - 0U, // S4SUBQi - 0U, // S4SUBQr - 0U, // S8ADDLi - 0U, // S8ADDLr - 0U, // S8ADDQi - 0U, // S8ADDQr - 0U, // S8SUBLi - 0U, // S8SUBLr - 0U, // S8SUBQi - 0U, // S8SUBQr - 4U, // SEXTB - 4U, // SEXTW - 0U, // SLi - 0U, // SLr - 4U, // SQRTS - 4U, // SQRTT - 0U, // SRAi - 0U, // SRAr - 0U, // SRLi - 0U, // SRLr - 1U, // STB - 146U, // STBr - 18U, // STL - 48U, // STL_C - 146U, // STLr - 18U, // STQ - 48U, // STQ_C - 1U, // STQ_U - 146U, // STQr - 18U, // STS - 146U, // STSr - 18U, // STT - 146U, // STTr - 18U, // STW - 146U, // STWr - 0U, // SUBLi - 0U, // SUBLr - 0U, // SUBQi - 0U, // SUBQr - 0U, // SUBS - 0U, // SUBT + 1U, // S4ADDLi + 1U, // S4ADDLr + 1U, // S4ADDQi + 1U, // S4ADDQr + 1U, // S4SUBLi + 1U, // S4SUBLr + 1U, // S4SUBQi + 1U, // S4SUBQr + 1U, // S8ADDLi + 1U, // S8ADDLr + 1U, // S8ADDQi + 1U, // S8ADDQr + 1U, // S8SUBLi + 1U, // S8SUBLr + 1U, // S8SUBQi + 1U, // S8SUBQr + 9U, // SEXTB + 9U, // SEXTW + 1U, // SLi + 1U, // SLr + 9U, // SQRTS + 9U, // SQRTT + 1U, // SRAi + 1U, // SRAr + 1U, // SRLi + 1U, // SRLr + 3U, // STB + 61U, // STBr + 29U, // STL + 81U, // STL_C + 61U, // STLr + 29U, // STQ + 81U, // STQ_C + 3U, // STQ_U + 61U, // STQr + 29U, // STS + 61U, // STSr + 29U, // STT + 61U, // STTr + 29U, // STW + 61U, // STWr + 1U, // SUBLi + 1U, // SUBLr + 1U, // SUBQi + 1U, // SUBQr + 1U, // SUBS + 1U, // SUBT 0U, // TRAPB - 0U, // UMULHi - 0U, // UMULHr - 1U, // WH64 - 1U, // WH64EN + 1U, // UMULHi + 1U, // UMULHr + 2U, // WH64 + 2U, // WH64EN 0U, // WMB - 0U, // XORi - 0U, // XORr - 0U, // ZAPNOTi + 1U, // XORi + 1U, // XORr + 1U, // ZAPNOTi }; // Emit the opcode for the instruction. @@ -1220,8 +1220,8 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { uint32_t Bits = MnemonicInfo.second; assert(Bits != 0 && "Cannot print this instruction."); - // Fragment 0 encoded into 2 bits for 4 unique commands. - switch ((Bits >> 11) & 3) { + // Fragment 0 encoded into 3 bits for 5 unique commands. + switch ((Bits >> 11) & 7) { default: assert(0 && "Invalid command number."); case 0: // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ... @@ -1236,6 +1236,10 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { printOperand(MI, 1, O); break; case 3: + // BR, BSR + printOperandAddr(MI, Address, 0, O); + break; + case 4: // FCMOVEQS, FCMOVEQT, FCMOVGES, FCMOVGET, FCMOVGTS, FCMOVGTT, FCMOVLES, ... printOperand(MI, 3, O); SStream_concat1(O, ','); @@ -1248,7 +1252,7 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { // Fragment 1 encoded into 4 bits for 13 unique commands. - switch ((Bits >> 13) & 15) { + switch ((Bits >> 14) & 15) { default: assert(0 && "Invalid command number."); case 0: // ADJUSTSTACKDOWN, ADJUSTSTACKUP, BR, RC, RPCC, RS @@ -1289,7 +1293,7 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { SStream_concat0(O, ", F8RC:"); printOperand(MI, 1, O); SStream_concat0(O, ", bb:"); - printOperand(MI, 2, O); + printOperandAddr(MI, Address, 2, O); return; break; case 7: @@ -1297,7 +1301,7 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { SStream_concat0(O, ", GPRC:"); printOperand(MI, 1, O); SStream_concat0(O, ", bb:"); - printOperand(MI, 2, O); + printOperandAddr(MI, Address, 2, O); return; break; case 8: @@ -1338,8 +1342,8 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { } - // Fragment 2 encoded into 2 bits for 3 unique commands. - switch ((Bits >> 17) & 3) { + // Fragment 2 encoded into 2 bits for 4 unique commands. + switch ((Bits >> 18) & 3) { default: assert(0 && "Invalid command number."); case 0: // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... @@ -1347,18 +1351,25 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { break; case 1: // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... - printOperand(MI, 1, O); + printOperandAddr(MI, Address, 1, O); + return; break; case 2: // CTLZ, CTPOP, CTTZ, CVTQS, CVTQT, CVTST, CVTTQ, CVTTS, FTOIS, FTOIT, IT... printOperand(MI, 0, O); return; break; + case 3: + // LDA, LDAH, LDAHr, LDAr, LDBU, LDBUr, LDL, LDL_L, LDLr, LDQ, LDQ_L, LDQ... + printOperand(MI, 1, O); + SStream_concat1(O, '('); + printOperand(MI, 2, O); + break; } - // Fragment 3 encoded into 2 bits for 3 unique commands. - switch ((Bits >> 19) & 3) { + // Fragment 3 encoded into 3 bits for 6 unique commands. + switch ((Bits >> 20) & 7) { default: assert(0 && "Invalid command number."); case 0: // ADDLi, ADDLr, ADDQi, ADDQr, ADDS, ADDT, ANDi, ANDr, BICi, BICr, BISi, ... @@ -1367,51 +1378,32 @@ static void printInstruction(MCInst *MI, uint64_t Address, SStream *O) { return; break; case 1: - // BEQ, BGE, BGT, BLBC, BLBS, BLE, BLT, BNE, FBEQ, FBGE, FBGT, FBLE, FBLT... - return; - break; - case 2: - // LDA, LDAH, LDAHr, LDAr, LDBU, LDBUr, LDL, LDL_L, LDLr, LDQ, LDQ_L, LDQ... - SStream_concat1(O, '('); - break; - } - - - // Fragment 4 encoded into 1 bits for 2 unique commands. - if ((Bits >> 21) & 1) { - // STL_C, STQ_C - printOperand(MI, 3, O); - SStream_concat1(O, ')'); - return; - } else { - // LDA, LDAH, LDAHr, LDAr, LDBU, LDBUr, LDL, LDL_L, LDLr, LDQ, LDQ_L, LDQ... - printOperand(MI, 2, O); - } - - - // Fragment 5 encoded into 2 bits for 4 unique commands. - switch ((Bits >> 22) & 3) { - default: assert(0 && "Invalid command number."); - case 0: // LDA, LDAH, LDBU, LDL, LDL_L, LDQ, LDQ_L, LDQ_U, LDS, LDT, LDWU, STL, S... SStream_concat1(O, ')'); return; break; - case 1: + case 2: // LDAHr SStream_concat0(O, ")\t\t!gprelhigh"); return; break; - case 2: + case 3: // LDAr, LDBUr, LDLr, LDQr, LDSr, LDTr, LDWUr, STBr, STLr, STQr, STSr, ST... SStream_concat0(O, ")\t\t!gprellow"); return; break; - case 3: + case 4: // LDQl SStream_concat0(O, ")\t\t!literal"); return; break; + case 5: + // STL_C, STQ_C + SStream_concat1(O, '('); + printOperand(MI, 3, O); + SStream_concat1(O, ')'); + return; + break; } } diff --git a/arch/Alpha/AlphaGenCSFeatureName.inc b/arch/Alpha/AlphaGenCSFeatureName.inc index b3734cf65a..64fbf8fc8a 100644 --- a/arch/Alpha/AlphaGenCSFeatureName.inc +++ b/arch/Alpha/AlphaGenCSFeatureName.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaGenCSMappingInsn.inc b/arch/Alpha/AlphaGenCSMappingInsn.inc index d6acaa549f..2d8367b357 100644 --- a/arch/Alpha/AlphaGenCSMappingInsn.inc +++ b/arch/Alpha/AlphaGenCSMappingInsn.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ @@ -15,1771 +15,1771 @@ /* PHINODE */ Alpha_PHI /* 0 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_INLINEASM /* 1 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_INLINEASM_BR /* 2 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_CFI_INSTRUCTION /* 3 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_EH_LABEL /* 4 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_GC_LABEL /* 5 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_ANNOTATION_LABEL /* 6 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_KILL /* 7 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_EXTRACT_SUBREG /* 8 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_INSERT_SUBREG /* 9 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_IMPLICIT_DEF /* 10 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_SUBREG_TO_REG /* 11 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_COPY_TO_REGCLASS /* 12 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* DBG_VALUE */ Alpha_DBG_VALUE /* 13 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* DBG_VALUE_LIST */ Alpha_DBG_VALUE_LIST /* 14 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* DBG_INSTR_REF */ Alpha_DBG_INSTR_REF /* 15 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* DBG_PHI */ Alpha_DBG_PHI /* 16 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* DBG_LABEL */ Alpha_DBG_LABEL /* 17 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_REG_SEQUENCE /* 18 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_COPY /* 19 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* BUNDLE */ Alpha_BUNDLE /* 20 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* LIFETIME_START */ Alpha_LIFETIME_START /* 21 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* LIFETIME_END */ Alpha_LIFETIME_END /* 22 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* PSEUDO_PROBE */ Alpha_PSEUDO_PROBE /* 23 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_ARITH_FENCE /* 24 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_STACKMAP /* 25 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # FEntry call */ Alpha_FENTRY_CALL /* 26 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_PATCHPOINT /* 27 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_LOAD_STACK_GUARD /* 28 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_PREALLOCATED_SETUP /* 29 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_PREALLOCATED_ARG /* 30 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_STATEPOINT /* 31 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_LOCAL_ESCAPE /* 32 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_FAULTING_OP /* 33 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_PATCHABLE_OP /* 34 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Function Enter. */ Alpha_PATCHABLE_FUNCTION_ENTER /* 35 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Function Patchable RET. */ Alpha_PATCHABLE_RET /* 36 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Function Exit. */ Alpha_PATCHABLE_FUNCTION_EXIT /* 37 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Tail Call Exit. */ Alpha_PATCHABLE_TAIL_CALL /* 38 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Custom Event Log. */ Alpha_PATCHABLE_EVENT_CALL /* 39 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* # XRay Typed Event Log. */ Alpha_PATCHABLE_TYPED_EVENT_CALL /* 40 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_ICALL_BRANCH_FUNNEL /* 41 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_MEMBARRIER /* 42 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ASSERT_SEXT /* 43 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ASSERT_ZEXT /* 44 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ASSERT_ALIGN /* 45 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ADD /* 46 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SUB /* 47 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MUL /* 48 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SDIV /* 49 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UDIV /* 50 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SREM /* 51 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UREM /* 52 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SDIVREM /* 53 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UDIVREM /* 54 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_AND /* 55 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_OR /* 56 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_XOR /* 57 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_IMPLICIT_DEF /* 58 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_PHI /* 59 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FRAME_INDEX /* 60 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_GLOBAL_VALUE /* 61 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_EXTRACT /* 62 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UNMERGE_VALUES /* 63 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INSERT /* 64 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MERGE_VALUES /* 65 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BUILD_VECTOR /* 66 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BUILD_VECTOR_TRUNC /* 67 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CONCAT_VECTORS /* 68 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_PTRTOINT /* 69 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTTOPTR /* 70 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BITCAST /* 71 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FREEZE /* 72 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_FPTRUNC_ROUND /* 73 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_TRUNC /* 74 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_ROUND /* 75 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_LRINT /* 76 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_ROUNDEVEN /* 77 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_READCYCLECOUNTER /* 78 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_LOAD /* 79 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SEXTLOAD /* 80 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ZEXTLOAD /* 81 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INDEXED_LOAD /* 82 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INDEXED_SEXTLOAD /* 83 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INDEXED_ZEXTLOAD /* 84 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STORE /* 85 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INDEXED_STORE /* 86 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMIC_CMPXCHG_WITH_SUCCESS /* 87 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMIC_CMPXCHG /* 88 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_XCHG /* 89 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_ADD /* 90 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_SUB /* 91 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_AND /* 92 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_NAND /* 93 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_OR /* 94 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_XOR /* 95 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_MAX /* 96 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_MIN /* 97 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_UMAX /* 98 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_UMIN /* 99 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_FADD /* 100 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_FSUB /* 101 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_FMAX /* 102 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_FMIN /* 103 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_UINC_WRAP /* 104 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ATOMICRMW_UDEC_WRAP /* 105 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FENCE /* 106 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BRCOND /* 107 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BRINDIRECT /* 108 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INVOKE_REGION_START /* 109 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC /* 110 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INTRINSIC_W_SIDE_EFFECTS /* 111 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ANYEXT /* 112 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_TRUNC /* 113 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CONSTANT /* 114 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCONSTANT /* 115 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VASTART /* 116 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VAARG /* 117 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SEXT /* 118 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SEXT_INREG /* 119 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ZEXT /* 120 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SHL /* 121 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_LSHR /* 122 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ASHR /* 123 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FSHL /* 124 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FSHR /* 125 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ROTR /* 126 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ROTL /* 127 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ICMP /* 128 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCMP /* 129 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SELECT /* 130 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UADDO /* 131 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UADDE /* 132 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_USUBO /* 133 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_USUBE /* 134 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SADDO /* 135 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SADDE /* 136 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SSUBO /* 137 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SSUBE /* 138 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMULO /* 139 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMULO /* 140 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMULH /* 141 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMULH /* 142 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UADDSAT /* 143 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SADDSAT /* 144 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_USUBSAT /* 145 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SSUBSAT /* 146 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_USHLSAT /* 147 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SSHLSAT /* 148 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMULFIX /* 149 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMULFIX /* 150 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMULFIXSAT /* 151 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMULFIXSAT /* 152 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SDIVFIX /* 153 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UDIVFIX /* 154 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SDIVFIXSAT /* 155 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UDIVFIXSAT /* 156 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FADD /* 157 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FSUB /* 158 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMUL /* 159 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMA /* 160 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMAD /* 161 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FDIV /* 162 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FREM /* 163 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPOW /* 164 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPOWI /* 165 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FEXP /* 166 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FEXP2 /* 167 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FLOG /* 168 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FLOG2 /* 169 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FLOG10 /* 170 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FNEG /* 171 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPEXT /* 172 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPTRUNC /* 173 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPTOSI /* 174 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FPTOUI /* 175 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SITOFP /* 176 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UITOFP /* 177 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FABS /* 178 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCOPYSIGN /* 179 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_IS_FPCLASS /* 180 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCANONICALIZE /* 181 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMINNUM /* 182 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMAXNUM /* 183 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMINNUM_IEEE /* 184 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMAXNUM_IEEE /* 185 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMINIMUM /* 186 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FMAXIMUM /* 187 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_PTR_ADD /* 188 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_PTRMASK /* 189 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMIN /* 190 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SMAX /* 191 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMIN /* 192 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UMAX /* 193 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ABS /* 194 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_LROUND /* 195 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_LLROUND /* 196 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BR /* 197 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BRJT /* 198 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_INSERT_VECTOR_ELT /* 199 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_EXTRACT_VECTOR_ELT /* 200 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SHUFFLE_VECTOR /* 201 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CTTZ /* 202 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CTTZ_ZERO_UNDEF /* 203 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CTLZ /* 204 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CTLZ_ZERO_UNDEF /* 205 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_CTPOP /* 206 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BSWAP /* 207 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BITREVERSE /* 208 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCEIL /* 209 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FCOS /* 210 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FSIN /* 211 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FSQRT /* 212 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FFLOOR /* 213 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FRINT /* 214 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_FNEARBYINT /* 215 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_ADDRSPACE_CAST /* 216 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BLOCK_ADDR /* 217 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_JUMP_TABLE /* 218 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_DYN_STACKALLOC /* 219 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FADD /* 220 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FSUB /* 221 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FMUL /* 222 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FDIV /* 223 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FREM /* 224 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FMA /* 225 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_STRICT_FSQRT /* 226 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_READ_REGISTER /* 227 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_WRITE_REGISTER /* 228 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MEMCPY /* 229 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MEMCPY_INLINE /* 230 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MEMMOVE /* 231 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_MEMSET /* 232 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_BZERO /* 233 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_SEQ_FADD /* 234 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_SEQ_FMUL /* 235 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_FADD /* 236 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_FMUL /* 237 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_FMAX /* 238 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_FMIN /* 239 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_ADD /* 240 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_MUL /* 241 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_AND /* 242 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_OR /* 243 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_XOR /* 244 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_SMAX /* 245 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_SMIN /* 246 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_UMAX /* 247 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_VECREDUCE_UMIN /* 248 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_SBFX /* 249 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_G_UBFX /* 250 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* ; ADJDOWN $amt1 */ Alpha_ADJUSTSTACKDOWN /* 251 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* ; ADJUP $amt1 */ Alpha_ADJUSTSTACKUP /* 252 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { @@ -1787,42 +1787,42 @@ */ Alpha_ALTENT /* 253 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_CAS32 /* 254 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_CAS64 /* 255 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_LAS32 /* 256 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_LAS64 /* 257 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* LSMARKER$$$i$$$j$$$k$$$m: */ Alpha_MEMLABEL /* 258 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { @@ -1830,1728 +1830,1971 @@ */ Alpha_PCLABEL /* 259 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_SWAP32 /* 260 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* */ Alpha_SWAP64 /* 261 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* #wtf */ Alpha_WTF /* 262 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } #endif }, { /* addl $RA,$L,$RC */ Alpha_ADDLi /* 263 */, Alpha_INS_ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 66, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* addl $RA,$RB,$RC */ Alpha_ADDLr /* 264 */, Alpha_INS_ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* addq $RA,$L,$RC */ Alpha_ADDQi /* 265 */, Alpha_INS_ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 322, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* addq $RA,$RB,$RC */ Alpha_ADDQr /* 266 */, Alpha_INS_ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2050, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* adds/su $RA,$RB,$RC */ Alpha_ADDS /* 267 */, Alpha_INS_ADDSsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 858, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* addt/su $RA,$RB,$RC */ Alpha_ADDT /* 268 */, Alpha_INS_ADDTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2906, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* and $RA,$L,$RC */ Alpha_ANDi /* 269 */, Alpha_INS_AND, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 98, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* and $RA,$RB,$RC */ Alpha_ANDr /* 270 */, Alpha_INS_AND, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* beq $R,$dst */ Alpha_BEQ /* 271 */, Alpha_INS_BEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 39, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* bge $R,$dst */ Alpha_BGE /* 272 */, Alpha_INS_BGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 31, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* bgt $R,$dst */ Alpha_BGT /* 273 */, Alpha_INS_BGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 63, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* bic $RA,$L,$RC */ Alpha_BICi /* 274 */, Alpha_INS_BIC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1122, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* bic $RA,$RB,$RC */ Alpha_BICr /* 275 */, Alpha_INS_BIC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 8226, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* bis $RA,$L,$RC */ Alpha_BISi /* 276 */, Alpha_INS_BIS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 354, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* bis $RA,$RB,$RC */ Alpha_BISr /* 277 */, Alpha_INS_BIS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2082, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* blbc $R,$dst */ Alpha_BLBC /* 278 */, Alpha_INS_BLBC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 7, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* blbs $R,$dst */ Alpha_BLBS /* 279 */, Alpha_INS_BLBS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 15, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ble $R,$dst */ Alpha_BLE /* 280 */, Alpha_INS_BLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 55, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* blt $R,$dst */ Alpha_BLT /* 281 */, Alpha_INS_BLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 23, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* bne $R,$dst */ Alpha_BNE /* 282 */, Alpha_INS_BNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 47, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* br $$31,$DISP */ Alpha_BR /* 283 */, Alpha_INS_BR, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 1987, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }, 11 } #endif }, { /* bsr $$26,$$$DISP ..ng */ Alpha_BSR /* 284 */, Alpha_INS_BSR, #ifndef CAPSTONE_DIET - { Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 1, 0, {{ 0 }} + { Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 715, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }, 11 } #endif }, { /* cmoveq $RCOND,$RTRUE,$RDEST */ Alpha_CMOVEQi /* 285 */, Alpha_INS_CMOVEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2402, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmoveq $RCOND,$RTRUE,$RDEST */ Alpha_CMOVEQr /* 286 */, Alpha_INS_CMOVEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 18466, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovge $RCOND,$RTRUE,$RDEST */ Alpha_CMOVGEi /* 287 */, Alpha_INS_CMOVGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6370, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovge $RCOND,$RTRUE,$RDEST */ Alpha_CMOVGEr /* 288 */, Alpha_INS_CMOVGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 50210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovgt $RCOND,$RTRUE,$RDEST */ Alpha_CMOVGTi /* 289 */, Alpha_INS_CMOVGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6626, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovgt $RCOND,$RTRUE,$RDEST */ Alpha_CMOVGTr /* 290 */, Alpha_INS_CMOVGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 52258, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovlbc $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLBCi /* 291 */, Alpha_INS_CMOVLBC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6754, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovlbc $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLBCr /* 292 */, Alpha_INS_CMOVLBC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 53282, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovlbs $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLBSi /* 293 */, Alpha_INS_CMOVLBS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2658, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovlbs $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLBSr /* 294 */, Alpha_INS_CMOVLBS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 20514, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovle $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLEi /* 295 */, Alpha_INS_CMOVLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2530, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovle $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLEr /* 296 */, Alpha_INS_CMOVLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 19490, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovlt $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLTi /* 297 */, Alpha_INS_CMOVLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2274, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovlt $RCOND,$RTRUE,$RDEST */ Alpha_CMOVLTr /* 298 */, Alpha_INS_CMOVLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 17442, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmovne $RCOND,$RTRUE,$RDEST */ Alpha_CMOVNEi /* 299 */, Alpha_INS_CMOVNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6498, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmovne $RCOND,$RTRUE,$RDEST */ Alpha_CMOVNEr /* 300 */, Alpha_INS_CMOVNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 51234, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpbge $RA,$RB,$RC */ Alpha_CMPBGE /* 301 */, Alpha_INS_CMPBGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 122882, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpbge $RA,$L,$RC */ Alpha_CMPBGEi /* 302 */, Alpha_INS_CMPBGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 15426, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmpeq $RA,$RB,$RC */ Alpha_CMPEQ /* 303 */, Alpha_INS_CMPEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 92162, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpeq $RA,$L,$RC */ Alpha_CMPEQi /* 304 */, Alpha_INS_CMPEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 11586, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmple $RA,$RB,$RC */ Alpha_CMPLE /* 305 */, Alpha_INS_CMPLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 93186, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmple $RA,$L,$RC */ Alpha_CMPLEi /* 306 */, Alpha_INS_CMPLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 11714, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmplt $RA,$RB,$RC */ Alpha_CMPLT /* 307 */, Alpha_INS_CMPLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 91138, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmplt $RA,$L,$RC */ Alpha_CMPLTi /* 308 */, Alpha_INS_CMPLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 11458, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmpteq/su $RA,$RB,$RC */ Alpha_CMPTEQ /* 309 */, Alpha_INS_CMPTEQsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 84826, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmptle/su $RA,$RB,$RC */ Alpha_CMPTLE /* 310 */, Alpha_INS_CMPTLEsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 117594, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmptlt/su $RA,$RB,$RC */ Alpha_CMPTLT /* 311 */, Alpha_INS_CMPTLTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 52058, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmptun/su $RA,$RB,$RC */ Alpha_CMPTUN /* 312 */, Alpha_INS_CMPTUNsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 19290, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpule $RA,$RB,$RC */ Alpha_CMPULE /* 313 */, Alpha_INS_CMPULE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 96258, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpule $RA,$L,$RC */ Alpha_CMPULEi /* 314 */, Alpha_INS_CMPULE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 12098, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* cmpult $RA,$RB,$RC */ Alpha_CMPULT /* 315 */, Alpha_INS_CMPULT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 94210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cmpult $RA,$L,$RC */ Alpha_CMPULTi /* 316 */, Alpha_INS_CMPULT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 11842, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* COND_BRANCH imm:$opc, F8RC:$R, bb:$dst */ Alpha_COND_BRANCH_F /* 317 */, Alpha_INS_COND_BRANCH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 0, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* COND_BRANCH imm:$opc, GPRC:$R, bb:$dst */ Alpha_COND_BRANCH_I /* 318 */, Alpha_INS_COND_BRANCH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 0, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* cpyse $RA,$RB,$RC */ Alpha_CPYSES /* 319 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpyse $RA,$RB,$RC */ Alpha_CPYSESt /* 320 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpyse $RA,$RB,$RC */ Alpha_CPYSET /* 321 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpysn $RA,$RB,$RC */ Alpha_CPYSNS /* 322 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpysn $RA,$RB,$RC */ Alpha_CPYSNSt /* 323 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpysn $RA,$RB,$RC */ Alpha_CPYSNT /* 324 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpysn $RA,$RB,$RC */ Alpha_CPYSNTs /* 325 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpys $RA,$RB,$RC */ Alpha_CPYSS /* 326 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpys $RA,$RB,$RC */ Alpha_CPYSSt /* 327 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpys $RA,$RB,$RC */ Alpha_CPYST /* 328 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* cpys $RA,$RB,$RC */ Alpha_CPYSTs /* 329 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* ctlz $RB,$RC */ Alpha_CTLZ /* 330 */, Alpha_INS_CTLZ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1247182, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* ctpop $RB,$RC */ Alpha_CTPOP /* 331 */, Alpha_INS_CTPOP, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 198606, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cttz $RB,$RC */ Alpha_CTTZ /* 332 */, Alpha_INS_CTTZ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 3344334, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cvtqs/sui $RB,$RC */ Alpha_CVTQS /* 333 */, Alpha_INS_CVTQSsSUI, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1015770, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cvtqt/sui $RB,$RC */ Alpha_CVTQT /* 334 */, Alpha_INS_CVTQTsSUI, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2064346, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cvtst/s $RB,$RC */ Alpha_CVTST /* 335 */, Alpha_INS_CVTSTsS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 876506, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cvttq/svc $RB,$RC */ Alpha_CVTTQ /* 336 */, Alpha_INS_CVTTQsSVC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4009946, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* cvtts/sui $RB,$RC */ Alpha_CVTTS /* 337 */, Alpha_INS_CVTTSsSUI, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 884698, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* divs/su $RA,$RB,$RC */ Alpha_DIVS /* 338 */, Alpha_INS_DIVSsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 99162, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* divt/su $RA,$RB,$RC */ Alpha_DIVT /* 339 */, Alpha_INS_DIVTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 101210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* ecb ($RB) */ Alpha_ECB /* 340 */, Alpha_INS_ECB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1478, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* eqv $RA,$L,$RC */ Alpha_EQVi /* 341 */, Alpha_INS_EQV, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1250, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* eqv $RA,$RB,$RC */ Alpha_EQVr /* 342 */, Alpha_INS_EQV, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 9250, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* excb */ Alpha_EXCB /* 343 */, Alpha_INS_EXCB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2097158, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* extbl $RA,$RB,$RC */ Alpha_EXTBL /* 344 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 49170, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extbl $RA,$L,$RC */ Alpha_EXTBLi /* 345 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6226, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extlh $RA,$RB,$RC */ Alpha_EXTLH /* 346 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 44050, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extlh $RA,$L,$RC */ Alpha_EXTLHi /* 347 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 5586, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extll $RA,$RB,$RC */ Alpha_EXTLL /* 348 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 51218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extll $RA,$L,$RC */ Alpha_EXTLLi /* 349 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6482, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extqh $RA,$RB,$RC */ Alpha_EXTQH /* 350 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 48146, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extqh $RA,$L,$RC */ Alpha_EXTQHi /* 351 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6098, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extql $RA,$RB,$RC */ Alpha_EXTQL /* 352 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 55314, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extql $RA,$L,$RC */ Alpha_EXTQLi /* 353 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6994, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extwh $RA,$RB,$RC */ Alpha_EXTWH /* 354 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 46098, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extwh $RA,$L,$RC */ Alpha_EXTWHi /* 355 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 5842, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* extwl $RA,$RB,$RC */ Alpha_EXTWL /* 356 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 53266, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* extwl $RA,$L,$RC */ Alpha_EXTWLi /* 357 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6738, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* fbeq $R,$dst */ Alpha_FBEQ /* 358 */, Alpha_INS_FBEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 35, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fbge $R,$dst */ Alpha_FBGE /* 359 */, Alpha_INS_FBGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 27, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fbgt $R,$dst */ Alpha_FBGT /* 360 */, Alpha_INS_FBGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 59, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fble $R,$dst */ Alpha_FBLE /* 361 */, Alpha_INS_FBLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 51, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fblt $R,$dst */ Alpha_FBLT /* 362 */, Alpha_INS_FBLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 19, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fbne $R,$dst */ Alpha_FBNE /* 363 */, Alpha_INS_FBNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 0, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, + { 43, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* fcmoveq $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVEQS /* 364 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 43066, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmoveq $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVEQT /* 365 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 43066, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovge $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVGES /* 366 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 92218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovge $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVGET /* 367 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 92218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovgt $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVGTS /* 368 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 124986, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovgt $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVGTT /* 369 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 124986, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovle $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVLES /* 370 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 59450, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovle $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVLET /* 371 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 59450, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovlt $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVLTS /* 372 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 26682, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovlt $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVLTT /* 373 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 26682, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovne $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVNES /* 374 */, Alpha_INS_FCMOVNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 108602, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fcmovne $RCOND,$RTRUE,$RDEST */ Alpha_FCMOVNET /* 375 */, Alpha_INS_FCMOVNE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 108602, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* fetch ($RB) */ Alpha_FETCH /* 376 */, Alpha_INS_FETCH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 70, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* fetch_m ($RB) */ Alpha_FETCH_M /* 377 */, Alpha_INS_FETCH_M, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 326, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* ftois $RA,$RC */ Alpha_FTOIS /* 378 */, Alpha_INS_FTOIS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 493518, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* ftoit $RA,$RC */ Alpha_FTOIT /* 379 */, Alpha_INS_FTOIT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 231374, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* insbl $RA,$RB,$RC */ Alpha_INSBL /* 380 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 106514, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* insbl $RA,$L,$RC */ Alpha_INSBLi /* 381 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13394, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* inslh $RA,$RB,$RC */ Alpha_INSLH /* 382 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 117778, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* inslh $RA,$L,$RC */ Alpha_INSLHi /* 383 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 14802, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* insll $RA,$RB,$RC */ Alpha_INSLL /* 384 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 108562, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* insll $RA,$L,$RC */ Alpha_INSLLi /* 385 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13650, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* insqh $RA,$RB,$RC */ Alpha_INSQH /* 386 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 121874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* insqh $RA,$L,$RC */ Alpha_INSQHi /* 387 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 15314, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* insql $RA,$RB,$RC */ Alpha_INSQL /* 388 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 112658, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* insql $RA,$L,$RC */ Alpha_INSQLi /* 389 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 14162, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* inswh $RA,$RB,$RC */ Alpha_INSWH /* 390 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 119826, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* inswh $RA,$L,$RC */ Alpha_INSWHi /* 391 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 15058, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* inswl $RA,$RB,$RC */ Alpha_INSWL /* 392 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 110610, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* inswl $RA,$L,$RC */ Alpha_INSWLi /* 393 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13906, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* itofs $RA,$RC */ Alpha_ITOFS /* 394 */, Alpha_INS_ITOFS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 526282, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* itoft $RA,$RC */ Alpha_ITOFT /* 395 */, Alpha_INS_ITOFT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 591818, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* jmp $$31,{$RS},0 */ Alpha_JMP /* 396 */, Alpha_INS_JMP, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 1, {{ 0 }} + { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 1, {{ 0 }}, + { 2006, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } #endif }, { /* jsr $$26,($$27),0 */ Alpha_JSR /* 397 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET - { Alpha_REG_R27, Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} + { Alpha_REG_R27, Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }}, + { 187094, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* jsr_coroutine $RD,($RS),$DISP */ Alpha_JSR_COROUTINE /* 398 */, Alpha_INS_JSR_COROUTINE, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 214, { 0, 1, 2, 3, 4, 5, 16, 17 }, 8 } #endif }, { /* jsr $$23,($$27),0 */ Alpha_JSRs /* 399 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET - { Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, 0 }, { Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, Alpha_REG_R28, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }} + { Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, 0 }, { Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, Alpha_REG_R28, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }}, + { 188246, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* lda $RA,$DISP($RB) */ Alpha_LDA /* 400 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldah $RA,$DISP($RB) */ Alpha_LDAH /* 401 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 36, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldah $RA,0($RB) !gpdisp!$NUM */ Alpha_LDAHg /* 402 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 36, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldah $RA,$DISP($RB) !gprelhigh */ Alpha_LDAHr /* 403 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 36, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* lda $RA,0($RB) !gpdisp!$NUM */ Alpha_LDAg /* 404 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* lda $RA,$DISP($RB) !gprellow */ Alpha_LDAr /* 405 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldbu $RA,$DISP($RB) */ Alpha_LDBU /* 406 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 20, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldbu $RA,$DISP($RB) !gprellow */ Alpha_LDBUr /* 407 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 20, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldl $RA,$DISP($RB) */ Alpha_LDL /* 408 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 5, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldl_l $RA,$DISP($RB) */ Alpha_LDL_L /* 409 */, Alpha_INS_LDL_L, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 21, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldl $RA,$DISP($RB) !gprellow */ Alpha_LDLr /* 410 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 5, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldq $RA,$DISP($RB) */ Alpha_LDQ /* 411 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 37, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldq_l $RA,$DISP($RB) */ Alpha_LDQ_L /* 412 */, Alpha_INS_LDQ_L, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 53, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldq_u $RA,$DISP($RB) */ Alpha_LDQ_U /* 413 */, Alpha_INS_LDQ_U, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 52, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldq $RA,$DISP($RB) !literal */ Alpha_LDQl /* 414 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 37, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldq $RA,$DISP($RB) !gprellow */ Alpha_LDQr /* 415 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 37, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* lds $RA,$DISP($RB) */ Alpha_LDS /* 416 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 17, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* lds $RA,$DISP($RB) !gprellow */ Alpha_LDSr /* 417 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 17, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldt $RA,$DISP($RB) */ Alpha_LDT /* 418 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 49, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldt $RA,$DISP($RB) !gprellow */ Alpha_LDTr /* 419 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 49, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldwu $RA,$DISP($RB) */ Alpha_LDWU /* 420 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 12, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* ldwu $RA,$DISP($RB) !gprellow */ Alpha_LDWUr /* 421 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 12, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* mb */ Alpha_MB /* 422 */, Alpha_INS_MB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 131078, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* mskbl $RA,$RB,$RC */ Alpha_MSKBL /* 423 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 32786, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskbl $RA,$L,$RC */ Alpha_MSKBLi /* 424 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4178, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* msklh $RA,$RB,$RC */ Alpha_MSKLH /* 425 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 35858, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* msklh $RA,$L,$RC */ Alpha_MSKLHi /* 426 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4562, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mskll $RA,$RB,$RC */ Alpha_MSKLL /* 427 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34834, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskll $RA,$L,$RC */ Alpha_MSKLLi /* 428 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4434, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mskqh $RA,$RB,$RC */ Alpha_MSKQH /* 429 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 39954, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskqh $RA,$L,$RC */ Alpha_MSKQHi /* 430 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 5074, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mskql $RA,$RB,$RC */ Alpha_MSKQL /* 431 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 38930, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskql $RA,$L,$RC */ Alpha_MSKQLi /* 432 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4946, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mskwh $RA,$RB,$RC */ Alpha_MSKWH /* 433 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 37906, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskwh $RA,$L,$RC */ Alpha_MSKWHi /* 434 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4818, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mskwl $RA,$RB,$RC */ Alpha_MSKWL /* 435 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 36882, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mskwl $RA,$L,$RC */ Alpha_MSKWLi /* 436 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4690, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mull $RA,$L,$RC */ Alpha_MULLi /* 437 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 114, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mull $RA,$RB,$RC */ Alpha_MULLr /* 438 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 50, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mulq $RA,$L,$RC */ Alpha_MULQi /* 439 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 370, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* mulq $RA,$RB,$RC */ Alpha_MULQr /* 440 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2098, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* muls/su $RA,$RB,$RC */ Alpha_MULS /* 441 */, Alpha_INS_MULSsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 33626, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* mult/su $RA,$RB,$RC */ Alpha_MULT /* 442 */, Alpha_INS_MULTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 35674, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* ornot $RA,$L,$RC */ Alpha_ORNOTi /* 443 */, Alpha_INS_ORNOT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1378, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* ornot $RA,$RB,$RC */ Alpha_ORNOTr /* 444 */, Alpha_INS_ORNOT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 10274, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* rc $RA */ Alpha_RC /* 445 */, Alpha_INS_RC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 14342, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } #endif }, { /* ret $$31,($$26),1 */ Alpha_RETDAG /* 446 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET - { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2147573718, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* ret $$31,($$26),1 */ Alpha_RETDAGp /* 447 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET - { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2147573718, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* rpcc $RA */ Alpha_RPCC /* 448 */, Alpha_INS_RPCC, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 198, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* rs $RA */ Alpha_RS /* 449 */, Alpha_INS_RS, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 30726, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } #endif }, { /* s4addl $RA,$L,$RC */ Alpha_S4ADDLi /* 450 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4162, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s4addl $RA,$RB,$RC */ Alpha_S4ADDLr /* 451 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 32770, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s4addq $RA,$L,$RC */ Alpha_S4ADDQi /* 452 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4418, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s4addq $RA,$RB,$RC */ Alpha_S4ADDQr /* 453 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 34818, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s4subl $RA,$L,$RC */ Alpha_S4SUBLi /* 454 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13378, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s4subl $RA,$RB,$RC */ Alpha_S4SUBLr /* 455 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 106498, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s4subq $RA,$L,$RC */ Alpha_S4SUBQi /* 456 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13634, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s4subq $RA,$RB,$RC */ Alpha_S4SUBQr /* 457 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 108546, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s8addl $RA,$L,$RC */ Alpha_S8ADDLi /* 458 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4674, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s8addl $RA,$RB,$RC */ Alpha_S8ADDLr /* 459 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 36866, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s8addq $RA,$L,$RC */ Alpha_S8ADDQi /* 460 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4930, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s8addq $RA,$RB,$RC */ Alpha_S8ADDQr /* 461 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 38914, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s8subl $RA,$L,$RC */ Alpha_S8SUBLi /* 462 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13890, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s8subl $RA,$RB,$RC */ Alpha_S8SUBLr /* 463 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 110594, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* s8subq $RA,$L,$RC */ Alpha_S8SUBQi /* 464 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 14146, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* s8subq $RA,$RB,$RC */ Alpha_S8SUBQr /* 465 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 112642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* sextb $RB,$RC */ Alpha_SEXTB /* 466 */, Alpha_INS_SEXTB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1998, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* sextw $RB,$RC */ Alpha_SEXTW /* 467 */, Alpha_INS_SEXTW, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2099150, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* sll $RA,$L,$RC */ Alpha_SLi /* 468 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 10066, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* sll $RA,$RB,$RC */ Alpha_SLr /* 469 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 79890, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* sqrts/su $RB,$RC */ Alpha_SQRTS /* 470 */, Alpha_INS_SQRTSsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 3436490, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* sqrtt/su $RB,$RC */ Alpha_SQRTT /* 471 */, Alpha_INS_SQRTTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 3502026, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } #endif }, { /* sra $RA,$L,$RC */ Alpha_SRAi /* 472 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 3922, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* sra $RA,$RB,$RC */ Alpha_SRAr /* 473 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 30738, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* srl $RA,$L,$RC */ Alpha_SRLi /* 474 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2898, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* srl $RA,$RB,$RC */ Alpha_SRLr /* 475 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 22546, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* stb $RA, $DISP($RB) */ Alpha_STB /* 476 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 28, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stb $RA,$DISP($RB) !gprellow */ Alpha_STBr /* 477 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 28, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stl $RA,$DISP($RB) */ Alpha_STL /* 478 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stl_c $RA,$DISP($RB) */ Alpha_STL_C /* 479 */, Alpha_INS_STL_C, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 29, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stl $RA,$DISP($RB) !gprellow */ Alpha_STLr /* 480 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 13, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stq $RA,$DISP($RB) */ Alpha_STQ /* 481 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 45, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stq_c $RA,$DISP($RB) */ Alpha_STQ_C /* 482 */, Alpha_INS_STQ_C, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 61, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stq_u $RA, $DISP($RB) */ Alpha_STQ_U /* 483 */, Alpha_INS_STQ_U, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 60, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stq $RA,$DISP($RB) !gprellow */ Alpha_STQr /* 484 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 45, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* sts $RA,$DISP($RB) */ Alpha_STS /* 485 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 25, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* sts $RA,$DISP($RB) !gprellow */ Alpha_STSr /* 486 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 25, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stt $RA,$DISP($RB) */ Alpha_STT /* 487 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 57, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stt $RA,$DISP($RB) !gprellow */ Alpha_STTr /* 488 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 57, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stw $RA,$DISP($RB) */ Alpha_STW /* 489 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 44, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* stw $RA,$DISP($RB) !gprellow */ Alpha_STWr /* 490 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET - { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, + { 44, { 0, 1, 2, 3, 4, 5 }, 6 } #endif }, { /* subl $RA,$L,$RC */ Alpha_SUBLi /* 491 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 9282, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* subl $RA,$RB,$RC */ Alpha_SUBLr /* 492 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 73730, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* subq $RA,$L,$RC */ Alpha_SUBQi /* 493 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 9538, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* subq $RA,$RB,$RC */ Alpha_SUBQr /* 494 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 75778, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* subs/su $RA,$RB,$RC */ Alpha_SUBS /* 495 */, Alpha_INS_SUBSsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 66394, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* subt/su $RA,$RB,$RC */ Alpha_SUBT /* 496 */, Alpha_INS_SUBTsSU, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 68442, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* trapb */ Alpha_TRAPB /* 497 */, Alpha_INS_TRAPB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* umulh $RA,$L,$RC */ Alpha_UMULHi /* 498 */, Alpha_INS_UMULH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 882, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* umulh $RA,$RB,$RC */ Alpha_UMULHr /* 499 */, Alpha_INS_UMULH, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 6194, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* wh64 ($RB) */ Alpha_WH64 /* 500 */, Alpha_INS_WH64, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1990, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* wh64en ($RB) */ Alpha_WH64EN /* 501 */, Alpha_INS_WH64EN, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 4038, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } #endif }, { /* wmb */ Alpha_WMB /* 502 */, Alpha_INS_WMB, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 2228230, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } #endif }, { /* xor $RA,$L,$RC */ Alpha_XORi /* 503 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 226, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, { /* xor $RA,$RB,$RC */ Alpha_XORr /* 504 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 1058, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } #endif }, { /* zapnot $RA,$L,$RC */ Alpha_ZAPNOTi /* 505 */, Alpha_INS_ZAPNOT, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, + { 9042, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } #endif }, diff --git a/arch/Alpha/AlphaGenCSMappingInsnName.inc b/arch/Alpha/AlphaGenCSMappingInsnName.inc index 3bcfba0aa3..b934548c9c 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnName.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnName.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaGenCSMappingInsnOp.inc b/arch/Alpha/AlphaGenCSMappingInsnOp.inc index 8fcb6bc0a8..e444471add 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnOp.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnOp.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ @@ -804,557 +804,557 @@ }}}, { /* Alpha_ADDLi (263) - Alpha_INS_ADDL - addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_ADDLr (264) - Alpha_INS_ADDL - addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ADDQi (265) - Alpha_INS_ADDQ - addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_ADDQr (266) - Alpha_INS_ADDQ - addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ADDS (267) - Alpha_INS_ADDSsSU - adds/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ADDT (268) - Alpha_INS_ADDTsSU - addt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ANDi (269) - Alpha_INS_AND - and $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_ANDr (270) - Alpha_INS_AND - and $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_BEQ (271) - Alpha_INS_BEQ - beq $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BGE (272) - Alpha_INS_BGE - bge $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BGT (273) - Alpha_INS_BGT - bgt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BICi (274) - Alpha_INS_BIC - bic $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_BICr (275) - Alpha_INS_BIC - bic $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_BISi (276) - Alpha_INS_BIS - bis $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_BISr (277) - Alpha_INS_BIS - bis $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_BLBC (278) - Alpha_INS_BLBC - blbc $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BLBS (279) - Alpha_INS_BLBS - blbs $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BLE (280) - Alpha_INS_BLE - ble $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BLT (281) - Alpha_INS_BLT - blt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BNE (282) - Alpha_INS_BNE - bne $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_BR (283) - Alpha_INS_BR - br $$31,$DISP */ { - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ { 0 } }}, { /* Alpha_BSR (284) - Alpha_INS_BSR - bsr $$26,$$$DISP ..ng */ { - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ { 0 } }}, { /* Alpha_CMOVEQi (285) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVEQr (286) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGEi (287) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGEr (288) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGTi (289) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGTr (290) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBCi (291) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBCr (292) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBSi (293) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBSr (294) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLEi (295) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLEr (296) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLTi (297) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLTr (298) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVNEi (299) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVNEr (300) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ { 0 } }}, { /* Alpha_CMPBGE (301) - Alpha_INS_CMPBGE - cmpbge $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPBGEi (302) - Alpha_INS_CMPBGE - cmpbge $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_CMPEQ (303) - Alpha_INS_CMPEQ - cmpeq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPEQi (304) - Alpha_INS_CMPEQ - cmpeq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_CMPLE (305) - Alpha_INS_CMPLE - cmple $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPLEi (306) - Alpha_INS_CMPLE - cmple $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_CMPLT (307) - Alpha_INS_CMPLT - cmplt $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPLTi (308) - Alpha_INS_CMPLT - cmplt $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_CMPTEQ (309) - Alpha_INS_CMPTEQsSU - cmpteq/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPTLE (310) - Alpha_INS_CMPTLEsSU - cmptle/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPTLT (311) - Alpha_INS_CMPTLTsSU - cmptlt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPTUN (312) - Alpha_INS_CMPTUNsSU - cmptun/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPULE (313) - Alpha_INS_CMPULE - cmpule $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPULEi (314) - Alpha_INS_CMPULE - cmpule $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_CMPULT (315) - Alpha_INS_CMPULT - cmpult $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CMPULTi (316) - Alpha_INS_CMPULT - cmpult $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_COND_BRANCH_F (317) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, F8RC:$R, bb:$dst */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* opc */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_COND_BRANCH_I (318) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, GPRC:$R, bb:$dst */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* opc */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_CPYSES (319) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSESt (320) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSET (321) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSNS (322) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSNSt (323) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSNT (324) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSNTs (325) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSS (326) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSSt (327) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYST (328) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CPYSTs (329) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CTLZ (330) - Alpha_INS_CTLZ - ctlz $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CTPOP (331) - Alpha_INS_CTPOP - ctpop $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CTTZ (332) - Alpha_INS_CTTZ - cttz $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CVTQS (333) - Alpha_INS_CVTQSsSUI - cvtqs/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CVTQT (334) - Alpha_INS_CVTQTsSUI - cvtqt/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CVTST (335) - Alpha_INS_CVTSTsS - cvtst/s $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CVTTQ (336) - Alpha_INS_CVTTQsSVC - cvttq/svc $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_CVTTS (337) - Alpha_INS_CVTTSsSUI - cvtts/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_DIVS (338) - Alpha_INS_DIVSsSU - divs/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_DIVT (339) - Alpha_INS_DIVTsSU - divt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ECB (340) - Alpha_INS_ECB - ecb ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EQVi (341) - Alpha_INS_EQV - eqv $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EQVr (342) - Alpha_INS_EQV - eqv $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXCB (343) - Alpha_INS_EXCB - excb */ @@ -1363,371 +1363,371 @@ }}, { /* Alpha_EXTBL (344) - Alpha_INS_EXTBL - extbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTBLi (345) - Alpha_INS_EXTBL - extbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTLH (346) - Alpha_INS_EXTLH - extlh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTLHi (347) - Alpha_INS_EXTLH - extlh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTLL (348) - Alpha_INS_EXTLL - extll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTLLi (349) - Alpha_INS_EXTLL - extll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTQH (350) - Alpha_INS_EXTQH - extqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTQHi (351) - Alpha_INS_EXTQH - extqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTQL (352) - Alpha_INS_EXTQL - extql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTQLi (353) - Alpha_INS_EXTQL - extql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTWH (354) - Alpha_INS_EXTWH - extwh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTWHi (355) - Alpha_INS_EXTWH - extwh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_EXTWL (356) - Alpha_INS_EXTWL - extwl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_EXTWLi (357) - Alpha_INS_EXTWL - extwl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_FBEQ (358) - Alpha_INS_FBEQ - fbeq $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FBGE (359) - Alpha_INS_FBGE - fbge $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FBGT (360) - Alpha_INS_FBGT - fbgt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FBLE (361) - Alpha_INS_FBLE - fble $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FBLT (362) - Alpha_INS_FBLT - fblt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FBNE (363) - Alpha_INS_FBNE - fbne $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* R */ - { CS_OP_INVALID, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ { 0 } }}, { /* Alpha_FCMOVEQS (364) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVEQT (365) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGES (366) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGET (367) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGTS (368) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGTT (369) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLES (370) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLET (371) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLTS (372) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLTT (373) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVNES (374) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVNET (375) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ { 0 } }}, { /* Alpha_FETCH (376) - Alpha_INS_FETCH - fetch ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_FETCH_M (377) - Alpha_INS_FETCH_M - fetch_m ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_FTOIS (378) - Alpha_INS_FTOIS - ftois $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_FTOIT (379) - Alpha_INS_FTOIT - ftoit $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_INSBL (380) - Alpha_INS_INSBL - insbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSBLi (381) - Alpha_INS_INSBL - insbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSLH (382) - Alpha_INS_INSLH - inslh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSLHi (383) - Alpha_INS_INSLH - inslh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSLL (384) - Alpha_INS_INSLL - insll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSLLi (385) - Alpha_INS_INSLL - insll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSQH (386) - Alpha_INS_INSQH - insqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSQHi (387) - Alpha_INS_INSQH - insqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSQL (388) - Alpha_INS_INSQL - insql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSQLi (389) - Alpha_INS_INSQL - insql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSWH (390) - Alpha_INS_INSWH - inswh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSWHi (391) - Alpha_INS_INSWH - inswh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_INSWL (392) - Alpha_INS_INSWL - inswl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_INSWLi (393) - Alpha_INS_INSWL - inswl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_ITOFS (394) - Alpha_INS_ITOFS - itofs $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_ITOFT (395) - Alpha_INS_ITOFT - itoft $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_JMP (396) - Alpha_INS_JMP - jmp $$31,{$RS},0 */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RS */ { 0 } }}, { /* Alpha_JSR (397) - Alpha_INS_JSR - jsr $$26,($$27),0 */ @@ -1736,9 +1736,9 @@ }}, { /* Alpha_JSR_COROUTINE (398) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,($RS),$DISP */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RD */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RS */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RD */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RS */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ { 0 } }}, { /* Alpha_JSRs (399) - Alpha_INS_JSR - jsr $$23,($$27),0 */ @@ -1747,158 +1747,158 @@ }}, { /* Alpha_LDA (400) - Alpha_INS_LDA - lda $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDAH (401) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDAHg (402) - Alpha_INS_LDAH - ldah $RA,0($RB) !gpdisp!$NUM */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* NUM */ { 0 } }}, { /* Alpha_LDAHr (403) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) !gprelhigh */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDAg (404) - Alpha_INS_LDA - lda $RA,0($RB) !gpdisp!$NUM */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* NUM */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* NUM */ { 0 } }}, { /* Alpha_LDAr (405) - Alpha_INS_LDA - lda $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDBU (406) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDBUr (407) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDL (408) - Alpha_INS_LDL - ldl $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDL_L (409) - Alpha_INS_LDL_L - ldl_l $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDLr (410) - Alpha_INS_LDL - ldl $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDQ (411) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDQ_L (412) - Alpha_INS_LDQ_L - ldq_l $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDQ_U (413) - Alpha_INS_LDQ_U - ldq_u $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDQl (414) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !literal */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDQr (415) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDS (416) - Alpha_INS_LDS - lds $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDSr (417) - Alpha_INS_LDS - lds $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDT (418) - Alpha_INS_LDT - ldt $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDTr (419) - Alpha_INS_LDT - ldt $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDWU (420) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_LDWUr (421) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MB (422) - Alpha_INS_MB - mb */ @@ -1907,161 +1907,161 @@ }}, { /* Alpha_MSKBL (423) - Alpha_INS_MSKBL - mskbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKBLi (424) - Alpha_INS_MSKBL - mskbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKLH (425) - Alpha_INS_MSKLH - msklh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKLHi (426) - Alpha_INS_MSKLH - msklh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKLL (427) - Alpha_INS_MSKLL - mskll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKLLi (428) - Alpha_INS_MSKLL - mskll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKQH (429) - Alpha_INS_MSKQH - mskqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKQHi (430) - Alpha_INS_MSKQH - mskqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKQL (431) - Alpha_INS_MSKQL - mskql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKQLi (432) - Alpha_INS_MSKQL - mskql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKWH (433) - Alpha_INS_MSKWH - mskwh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKWHi (434) - Alpha_INS_MSKWH - mskwh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MSKWL (435) - Alpha_INS_MSKWL - mskwl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MSKWLi (436) - Alpha_INS_MSKWL - mskwl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MULLi (437) - Alpha_INS_MULL - mull $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MULLr (438) - Alpha_INS_MULL - mull $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MULQi (439) - Alpha_INS_MULQ - mulq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_MULQr (440) - Alpha_INS_MULQ - mulq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MULS (441) - Alpha_INS_MULSsSU - muls/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_MULT (442) - Alpha_INS_MULTsSU - mult/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ORNOTi (443) - Alpha_INS_ORNOT - ornot $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_ORNOTr (444) - Alpha_INS_ORNOT - ornot $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_RC (445) - Alpha_INS_RC - rc $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_RETDAG (446) - Alpha_INS_RET - ret $$31,($$26),1 */ @@ -2074,340 +2074,340 @@ }}, { /* Alpha_RPCC (448) - Alpha_INS_RPCC - rpcc $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_RS (449) - Alpha_INS_RS - rs $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ { 0 } }}, { /* Alpha_S4ADDLi (450) - Alpha_INS_S4ADDL - s4addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S4ADDLr (451) - Alpha_INS_S4ADDL - s4addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S4ADDQi (452) - Alpha_INS_S4ADDQ - s4addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S4ADDQr (453) - Alpha_INS_S4ADDQ - s4addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S4SUBLi (454) - Alpha_INS_S4SUBL - s4subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S4SUBLr (455) - Alpha_INS_S4SUBL - s4subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S4SUBQi (456) - Alpha_INS_S4SUBQ - s4subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S4SUBQr (457) - Alpha_INS_S4SUBQ - s4subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S8ADDLi (458) - Alpha_INS_S8ADDL - s8addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S8ADDLr (459) - Alpha_INS_S8ADDL - s8addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S8ADDQi (460) - Alpha_INS_S8ADDQ - s8addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S8ADDQr (461) - Alpha_INS_S8ADDQ - s8addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S8SUBLi (462) - Alpha_INS_S8SUBL - s8subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S8SUBLr (463) - Alpha_INS_S8SUBL - s8subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_S8SUBQi (464) - Alpha_INS_S8SUBQ - s8subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_S8SUBQr (465) - Alpha_INS_S8SUBQ - s8subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SEXTB (466) - Alpha_INS_SEXTB - sextb $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SEXTW (467) - Alpha_INS_SEXTW - sextw $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SLi (468) - Alpha_INS_SLL - sll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_SLr (469) - Alpha_INS_SLL - sll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SQRTS (470) - Alpha_INS_SQRTSsSU - sqrts/su $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SQRTT (471) - Alpha_INS_SQRTTsSU - sqrtt/su $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SRAi (472) - Alpha_INS_SRA - sra $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_SRAr (473) - Alpha_INS_SRA - sra $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SRLi (474) - Alpha_INS_SRL - srl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_SRLr (475) - Alpha_INS_SRL - srl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STB (476) - Alpha_INS_STB - stb $RA, $DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STBr (477) - Alpha_INS_STB - stb $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STL (478) - Alpha_INS_STL - stl $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STL_C (479) - Alpha_INS_STL_C - stl_c $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STLr (480) - Alpha_INS_STL - stl $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STQ (481) - Alpha_INS_STQ - stq $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STQ_C (482) - Alpha_INS_STQ_C - stq_c $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RR */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STQ_U (483) - Alpha_INS_STQ_U - stq_u $RA, $DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STQr (484) - Alpha_INS_STQ - stq $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STS (485) - Alpha_INS_STS - sts $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STSr (486) - Alpha_INS_STS - sts $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STT (487) - Alpha_INS_STT - stt $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STTr (488) - Alpha_INS_STT - stt $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STW (489) - Alpha_INS_STW - stw $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_STWr (490) - Alpha_INS_STW - stw $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SUBLi (491) - Alpha_INS_SUBL - subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_SUBLr (492) - Alpha_INS_SUBL - subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SUBQi (493) - Alpha_INS_SUBQ - subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_SUBQr (494) - Alpha_INS_SUBQ - subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SUBS (495) - Alpha_INS_SUBSsSU - subs/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_SUBT (496) - Alpha_INS_SUBTsSU - subt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_TRAPB (497) - Alpha_INS_TRAPB - trapb */ @@ -2416,28 +2416,28 @@ }}, { /* Alpha_UMULHi (498) - Alpha_INS_UMULH - umulh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_UMULHr (499) - Alpha_INS_UMULH - umulh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_WH64 (500) - Alpha_INS_WH64 - wh64 ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_WH64EN (501) - Alpha_INS_WH64EN - wh64en ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_WMB (502) - Alpha_INS_WMB - wmb */ @@ -2446,22 +2446,22 @@ }}, { /* Alpha_XORi (503) - Alpha_INS_XOR - xor $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, { /* Alpha_XORr (504) - Alpha_INS_XOR - xor $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ { 0 } }}, { /* Alpha_ZAPNOTi (505) - Alpha_INS_ZAPNOT - zapnot $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ { 0 } }}, diff --git a/arch/Alpha/AlphaGenCSOpGroup.inc b/arch/Alpha/AlphaGenCSOpGroup.inc index dad38bd6ad..787fced14d 100644 --- a/arch/Alpha/AlphaGenCSOpGroup.inc +++ b/arch/Alpha/AlphaGenCSOpGroup.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaGenDisassemblerTables.inc b/arch/Alpha/AlphaGenDisassemblerTables.inc index 697f07e520..30a8c090f0 100644 --- a/arch/Alpha/AlphaGenDisassemblerTables.inc +++ b/arch/Alpha/AlphaGenDisassemblerTables.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaGenInstrInfo.inc b/arch/Alpha/AlphaGenInstrInfo.inc index ec74f73221..35f59de737 100644 --- a/arch/Alpha/AlphaGenInstrInfo.inc +++ b/arch/Alpha/AlphaGenInstrInfo.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ @@ -575,22 +575,22 @@ static const MCOperandInfo OperandInfo43[] = { { -1, 0, MCOI_OPERAND_GENERIC_0, static const MCOperandInfo OperandInfo44[] = { { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI_OPERAND_GENERIC_1, 0 }, }; static const MCOperandInfo OperandInfo45[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo46[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo47[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; -static const MCOperandInfo OperandInfo48[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; -static const MCOperandInfo OperandInfo49[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo50[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo51[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; -static const MCOperandInfo OperandInfo52[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, }; +static const MCOperandInfo OperandInfo47[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo48[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo49[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo50[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 }, }; +static const MCOperandInfo OperandInfo51[] = { { -1, 0, MCOI_OPERAND_PCREL, 0 }, }; +static const MCOperandInfo OperandInfo52[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, }; static const MCOperandInfo OperandInfo53[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, }; -static const MCOperandInfo OperandInfo54[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; -static const MCOperandInfo OperandInfo55[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo54[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 }, }; +static const MCOperandInfo OperandInfo55[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 }, }; static const MCOperandInfo OperandInfo56[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo57[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo58[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo59[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo60[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo61[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo62[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo62[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_PCREL, 0 }, }; static const MCOperandInfo OperandInfo63[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo64[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo65[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; @@ -598,12 +598,12 @@ static const MCOperandInfo OperandInfo66[] = { { Alpha_GPRCRegClassID, 0, MCOI_O static const MCOperandInfo OperandInfo67[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo68[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo69[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo70[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo71[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; -static const MCOperandInfo OperandInfo72[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo73[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo70[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo71[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo72[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo73[] = { { Alpha_F8RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCOperandInfo OperandInfo74[] = { { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_F4RCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; -static const MCOperandInfo OperandInfo75[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; +static const MCOperandInfo OperandInfo75[] = { { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, CONSTRAINT_MCOI_TIED_TO(0) }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { Alpha_GPRCRegClassID, 0, MCOI_OPERAND_REGISTER, 0 }, }; static const MCInstrDesc AlphaInsts[] = { { 1, OperandInfo2 }, // Inst #0 = PHI @@ -857,40 +857,40 @@ static const MCInstrDesc AlphaInsts[] = { { 2, OperandInfo23 }, // Inst #248 = G_VECREDUCE_UMIN { 4, OperandInfo44 }, // Inst #249 = G_SBFX { 4, OperandInfo44 }, // Inst #250 = G_UBFX - { 2, OperandInfo7 }, // Inst #251 = ADJUSTSTACKDOWN - { 2, OperandInfo7 }, // Inst #252 = ADJUSTSTACKUP - { 1, OperandInfo2 }, // Inst #253 = ALTENT + { 2, OperandInfo10 }, // Inst #251 = ADJUSTSTACKDOWN + { 2, OperandInfo10 }, // Inst #252 = ADJUSTSTACKUP + { 1, OperandInfo3 }, // Inst #253 = ALTENT { 4, OperandInfo45 }, // Inst #254 = CAS32 { 4, OperandInfo45 }, // Inst #255 = CAS64 { 3, OperandInfo46 }, // Inst #256 = LAS32 { 3, OperandInfo46 }, // Inst #257 = LAS64 - { 4, OperandInfo47 }, // Inst #258 = MEMLABEL - { 1, OperandInfo2 }, // Inst #259 = PCLABEL + { 4, OperandInfo8 }, // Inst #258 = MEMLABEL + { 1, OperandInfo3 }, // Inst #259 = PCLABEL { 3, OperandInfo46 }, // Inst #260 = SWAP32 { 3, OperandInfo46 }, // Inst #261 = SWAP64 { 0, 0 }, // Inst #262 = WTF - { 3, OperandInfo48 }, // Inst #263 = ADDLi + { 3, OperandInfo47 }, // Inst #263 = ADDLi { 3, OperandInfo46 }, // Inst #264 = ADDLr - { 3, OperandInfo48 }, // Inst #265 = ADDQi + { 3, OperandInfo47 }, // Inst #265 = ADDQi { 3, OperandInfo46 }, // Inst #266 = ADDQr - { 3, OperandInfo49 }, // Inst #267 = ADDS - { 3, OperandInfo50 }, // Inst #268 = ADDT - { 3, OperandInfo48 }, // Inst #269 = ANDi + { 3, OperandInfo48 }, // Inst #267 = ADDS + { 3, OperandInfo49 }, // Inst #268 = ADDT + { 3, OperandInfo47 }, // Inst #269 = ANDi { 3, OperandInfo46 }, // Inst #270 = ANDr - { 2, OperandInfo51 }, // Inst #271 = BEQ - { 2, OperandInfo51 }, // Inst #272 = BGE - { 2, OperandInfo51 }, // Inst #273 = BGT - { 3, OperandInfo48 }, // Inst #274 = BICi + { 2, OperandInfo50 }, // Inst #271 = BEQ + { 2, OperandInfo50 }, // Inst #272 = BGE + { 2, OperandInfo50 }, // Inst #273 = BGT + { 3, OperandInfo47 }, // Inst #274 = BICi { 3, OperandInfo46 }, // Inst #275 = BICr - { 3, OperandInfo48 }, // Inst #276 = BISi + { 3, OperandInfo47 }, // Inst #276 = BISi { 3, OperandInfo46 }, // Inst #277 = BISr - { 2, OperandInfo51 }, // Inst #278 = BLBC - { 2, OperandInfo51 }, // Inst #279 = BLBS - { 2, OperandInfo51 }, // Inst #280 = BLE - { 2, OperandInfo51 }, // Inst #281 = BLT - { 2, OperandInfo51 }, // Inst #282 = BNE - { 1, OperandInfo2 }, // Inst #283 = BR - { 1, OperandInfo2 }, // Inst #284 = BSR + { 2, OperandInfo50 }, // Inst #278 = BLBC + { 2, OperandInfo50 }, // Inst #279 = BLBS + { 2, OperandInfo50 }, // Inst #280 = BLE + { 2, OperandInfo50 }, // Inst #281 = BLT + { 2, OperandInfo50 }, // Inst #282 = BNE + { 1, OperandInfo51 }, // Inst #283 = BR + { 1, OperandInfo51 }, // Inst #284 = BSR { 4, OperandInfo52 }, // Inst #285 = CMOVEQi { 4, OperandInfo53 }, // Inst #286 = CMOVEQr { 4, OperandInfo52 }, // Inst #287 = CMOVGEi @@ -908,33 +908,33 @@ static const MCInstrDesc AlphaInsts[] = { { 4, OperandInfo52 }, // Inst #299 = CMOVNEi { 4, OperandInfo53 }, // Inst #300 = CMOVNEr { 3, OperandInfo46 }, // Inst #301 = CMPBGE - { 3, OperandInfo48 }, // Inst #302 = CMPBGEi + { 3, OperandInfo47 }, // Inst #302 = CMPBGEi { 3, OperandInfo46 }, // Inst #303 = CMPEQ - { 3, OperandInfo48 }, // Inst #304 = CMPEQi + { 3, OperandInfo47 }, // Inst #304 = CMPEQi { 3, OperandInfo46 }, // Inst #305 = CMPLE - { 3, OperandInfo48 }, // Inst #306 = CMPLEi + { 3, OperandInfo47 }, // Inst #306 = CMPLEi { 3, OperandInfo46 }, // Inst #307 = CMPLT - { 3, OperandInfo48 }, // Inst #308 = CMPLTi - { 3, OperandInfo50 }, // Inst #309 = CMPTEQ - { 3, OperandInfo50 }, // Inst #310 = CMPTLE - { 3, OperandInfo50 }, // Inst #311 = CMPTLT - { 3, OperandInfo50 }, // Inst #312 = CMPTUN + { 3, OperandInfo47 }, // Inst #308 = CMPLTi + { 3, OperandInfo49 }, // Inst #309 = CMPTEQ + { 3, OperandInfo49 }, // Inst #310 = CMPTLE + { 3, OperandInfo49 }, // Inst #311 = CMPTLT + { 3, OperandInfo49 }, // Inst #312 = CMPTUN { 3, OperandInfo46 }, // Inst #313 = CMPULE - { 3, OperandInfo48 }, // Inst #314 = CMPULEi + { 3, OperandInfo47 }, // Inst #314 = CMPULEi { 3, OperandInfo46 }, // Inst #315 = CMPULT - { 3, OperandInfo48 }, // Inst #316 = CMPULTi + { 3, OperandInfo47 }, // Inst #316 = CMPULTi { 3, OperandInfo54 }, // Inst #317 = COND_BRANCH_F { 3, OperandInfo55 }, // Inst #318 = COND_BRANCH_I - { 3, OperandInfo49 }, // Inst #319 = CPYSES + { 3, OperandInfo48 }, // Inst #319 = CPYSES { 3, OperandInfo56 }, // Inst #320 = CPYSESt - { 3, OperandInfo50 }, // Inst #321 = CPYSET - { 3, OperandInfo49 }, // Inst #322 = CPYSNS + { 3, OperandInfo49 }, // Inst #321 = CPYSET + { 3, OperandInfo48 }, // Inst #322 = CPYSNS { 3, OperandInfo56 }, // Inst #323 = CPYSNSt - { 3, OperandInfo50 }, // Inst #324 = CPYSNT + { 3, OperandInfo49 }, // Inst #324 = CPYSNT { 3, OperandInfo57 }, // Inst #325 = CPYSNTs - { 3, OperandInfo49 }, // Inst #326 = CPYSS + { 3, OperandInfo48 }, // Inst #326 = CPYSS { 3, OperandInfo56 }, // Inst #327 = CPYSSt - { 3, OperandInfo50 }, // Inst #328 = CPYST + { 3, OperandInfo49 }, // Inst #328 = CPYST { 3, OperandInfo57 }, // Inst #329 = CPYSTs { 2, OperandInfo58 }, // Inst #330 = CTLZ { 2, OperandInfo58 }, // Inst #331 = CTPOP @@ -944,26 +944,26 @@ static const MCInstrDesc AlphaInsts[] = { { 2, OperandInfo61 }, // Inst #335 = CVTST { 2, OperandInfo60 }, // Inst #336 = CVTTQ { 2, OperandInfo59 }, // Inst #337 = CVTTS - { 3, OperandInfo49 }, // Inst #338 = DIVS - { 3, OperandInfo50 }, // Inst #339 = DIVT + { 3, OperandInfo48 }, // Inst #338 = DIVS + { 3, OperandInfo49 }, // Inst #339 = DIVT { 2, OperandInfo58 }, // Inst #340 = ECB - { 3, OperandInfo48 }, // Inst #341 = EQVi + { 3, OperandInfo47 }, // Inst #341 = EQVi { 3, OperandInfo46 }, // Inst #342 = EQVr { 0, 0 }, // Inst #343 = EXCB { 3, OperandInfo46 }, // Inst #344 = EXTBL - { 3, OperandInfo48 }, // Inst #345 = EXTBLi + { 3, OperandInfo47 }, // Inst #345 = EXTBLi { 3, OperandInfo46 }, // Inst #346 = EXTLH - { 3, OperandInfo48 }, // Inst #347 = EXTLHi + { 3, OperandInfo47 }, // Inst #347 = EXTLHi { 3, OperandInfo46 }, // Inst #348 = EXTLL - { 3, OperandInfo48 }, // Inst #349 = EXTLLi + { 3, OperandInfo47 }, // Inst #349 = EXTLLi { 3, OperandInfo46 }, // Inst #350 = EXTQH - { 3, OperandInfo48 }, // Inst #351 = EXTQHi + { 3, OperandInfo47 }, // Inst #351 = EXTQHi { 3, OperandInfo46 }, // Inst #352 = EXTQL - { 3, OperandInfo48 }, // Inst #353 = EXTQLi + { 3, OperandInfo47 }, // Inst #353 = EXTQLi { 3, OperandInfo46 }, // Inst #354 = EXTWH - { 3, OperandInfo48 }, // Inst #355 = EXTWHi + { 3, OperandInfo47 }, // Inst #355 = EXTWHi { 3, OperandInfo46 }, // Inst #356 = EXTWL - { 3, OperandInfo48 }, // Inst #357 = EXTWLi + { 3, OperandInfo47 }, // Inst #357 = EXTWLi { 2, OperandInfo62 }, // Inst #358 = FBEQ { 2, OperandInfo62 }, // Inst #359 = FBGE { 2, OperandInfo62 }, // Inst #360 = FBGT @@ -987,24 +987,24 @@ static const MCInstrDesc AlphaInsts[] = { { 2, OperandInfo65 }, // Inst #378 = FTOIS { 2, OperandInfo66 }, // Inst #379 = FTOIT { 3, OperandInfo46 }, // Inst #380 = INSBL - { 3, OperandInfo48 }, // Inst #381 = INSBLi + { 3, OperandInfo47 }, // Inst #381 = INSBLi { 3, OperandInfo46 }, // Inst #382 = INSLH - { 3, OperandInfo48 }, // Inst #383 = INSLHi + { 3, OperandInfo47 }, // Inst #383 = INSLHi { 3, OperandInfo46 }, // Inst #384 = INSLL - { 3, OperandInfo48 }, // Inst #385 = INSLLi + { 3, OperandInfo47 }, // Inst #385 = INSLLi { 3, OperandInfo46 }, // Inst #386 = INSQH - { 3, OperandInfo48 }, // Inst #387 = INSQHi + { 3, OperandInfo47 }, // Inst #387 = INSQHi { 3, OperandInfo46 }, // Inst #388 = INSQL - { 3, OperandInfo48 }, // Inst #389 = INSQLi + { 3, OperandInfo47 }, // Inst #389 = INSQLi { 3, OperandInfo46 }, // Inst #390 = INSWH - { 3, OperandInfo48 }, // Inst #391 = INSWHi + { 3, OperandInfo47 }, // Inst #391 = INSWHi { 3, OperandInfo46 }, // Inst #392 = INSWL - { 3, OperandInfo48 }, // Inst #393 = INSWLi + { 3, OperandInfo47 }, // Inst #393 = INSWLi { 2, OperandInfo67 }, // Inst #394 = ITOFS { 2, OperandInfo68 }, // Inst #395 = ITOFT { 1, OperandInfo69 }, // Inst #396 = JMP { 0, 0 }, // Inst #397 = JSR - { 3, OperandInfo48 }, // Inst #398 = JSR_COROUTINE + { 3, OperandInfo47 }, // Inst #398 = JSR_COROUTINE { 0, 0 }, // Inst #399 = JSRs { 3, OperandInfo70 }, // Inst #400 = LDA { 3, OperandInfo70 }, // Inst #401 = LDAH @@ -1030,57 +1030,57 @@ static const MCInstrDesc AlphaInsts[] = { { 3, OperandInfo70 }, // Inst #421 = LDWUr { 0, 0 }, // Inst #422 = MB { 3, OperandInfo46 }, // Inst #423 = MSKBL - { 3, OperandInfo48 }, // Inst #424 = MSKBLi + { 3, OperandInfo47 }, // Inst #424 = MSKBLi { 3, OperandInfo46 }, // Inst #425 = MSKLH - { 3, OperandInfo48 }, // Inst #426 = MSKLHi + { 3, OperandInfo47 }, // Inst #426 = MSKLHi { 3, OperandInfo46 }, // Inst #427 = MSKLL - { 3, OperandInfo48 }, // Inst #428 = MSKLLi + { 3, OperandInfo47 }, // Inst #428 = MSKLLi { 3, OperandInfo46 }, // Inst #429 = MSKQH - { 3, OperandInfo48 }, // Inst #430 = MSKQHi + { 3, OperandInfo47 }, // Inst #430 = MSKQHi { 3, OperandInfo46 }, // Inst #431 = MSKQL - { 3, OperandInfo48 }, // Inst #432 = MSKQLi + { 3, OperandInfo47 }, // Inst #432 = MSKQLi { 3, OperandInfo46 }, // Inst #433 = MSKWH - { 3, OperandInfo48 }, // Inst #434 = MSKWHi + { 3, OperandInfo47 }, // Inst #434 = MSKWHi { 3, OperandInfo46 }, // Inst #435 = MSKWL - { 3, OperandInfo48 }, // Inst #436 = MSKWLi - { 3, OperandInfo48 }, // Inst #437 = MULLi + { 3, OperandInfo47 }, // Inst #436 = MSKWLi + { 3, OperandInfo47 }, // Inst #437 = MULLi { 3, OperandInfo46 }, // Inst #438 = MULLr - { 3, OperandInfo48 }, // Inst #439 = MULQi + { 3, OperandInfo47 }, // Inst #439 = MULQi { 3, OperandInfo46 }, // Inst #440 = MULQr - { 3, OperandInfo49 }, // Inst #441 = MULS - { 3, OperandInfo50 }, // Inst #442 = MULT - { 3, OperandInfo48 }, // Inst #443 = ORNOTi + { 3, OperandInfo48 }, // Inst #441 = MULS + { 3, OperandInfo49 }, // Inst #442 = MULT + { 3, OperandInfo47 }, // Inst #443 = ORNOTi { 3, OperandInfo46 }, // Inst #444 = ORNOTr { 1, OperandInfo69 }, // Inst #445 = RC { 0, 0 }, // Inst #446 = RETDAG { 0, 0 }, // Inst #447 = RETDAGp { 2, OperandInfo58 }, // Inst #448 = RPCC { 1, OperandInfo69 }, // Inst #449 = RS - { 3, OperandInfo48 }, // Inst #450 = S4ADDLi + { 3, OperandInfo47 }, // Inst #450 = S4ADDLi { 3, OperandInfo46 }, // Inst #451 = S4ADDLr - { 3, OperandInfo48 }, // Inst #452 = S4ADDQi + { 3, OperandInfo47 }, // Inst #452 = S4ADDQi { 3, OperandInfo46 }, // Inst #453 = S4ADDQr - { 3, OperandInfo48 }, // Inst #454 = S4SUBLi + { 3, OperandInfo47 }, // Inst #454 = S4SUBLi { 3, OperandInfo46 }, // Inst #455 = S4SUBLr - { 3, OperandInfo48 }, // Inst #456 = S4SUBQi + { 3, OperandInfo47 }, // Inst #456 = S4SUBQi { 3, OperandInfo46 }, // Inst #457 = S4SUBQr - { 3, OperandInfo48 }, // Inst #458 = S8ADDLi + { 3, OperandInfo47 }, // Inst #458 = S8ADDLi { 3, OperandInfo46 }, // Inst #459 = S8ADDLr - { 3, OperandInfo48 }, // Inst #460 = S8ADDQi + { 3, OperandInfo47 }, // Inst #460 = S8ADDQi { 3, OperandInfo46 }, // Inst #461 = S8ADDQr - { 3, OperandInfo48 }, // Inst #462 = S8SUBLi + { 3, OperandInfo47 }, // Inst #462 = S8SUBLi { 3, OperandInfo46 }, // Inst #463 = S8SUBLr - { 3, OperandInfo48 }, // Inst #464 = S8SUBQi + { 3, OperandInfo47 }, // Inst #464 = S8SUBQi { 3, OperandInfo46 }, // Inst #465 = S8SUBQr { 2, OperandInfo58 }, // Inst #466 = SEXTB { 2, OperandInfo58 }, // Inst #467 = SEXTW - { 3, OperandInfo48 }, // Inst #468 = SLi + { 3, OperandInfo47 }, // Inst #468 = SLi { 3, OperandInfo46 }, // Inst #469 = SLr { 2, OperandInfo74 }, // Inst #470 = SQRTS { 2, OperandInfo60 }, // Inst #471 = SQRTT - { 3, OperandInfo48 }, // Inst #472 = SRAi + { 3, OperandInfo47 }, // Inst #472 = SRAi { 3, OperandInfo46 }, // Inst #473 = SRAr - { 3, OperandInfo48 }, // Inst #474 = SRLi + { 3, OperandInfo47 }, // Inst #474 = SRLi { 3, OperandInfo46 }, // Inst #475 = SRLr { 3, OperandInfo70 }, // Inst #476 = STB { 3, OperandInfo70 }, // Inst #477 = STBr @@ -1097,21 +1097,21 @@ static const MCInstrDesc AlphaInsts[] = { { 3, OperandInfo73 }, // Inst #488 = STTr { 3, OperandInfo70 }, // Inst #489 = STW { 3, OperandInfo70 }, // Inst #490 = STWr - { 3, OperandInfo48 }, // Inst #491 = SUBLi + { 3, OperandInfo47 }, // Inst #491 = SUBLi { 3, OperandInfo46 }, // Inst #492 = SUBLr - { 3, OperandInfo48 }, // Inst #493 = SUBQi + { 3, OperandInfo47 }, // Inst #493 = SUBQi { 3, OperandInfo46 }, // Inst #494 = SUBQr - { 3, OperandInfo49 }, // Inst #495 = SUBS - { 3, OperandInfo50 }, // Inst #496 = SUBT + { 3, OperandInfo48 }, // Inst #495 = SUBS + { 3, OperandInfo49 }, // Inst #496 = SUBT { 0, 0 }, // Inst #497 = TRAPB - { 3, OperandInfo48 }, // Inst #498 = UMULHi + { 3, OperandInfo47 }, // Inst #498 = UMULHi { 3, OperandInfo46 }, // Inst #499 = UMULHr { 2, OperandInfo58 }, // Inst #500 = WH64 { 2, OperandInfo58 }, // Inst #501 = WH64EN { 0, 0 }, // Inst #502 = WMB - { 3, OperandInfo48 }, // Inst #503 = XORi + { 3, OperandInfo47 }, // Inst #503 = XORi { 3, OperandInfo46 }, // Inst #504 = XORr - { 3, OperandInfo48 }, // Inst #505 = ZAPNOTi + { 3, OperandInfo47 }, // Inst #505 = ZAPNOTi }; #endif // GET_INSTRINFO_MC_DESC diff --git a/arch/Alpha/AlphaGenRegisterInfo.inc b/arch/Alpha/AlphaGenRegisterInfo.inc index 0659f4cfd5..157e3c7dfc 100644 --- a/arch/Alpha/AlphaGenRegisterInfo.inc +++ b/arch/Alpha/AlphaGenRegisterInfo.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaGenSubtargetInfo.inc b/arch/Alpha/AlphaGenSubtargetInfo.inc index e852cb48f2..7082918b2d 100644 --- a/arch/Alpha/AlphaGenSubtargetInfo.inc +++ b/arch/Alpha/AlphaGenSubtargetInfo.inc @@ -1,10 +1,10 @@ -/* Capstone Disassembly Engine, http://www.capstone-engine.org */ +/* Capstone Disassembly Engine, https://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2022, */ /* Rot127 2022-2023 */ /* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ -/* LLVM-commit: 92734d6f460a01145443e48418af3a8635ca1afa */ -/* LLVM-tag: */ +/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ +/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ /* Do not edit. */ diff --git a/arch/Alpha/AlphaInstPrinter.c b/arch/Alpha/AlphaInstPrinter.c index cfaca2b9d4..dff35e1d4b 100644 --- a/arch/Alpha/AlphaInstPrinter.c +++ b/arch/Alpha/AlphaInstPrinter.c @@ -9,6 +9,7 @@ #include #include "../../utils.h" +#include "../../Mapping.h" #include "../../MCInstPrinter.h" #include "AlphaLinkage.h" @@ -17,9 +18,8 @@ static const char *getRegisterName(unsigned RegNo); static void printInstruction(MCInst *, uint64_t, SStream *); - static void printOperand(MCInst *MI, int OpNum, SStream *O); - +static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O); #define GET_INSTRINFO_ENUM @@ -29,37 +29,18 @@ static void printOperand(MCInst *MI, int OpNum, SStream *O); #include "AlphaGenRegisterInfo.inc" -static inline void fill_alpha_register(MCInst *MI, uint32_t reg) -{ - if (!(MI->csh->detail == CS_OPT_ON && MI->flat_insn->detail)) - return; - cs_alpha *alpha = &MI->flat_insn->detail->alpha; - alpha->operands[alpha->op_count].type = ALPHA_OP_REG; - alpha->operands[alpha->op_count].reg = reg; - alpha->op_count++; -} - -static inline void fill_alpha_imm(MCInst *MI, int32_t imm) -{ - if (!(MI->csh->detail == CS_OPT_ON && MI->flat_insn->detail)) - return; - cs_alpha *alpha = &MI->flat_insn->detail->alpha; - alpha->operands[alpha->op_count].type = ALPHA_OP_IMM; - alpha->operands[alpha->op_count].imm = imm; - alpha->op_count++; -} - static void printOperand(MCInst *MI, int OpNum, SStream *O) { - MCOperand *Op; if (OpNum >= MI->size) return; + Alpha_add_cs_detail(MI, OpNum); + + MCOperand *Op; Op = MCInst_getOperand(MI, OpNum); if (MCOperand_isReg(Op)) { unsigned reg = MCOperand_getReg(Op); SStream_concat(O, "%s", getRegisterName(reg)); - fill_alpha_register(MI, reg); } else if (MCOperand_isImm(Op)) { int64_t Imm = MCOperand_getImm(Op); if (Imm >= 0) { @@ -73,11 +54,20 @@ static void printOperand(MCInst *MI, int OpNum, SStream *O) else SStream_concat(O, "-%" PRIu64, -Imm); } - - fill_alpha_imm(MI, (int32_t)Imm); } } +static void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O) +{ + MCOperand *Op = MCInst_getOperand(MI, (OpNum)); + + uint64_t Imm = MCOperand_getImm(Op); + uint64_t Target = Address + 4 + (int16_t) (Imm << 2); + + Alpha_set_detail_op_imm(MI, OpNum, ALPHA_OP_IMM, Target); + printUInt64(O, Target); +} + #define PRINT_ALIAS_INSTR #include "AlphaGenAsmWriter.inc" @@ -91,7 +81,7 @@ const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id) #endif } -void Alpha_LLVM_printInst(MCInst *MI, SStream *O, void *Info) +void Alpha_LLVM_printInstruction(MCInst *MI, SStream *O, void *Info) { printAliasInstr(MI, MI->address, O); printInstruction(MI, MI->address, O); diff --git a/arch/Alpha/AlphaLinkage.h b/arch/Alpha/AlphaLinkage.h index 22868aee32..c3501ddecd 100644 --- a/arch/Alpha/AlphaLinkage.h +++ b/arch/Alpha/AlphaLinkage.h @@ -12,7 +12,10 @@ #include "AlphaMapping.h" const char *Alpha_LLVM_getRegisterName(csh handle, unsigned int id); - -void Alpha_LLVM_printInst(MCInst *MI, SStream *O, void *Info); +void Alpha_LLVM_printInstruction(MCInst *MI, SStream *O, void *Info); +DecodeStatus Alpha_LLVM_getInstruction(csh handle, const uint8_t *Bytes, + size_t ByteLen, MCInst *MI, + uint16_t *Size, uint64_t Address, + void *Info); #endif // CS_ALPHA_LINKAGE_H \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c index bd19ba6bda..f9e2ce1077 100644 --- a/arch/Alpha/AlphaMapping.c +++ b/arch/Alpha/AlphaMapping.c @@ -7,10 +7,13 @@ #include #include "../../Mapping.h" +#include "../../cs_priv.h" +#include "../../cs_simple_types.h" #include "../../utils.h" #include "AlphaLinkage.h" #include "AlphaMapping.h" +#include "./AlphaDisassembler.h" #define GET_INSTRINFO_ENUM @@ -20,15 +23,60 @@ static insn_map insns[] = { #include "AlphaGenCSMappingInsn.inc" }; -// unsigned int Alpha_map_insn_id(cs_struct *h, unsigned int id) -// { -// unsigned short i = -// insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); -// if (i != 0) { -// return insns[i].mapid; -// } -// return 0; -// } +const map_insn_ops insn_operands[] = { +#include "AlphaGenCSMappingInsnOp.inc" +}; + +void Alpha_init_cs_detail(MCInst *MI) +{ + if (detail_is_set(MI)) { + memset(get_detail(MI), 0, + offsetof(cs_detail, alpha) + sizeof(cs_alpha)); + } +} + +void Alpha_add_cs_detail(MCInst *MI, unsigned OpNum) +{ + if (!MI->csh->detail) + return; + + cs_op_type op_type = map_get_op_type(MI, OpNum); + if (op_type == CS_OP_IMM) + Alpha_set_detail_op_imm(MI, OpNum, ALPHA_OP_IMM, + MCInst_getOpVal(MI, OpNum)); + else if (op_type == CS_OP_REG) + Alpha_set_detail_op_reg(MI, OpNum, MCInst_getOpVal(MI, OpNum)); + else + assert(0 && "Op type not handled."); +} + +void Alpha_set_detail_op_imm(MCInst *MI, unsigned OpNum, alpha_op_type ImmType, + int64_t Imm) +{ + if (!detail_is_set(MI)) + return; + assert(!(map_get_op_type(MI, OpNum) & CS_OP_MEM)); + assert(map_get_op_type(MI, OpNum) == CS_OP_IMM); + assert(ImmType == ALPHA_OP_IMM); + + Alpha_get_detail_op(MI, 0)->type = ImmType; + Alpha_get_detail_op(MI, 0)->imm = Imm; + Alpha_get_detail_op(MI, 0)->access = map_get_op_access(MI, OpNum); + Alpha_inc_op_count(MI); +} + +void Alpha_set_detail_op_reg(MCInst *MI, unsigned OpNum, alpha_op_type Reg) +{ + if (!detail_is_set(MI)) + return; + assert(!(map_get_op_type(MI, OpNum) & CS_OP_MEM)); + assert(map_get_op_type(MI, OpNum) == CS_OP_REG); + + Alpha_get_detail_op(MI, 0)->type = ALPHA_OP_REG; + Alpha_get_detail_op(MI, 0)->reg = Reg; + Alpha_get_detail_op(MI, 0)->access = map_get_op_access(MI, OpNum); + Alpha_inc_op_count(MI); +} // given internal insn id, return public instruction info void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) @@ -42,27 +90,19 @@ void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) if (h->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, - sizeof(insns[i].regs_use)); + sizeof(insns[i].regs_use)); insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use); memcpy(insn->detail->regs_write, insns[i].regs_mod, - sizeof(insns[i].regs_mod)); + sizeof(insns[i].regs_mod)); insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod); memcpy(insn->detail->groups, insns[i].groups, - sizeof(insns[i].groups)); + sizeof(insns[i].groups)); insn->detail->groups_count = (uint8_t)count_positive8(insns[i].groups); - - // if (insns[i].branch || insns[i].indirect_branch) { - // // this insn also belongs to JUMP group. add JUMP group - // insn->detail - // ->groups[insn->detail->groups_count] = - // Alpha_GRP_JUMP; - // insn->detail->groups_count++; - // } #endif } } @@ -75,7 +115,7 @@ static const char *insn_names[] = { }; // special alias insn -static name_map alias_insn_names[] = { { 0, NULL } }; +// static name_map alias_insn_names[] = {{0, NULL}}; #endif const char *Alpha_insn_name(csh handle, unsigned int id) @@ -95,9 +135,10 @@ const char *Alpha_insn_name(csh handle, unsigned int id) #ifndef CAPSTONE_DIET static name_map group_name_maps[] = { - { Alpha_GRP_INVALID, NULL }, - { Alpha_GRP_CALL, "call" }, - { Alpha_GRP_JUMP, "jump" }, + {Alpha_GRP_INVALID, NULL}, + {Alpha_GRP_CALL, "call"}, + {Alpha_GRP_JUMP, "jump"}, + {Alpha_GRP_BRANCH_RELATIVE, "branch_relative"}, }; #endif @@ -110,15 +151,33 @@ const char *Alpha_group_name(csh handle, unsigned int id) #endif } -const char *Alpha_getRegisterName(csh handle, unsigned int id) +const char *Alpha_getRegisterName(csh handle, unsigned int id) { return Alpha_LLVM_getRegisterName(handle, id); } -void Alpha_printInst(MCInst *MI, SStream *O, void *Info) +void Alpha_printInst(MCInst *MI, SStream *O, void *Info) { - return Alpha_LLVM_printInst(MI, O, Info); + return Alpha_LLVM_printInstruction(MI, O, Info); } +void Alpha_set_instr_map_data(MCInst *MI) +{ + map_cs_id(MI, insns, ARR_SIZE(insns)); + map_implicit_reads(MI, insns); + map_implicit_writes(MI, insns); + map_groups(MI, insns); +} + +bool Alpha_getInstruction(csh handle, const uint8_t *code, + size_t code_len, MCInst *instr, + uint16_t *size, uint64_t address, void *info) +{ + Alpha_init_cs_detail(instr); + bool Result = Alpha_LLVM_getInstruction(handle, code, code_len, instr, size, + address, info); + Alpha_set_instr_map_data(instr); + return Result; +} #endif \ No newline at end of file diff --git a/arch/Alpha/AlphaMapping.h b/arch/Alpha/AlphaMapping.h index f1d583ffd6..af813f8b78 100644 --- a/arch/Alpha/AlphaMapping.h +++ b/arch/Alpha/AlphaMapping.h @@ -4,6 +4,9 @@ #ifndef CS_ALPHA_MAP_H #define CS_ALPHA_MAP_H +#include "../../MCDisassembler.h" +#include "../../MCInst.h" +#include "../../SStream.h" #include // unsigned int Alpha_map_insn_id(cs_struct *h, unsigned int id); @@ -16,6 +19,16 @@ const char *Alpha_insn_name(csh handle, unsigned int id); const char *Alpha_group_name(csh handle, unsigned int id); void Alpha_printInst(MCInst *MI, SStream *O, void *Info); + const char *Alpha_getRegisterName(csh handle, unsigned int id); +bool Alpha_getInstruction(csh handle, const uint8_t *code, + size_t code_len, MCInst *instr, + uint16_t *size, uint64_t address, void *info); +void Alpha_add_cs_detail(MCInst *MI, unsigned OpNum); + +void Alpha_set_instr_map_data(MCInst *MI); +void Alpha_set_detail_op_imm(MCInst *MI, unsigned OpNum, alpha_op_type ImmType, + int64_t Imm); +void Alpha_set_detail_op_reg(MCInst *MI, unsigned OpNum, alpha_op_type Reg); #endif diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index 56aba680b1..0a29e219e4 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -35,6 +35,7 @@ typedef struct cs_alpha_op { unsigned int reg; // register value for REG operand int32_t imm; // immediate value for IMM operand }; + enum cs_ac_type access; } cs_alpha_op; // Instruction structure @@ -290,6 +291,7 @@ typedef enum alpha_insn_group { //> Generic groups Alpha_GRP_CALL, ///< = CS_GRP_CALL Alpha_GRP_JUMP, ///< = CS_GRP_JUMP + Alpha_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE Alpha_GRP_ENDING, ///< = mark the end of the list of groups } alpha_insn_group; diff --git a/suite/MC/Alpha/insn-alpha.s.cs b/suite/MC/Alpha/insn-alpha.s.cs index e530fab86c..6e4f223db8 100644 --- a/suite/MC/Alpha/insn-alpha.s.cs +++ b/suite/MC/Alpha/insn-alpha.s.cs @@ -7,20 +7,20 @@ 0x03,0xb4,0x22,0x58 = addt/su $f1,$f10,$f11 0x03,0x00,0x22,0x44 = and $1,$2,$3 0x03,0xd0,0x3b,0x44 = and $1,0xde,$3 -0xfc,0x3f,0x20,0xe4 = beq $1,0x3ffc -0xfc,0x3f,0x20,0xf8 = bge $1,0x3ffc -0xfc,0x3f,0x20,0xfc = bgt $1,0x3ffc +0xfc,0x3f,0x20,0xe4 = beq $1,0x14 +0xfc,0x3f,0x20,0xf8 = bge $1,0x18 +0xfc,0x3f,0x20,0xfc = bgt $1,0x1c 0x03,0x01,0x22,0x44 = bic $1,$2,$3 0x03,0xd1,0x3b,0x44 = bic $1,0xde,$3 0x03,0x04,0x22,0x44 = bis $1,$2,$3 0x03,0xd4,0x3b,0x44 = bis $1,0xde,$3 -0xfc,0x3f,0x20,0xe0 = blbc $1,0x3ffc -0xfc,0x3f,0x20,0xf0 = blbs $1,0x3ffc -0xfc,0x3f,0x20,0xec = ble $1,0x3ffc -0xfc,0x3f,0x20,0xe8 = blt $1,0x3ffc -0xfc,0x3f,0x20,0xf4 = bne $1,0x3ffc -0xfc,0x3f,0xe0,0xc3 = br $31,0x3ffc -0xfc,0x3f,0x40,0xd3 = bsr $26,$0x3ffc ..ng +0xfc,0x3f,0x20,0xe0 = blbc $1,0x30 +0xfc,0x3f,0x20,0xf0 = blbs $1,0x34 +0xfc,0x3f,0x20,0xec = ble $1,0x38 +0xfc,0x3f,0x20,0xe8 = blt $1,0x3c +0xfc,0x3f,0x20,0xf4 = bne $1,0x40 +0xfc,0x3f,0xe0,0xc3 = br $31,0x44 +0xfc,0x3f,0x40,0xd3 = bsr $26,$0x48 ..ng 0x83,0x04,0x22,0x44 = cmoveq $1,$2,$3 0xc3,0x08,0x22,0x44 = cmovge $1,$2,$3 0xc3,0x0c,0x22,0x44 = cmovgt $1,$2,$3 @@ -76,12 +76,12 @@ 0x43,0xdb,0x3b,0x48 = extwh $1,0xde,$3 0xc3,0x02,0x22,0x48 = extwl $1,$2,$3 0xc3,0xd2,0x3b,0x48 = extwl $1,0xde,$3 -0xfc,0x3f,0x20,0xc4 = fbeq $f1,0x3ffc -0xfc,0x3f,0x20,0xd8 = fbge $f1,0x3ffc -0xfc,0x3f,0x20,0xdc = fbgt $f1,0x3ffc -0xfc,0x3f,0x20,0xcc = fble $f1,0x3ffc -0xfc,0x3f,0x20,0xc8 = fblt $f1,0x3ffc -0xfc,0x3f,0x20,0xd4 = fbne $f1,0x3ffc +0xfc,0x3f,0x20,0xc4 = fbeq $f1,0x128 +0xfc,0x3f,0x20,0xd8 = fbge $f1,0x12c +0xfc,0x3f,0x20,0xdc = fbgt $f1,0x130 +0xfc,0x3f,0x20,0xcc = fble $f1,0x134 +0xfc,0x3f,0x20,0xc8 = fblt $f1,0x138 +0xfc,0x3f,0x20,0xd4 = fbne $f1,0x13c 0x43,0x05,0x22,0x5c = fcmoveq ,$f10,$f11 0xa3,0x05,0x22,0x5c = fcmovge ,$f10,$f11 0xe3,0x05,0x22,0x5c = fcmovgt ,$f10,$f11 From ad6a1c4780f2b60ed77372e0fb9df8b91e19d9bf Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 6 Aug 2023 17:00:21 +0300 Subject: [PATCH 08/26] Refactor after rebase --- Mapping.c | 1 + Mapping.h | 60 +++---------------------------------------------------- 2 files changed, 4 insertions(+), 57 deletions(-) diff --git a/Mapping.c b/Mapping.c index 0771631b78..1c70e77068 100644 --- a/Mapping.c +++ b/Mapping.c @@ -313,6 +313,7 @@ DEFINE_get_detail_op(arm, ARM); DEFINE_get_detail_op(ppc, PPC); DEFINE_get_detail_op(tricore, TriCore); DEFINE_get_detail_op(aarch64, AArch64); +DEFINE_get_detail_op(alpha, Alpha); /// Returns true if for this architecture the /// alias operands should be filled. diff --git a/Mapping.h b/Mapping.h index 31e7231d0a..1bed623d0b 100644 --- a/Mapping.h +++ b/Mapping.h @@ -145,6 +145,8 @@ DEFINE_inc_detail_op_count(tricore, TriCore); DEFINE_dec_detail_op_count(tricore, TriCore); DEFINE_inc_detail_op_count(aarch64, AArch64); DEFINE_dec_detail_op_count(aarch64, AArch64); +DEFINE_inc_detail_op_count(alpha, Alpha); +DEFINE_dec_detail_op_count(alpha, Alpha); /// Returns true if a memory operand is currently edited. static inline bool doing_mem(const MCInst *MI) @@ -170,6 +172,7 @@ DEFINE_get_arch_detail(arm, ARM); DEFINE_get_arch_detail(ppc, PPC); DEFINE_get_arch_detail(tricore, TriCore); DEFINE_get_arch_detail(aarch64, AArch64); +DEFINE_get_arch_detail(alpha, Alpha); static inline bool detail_is_set(const MCInst *MI) { @@ -203,61 +206,4 @@ bool map_use_alias_details(const MCInst *MI); void map_set_alias_id(MCInst *MI, const SStream *O, const name_map *alias_mnem_id_map, int map_size); -/// Increments the detail->arch.op_count by one. -#define DEFINE_inc_detail_op_count(arch, ARCH) \ - static inline void ARCH##_inc_op_count(MCInst *MI) \ - { \ - MI->flat_insn->detail->arch.op_count++; \ - } - -/// Decrements the detail->arch.op_count by one. -#define DEFINE_dec_detail_op_count(arch, ARCH) \ - static inline void ARCH##_dec_op_count(MCInst *MI) \ - { \ - MI->flat_insn->detail->arch.op_count--; \ - } - -DEFINE_inc_detail_op_count(arm, ARM); -DEFINE_dec_detail_op_count(arm, ARM); -DEFINE_inc_detail_op_count(ppc, PPC); -DEFINE_dec_detail_op_count(ppc, PPC); -DEFINE_inc_detail_op_count(aarch64, AArch64); -DEFINE_dec_detail_op_count(aarch64, AArch64); -DEFINE_inc_detail_op_count(alpha, Alpha); -DEFINE_dec_detail_op_count(alpha, Alpha); - -/// Returns true if a memory operand is currently edited. -static inline bool doing_mem(const MCInst *MI) { return MI->csh->doing_mem; } - -/// Sets the doing_mem flag to @status. -static inline void set_doing_mem(const MCInst *MI, bool status) -{ - MI->csh->doing_mem = status; -} - -/// Returns detail->arch -#define DEFINE_get_arch_detail(arch, ARCH) \ - static inline cs_##arch *ARCH##_get_detail(const MCInst *MI) \ - { \ - assert(MI && MI->flat_insn && MI->flat_insn->detail); \ - return &MI->flat_insn->detail->arch; \ - } - -DEFINE_get_arch_detail(arm, ARM); -DEFINE_get_arch_detail(ppc, PPC); -DEFINE_get_arch_detail(aarch64, AArch64); -DEFINE_get_arch_detail(alpha, Alpha); - -static inline bool detail_is_set(const MCInst *MI) -{ - assert(MI && MI->flat_insn); - return MI->flat_insn->detail != NULL; -} - -static inline cs_detail *get_detail(const MCInst *MI) -{ - assert(MI && MI->flat_insn); - return MI->flat_insn->detail; -} - #endif // CS_MAPPING_H \ No newline at end of file From 80dc67b09fb3a02d6dd0a6f31daf3b1beb95d223 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sun, 6 Aug 2023 17:31:26 +0300 Subject: [PATCH 09/26] Update Alpha mapping inc files --- arch/Alpha/AlphaGenCSMappingInsn.inc | 1012 ++++++++--------- arch/Alpha/AlphaGenCSMappingInsnOp.inc | 1382 ++++++++++++------------ 2 files changed, 1197 insertions(+), 1197 deletions(-) diff --git a/arch/Alpha/AlphaGenCSMappingInsn.inc b/arch/Alpha/AlphaGenCSMappingInsn.inc index 2d8367b357..8944ebb9fc 100644 --- a/arch/Alpha/AlphaGenCSMappingInsn.inc +++ b/arch/Alpha/AlphaGenCSMappingInsn.inc @@ -15,1771 +15,1771 @@ /* PHINODE */ Alpha_PHI /* 0 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_INLINEASM /* 1 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_INLINEASM_BR /* 2 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_CFI_INSTRUCTION /* 3 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_EH_LABEL /* 4 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_GC_LABEL /* 5 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_ANNOTATION_LABEL /* 6 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_KILL /* 7 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_EXTRACT_SUBREG /* 8 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_INSERT_SUBREG /* 9 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_IMPLICIT_DEF /* 10 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_SUBREG_TO_REG /* 11 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_COPY_TO_REGCLASS /* 12 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* DBG_VALUE */ Alpha_DBG_VALUE /* 13 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* DBG_VALUE_LIST */ Alpha_DBG_VALUE_LIST /* 14 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* DBG_INSTR_REF */ Alpha_DBG_INSTR_REF /* 15 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* DBG_PHI */ Alpha_DBG_PHI /* 16 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* DBG_LABEL */ Alpha_DBG_LABEL /* 17 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_REG_SEQUENCE /* 18 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_COPY /* 19 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* BUNDLE */ Alpha_BUNDLE /* 20 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* LIFETIME_START */ Alpha_LIFETIME_START /* 21 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* LIFETIME_END */ Alpha_LIFETIME_END /* 22 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* PSEUDO_PROBE */ Alpha_PSEUDO_PROBE /* 23 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_ARITH_FENCE /* 24 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_STACKMAP /* 25 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # FEntry call */ Alpha_FENTRY_CALL /* 26 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_PATCHPOINT /* 27 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_LOAD_STACK_GUARD /* 28 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_PREALLOCATED_SETUP /* 29 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_PREALLOCATED_ARG /* 30 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_STATEPOINT /* 31 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_LOCAL_ESCAPE /* 32 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_FAULTING_OP /* 33 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_PATCHABLE_OP /* 34 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Function Enter. */ Alpha_PATCHABLE_FUNCTION_ENTER /* 35 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Function Patchable RET. */ Alpha_PATCHABLE_RET /* 36 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Function Exit. */ Alpha_PATCHABLE_FUNCTION_EXIT /* 37 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Tail Call Exit. */ Alpha_PATCHABLE_TAIL_CALL /* 38 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Custom Event Log. */ Alpha_PATCHABLE_EVENT_CALL /* 39 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* # XRay Typed Event Log. */ Alpha_PATCHABLE_TYPED_EVENT_CALL /* 40 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_ICALL_BRANCH_FUNNEL /* 41 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_MEMBARRIER /* 42 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ASSERT_SEXT /* 43 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ASSERT_ZEXT /* 44 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ASSERT_ALIGN /* 45 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ADD /* 46 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SUB /* 47 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MUL /* 48 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SDIV /* 49 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UDIV /* 50 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SREM /* 51 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UREM /* 52 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SDIVREM /* 53 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UDIVREM /* 54 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_AND /* 55 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_OR /* 56 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_XOR /* 57 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_IMPLICIT_DEF /* 58 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_PHI /* 59 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FRAME_INDEX /* 60 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_GLOBAL_VALUE /* 61 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_EXTRACT /* 62 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UNMERGE_VALUES /* 63 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INSERT /* 64 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MERGE_VALUES /* 65 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BUILD_VECTOR /* 66 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BUILD_VECTOR_TRUNC /* 67 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CONCAT_VECTORS /* 68 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_PTRTOINT /* 69 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTTOPTR /* 70 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BITCAST /* 71 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FREEZE /* 72 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_FPTRUNC_ROUND /* 73 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_TRUNC /* 74 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_ROUND /* 75 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_LRINT /* 76 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_ROUNDEVEN /* 77 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_READCYCLECOUNTER /* 78 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_LOAD /* 79 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SEXTLOAD /* 80 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ZEXTLOAD /* 81 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INDEXED_LOAD /* 82 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INDEXED_SEXTLOAD /* 83 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INDEXED_ZEXTLOAD /* 84 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STORE /* 85 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INDEXED_STORE /* 86 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMIC_CMPXCHG_WITH_SUCCESS /* 87 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMIC_CMPXCHG /* 88 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_XCHG /* 89 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_ADD /* 90 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_SUB /* 91 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_AND /* 92 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_NAND /* 93 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_OR /* 94 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_XOR /* 95 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_MAX /* 96 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_MIN /* 97 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_UMAX /* 98 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_UMIN /* 99 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_FADD /* 100 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_FSUB /* 101 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_FMAX /* 102 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_FMIN /* 103 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_UINC_WRAP /* 104 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ATOMICRMW_UDEC_WRAP /* 105 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FENCE /* 106 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BRCOND /* 107 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BRINDIRECT /* 108 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INVOKE_REGION_START /* 109 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC /* 110 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INTRINSIC_W_SIDE_EFFECTS /* 111 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ANYEXT /* 112 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_TRUNC /* 113 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CONSTANT /* 114 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCONSTANT /* 115 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VASTART /* 116 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VAARG /* 117 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SEXT /* 118 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SEXT_INREG /* 119 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ZEXT /* 120 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SHL /* 121 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_LSHR /* 122 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ASHR /* 123 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FSHL /* 124 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FSHR /* 125 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ROTR /* 126 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ROTL /* 127 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ICMP /* 128 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCMP /* 129 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SELECT /* 130 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UADDO /* 131 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UADDE /* 132 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_USUBO /* 133 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_USUBE /* 134 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SADDO /* 135 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SADDE /* 136 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SSUBO /* 137 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SSUBE /* 138 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMULO /* 139 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMULO /* 140 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMULH /* 141 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMULH /* 142 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UADDSAT /* 143 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SADDSAT /* 144 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_USUBSAT /* 145 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SSUBSAT /* 146 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_USHLSAT /* 147 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SSHLSAT /* 148 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMULFIX /* 149 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMULFIX /* 150 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMULFIXSAT /* 151 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMULFIXSAT /* 152 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SDIVFIX /* 153 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UDIVFIX /* 154 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SDIVFIXSAT /* 155 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UDIVFIXSAT /* 156 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FADD /* 157 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FSUB /* 158 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMUL /* 159 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMA /* 160 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMAD /* 161 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FDIV /* 162 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FREM /* 163 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPOW /* 164 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPOWI /* 165 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FEXP /* 166 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FEXP2 /* 167 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FLOG /* 168 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FLOG2 /* 169 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FLOG10 /* 170 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FNEG /* 171 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPEXT /* 172 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPTRUNC /* 173 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPTOSI /* 174 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FPTOUI /* 175 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SITOFP /* 176 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UITOFP /* 177 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FABS /* 178 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCOPYSIGN /* 179 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_IS_FPCLASS /* 180 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCANONICALIZE /* 181 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMINNUM /* 182 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMAXNUM /* 183 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMINNUM_IEEE /* 184 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMAXNUM_IEEE /* 185 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMINIMUM /* 186 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FMAXIMUM /* 187 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_PTR_ADD /* 188 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_PTRMASK /* 189 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMIN /* 190 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SMAX /* 191 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMIN /* 192 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UMAX /* 193 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ABS /* 194 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_LROUND /* 195 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_LLROUND /* 196 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BR /* 197 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BRJT /* 198 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_INSERT_VECTOR_ELT /* 199 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_EXTRACT_VECTOR_ELT /* 200 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SHUFFLE_VECTOR /* 201 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CTTZ /* 202 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CTTZ_ZERO_UNDEF /* 203 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CTLZ /* 204 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CTLZ_ZERO_UNDEF /* 205 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_CTPOP /* 206 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BSWAP /* 207 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BITREVERSE /* 208 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCEIL /* 209 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FCOS /* 210 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FSIN /* 211 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FSQRT /* 212 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FFLOOR /* 213 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FRINT /* 214 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_FNEARBYINT /* 215 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_ADDRSPACE_CAST /* 216 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BLOCK_ADDR /* 217 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_JUMP_TABLE /* 218 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_DYN_STACKALLOC /* 219 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FADD /* 220 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FSUB /* 221 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FMUL /* 222 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FDIV /* 223 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FREM /* 224 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FMA /* 225 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_STRICT_FSQRT /* 226 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_READ_REGISTER /* 227 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_WRITE_REGISTER /* 228 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MEMCPY /* 229 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MEMCPY_INLINE /* 230 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MEMMOVE /* 231 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_MEMSET /* 232 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_BZERO /* 233 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_SEQ_FADD /* 234 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_SEQ_FMUL /* 235 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_FADD /* 236 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_FMUL /* 237 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_FMAX /* 238 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_FMIN /* 239 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_ADD /* 240 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_MUL /* 241 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_AND /* 242 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_OR /* 243 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_XOR /* 244 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_SMAX /* 245 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_SMIN /* 246 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_UMAX /* 247 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_VECREDUCE_UMIN /* 248 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_SBFX /* 249 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_G_UBFX /* 250 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ; ADJDOWN $amt1 */ Alpha_ADJUSTSTACKDOWN /* 251 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* ; ADJUP $amt1 */ Alpha_ADJUSTSTACKUP /* 252 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { @@ -1787,42 +1787,42 @@ */ Alpha_ALTENT /* 253 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_CAS32 /* 254 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_CAS64 /* 255 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_LAS32 /* 256 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_LAS64 /* 257 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* LSMARKER$$$i$$$j$$$k$$$m: */ Alpha_MEMLABEL /* 258 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { @@ -1830,28 +1830,28 @@ */ Alpha_PCLABEL /* 259 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_SWAP32 /* 260 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* */ Alpha_SWAP64 /* 261 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { /* #wtf */ Alpha_WTF /* 262 */, Alpha_INS_INVALID, #ifndef CAPSTONE_DIET - { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, { 0 } + { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }} #endif }, { @@ -1859,7 +1859,7 @@ Alpha_ADDLi /* 263 */, Alpha_INS_ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 66, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -1867,7 +1867,7 @@ Alpha_ADDLr /* 264 */, Alpha_INS_ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1875,7 +1875,7 @@ Alpha_ADDQi /* 265 */, Alpha_INS_ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 322, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -1883,7 +1883,7 @@ Alpha_ADDQr /* 266 */, Alpha_INS_ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2050, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1891,7 +1891,7 @@ Alpha_ADDS /* 267 */, Alpha_INS_ADDSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 858, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1899,7 +1899,7 @@ Alpha_ADDT /* 268 */, Alpha_INS_ADDTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2906, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1907,7 +1907,7 @@ Alpha_ANDi /* 269 */, Alpha_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 98, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -1915,7 +1915,7 @@ Alpha_ANDr /* 270 */, Alpha_INS_AND, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1923,7 +1923,7 @@ Alpha_BEQ /* 271 */, Alpha_INS_BEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 39, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -1931,7 +1931,7 @@ Alpha_BGE /* 272 */, Alpha_INS_BGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 31, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -1939,7 +1939,7 @@ Alpha_BGT /* 273 */, Alpha_INS_BGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 63, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -1947,7 +1947,7 @@ Alpha_BICi /* 274 */, Alpha_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1122, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -1955,7 +1955,7 @@ Alpha_BICr /* 275 */, Alpha_INS_BIC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 8226, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1963,7 +1963,7 @@ Alpha_BISi /* 276 */, Alpha_INS_BIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 354, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -1971,7 +1971,7 @@ Alpha_BISr /* 277 */, Alpha_INS_BIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2082, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -1979,7 +1979,7 @@ Alpha_BLBC /* 278 */, Alpha_INS_BLBC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 7, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -1987,7 +1987,7 @@ Alpha_BLBS /* 279 */, Alpha_INS_BLBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 15, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -1995,7 +1995,7 @@ Alpha_BLE /* 280 */, Alpha_INS_BLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 55, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2003,7 +2003,7 @@ Alpha_BLT /* 281 */, Alpha_INS_BLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 23, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2011,7 +2011,7 @@ Alpha_BNE /* 282 */, Alpha_INS_BNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 47, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2019,7 +2019,7 @@ Alpha_BR /* 283 */, Alpha_INS_BR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 1987, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }, 11 } + #endif }, { @@ -2027,7 +2027,7 @@ Alpha_BSR /* 284 */, Alpha_INS_BSR, #ifndef CAPSTONE_DIET { Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 715, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 }, 11 } + #endif }, { @@ -2035,7 +2035,7 @@ Alpha_CMOVEQi /* 285 */, Alpha_INS_CMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2402, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2043,7 +2043,7 @@ Alpha_CMOVEQr /* 286 */, Alpha_INS_CMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 18466, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2051,7 +2051,7 @@ Alpha_CMOVGEi /* 287 */, Alpha_INS_CMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6370, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2059,7 +2059,7 @@ Alpha_CMOVGEr /* 288 */, Alpha_INS_CMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 50210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2067,7 +2067,7 @@ Alpha_CMOVGTi /* 289 */, Alpha_INS_CMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6626, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2075,7 +2075,7 @@ Alpha_CMOVGTr /* 290 */, Alpha_INS_CMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 52258, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2083,7 +2083,7 @@ Alpha_CMOVLBCi /* 291 */, Alpha_INS_CMOVLBC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6754, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2091,7 +2091,7 @@ Alpha_CMOVLBCr /* 292 */, Alpha_INS_CMOVLBC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 53282, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2099,7 +2099,7 @@ Alpha_CMOVLBSi /* 293 */, Alpha_INS_CMOVLBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2658, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2107,7 +2107,7 @@ Alpha_CMOVLBSr /* 294 */, Alpha_INS_CMOVLBS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 20514, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2115,7 +2115,7 @@ Alpha_CMOVLEi /* 295 */, Alpha_INS_CMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2530, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2123,7 +2123,7 @@ Alpha_CMOVLEr /* 296 */, Alpha_INS_CMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 19490, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2131,7 +2131,7 @@ Alpha_CMOVLTi /* 297 */, Alpha_INS_CMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2274, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2139,7 +2139,7 @@ Alpha_CMOVLTr /* 298 */, Alpha_INS_CMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 17442, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2147,7 +2147,7 @@ Alpha_CMOVNEi /* 299 */, Alpha_INS_CMOVNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6498, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2155,7 +2155,7 @@ Alpha_CMOVNEr /* 300 */, Alpha_INS_CMOVNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 51234, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2163,7 +2163,7 @@ Alpha_CMPBGE /* 301 */, Alpha_INS_CMPBGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 122882, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2171,7 +2171,7 @@ Alpha_CMPBGEi /* 302 */, Alpha_INS_CMPBGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 15426, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2179,7 +2179,7 @@ Alpha_CMPEQ /* 303 */, Alpha_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 92162, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2187,7 +2187,7 @@ Alpha_CMPEQi /* 304 */, Alpha_INS_CMPEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 11586, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2195,7 +2195,7 @@ Alpha_CMPLE /* 305 */, Alpha_INS_CMPLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 93186, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2203,7 +2203,7 @@ Alpha_CMPLEi /* 306 */, Alpha_INS_CMPLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 11714, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2211,7 +2211,7 @@ Alpha_CMPLT /* 307 */, Alpha_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 91138, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2219,7 +2219,7 @@ Alpha_CMPLTi /* 308 */, Alpha_INS_CMPLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 11458, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2227,7 +2227,7 @@ Alpha_CMPTEQ /* 309 */, Alpha_INS_CMPTEQsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 84826, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2235,7 +2235,7 @@ Alpha_CMPTLE /* 310 */, Alpha_INS_CMPTLEsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 117594, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2243,7 +2243,7 @@ Alpha_CMPTLT /* 311 */, Alpha_INS_CMPTLTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 52058, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2251,7 +2251,7 @@ Alpha_CMPTUN /* 312 */, Alpha_INS_CMPTUNsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 19290, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2259,7 +2259,7 @@ Alpha_CMPULE /* 313 */, Alpha_INS_CMPULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 96258, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2267,7 +2267,7 @@ Alpha_CMPULEi /* 314 */, Alpha_INS_CMPULE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 12098, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2275,7 +2275,7 @@ Alpha_CMPULT /* 315 */, Alpha_INS_CMPULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 94210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2283,7 +2283,7 @@ Alpha_CMPULTi /* 316 */, Alpha_INS_CMPULT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 11842, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2291,7 +2291,7 @@ Alpha_COND_BRANCH_F /* 317 */, Alpha_INS_COND_BRANCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 0, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2299,7 +2299,7 @@ Alpha_COND_BRANCH_I /* 318 */, Alpha_INS_COND_BRANCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 0, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2307,7 +2307,7 @@ Alpha_CPYSES /* 319 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2315,7 +2315,7 @@ Alpha_CPYSESt /* 320 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2323,7 +2323,7 @@ Alpha_CPYSET /* 321 */, Alpha_INS_CPYSE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2331,7 +2331,7 @@ Alpha_CPYSNS /* 322 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2339,7 +2339,7 @@ Alpha_CPYSNSt /* 323 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2347,7 +2347,7 @@ Alpha_CPYSNT /* 324 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2355,7 +2355,7 @@ Alpha_CPYSNTs /* 325 */, Alpha_INS_CPYSN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 67642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2363,7 +2363,7 @@ Alpha_CPYSS /* 326 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2371,7 +2371,7 @@ Alpha_CPYSSt /* 327 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2379,7 +2379,7 @@ Alpha_CPYST /* 328 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2387,7 +2387,7 @@ Alpha_CPYSTs /* 329 */, Alpha_INS_CPYS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2106, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2395,7 +2395,7 @@ Alpha_CTLZ /* 330 */, Alpha_INS_CTLZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1247182, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2403,7 +2403,7 @@ Alpha_CTPOP /* 331 */, Alpha_INS_CTPOP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 198606, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2411,7 +2411,7 @@ Alpha_CTTZ /* 332 */, Alpha_INS_CTTZ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 3344334, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2419,7 +2419,7 @@ Alpha_CVTQS /* 333 */, Alpha_INS_CVTQSsSUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1015770, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2427,7 +2427,7 @@ Alpha_CVTQT /* 334 */, Alpha_INS_CVTQTsSUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2064346, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2435,7 +2435,7 @@ Alpha_CVTST /* 335 */, Alpha_INS_CVTSTsS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 876506, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2443,7 +2443,7 @@ Alpha_CVTTQ /* 336 */, Alpha_INS_CVTTQsSVC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4009946, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2451,7 +2451,7 @@ Alpha_CVTTS /* 337 */, Alpha_INS_CVTTSsSUI, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 884698, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2459,7 +2459,7 @@ Alpha_DIVS /* 338 */, Alpha_INS_DIVSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 99162, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2467,7 +2467,7 @@ Alpha_DIVT /* 339 */, Alpha_INS_DIVTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 101210, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2475,7 +2475,7 @@ Alpha_ECB /* 340 */, Alpha_INS_ECB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1478, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -2483,7 +2483,7 @@ Alpha_EQVi /* 341 */, Alpha_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1250, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2491,7 +2491,7 @@ Alpha_EQVr /* 342 */, Alpha_INS_EQV, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 9250, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2499,7 +2499,7 @@ Alpha_EXCB /* 343 */, Alpha_INS_EXCB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2097158, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -2507,7 +2507,7 @@ Alpha_EXTBL /* 344 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 49170, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2515,7 +2515,7 @@ Alpha_EXTBLi /* 345 */, Alpha_INS_EXTBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6226, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2523,7 +2523,7 @@ Alpha_EXTLH /* 346 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 44050, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2531,7 +2531,7 @@ Alpha_EXTLHi /* 347 */, Alpha_INS_EXTLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 5586, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2539,7 +2539,7 @@ Alpha_EXTLL /* 348 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 51218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2547,7 +2547,7 @@ Alpha_EXTLLi /* 349 */, Alpha_INS_EXTLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6482, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2555,7 +2555,7 @@ Alpha_EXTQH /* 350 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 48146, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2563,7 +2563,7 @@ Alpha_EXTQHi /* 351 */, Alpha_INS_EXTQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6098, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2571,7 +2571,7 @@ Alpha_EXTQL /* 352 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 55314, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2579,7 +2579,7 @@ Alpha_EXTQLi /* 353 */, Alpha_INS_EXTQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6994, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2587,7 +2587,7 @@ Alpha_EXTWH /* 354 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 46098, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2595,7 +2595,7 @@ Alpha_EXTWHi /* 355 */, Alpha_INS_EXTWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 5842, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2603,7 +2603,7 @@ Alpha_EXTWL /* 356 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 53266, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2611,7 +2611,7 @@ Alpha_EXTWLi /* 357 */, Alpha_INS_EXTWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6738, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2619,7 +2619,7 @@ Alpha_FBEQ /* 358 */, Alpha_INS_FBEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 35, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2627,7 +2627,7 @@ Alpha_FBGE /* 359 */, Alpha_INS_FBGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 27, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2635,7 +2635,7 @@ Alpha_FBGT /* 360 */, Alpha_INS_FBGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 59, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2643,7 +2643,7 @@ Alpha_FBLE /* 361 */, Alpha_INS_FBLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 51, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2651,7 +2651,7 @@ Alpha_FBLT /* 362 */, Alpha_INS_FBLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 19, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2659,7 +2659,7 @@ Alpha_FBNE /* 363 */, Alpha_INS_FBNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, Alpha_GRP_BRANCH_RELATIVE, 0 }, 1, 0, {{ 0 }}, - { 43, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2667,7 +2667,7 @@ Alpha_FCMOVEQS /* 364 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 43066, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2675,7 +2675,7 @@ Alpha_FCMOVEQT /* 365 */, Alpha_INS_FCMOVEQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 43066, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2683,7 +2683,7 @@ Alpha_FCMOVGES /* 366 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 92218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2691,7 +2691,7 @@ Alpha_FCMOVGET /* 367 */, Alpha_INS_FCMOVGE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 92218, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2699,7 +2699,7 @@ Alpha_FCMOVGTS /* 368 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 124986, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2707,7 +2707,7 @@ Alpha_FCMOVGTT /* 369 */, Alpha_INS_FCMOVGT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 124986, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2715,7 +2715,7 @@ Alpha_FCMOVLES /* 370 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 59450, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2723,7 +2723,7 @@ Alpha_FCMOVLET /* 371 */, Alpha_INS_FCMOVLE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 59450, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2731,7 +2731,7 @@ Alpha_FCMOVLTS /* 372 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 26682, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2739,7 +2739,7 @@ Alpha_FCMOVLTT /* 373 */, Alpha_INS_FCMOVLT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 26682, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2747,7 +2747,7 @@ Alpha_FCMOVNES /* 374 */, Alpha_INS_FCMOVNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 108602, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2755,7 +2755,7 @@ Alpha_FCMOVNET /* 375 */, Alpha_INS_FCMOVNE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 108602, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2763,7 +2763,7 @@ Alpha_FETCH /* 376 */, Alpha_INS_FETCH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 70, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -2771,7 +2771,7 @@ Alpha_FETCH_M /* 377 */, Alpha_INS_FETCH_M, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 326, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -2779,7 +2779,7 @@ Alpha_FTOIS /* 378 */, Alpha_INS_FTOIS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 493518, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2787,7 +2787,7 @@ Alpha_FTOIT /* 379 */, Alpha_INS_FTOIT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 231374, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2795,7 +2795,7 @@ Alpha_INSBL /* 380 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 106514, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2803,7 +2803,7 @@ Alpha_INSBLi /* 381 */, Alpha_INS_INSBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13394, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2811,7 +2811,7 @@ Alpha_INSLH /* 382 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 117778, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2819,7 +2819,7 @@ Alpha_INSLHi /* 383 */, Alpha_INS_INSLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 14802, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2827,7 +2827,7 @@ Alpha_INSLL /* 384 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 108562, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2835,7 +2835,7 @@ Alpha_INSLLi /* 385 */, Alpha_INS_INSLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13650, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2843,7 +2843,7 @@ Alpha_INSQH /* 386 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 121874, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2851,7 +2851,7 @@ Alpha_INSQHi /* 387 */, Alpha_INS_INSQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 15314, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2859,7 +2859,7 @@ Alpha_INSQL /* 388 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 112658, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2867,7 +2867,7 @@ Alpha_INSQLi /* 389 */, Alpha_INS_INSQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 14162, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2875,7 +2875,7 @@ Alpha_INSWH /* 390 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 119826, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2883,7 +2883,7 @@ Alpha_INSWHi /* 391 */, Alpha_INS_INSWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 15058, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2891,7 +2891,7 @@ Alpha_INSWL /* 392 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 110610, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -2899,7 +2899,7 @@ Alpha_INSWLi /* 393 */, Alpha_INS_INSWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13906, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -2907,7 +2907,7 @@ Alpha_ITOFS /* 394 */, Alpha_INS_ITOFS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 526282, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2915,7 +2915,7 @@ Alpha_ITOFT /* 395 */, Alpha_INS_ITOFT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 591818, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -2923,7 +2923,7 @@ Alpha_JMP /* 396 */, Alpha_INS_JMP, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { Alpha_GRP_JUMP, 0 }, 1, 1, {{ 0 }}, - { 2006, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } + #endif }, { @@ -2931,7 +2931,7 @@ Alpha_JSR /* 397 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET { Alpha_REG_R27, Alpha_REG_R29, 0 }, { Alpha_REG_R0, Alpha_REG_R1, Alpha_REG_R2, Alpha_REG_R3, Alpha_REG_R4, Alpha_REG_R5, Alpha_REG_R6, Alpha_REG_R7, Alpha_REG_R8, Alpha_REG_R16, Alpha_REG_R17, Alpha_REG_R18, Alpha_REG_R19, Alpha_REG_R20, Alpha_REG_R21, Alpha_REG_R22, Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R26, Alpha_REG_R27, Alpha_REG_R28, Alpha_REG_R29, Alpha_REG_F0, Alpha_REG_F1, Alpha_REG_F10, Alpha_REG_F11, Alpha_REG_F12, Alpha_REG_F13, Alpha_REG_F14, Alpha_REG_F15, Alpha_REG_F16, Alpha_REG_F17, Alpha_REG_F18, Alpha_REG_F19, Alpha_REG_F20, Alpha_REG_F21, Alpha_REG_F22, Alpha_REG_F23, Alpha_REG_F24, Alpha_REG_F25, Alpha_REG_F26, Alpha_REG_F27, Alpha_REG_F28, Alpha_REG_F29, Alpha_REG_F30, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }}, - { 187094, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -2939,7 +2939,7 @@ Alpha_JSR_COROUTINE /* 398 */, Alpha_INS_JSR_COROUTINE, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 214, { 0, 1, 2, 3, 4, 5, 16, 17 }, 8 } + #endif }, { @@ -2947,7 +2947,7 @@ Alpha_JSRs /* 399 */, Alpha_INS_JSR, #ifndef CAPSTONE_DIET { Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, 0 }, { Alpha_REG_R23, Alpha_REG_R24, Alpha_REG_R25, Alpha_REG_R27, Alpha_REG_R28, 0 }, { Alpha_GRP_CALL, 0 }, 0, 0, {{ 0 }}, - { 188246, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -2955,7 +2955,7 @@ Alpha_LDA /* 400 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2963,7 +2963,7 @@ Alpha_LDAH /* 401 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 36, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2971,7 +2971,7 @@ Alpha_LDAHg /* 402 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 36, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2979,7 +2979,7 @@ Alpha_LDAHr /* 403 */, Alpha_INS_LDAH, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 36, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2987,7 +2987,7 @@ Alpha_LDAg /* 404 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -2995,7 +2995,7 @@ Alpha_LDAr /* 405 */, Alpha_INS_LDA, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3003,7 +3003,7 @@ Alpha_LDBU /* 406 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 20, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3011,7 +3011,7 @@ Alpha_LDBUr /* 407 */, Alpha_INS_LDBU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 20, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3019,7 +3019,7 @@ Alpha_LDL /* 408 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 5, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3027,7 +3027,7 @@ Alpha_LDL_L /* 409 */, Alpha_INS_LDL_L, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 21, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3035,7 +3035,7 @@ Alpha_LDLr /* 410 */, Alpha_INS_LDL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 5, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3043,7 +3043,7 @@ Alpha_LDQ /* 411 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 37, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3051,7 +3051,7 @@ Alpha_LDQ_L /* 412 */, Alpha_INS_LDQ_L, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 53, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3059,7 +3059,7 @@ Alpha_LDQ_U /* 413 */, Alpha_INS_LDQ_U, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 52, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3067,7 +3067,7 @@ Alpha_LDQl /* 414 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 37, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3075,7 +3075,7 @@ Alpha_LDQr /* 415 */, Alpha_INS_LDQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 37, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3083,7 +3083,7 @@ Alpha_LDS /* 416 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 17, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3091,7 +3091,7 @@ Alpha_LDSr /* 417 */, Alpha_INS_LDS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 17, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3099,7 +3099,7 @@ Alpha_LDT /* 418 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 49, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3107,7 +3107,7 @@ Alpha_LDTr /* 419 */, Alpha_INS_LDT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 49, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3115,7 +3115,7 @@ Alpha_LDWU /* 420 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 12, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3123,7 +3123,7 @@ Alpha_LDWUr /* 421 */, Alpha_INS_LDWU, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 12, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3131,7 +3131,7 @@ Alpha_MB /* 422 */, Alpha_INS_MB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 131078, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -3139,7 +3139,7 @@ Alpha_MSKBL /* 423 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 32786, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3147,7 +3147,7 @@ Alpha_MSKBLi /* 424 */, Alpha_INS_MSKBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4178, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3155,7 +3155,7 @@ Alpha_MSKLH /* 425 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 35858, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3163,7 +3163,7 @@ Alpha_MSKLHi /* 426 */, Alpha_INS_MSKLH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4562, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3171,7 +3171,7 @@ Alpha_MSKLL /* 427 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34834, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3179,7 +3179,7 @@ Alpha_MSKLLi /* 428 */, Alpha_INS_MSKLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4434, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3187,7 +3187,7 @@ Alpha_MSKQH /* 429 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 39954, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3195,7 +3195,7 @@ Alpha_MSKQHi /* 430 */, Alpha_INS_MSKQH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 5074, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3203,7 +3203,7 @@ Alpha_MSKQL /* 431 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 38930, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3211,7 +3211,7 @@ Alpha_MSKQLi /* 432 */, Alpha_INS_MSKQL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4946, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3219,7 +3219,7 @@ Alpha_MSKWH /* 433 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 37906, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3227,7 +3227,7 @@ Alpha_MSKWHi /* 434 */, Alpha_INS_MSKWH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4818, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3235,7 +3235,7 @@ Alpha_MSKWL /* 435 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 36882, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3243,7 +3243,7 @@ Alpha_MSKWLi /* 436 */, Alpha_INS_MSKWL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4690, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3251,7 +3251,7 @@ Alpha_MULLi /* 437 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 114, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3259,7 +3259,7 @@ Alpha_MULLr /* 438 */, Alpha_INS_MULL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 50, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3267,7 +3267,7 @@ Alpha_MULQi /* 439 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 370, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3275,7 +3275,7 @@ Alpha_MULQr /* 440 */, Alpha_INS_MULQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2098, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3283,7 +3283,7 @@ Alpha_MULS /* 441 */, Alpha_INS_MULSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 33626, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3291,7 +3291,7 @@ Alpha_MULT /* 442 */, Alpha_INS_MULTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 35674, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3299,7 +3299,7 @@ Alpha_ORNOTi /* 443 */, Alpha_INS_ORNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1378, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3307,7 +3307,7 @@ Alpha_ORNOTr /* 444 */, Alpha_INS_ORNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 10274, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3315,7 +3315,7 @@ Alpha_RC /* 445 */, Alpha_INS_RC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 14342, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } + #endif }, { @@ -3323,7 +3323,7 @@ Alpha_RETDAG /* 446 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2147573718, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -3331,7 +3331,7 @@ Alpha_RETDAGp /* 447 */, Alpha_INS_RET, #ifndef CAPSTONE_DIET { Alpha_REG_R26, 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2147573718, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -3339,7 +3339,7 @@ Alpha_RPCC /* 448 */, Alpha_INS_RPCC, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 198, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -3347,7 +3347,7 @@ Alpha_RS /* 449 */, Alpha_INS_RS, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 30726, { 0, 1, 2, 3, 4, 5, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 27 } + #endif }, { @@ -3355,7 +3355,7 @@ Alpha_S4ADDLi /* 450 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4162, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3363,7 +3363,7 @@ Alpha_S4ADDLr /* 451 */, Alpha_INS_S4ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 32770, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3371,7 +3371,7 @@ Alpha_S4ADDQi /* 452 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4418, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3379,7 +3379,7 @@ Alpha_S4ADDQr /* 453 */, Alpha_INS_S4ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 34818, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3387,7 +3387,7 @@ Alpha_S4SUBLi /* 454 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13378, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3395,7 +3395,7 @@ Alpha_S4SUBLr /* 455 */, Alpha_INS_S4SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 106498, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3403,7 +3403,7 @@ Alpha_S4SUBQi /* 456 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13634, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3411,7 +3411,7 @@ Alpha_S4SUBQr /* 457 */, Alpha_INS_S4SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 108546, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3419,7 +3419,7 @@ Alpha_S8ADDLi /* 458 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4674, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3427,7 +3427,7 @@ Alpha_S8ADDLr /* 459 */, Alpha_INS_S8ADDL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 36866, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3435,7 +3435,7 @@ Alpha_S8ADDQi /* 460 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4930, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3443,7 +3443,7 @@ Alpha_S8ADDQr /* 461 */, Alpha_INS_S8ADDQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 38914, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3451,7 +3451,7 @@ Alpha_S8SUBLi /* 462 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13890, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3459,7 +3459,7 @@ Alpha_S8SUBLr /* 463 */, Alpha_INS_S8SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 110594, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3467,7 +3467,7 @@ Alpha_S8SUBQi /* 464 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 14146, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3475,7 +3475,7 @@ Alpha_S8SUBQr /* 465 */, Alpha_INS_S8SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 112642, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3483,7 +3483,7 @@ Alpha_SEXTB /* 466 */, Alpha_INS_SEXTB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1998, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -3491,7 +3491,7 @@ Alpha_SEXTW /* 467 */, Alpha_INS_SEXTW, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2099150, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -3499,7 +3499,7 @@ Alpha_SLi /* 468 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 10066, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3507,7 +3507,7 @@ Alpha_SLr /* 469 */, Alpha_INS_SLL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 79890, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3515,7 +3515,7 @@ Alpha_SQRTS /* 470 */, Alpha_INS_SQRTSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 3436490, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -3523,7 +3523,7 @@ Alpha_SQRTT /* 471 */, Alpha_INS_SQRTTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 3502026, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 22 } + #endif }, { @@ -3531,7 +3531,7 @@ Alpha_SRAi /* 472 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 3922, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3539,7 +3539,7 @@ Alpha_SRAr /* 473 */, Alpha_INS_SRA, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 30738, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3547,7 +3547,7 @@ Alpha_SRLi /* 474 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2898, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3555,7 +3555,7 @@ Alpha_SRLr /* 475 */, Alpha_INS_SRL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 22546, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3563,7 +3563,7 @@ Alpha_STB /* 476 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 28, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3571,7 +3571,7 @@ Alpha_STBr /* 477 */, Alpha_INS_STB, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 28, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3579,7 +3579,7 @@ Alpha_STL /* 478 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3587,7 +3587,7 @@ Alpha_STL_C /* 479 */, Alpha_INS_STL_C, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 29, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3595,7 +3595,7 @@ Alpha_STLr /* 480 */, Alpha_INS_STL, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 13, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3603,7 +3603,7 @@ Alpha_STQ /* 481 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 45, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3611,7 +3611,7 @@ Alpha_STQ_C /* 482 */, Alpha_INS_STQ_C, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 61, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3619,7 +3619,7 @@ Alpha_STQ_U /* 483 */, Alpha_INS_STQ_U, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 60, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3627,7 +3627,7 @@ Alpha_STQr /* 484 */, Alpha_INS_STQ, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 45, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3635,7 +3635,7 @@ Alpha_STS /* 485 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 25, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3643,7 +3643,7 @@ Alpha_STSr /* 486 */, Alpha_INS_STS, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 25, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3651,7 +3651,7 @@ Alpha_STT /* 487 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 57, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3659,7 +3659,7 @@ Alpha_STTr /* 488 */, Alpha_INS_STT, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 57, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3667,7 +3667,7 @@ Alpha_STW /* 489 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 44, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3675,7 +3675,7 @@ Alpha_STWr /* 490 */, Alpha_INS_STW, #ifndef CAPSTONE_DIET { 0 }, { Alpha_REG_R28, 0 }, { 0 }, 0, 0, {{ 0 }}, - { 44, { 0, 1, 2, 3, 4, 5 }, 6 } + #endif }, { @@ -3683,7 +3683,7 @@ Alpha_SUBLi /* 491 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 9282, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3691,7 +3691,7 @@ Alpha_SUBLr /* 492 */, Alpha_INS_SUBL, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 73730, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3699,7 +3699,7 @@ Alpha_SUBQi /* 493 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 9538, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3707,7 +3707,7 @@ Alpha_SUBQr /* 494 */, Alpha_INS_SUBQ, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 75778, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3715,7 +3715,7 @@ Alpha_SUBS /* 495 */, Alpha_INS_SUBSsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 66394, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3723,7 +3723,7 @@ Alpha_SUBT /* 496 */, Alpha_INS_SUBTsSU, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 68442, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3731,7 +3731,7 @@ Alpha_TRAPB /* 497 */, Alpha_INS_TRAPB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -3739,7 +3739,7 @@ Alpha_UMULHi /* 498 */, Alpha_INS_UMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 882, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3747,7 +3747,7 @@ Alpha_UMULHr /* 499 */, Alpha_INS_UMULH, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 6194, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3755,7 +3755,7 @@ Alpha_WH64 /* 500 */, Alpha_INS_WH64, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1990, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -3763,7 +3763,7 @@ Alpha_WH64EN /* 501 */, Alpha_INS_WH64EN, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 4038, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 22 } + #endif }, { @@ -3771,7 +3771,7 @@ Alpha_WMB /* 502 */, Alpha_INS_WMB, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 2228230, { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }, 32 } + #endif }, { @@ -3779,7 +3779,7 @@ Alpha_XORi /* 503 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 226, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, { @@ -3787,7 +3787,7 @@ Alpha_XORr /* 504 */, Alpha_INS_XOR, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 1058, { 0, 1, 2, 3, 4, 5, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }, 17 } + #endif }, { @@ -3795,6 +3795,6 @@ Alpha_ZAPNOTi /* 505 */, Alpha_INS_ZAPNOT, #ifndef CAPSTONE_DIET { 0 }, { 0 }, { 0 }, 0, 0, {{ 0 }}, - { 9042, { 0, 1, 2, 3, 4, 5, 19, 20, 21, 22, 23, 24, 25, 26 }, 14 } + #endif }, diff --git a/arch/Alpha/AlphaGenCSMappingInsnOp.inc b/arch/Alpha/AlphaGenCSMappingInsnOp.inc index e444471add..6f2772dde8 100644 --- a/arch/Alpha/AlphaGenCSMappingInsnOp.inc +++ b/arch/Alpha/AlphaGenCSMappingInsnOp.inc @@ -804,557 +804,557 @@ }}}, { /* Alpha_ADDLi (263) - Alpha_INS_ADDL - addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_ADDLr (264) - Alpha_INS_ADDL - addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ADDQi (265) - Alpha_INS_ADDQ - addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_ADDQr (266) - Alpha_INS_ADDQ - addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ADDS (267) - Alpha_INS_ADDSsSU - adds/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ADDT (268) - Alpha_INS_ADDTsSU - addt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ANDi (269) - Alpha_INS_AND - and $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_ANDr (270) - Alpha_INS_AND - and $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_BEQ (271) - Alpha_INS_BEQ - beq $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BGE (272) - Alpha_INS_BGE - bge $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BGT (273) - Alpha_INS_BGT - bgt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BICi (274) - Alpha_INS_BIC - bic $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_BICr (275) - Alpha_INS_BIC - bic $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_BISi (276) - Alpha_INS_BIS - bis $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_BISr (277) - Alpha_INS_BIS - bis $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_BLBC (278) - Alpha_INS_BLBC - blbc $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BLBS (279) - Alpha_INS_BLBS - blbs $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BLE (280) - Alpha_INS_BLE - ble $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BLT (281) - Alpha_INS_BLT - blt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BNE (282) - Alpha_INS_BNE - bne $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_BR (283) - Alpha_INS_BR - br $$31,$DISP */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* DISP */ { 0 } }}, { /* Alpha_BSR (284) - Alpha_INS_BSR - bsr $$26,$$$DISP ..ng */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* DISP */ { 0 } }}, { /* Alpha_CMOVEQi (285) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVEQr (286) - Alpha_INS_CMOVEQ - cmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGEi (287) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGEr (288) - Alpha_INS_CMOVGE - cmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGTi (289) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVGTr (290) - Alpha_INS_CMOVGT - cmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBCi (291) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBCr (292) - Alpha_INS_CMOVLBC - cmovlbc $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBSi (293) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLBSr (294) - Alpha_INS_CMOVLBS - cmovlbs $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLEi (295) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLEr (296) - Alpha_INS_CMOVLE - cmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLTi (297) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVLTr (298) - Alpha_INS_CMOVLT - cmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVNEi (299) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMOVNEr (300) - Alpha_INS_CMOVNE - cmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RCOND */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ { 0 } }}, { /* Alpha_CMPBGE (301) - Alpha_INS_CMPBGE - cmpbge $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPBGEi (302) - Alpha_INS_CMPBGE - cmpbge $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_CMPEQ (303) - Alpha_INS_CMPEQ - cmpeq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPEQi (304) - Alpha_INS_CMPEQ - cmpeq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_CMPLE (305) - Alpha_INS_CMPLE - cmple $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPLEi (306) - Alpha_INS_CMPLE - cmple $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_CMPLT (307) - Alpha_INS_CMPLT - cmplt $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPLTi (308) - Alpha_INS_CMPLT - cmplt $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_CMPTEQ (309) - Alpha_INS_CMPTEQsSU - cmpteq/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPTLE (310) - Alpha_INS_CMPTLEsSU - cmptle/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPTLT (311) - Alpha_INS_CMPTLTsSU - cmptlt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPTUN (312) - Alpha_INS_CMPTUNsSU - cmptun/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPULE (313) - Alpha_INS_CMPULE - cmpule $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPULEi (314) - Alpha_INS_CMPULE - cmpule $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_CMPULT (315) - Alpha_INS_CMPULT - cmpult $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CMPULTi (316) - Alpha_INS_CMPULT - cmpult $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_COND_BRANCH_F (317) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, F8RC:$R, bb:$dst */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* opc */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_COND_BRANCH_I (318) - Alpha_INS_COND_BRANCH - COND_BRANCH imm:$opc, GPRC:$R, bb:$dst */ { - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* opc */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* opc */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_CPYSES (319) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSESt (320) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSET (321) - Alpha_INS_CPYSE - cpyse $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSNS (322) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSNSt (323) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSNT (324) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSNTs (325) - Alpha_INS_CPYSN - cpysn $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSS (326) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSSt (327) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYST (328) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CPYSTs (329) - Alpha_INS_CPYS - cpys $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CTLZ (330) - Alpha_INS_CTLZ - ctlz $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CTPOP (331) - Alpha_INS_CTPOP - ctpop $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CTTZ (332) - Alpha_INS_CTTZ - cttz $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CVTQS (333) - Alpha_INS_CVTQSsSUI - cvtqs/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CVTQT (334) - Alpha_INS_CVTQTsSUI - cvtqt/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CVTST (335) - Alpha_INS_CVTSTsS - cvtst/s $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CVTTQ (336) - Alpha_INS_CVTTQsSVC - cvttq/svc $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_CVTTS (337) - Alpha_INS_CVTTSsSUI - cvtts/sui $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_DIVS (338) - Alpha_INS_DIVSsSU - divs/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_DIVT (339) - Alpha_INS_DIVTsSU - divt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ECB (340) - Alpha_INS_ECB - ecb ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EQVi (341) - Alpha_INS_EQV - eqv $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EQVr (342) - Alpha_INS_EQV - eqv $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXCB (343) - Alpha_INS_EXCB - excb */ @@ -1363,371 +1363,371 @@ }}, { /* Alpha_EXTBL (344) - Alpha_INS_EXTBL - extbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTBLi (345) - Alpha_INS_EXTBL - extbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTLH (346) - Alpha_INS_EXTLH - extlh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTLHi (347) - Alpha_INS_EXTLH - extlh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTLL (348) - Alpha_INS_EXTLL - extll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTLLi (349) - Alpha_INS_EXTLL - extll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTQH (350) - Alpha_INS_EXTQH - extqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTQHi (351) - Alpha_INS_EXTQH - extqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTQL (352) - Alpha_INS_EXTQL - extql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTQLi (353) - Alpha_INS_EXTQL - extql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTWH (354) - Alpha_INS_EXTWH - extwh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTWHi (355) - Alpha_INS_EXTWH - extwh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_EXTWL (356) - Alpha_INS_EXTWL - extwl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_EXTWLi (357) - Alpha_INS_EXTWL - extwl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_FBEQ (358) - Alpha_INS_FBEQ - fbeq $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FBGE (359) - Alpha_INS_FBGE - fbge $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FBGT (360) - Alpha_INS_FBGT - fbgt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FBLE (361) - Alpha_INS_FBLE - fble $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FBLT (362) - Alpha_INS_FBLT - fblt $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FBNE (363) - Alpha_INS_FBNE - fbne $R,$dst */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* R */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, { 0 } }, /* dst */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* R */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_Other, CS_DATA_TYPE_LAST }, }, /* dst */ { 0 } }}, { /* Alpha_FCMOVEQS (364) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVEQT (365) - Alpha_INS_FCMOVEQ - fcmoveq $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGES (366) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGET (367) - Alpha_INS_FCMOVGE - fcmovge $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGTS (368) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVGTT (369) - Alpha_INS_FCMOVGT - fcmovgt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLES (370) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLET (371) - Alpha_INS_FCMOVLE - fcmovle $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLTS (372) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVLTT (373) - Alpha_INS_FCMOVLT - fcmovlt $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVNES (374) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FCMOVNET (375) - Alpha_INS_FCMOVNE - fcmovne $RCOND,$RTRUE,$RDEST */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RDEST */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RFALSE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RTRUE */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RCOND */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RDEST */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RFALSE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RTRUE */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RCOND */ { 0 } }}, { /* Alpha_FETCH (376) - Alpha_INS_FETCH - fetch ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_FETCH_M (377) - Alpha_INS_FETCH_M - fetch_m ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_FTOIS (378) - Alpha_INS_FTOIS - ftois $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_FTOIT (379) - Alpha_INS_FTOIT - ftoit $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_INSBL (380) - Alpha_INS_INSBL - insbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSBLi (381) - Alpha_INS_INSBL - insbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSLH (382) - Alpha_INS_INSLH - inslh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSLHi (383) - Alpha_INS_INSLH - inslh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSLL (384) - Alpha_INS_INSLL - insll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSLLi (385) - Alpha_INS_INSLL - insll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSQH (386) - Alpha_INS_INSQH - insqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSQHi (387) - Alpha_INS_INSQH - insqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSQL (388) - Alpha_INS_INSQL - insql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSQLi (389) - Alpha_INS_INSQL - insql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSWH (390) - Alpha_INS_INSWH - inswh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSWHi (391) - Alpha_INS_INSWH - inswh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_INSWL (392) - Alpha_INS_INSWL - inswl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_INSWLi (393) - Alpha_INS_INSWL - inswl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_ITOFS (394) - Alpha_INS_ITOFS - itofs $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_ITOFT (395) - Alpha_INS_ITOFT - itoft $RA,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_JMP (396) - Alpha_INS_JMP - jmp $$31,{$RS},0 */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RS */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RS */ { 0 } }}, { /* Alpha_JSR (397) - Alpha_INS_JSR - jsr $$26,($$27),0 */ @@ -1736,9 +1736,9 @@ }}, { /* Alpha_JSR_COROUTINE (398) - Alpha_INS_JSR_COROUTINE - jsr_coroutine $RD,($RS),$DISP */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RD */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RS */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RD */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RS */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ { 0 } }}, { /* Alpha_JSRs (399) - Alpha_INS_JSR - jsr $$23,($$27),0 */ @@ -1747,158 +1747,158 @@ }}, { /* Alpha_LDA (400) - Alpha_INS_LDA - lda $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDAH (401) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDAHg (402) - Alpha_INS_LDAH - ldah $RA,0($RB) !gpdisp!$NUM */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* NUM */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* NUM */ { 0 } }}, { /* Alpha_LDAHr (403) - Alpha_INS_LDAH - ldah $RA,$DISP($RB) !gprelhigh */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDAg (404) - Alpha_INS_LDA - lda $RA,0($RB) !gpdisp!$NUM */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* NUM */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* NUM */ { 0 } }}, { /* Alpha_LDAr (405) - Alpha_INS_LDA - lda $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDBU (406) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDBUr (407) - Alpha_INS_LDBU - ldbu $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDL (408) - Alpha_INS_LDL - ldl $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDL_L (409) - Alpha_INS_LDL_L - ldl_l $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDLr (410) - Alpha_INS_LDL - ldl $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDQ (411) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDQ_L (412) - Alpha_INS_LDQ_L - ldq_l $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDQ_U (413) - Alpha_INS_LDQ_U - ldq_u $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDQl (414) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !literal */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDQr (415) - Alpha_INS_LDQ - ldq $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDS (416) - Alpha_INS_LDS - lds $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDSr (417) - Alpha_INS_LDS - lds $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDT (418) - Alpha_INS_LDT - ldt $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDTr (419) - Alpha_INS_LDT - ldt $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDWU (420) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_LDWUr (421) - Alpha_INS_LDWU - ldwu $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MB (422) - Alpha_INS_MB - mb */ @@ -1907,161 +1907,161 @@ }}, { /* Alpha_MSKBL (423) - Alpha_INS_MSKBL - mskbl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKBLi (424) - Alpha_INS_MSKBL - mskbl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKLH (425) - Alpha_INS_MSKLH - msklh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKLHi (426) - Alpha_INS_MSKLH - msklh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKLL (427) - Alpha_INS_MSKLL - mskll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKLLi (428) - Alpha_INS_MSKLL - mskll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKQH (429) - Alpha_INS_MSKQH - mskqh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKQHi (430) - Alpha_INS_MSKQH - mskqh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKQL (431) - Alpha_INS_MSKQL - mskql $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKQLi (432) - Alpha_INS_MSKQL - mskql $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKWH (433) - Alpha_INS_MSKWH - mskwh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKWHi (434) - Alpha_INS_MSKWH - mskwh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MSKWL (435) - Alpha_INS_MSKWL - mskwl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MSKWLi (436) - Alpha_INS_MSKWL - mskwl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MULLi (437) - Alpha_INS_MULL - mull $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MULLr (438) - Alpha_INS_MULL - mull $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MULQi (439) - Alpha_INS_MULQ - mulq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_MULQr (440) - Alpha_INS_MULQ - mulq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MULS (441) - Alpha_INS_MULSsSU - muls/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_MULT (442) - Alpha_INS_MULTsSU - mult/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ORNOTi (443) - Alpha_INS_ORNOT - ornot $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_ORNOTr (444) - Alpha_INS_ORNOT - ornot $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_RC (445) - Alpha_INS_RC - rc $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_RETDAG (446) - Alpha_INS_RET - ret $$31,($$26),1 */ @@ -2074,340 +2074,340 @@ }}, { /* Alpha_RPCC (448) - Alpha_INS_RPCC - rpcc $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_RS (449) - Alpha_INS_RS - rs $RA */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ { 0 } }}, { /* Alpha_S4ADDLi (450) - Alpha_INS_S4ADDL - s4addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S4ADDLr (451) - Alpha_INS_S4ADDL - s4addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S4ADDQi (452) - Alpha_INS_S4ADDQ - s4addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S4ADDQr (453) - Alpha_INS_S4ADDQ - s4addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S4SUBLi (454) - Alpha_INS_S4SUBL - s4subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S4SUBLr (455) - Alpha_INS_S4SUBL - s4subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S4SUBQi (456) - Alpha_INS_S4SUBQ - s4subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S4SUBQr (457) - Alpha_INS_S4SUBQ - s4subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S8ADDLi (458) - Alpha_INS_S8ADDL - s8addl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S8ADDLr (459) - Alpha_INS_S8ADDL - s8addl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S8ADDQi (460) - Alpha_INS_S8ADDQ - s8addq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S8ADDQr (461) - Alpha_INS_S8ADDQ - s8addq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S8SUBLi (462) - Alpha_INS_S8SUBL - s8subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S8SUBLr (463) - Alpha_INS_S8SUBL - s8subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_S8SUBQi (464) - Alpha_INS_S8SUBQ - s8subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_S8SUBQr (465) - Alpha_INS_S8SUBQ - s8subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SEXTB (466) - Alpha_INS_SEXTB - sextb $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SEXTW (467) - Alpha_INS_SEXTW - sextw $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SLi (468) - Alpha_INS_SLL - sll $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_SLr (469) - Alpha_INS_SLL - sll $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SQRTS (470) - Alpha_INS_SQRTSsSU - sqrts/su $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SQRTT (471) - Alpha_INS_SQRTTsSU - sqrtt/su $RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SRAi (472) - Alpha_INS_SRA - sra $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_SRAr (473) - Alpha_INS_SRA - sra $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SRLi (474) - Alpha_INS_SRL - srl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_SRLr (475) - Alpha_INS_SRL - srl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STB (476) - Alpha_INS_STB - stb $RA, $DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STBr (477) - Alpha_INS_STB - stb $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STL (478) - Alpha_INS_STL - stl $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STL_C (479) - Alpha_INS_STL_C - stl_c $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RR */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STLr (480) - Alpha_INS_STL - stl $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STQ (481) - Alpha_INS_STQ - stq $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STQ_C (482) - Alpha_INS_STQ_C - stq_c $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RR */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RR */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STQ_U (483) - Alpha_INS_STQ_U - stq_u $RA, $DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STQr (484) - Alpha_INS_STQ - stq $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STS (485) - Alpha_INS_STS - sts $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STSr (486) - Alpha_INS_STS - sts $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STT (487) - Alpha_INS_STT - stt $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STTr (488) - Alpha_INS_STT - stt $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STW (489) - Alpha_INS_STW - stw $RA,$DISP($RB) */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_STWr (490) - Alpha_INS_STW - stw $RA,$DISP($RB) !gprellow */ { - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* DISP */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* DISP */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SUBLi (491) - Alpha_INS_SUBL - subl $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_SUBLr (492) - Alpha_INS_SUBL - subl $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SUBQi (493) - Alpha_INS_SUBQ - subq $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_SUBQr (494) - Alpha_INS_SUBQ - subq $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SUBS (495) - Alpha_INS_SUBSsSU - subs/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f32, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_SUBT (496) - Alpha_INS_SUBTsSU - subt/su $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_f64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_TRAPB (497) - Alpha_INS_TRAPB - trapb */ @@ -2416,28 +2416,28 @@ }}, { /* Alpha_UMULHi (498) - Alpha_INS_UMULH - umulh $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_UMULHr (499) - Alpha_INS_UMULH - umulh $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_WH64 (500) - Alpha_INS_WH64 - wh64 ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_WH64EN (501) - Alpha_INS_WH64EN - wh64en ($RB) */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_WMB (502) - Alpha_INS_WMB - wmb */ @@ -2446,22 +2446,22 @@ }}, { /* Alpha_XORi (503) - Alpha_INS_XOR - xor $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, { /* Alpha_XORr (504) - Alpha_INS_XOR - xor $RA,$RB,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RB */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RB */ { 0 } }}, { /* Alpha_ZAPNOTi (505) - Alpha_INS_ZAPNOT - zapnot $RA,$L,$RC */ { - { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RC */ - { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* RA */ - { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, { 0 } }, /* L */ + { CS_OP_REG, CS_AC_WRITE, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RC */ + { CS_OP_REG, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* RA */ + { CS_OP_IMM, CS_AC_READ, { CS_DATA_TYPE_i64, CS_DATA_TYPE_LAST }, }, /* L */ { 0 } }}, From 9b8dc7de4ce8813510609e29c5d71c55f0b18c0f Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Mon, 14 Aug 2023 11:43:26 +0300 Subject: [PATCH 10/26] Delete redundant files From d5384d96dcba9087422c487b4534a56868a2d54e Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Fri, 15 Sep 2023 14:59:08 +0300 Subject: [PATCH 11/26] Refactor after rebase --- arch/Alpha/AlphaMapping.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c index f9e2ce1077..d9c8cfa4cf 100644 --- a/arch/Alpha/AlphaMapping.c +++ b/arch/Alpha/AlphaMapping.c @@ -37,7 +37,7 @@ void Alpha_init_cs_detail(MCInst *MI) void Alpha_add_cs_detail(MCInst *MI, unsigned OpNum) { - if (!MI->csh->detail) + if (!detail_is_set(MI)) return; cs_op_type op_type = map_get_op_type(MI, OpNum); @@ -87,7 +87,7 @@ void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) if (i != 0) { insn->id = insns[i].mapid; - if (h->detail) { + if (insn->detail) { #ifndef CAPSTONE_DIET memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use)); From a2bd2477603375aa1bf4e52c948fd281e48d575a Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Wed, 29 Nov 2023 13:08:43 +0300 Subject: [PATCH 12/26] Refactor after rebase --- .gitmodules | 3 --- 1 file changed, 3 deletions(-) diff --git a/.gitmodules b/.gitmodules index 9ef326ac15..e69de29bb2 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +0,0 @@ -[submodule "suite/auto-sync/vendor/tree-sitter-cpp"] - path = suite/auto-sync/vendor/tree-sitter-cpp - url = https://github.com/tree-sitter/tree-sitter-cpp.git From 234a3138a4eff65553efe81cac93d13174272c66 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Wed, 29 Nov 2023 13:30:57 +0300 Subject: [PATCH 13/26] Update Alpha files --- arch/Alpha/AlphaGenDisassemblerTables.inc | 1 + arch/Alpha/AlphaMapping.c | 2 +- arch/Alpha/AlphaMapping.h | 1 + arch/Alpha/AlphaModule.c | 2 ++ arch/Alpha/AlphaModule.h | 2 ++ 5 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/Alpha/AlphaGenDisassemblerTables.inc b/arch/Alpha/AlphaGenDisassemblerTables.inc index 30a8c090f0..a67ae33cb2 100644 --- a/arch/Alpha/AlphaGenDisassemblerTables.inc +++ b/arch/Alpha/AlphaGenDisassemblerTables.inc @@ -711,6 +711,7 @@ static const uint8_t DecoderTableSTr32[] = { static bool checkDecoderPredicate(MCInst *Inst, unsigned Idx) { /* llvm_unreachable("Invalid index!"); */ + return false; } #define DecodeToMCInst(fname, fieldname, InsnType) \ diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c index d9c8cfa4cf..9f3c1bf8c5 100644 --- a/arch/Alpha/AlphaMapping.c +++ b/arch/Alpha/AlphaMapping.c @@ -145,7 +145,7 @@ static name_map group_name_maps[] = { const char *Alpha_group_name(csh handle, unsigned int id) { #ifndef CAPSTONE_DIET - id2name(group_name_maps, ARR_SIZE(group_name_maps), id); + return id2name(group_name_maps, ARR_SIZE(group_name_maps), id); #else return NULL; #endif diff --git a/arch/Alpha/AlphaMapping.h b/arch/Alpha/AlphaMapping.h index af813f8b78..3230800e30 100644 --- a/arch/Alpha/AlphaMapping.h +++ b/arch/Alpha/AlphaMapping.h @@ -24,6 +24,7 @@ const char *Alpha_getRegisterName(csh handle, unsigned int id); bool Alpha_getInstruction(csh handle, const uint8_t *code, size_t code_len, MCInst *instr, uint16_t *size, uint64_t address, void *info); +void Alpha_init_cs_detail(MCInst *MI); void Alpha_add_cs_detail(MCInst *MI, unsigned OpNum); void Alpha_set_instr_map_data(MCInst *MI); diff --git a/arch/Alpha/AlphaModule.c b/arch/Alpha/AlphaModule.c index 67de33f72f..271f177656 100644 --- a/arch/Alpha/AlphaModule.c +++ b/arch/Alpha/AlphaModule.c @@ -4,8 +4,10 @@ #ifdef CAPSTONE_HAS_ALPHA #include "../../utils.h" +#include "../../MCRegisterInfo.h" #include "AlphaDisassembler.h" #include "AlphaMapping.h" +#include "AlphaModule.h" cs_err ALPHA_global_init(cs_struct *ud) { diff --git a/arch/Alpha/AlphaModule.h b/arch/Alpha/AlphaModule.h index b0761bf0eb..3d349a7e48 100644 --- a/arch/Alpha/AlphaModule.h +++ b/arch/Alpha/AlphaModule.h @@ -4,6 +4,8 @@ #ifndef CAPSTONE_ALPHAMODULE_H #define CAPSTONE_ALPHAMODULE_H +#include "../../utils.h" + cs_err ALPHA_global_init(cs_struct *ud); cs_err ALPHA_option(cs_struct *handle, cs_opt_type type, size_t value); From 5ffdbc2ea08a337e07b68199c6b4ff8bf0a2139f Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Wed, 29 Nov 2023 13:34:08 +0300 Subject: [PATCH 14/26] Add Alpha into build files --- Makefile | 6 ++--- bindings/Makefile | 4 +++ cstool/cstool_alpha.c | 1 + include/capstone/alpha.h | 2 +- nmake.bat | 1 + suite/MC/Alpha/insn-alpha.s.cs | 34 +++++++++++++------------- suite/auto-sync/Updater/Update-Arch.sh | 2 +- suite/cstest/src/capstone_test.c | 1 - tests/Makefile | 5 ++++ 9 files changed, 33 insertions(+), 23 deletions(-) diff --git a/Makefile b/Makefile index be88c541e0..c1ce2221d3 100644 --- a/Makefile +++ b/Makefile @@ -339,7 +339,7 @@ LIBOBJ = LIBOBJ += $(OBJDIR)/cs.o $(OBJDIR)/utils.o $(OBJDIR)/SStream.o $(OBJDIR)/MCInstrDesc.o $(OBJDIR)/MCRegisterInfo.o $(OBJDIR)/MCInst.o $(OBJDIR)/MCInstPrinter.o $(OBJDIR)/Mapping.o LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_AARCH64) $(LIBOBJ_M68K) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_RISCV) $(LIBOBJ_SPARC) $(LIBOBJ_SYSZ) $(LIBOBJ_SH) LIBOBJ += $(LIBOBJ_X86) $(LIBOBJ_XCORE) $(LIBOBJ_TMS320C64X) $(LIBOBJ_M680X) $(LIBOBJ_EVM) $(LIBOBJ_MOS65XX) $(LIBOBJ_WASM) $(LIBOBJ_BPF) -LIBOBJ += $(LIBOBJ_TRICORE) +LIBOBJ += $(LIBOBJ_TRICORE) $(LIBOBJ_ALPHA) ifeq ($(PKG_EXTRA),) @@ -562,12 +562,12 @@ dist: git archive --format=zip --prefix=capstone-$(DIST_VERSION)/ $(TAG) > capstone-$(DIST_VERSION).zip TESTS = test_basic test_detail test_arm test_aarch64 test_m68k test_mips test_ppc test_sparc test_tricore -TESTS += test_systemz test_x86 test_xcore test_iter test_evm test_riscv test_mos65xx test_wasm test_bpf +TESTS += test_systemz test_x86 test_xcore test_iter test_evm test_riscv test_mos65xx test_wasm test_bpf test_alpha TESTS += test_basic.static test_detail.static test_arm.static test_aarch64.static TESTS += test_m68k.static test_mips.static test_ppc.static test_sparc.static TESTS += test_systemz.static test_x86.static test_xcore.static test_m680x.static TESTS += test_skipdata test_skipdata.static test_iter.static test_evm.static test_riscv.static -TESTS += test_mos65xx.static test_wasm.static test_bpf.static +TESTS += test_mos65xx.static test_wasm.static test_bpf.static test_alpha.static check: $(TESTS) diff --git a/bindings/Makefile b/bindings/Makefile index 3aec5da98c..c730917d40 100644 --- a/bindings/Makefile +++ b/bindings/Makefile @@ -23,6 +23,7 @@ TEST_M680X = $(TMPDIR)/test_m680x TEST_TRICORE = $(TMPDIR)/test_tricore TEST_SH = $(TMPDIR)/test_sh TEST_TMS320C64X = $(TMPDIR)/test_tms320c64x +TEST_ALPHA = $(TMPDIR)/test_alpha PYTHON3 ?= python3 @@ -64,6 +65,7 @@ expected: ../tests/test_sh > $(TEST_SH)_e ../tests/test_tricore > $(TEST_TRICORE)_e ../tests/test_tms320c64x > $(TEST_TMS320C64X)_e + ../tests/test_alpha > $(TEST_ALPHA)_e python: FORCE cd python && $(MAKE) @@ -88,6 +90,7 @@ python: FORCE $(PYTHON3) python/test_sh.py > $(TEST_SH)_o $(PYTHON3) python/test_tricore.py > $(TEST_TRICORE)_o $(PYTHON3) python/test_tms320c64x.py > $(TEST_TMS320C64X)_o + $(PYTHON3) python/test_alpha.py > $(TEST_ALPHA)_o $(MAKE) test_diff java: FORCE @@ -127,6 +130,7 @@ test_diff: FORCE $(DIFF) $(TEST_SH)_e $(TEST_SH)_o $(DIFF) $(TEST_TRICORE)_e $(TEST_TRICORE)_o $(DIFF) $(TEST_TMS320C64X)_e $(TEST_TMS320C64X)_o + $(DIFF) $(TEST_ALPHA)_e $(TEST_ALPHA)_o clean: rm -rf $(TMPDIR) diff --git a/cstool/cstool_alpha.c b/cstool/cstool_alpha.c index 34e984a17e..e34ad09b55 100644 --- a/cstool/cstool_alpha.c +++ b/cstool/cstool_alpha.c @@ -2,6 +2,7 @@ #include #include +#include "cstool.h" void print_insn_detail_alpha(csh handle, cs_insn *ins) { diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index 0a29e219e4..fde20611de 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -12,7 +12,7 @@ extern "C" { #include #endif -#include "../../cs_operand.h" +#include "cs_operand.h" #include "platform.h" #ifdef _MSC_VER diff --git a/nmake.bat b/nmake.bat index ec2496edf5..0f03bce883 100644 --- a/nmake.bat +++ b/nmake.bat @@ -22,6 +22,7 @@ if "%1"=="MOS65XX" set %arch%=MOS65XX if "%1"=="WASM" set %arch%=WASM if "%1"=="BPF" set %arch%=BPF if "%1"=="RISCV" set %arch%=RISCV +if "%1"=="ALPHA" set %arch%=ALPHA if not "%arch%"=="" set flags=%flags% and " -DCAPSTONE_ARCHITECTURE_DEFAULT=OFF -DCAPSTONE_%arch%_SUPPORT=ON" diff --git a/suite/MC/Alpha/insn-alpha.s.cs b/suite/MC/Alpha/insn-alpha.s.cs index 6e4f223db8..7ece0be7d9 100644 --- a/suite/MC/Alpha/insn-alpha.s.cs +++ b/suite/MC/Alpha/insn-alpha.s.cs @@ -7,20 +7,20 @@ 0x03,0xb4,0x22,0x58 = addt/su $f1,$f10,$f11 0x03,0x00,0x22,0x44 = and $1,$2,$3 0x03,0xd0,0x3b,0x44 = and $1,0xde,$3 -0xfc,0x3f,0x20,0xe4 = beq $1,0x14 -0xfc,0x3f,0x20,0xf8 = bge $1,0x18 -0xfc,0x3f,0x20,0xfc = bgt $1,0x1c +0xfc,0x3f,0x20,0xe4 = beq $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xf8 = bge $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xfc = bgt $1,0xfffffffffffffff4 0x03,0x01,0x22,0x44 = bic $1,$2,$3 0x03,0xd1,0x3b,0x44 = bic $1,0xde,$3 0x03,0x04,0x22,0x44 = bis $1,$2,$3 0x03,0xd4,0x3b,0x44 = bis $1,0xde,$3 -0xfc,0x3f,0x20,0xe0 = blbc $1,0x30 -0xfc,0x3f,0x20,0xf0 = blbs $1,0x34 -0xfc,0x3f,0x20,0xec = ble $1,0x38 -0xfc,0x3f,0x20,0xe8 = blt $1,0x3c -0xfc,0x3f,0x20,0xf4 = bne $1,0x40 -0xfc,0x3f,0xe0,0xc3 = br $31,0x44 -0xfc,0x3f,0x40,0xd3 = bsr $26,$0x48 ..ng +0xfc,0x3f,0x20,0xe0 = blbc $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xf0 = blbs $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xec = ble $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xe8 = blt $1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xf4 = bne $1,0xfffffffffffffff4 +0xfc,0x3f,0xe0,0xc3 = br $31,0xfffffffffffffff4 +0xfc,0x3f,0x40,0xd3 = bsr $26,$0xfffffffffffffff4 ..ng 0x83,0x04,0x22,0x44 = cmoveq $1,$2,$3 0xc3,0x08,0x22,0x44 = cmovge $1,$2,$3 0xc3,0x0c,0x22,0x44 = cmovgt $1,$2,$3 @@ -76,12 +76,12 @@ 0x43,0xdb,0x3b,0x48 = extwh $1,0xde,$3 0xc3,0x02,0x22,0x48 = extwl $1,$2,$3 0xc3,0xd2,0x3b,0x48 = extwl $1,0xde,$3 -0xfc,0x3f,0x20,0xc4 = fbeq $f1,0x128 -0xfc,0x3f,0x20,0xd8 = fbge $f1,0x12c -0xfc,0x3f,0x20,0xdc = fbgt $f1,0x130 -0xfc,0x3f,0x20,0xcc = fble $f1,0x134 -0xfc,0x3f,0x20,0xc8 = fblt $f1,0x138 -0xfc,0x3f,0x20,0xd4 = fbne $f1,0x13c +0xfc,0x3f,0x20,0xc4 = fbeq $f1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xd8 = fbge $f1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xdc = fbgt $f1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xcc = fble $f1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xc8 = fblt $f1,0xfffffffffffffff4 +0xfc,0x3f,0x20,0xd4 = fbne $f1,0xfffffffffffffff4 0x43,0x05,0x22,0x5c = fcmoveq ,$f10,$f11 0xa3,0x05,0x22,0x5c = fcmovge ,$f10,$f11 0xe3,0x05,0x22,0x5c = fcmovgt ,$f10,$f11 @@ -147,7 +147,7 @@ 0x03,0xd5,0x3b,0x44 = ornot $1,0xde,$3 0x00,0xe0,0x20,0x60 = rc $1 0x01,0x80,0xfa,0x6b = ret $31,($26),1 -0x00,0xc0,0x1f,0x60 = rpcc $1 +0x00,0xc0,0x1f,0x60 = rpcc $0 0x00,0xf0,0x20,0x60 = rs $1 0x43,0x00,0x22,0x40 = s4addl $1,$2,$3 0x43,0xd0,0x3b,0x40 = s4addl $1,0xde,$3 diff --git a/suite/auto-sync/Updater/Update-Arch.sh b/suite/auto-sync/Updater/Update-Arch.sh index d96b6938e7..372521f7ea 100755 --- a/suite/auto-sync/Updater/Update-Arch.sh +++ b/suite/auto-sync/Updater/Update-Arch.sh @@ -53,7 +53,7 @@ setup_build_dir() { # Main # -supported="ARM, PPC, AArch64" +supported="ARM, PPC, AArch64, Alpha" if [ $# -ne 3 ] || [ "$1" = "-h" ] || [ "$1" = "--help" ]; then echo "$0 " diff --git a/suite/cstest/src/capstone_test.c b/suite/cstest/src/capstone_test.c index 3178abcbfe..3290415ce0 100644 --- a/suite/cstest/src/capstone_test.c +++ b/suite/cstest/src/capstone_test.c @@ -193,7 +193,6 @@ int set_function(int arch) case CS_ARCH_ALPHA: function = get_detail_alpha; break; - default: default: return -1; } diff --git a/tests/Makefile b/tests/Makefile index 5a56b269f5..f01ff6fc9d 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -137,6 +137,11 @@ ifneq (,$(findstring sh,$(CAPSTONE_ARCHS))) CFLAGS += -DCAPSTONE_HAS_SH SOURCES += test_sh.c endif +ifneq (,$(findstring alpha,$(CAPSTONE_ARCHS))) +CFLAGS += -DCAPSTONE_HAS_ALPHA +SOURCES += test_alpha.c +endif + OBJS = $(addprefix $(OBJDIR)/,$(SOURCES:.c=.o)) BINARY = $(addprefix $(TESTDIR)/,$(SOURCES:.c=$(BIN_EXT))) From 681e90bfc323145658de878db909243cac9c4995 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Wed, 29 Nov 2023 13:34:40 +0300 Subject: [PATCH 15/26] Add Alpha code to tests and bindings --- bindings/const_generator.py | 2 +- bindings/python/Makefile | 2 +- bindings/python/capstone/__init__.py | 6 ++++-- bindings/python/capstone/alpha.py | 4 ++-- bindings/python/capstone/alpha_const.py | 12 +++++++----- bindings/python/test_all.py | 3 ++- bindings/python/test_alpha.py | 9 +-------- bindings/python/test_basic.py | 2 ++ bindings/python/test_detail.py | 2 ++ bindings/python/test_iter.py | 3 +++ tests/test_all.sh | 3 ++- tests/test_alpha.c | 2 +- tests/test_basic.c | 12 ++++++++++++ tests/test_detail.c | 12 ++++++++++++ tests/test_iter.c | 2 +- 15 files changed, 53 insertions(+), 23 deletions(-) diff --git a/bindings/const_generator.py b/bindings/const_generator.py index 074b790057..2171c7b78c 100644 --- a/bindings/const_generator.py +++ b/bindings/const_generator.py @@ -5,7 +5,7 @@ INCL_DIR = '../include/capstone/' -include = [ 'arm.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'sh.h', 'tricore.h' ] +include = [ 'arm.h', 'm68k.h', 'mips.h', 'x86.h', 'ppc.h', 'sparc.h', 'systemz.h', 'xcore.h', 'tms320c64x.h', 'm680x.h', 'evm.h', 'mos65xx.h', 'wasm.h', 'bpf.h' ,'riscv.h', 'sh.h', 'tricore.h', 'alpha.h' ] template = { 'java': { diff --git a/bindings/python/Makefile b/bindings/python/Makefile index 3b25872421..a1e6f7bf19 100644 --- a/bindings/python/Makefile +++ b/bindings/python/Makefile @@ -72,7 +72,7 @@ TESTS = test_basic.py test_detail.py test_arm.py test_aarch64.py test_m68k.py te TESTS += test_ppc.py test_sparc.py test_systemz.py test_x86.py test_xcore.py test_tms320c64x.py TESTS += test_m680x.py test_skipdata.py test_mos65xx.py test_bpf.py test_riscv.py TESTS += test_evm.py test_tricore.py test_wasm.py test_sh.py -TESTS += test_lite.py test_iter.py test_customized_mnem.py +TESTS += test_lite.py test_iter.py test_customized_mnem.py test_alpha.py check: @for t in $(TESTS); do \ diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py index d96cafc0d6..99680100fe 100755 --- a/bindings/python/capstone/__init__.py +++ b/bindings/python/capstone/__init__.py @@ -443,7 +443,7 @@ def copy_ctypes_list(src): return [copy_ctypes(n) for n in src] # Weird import placement because these modules are needed by the below code but need the above functions -from . import arm, aarch64, m68k, mips, ppc, sparc, systemz, x86, xcore, tms320c64x, m680x, evm, mos65xx, wasm, bpf, riscv, sh, tricore +from . import arm, aarch64, m68k, mips, ppc, sparc, systemz, x86, xcore, tms320c64x, m680x, evm, mos65xx, wasm, bpf, riscv, sh, tricore, alpha class _cs_arch(ctypes.Union): _fields_ = ( @@ -815,6 +815,8 @@ def __gen_detail(self): (self.sh_insn, self.sh_size, self.operands) = sh.get_arch_info(self._raw.detail.contents.arch.sh) elif arch == CS_ARCH_TRICORE: (self.update_flags, self.operands) = tricore.get_arch_info(self._raw.detail.contents.arch.tricore) + elif arch == CS_ARCH_ALPHA: + (self.operands) = alpha.get_arch_info(self._raw.detail.contents.arch.alpha) def __getattr__(self, name): @@ -1307,7 +1309,7 @@ def debug(): "sysz": CS_ARCH_SYSZ, 'xcore': CS_ARCH_XCORE, "tms320c64x": CS_ARCH_TMS320C64X, "m680x": CS_ARCH_M680X, 'evm': CS_ARCH_EVM, 'mos65xx': CS_ARCH_MOS65XX, 'bpf': CS_ARCH_BPF, 'riscv': CS_ARCH_RISCV, 'tricore': CS_ARCH_TRICORE, - 'wasm': CS_ARCH_WASM, 'sh': CS_ARCH_SH, + 'wasm': CS_ARCH_WASM, 'sh': CS_ARCH_SH, 'alpha': CS_ARCH_ALPHA, } all_archs = "" diff --git a/bindings/python/capstone/alpha.py b/bindings/python/capstone/alpha.py index bd2c56ba01..d6ab5110bf 100644 --- a/bindings/python/capstone/alpha.py +++ b/bindings/python/capstone/alpha.py @@ -36,8 +36,8 @@ def reg(self): class CsAlpha(ctypes.Structure): _fields_ = ( ('op_count', ctypes.c_uint8), - ('operands', AlphaOp * 8) + ('operands', AlphaOp * 3) ) def get_arch_info(a): - return copy_ctypes_list(a.operands[:a.op_count]) + return (copy_ctypes_list(a.operands[:a.op_count])) diff --git a/bindings/python/capstone/alpha_const.py b/bindings/python/capstone/alpha_const.py index d4fffa78d7..a3d05e8c5c 100644 --- a/bindings/python/capstone/alpha_const.py +++ b/bindings/python/capstone/alpha_const.py @@ -1,3 +1,4 @@ +from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM # For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [alpha_const.py] # Operand type for instruction's operands @@ -167,9 +168,9 @@ Alpha_INS_LDAH = 155 Alpha_INS_LDBU = 156 Alpha_INS_LDL = 157 -Alpha_INS_LDLsL = 158 +Alpha_INS_LDL_L = 158 Alpha_INS_LDQ = 159 -Alpha_INS_LDQsL = 160 +Alpha_INS_LDQ_L = 160 Alpha_INS_LDQ_U = 161 Alpha_INS_LDS = 162 Alpha_INS_LDT = 163 @@ -208,9 +209,9 @@ Alpha_INS_SRL = 196 Alpha_INS_STB = 197 Alpha_INS_STL = 198 -Alpha_INS_STLsL = 199 +Alpha_INS_STL_C = 199 Alpha_INS_STQ = 200 -Alpha_INS_STQsL = 201 +Alpha_INS_STQ_C = 201 Alpha_INS_STQ_U = 202 Alpha_INS_STS = 203 Alpha_INS_STT = 204 @@ -234,7 +235,8 @@ # Generic groups Alpha_GRP_CALL = 219 Alpha_GRP_JUMP = 220 -Alpha_GRP_ENDING = 221 +Alpha_GRP_BRANCH_RELATIVE = 221 +Alpha_GRP_ENDING = 222 ALPHA_FEATURE_INVALID = 0 ALPHA_FEATURE_ENDING = 1 diff --git a/bindings/python/test_all.py b/bindings/python/test_all.py index 820829b509..2e70de6fdc 100755 --- a/bindings/python/test_all.py +++ b/bindings/python/test_all.py @@ -2,7 +2,7 @@ import test_basic, test_arm, test_aarch64, test_detail, test_lite, test_m68k, test_mips, \ test_ppc, test_x86, test_skipdata, test_sparc, test_systemz, test_tms320c64x, test_customized_mnem, \ - test_m680x, test_mos65xx, test_xcore, test_riscv + test_m680x, test_mos65xx, test_xcore, test_riscv, test_alpha test_basic.test_class() test_arm.test_class() @@ -22,3 +22,4 @@ test_customized_mnem.test() test_xcore.test_class() test_riscv.test_class() +test_alpha.test_class() diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py index 8a5a880166..986c02d8d7 100755 --- a/bindings/python/test_alpha.py +++ b/bindings/python/test_alpha.py @@ -5,14 +5,7 @@ from capstone.alpha import * from xprint import to_x, to_hex -ALPHA_CODE = b'\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5' \ - b'\x0f\x04\xfeG\xfe\xff=$\x90\x86A\x8d\x10\x00O\x9d\xfe\xff=$\x98' \ - b'\x86A\x89\x18\x00O\x99\x10\x00O\x8d \x00O\x9d\x18\x00O\x89(\x00O'\ - b'\x99(\x00O\x89\x8b\xd5\xea[\x00\x00\x00` \x00O\x8e\x11\x04k]\xfe'\ - b'\xff=$x\x86\x01"\x08\x80}\xa7\x00@[k\x02\x00\xba\'\xecy\xbd#\xfe'\ - b'\xff=$\x81\x86\x01"\x08\x80}\xa7\x00@[k\x02\x00\xba\'\xd4y\xbd#' \ - b'\x1f\x04\xffG\x1e\x04\xefG\x00\x00^\xa7\x08\x00\xfe\xa50\x00\xde'\ - b'#\x01\x80\xfak' +ALPHA_CODE = b'\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7' all_tests = ( (CS_ARCH_ALPHA, 0, ALPHA_CODE, "Alpha"), diff --git a/bindings/python/test_basic.py b/bindings/python/test_basic.py index a41dbe43e2..d8d16df64c 100755 --- a/bindings/python/test_basic.py +++ b/bindings/python/test_basic.py @@ -40,6 +40,7 @@ EBPF_CODE = b"\x97\x09\x00\x00\x37\x13\x03\x00\xdc\x02\x00\x00\x20\x00\x00\x00\x30\x00\x00\x00\x00\x00\x00\x00\xdb\x3a\x00\x01\x00\x00\x00\x00\x84\x02\x00\x00\x00\x00\x00\x00\x6d\x33\x17\x02\x00\x00\x00\x00" RISCV_CODE32 = b"\x37\x34\x00\x00\x97\x82\x00\x00\xef\x00\x80\x00\xef\xf0\x1f\xff\xe7\x00\x45\x00\xe7\x00\xc0\xff\x63\x05\x41\x00\xe3\x9d\x61\xfe\x63\xca\x93\x00\x63\x53\xb5\x00\x63\x65\xd6\x00\x63\x76\xf7\x00\x03\x88\x18\x00\x03\x99\x49\x00\x03\xaa\x6a\x00\x03\xcb\x2b\x01\x03\xdc\x8c\x01\x23\x86\xad\x03\x23\x9a\xce\x03\x23\x8f\xef\x01\x93\x00\xe0\x00\x13\xa1\x01\x01\x13\xb2\x02\x7d\x13\xc3\x03\xdd\x13\xe4\xc4\x12\x13\xf5\x85\x0c\x13\x96\xe6\x01\x13\xd7\x97\x01\x13\xd8\xf8\x40\x33\x89\x49\x01\xb3\x0a\x7b\x41\x33\xac\xac\x01\xb3\x3d\xde\x01\x33\xd2\x62\x40\xb3\x43\x94\x00\x33\xe5\xc5\x00\xb3\x76\xf7\x00\xb3\x54\x39\x01\xb3\x50\x31\x00\x33\x9f\x0f\x00" RISCV_CODE64 = b"\x13\x04\xa8\x7a" +ALPHA_CODE = b'\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7' all_tests = ( @@ -75,6 +76,7 @@ (CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_EXTENDED, EBPF_CODE, "eBPF", None), (CS_ARCH_RISCV, CS_MODE_RISCV32, RISCV_CODE32, "RISCV32", None), (CS_ARCH_RISCV, CS_MODE_RISCV64, RISCV_CODE64, "RISCV64", None), + (CS_ARCH_ALPHA, 0, ALPHA_CODE, "Alpha", None), ) # ## Test cs_disasm_quick() diff --git a/bindings/python/test_detail.py b/bindings/python/test_detail.py index 8ce3b9a871..b0ef2c6bc0 100755 --- a/bindings/python/test_detail.py +++ b/bindings/python/test_detail.py @@ -30,6 +30,7 @@ M680X_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39" MOS65XX_CODE = b"\x0A\x00\xFE\x34\x12\xD0\xFF\xEA\x19\x56\x34\x46\x80" EBPF_CODE = b"\x97\x09\x00\x00\x37\x13\x03\x00\xdc\x02\x00\x00\x20\x00\x00\x00\x30\x00\x00\x00\x00\x00\x00\x00\xdb\x3a\x00\x01\x00\x00\x00\x00\x84\x02\x00\x00\x00\x00\x00\x00\x6d\x33\x17\x02\x00\x00\x00\x00" +ALPHA_CODE = b'\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7' all_tests = ( (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None), @@ -57,6 +58,7 @@ (CS_ARCH_M680X, CS_MODE_M680X_6809, M680X_CODE, "M680X_M6809", None), (CS_ARCH_MOS65XX, 0, MOS65XX_CODE, "MOS65XX", None), (CS_ARCH_BPF, CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_EXTENDED, EBPF_CODE, "eBPF", None), + (CS_ARCH_ALPHA, CS_MODE_LITTLE_ENDIAN, ALPHA_CODE, "Alpha", None), ) diff --git a/bindings/python/test_iter.py b/bindings/python/test_iter.py index e9944a6ecb..634af167a9 100755 --- a/bindings/python/test_iter.py +++ b/bindings/python/test_iter.py @@ -28,6 +28,8 @@ XCORE_CODE = b"\xfe\x0f\xfe\x17\x13\x17\xc6\xfe\xec\x17\x97\xf8\xec\x4f\x1f\xfd\xec\x37\x07\xf2\x45\x5b\xf9\xfa\x02\x06\x1b\x10" M68K_CODE = b"\xd4\x40\x87\x5a\x4e\x71\x02\xb4\xc0\xde\xc0\xde\x5c\x00\x1d\x80\x71\x12\x01\x23\xf2\x3c\x44\x22\x40\x49\x0e\x56\x54\xc5\xf2\x3c\x44\x00\x44\x7a\x00\x00\xf2\x00\x0a\x28\x4E\xB9\x00\x00\x00\x12\x4E\x75" M680X_CODE = b"\x06\x10\x19\x1a\x55\x1e\x01\x23\xe9\x31\x06\x34\x55\xa6\x81\xa7\x89\x7f\xff\xa6\x9d\x10\x00\xa7\x91\xa6\x9f\x10\x00\x11\xac\x99\x10\x00\x39" +ALPHA_CODE = b'\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7' + all_tests = ( (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", None), @@ -55,6 +57,7 @@ (CS_ARCH_XCORE, 0, XCORE_CODE, "XCore", None), (CS_ARCH_M68K, CS_MODE_BIG_ENDIAN | CS_MODE_M68K_040, M68K_CODE, "M68K (68040)", None), (CS_ARCH_M680X, CS_MODE_M680X_6809, M680X_CODE, "M680X_M6809", None), + (CS_ARCH_ALPHA, 0, ALPHA_CODE, "Alpha", None), ) # ## Test class Cs diff --git a/tests/test_all.sh b/tests/test_all.sh index 42131a6e9d..905d84e5ab 100644 --- a/tests/test_all.sh +++ b/tests/test_all.sh @@ -18,4 +18,5 @@ ./test_wasm ./test_winkernel ./test_x86 -./test_xcore \ No newline at end of file +./test_xcore +./test_alpha \ No newline at end of file diff --git a/tests/test_alpha.c b/tests/test_alpha.c index efbfbfb0ce..8653cc7191 100644 --- a/tests/test_alpha.c +++ b/tests/test_alpha.c @@ -60,7 +60,7 @@ static void print_insn_detail(cs_insn *ins) static void test() { #define ALPHA_CODE \ - "\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5" + "\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7" struct platform platforms[] = { { diff --git a/tests/test_basic.c b/tests/test_basic.c index 7d71e48d2c..6cd4dd9b35 100644 --- a/tests/test_basic.c +++ b/tests/test_basic.c @@ -90,6 +90,9 @@ static void test() #ifdef CAPSTONE_HAS_RISCV #define RISCV_CODE32 "\x37\x34\x00\x00\x97\x82\x00\x00\xef\x00\x80\x00\xef\xf0\x1f\xff\xe7\x00\x45\x00\xe7\x00\xc0\xff\x63\x05\x41\x00\xe3\x9d\x61\xfe\x63\xca\x93\x00\x63\x53\xb5\x00\x63\x65\xd6\x00\x63\x76\xf7\x00\x03\x88\x18\x00\x03\x99\x49\x00\x03\xaa\x6a\x00\x03\xcb\x2b\x01\x03\xdc\x8c\x01\x23\x86\xad\x03\x23\x9a\xce\x03\x23\x8f\xef\x01\x93\x00\xe0\x00\x13\xa1\x01\x01\x13\xb2\x02\x7d\x13\xc3\x03\xdd\x13\xe4\xc4\x12\x13\xf5\x85\x0c\x13\x96\xe6\x01\x13\xd7\x97\x01\x13\xd8\xf8\x40\x33\x89\x49\x01\xb3\x0a\x7b\x41\x33\xac\xac\x01\xb3\x3d\xde\x01\x33\xd2\x62\x40\xb3\x43\x94\x00\x33\xe5\xc5\x00\xb3\x76\xf7\x00\xb3\x54\x39\x01\xb3\x50\x31\x00\x33\x9f\x0f\x00" #define RISCV_CODE64 "\x13\x04\xa8\x7a" // aaa80413 +#endif +#ifdef CAPSTONE_HAS_ALPHA +#define ALPHA_CODE "\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7" #endif struct platform { @@ -363,6 +366,15 @@ static void test() sizeof(RISCV_CODE64) - 1, "RISCV64" }, +#endif +#ifdef CAPSTONE_HAS_ALPHA + { + CS_ARCH_ALPHA, + CS_MODE_LITTLE_ENDIAN, + (unsigned char*)ALPHA_CODE, + sizeof(ALPHA_CODE) - 1, + "Alpha" + }, #endif }; diff --git a/tests/test_detail.c b/tests/test_detail.c index 18d9626676..9e7eeeb329 100644 --- a/tests/test_detail.c +++ b/tests/test_detail.c @@ -77,6 +77,9 @@ static void test() #endif #ifdef CAPSTONE_HAS_BPF #define EBPF_CODE "\x97\x09\x00\x00\x37\x13\x03\x00\xdc\x02\x00\x00\x20\x00\x00\x00\x30\x00\x00\x00\x00\x00\x00\x00\xdb\x3a\x00\x01\x00\x00\x00\x00\x84\x02\x00\x00\x00\x00\x00\x00\x6d\x33\x17\x02\x00\x00\x00\x00" +#endif +#ifdef CAPSTONE_HAS_ALPHA +#define ALPHA_CODE "\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7" #endif struct platform platforms[] = { @@ -280,6 +283,15 @@ static void test() sizeof(EBPF_CODE) - 1, "eBPF" }, +#endif +#ifdef CAPSTONE_HAS_ALPHA + { + CS_ARCH_ALPHA, + CS_MODE_LITTLE_ENDIAN, + (unsigned char*)ALPHA_CODE, + sizeof(ALPHA_CODE) - 1, + "Alpha" + }, #endif }; diff --git a/tests/test_iter.c b/tests/test_iter.c index 38102963c6..edc536e91f 100644 --- a/tests/test_iter.c +++ b/tests/test_iter.c @@ -80,7 +80,7 @@ static void test() #endif #ifdef CAPSTONE_HAS_ALPHA -#define ALPHA_CODE "\x02\x00\xbb\'Pz\xbd#\xd0\xff\xde#\x00\x00^\xb7\x08\x00\xfe\xb5'" +#define ALPHA_CODE "\x02\x00\xbb\x27\x50\x7a\xbd\x23\xd0\xff\xde\x23\x00\x00\x5e\xb7" #endif struct platform platforms[] = { From acded82a73d9722873a9404488783a167acf2a5f Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Thu, 7 Dec 2023 12:04:36 +0300 Subject: [PATCH 16/26] fix alpha fuzz tests --- suite/test_corpus.py | 1 + suite/test_corpus3.py | 1 + 2 files changed, 2 insertions(+) diff --git a/suite/test_corpus.py b/suite/test_corpus.py index 7780062885..c1767abf04 100755 --- a/suite/test_corpus.py +++ b/suite/test_corpus.py @@ -116,6 +116,7 @@ def test_file(fname): ("CS_ARCH_TRICORE", "CS_MODE_TRICORE_161"): 52, ("CS_ARCH_TRICORE", "CS_MODE_TRICORE_162"): 53, ("CS_ARCH_PPC", "CS_MODE_BIG_ENDIAN+CS_MODE_QPX"): 54, + ("CS_ARCH_ALPHA", "CS_MODE_LITTLE_ENDIAN"): 55, } #if not option in ('', 'None'): diff --git a/suite/test_corpus3.py b/suite/test_corpus3.py index d571137846..5df87408e2 100755 --- a/suite/test_corpus3.py +++ b/suite/test_corpus3.py @@ -126,6 +126,7 @@ def test_file(fname): ("CS_ARCH_TRICORE", "CS_MODE_TRICORE_161"): 52, ("CS_ARCH_TRICORE", "CS_MODE_TRICORE_162"): 53, ("CS_ARCH_PPC", "CS_MODE_BIG_ENDIAN+CS_MODE_QPX"): 54, + ("CS_ARCH_ALPHA", "CS_MODE_LITTLE_ENDIAN"): 55, } # if not option in ('', 'None'): From 07ae006e54e0fc3ef7bd770c0f003d858c5c87d4 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Thu, 7 Dec 2023 12:14:37 +0300 Subject: [PATCH 17/26] fix alpha MC file --- suite/MC/Alpha/insn-alpha.s.cs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/suite/MC/Alpha/insn-alpha.s.cs b/suite/MC/Alpha/insn-alpha.s.cs index 7ece0be7d9..05c00e9444 100644 --- a/suite/MC/Alpha/insn-alpha.s.cs +++ b/suite/MC/Alpha/insn-alpha.s.cs @@ -1,4 +1,4 @@ -# CS_ARCH_ALPHA, 0, None +# CS_ARCH_ALPHA, CS_MODE_LITTLE_ENDIAN, None 0x03,0x00,0x22,0x40 = addl $1,$2,$3 0x03,0xd0,0x3b,0x40 = addl $1,0xde,$3 0x03,0x04,0x22,0x40 = addq $1,$2,$3 From b51dd0354e7112d3ad099e0c939fa77de4bc777f Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sat, 16 Dec 2023 19:13:57 +0300 Subject: [PATCH 18/26] modify python bindings according to cs_detail --- bindings/python/capstone/__init__.py | 2 +- bindings/python/test_alpha.py | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py index 99680100fe..e8e3a8ecaa 100755 --- a/bindings/python/capstone/__init__.py +++ b/bindings/python/capstone/__init__.py @@ -472,7 +472,7 @@ class _cs_detail(ctypes.Structure): _fields_ = ( ('regs_read', ctypes.c_uint16 * 20), ('regs_read_count', ctypes.c_ubyte), - ('regs_write', ctypes.c_uint16 * 20), + ('regs_write', ctypes.c_uint16 * 47), ('regs_write_count', ctypes.c_ubyte), ('groups', ctypes.c_ubyte * 8), ('groups_count', ctypes.c_ubyte), diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py index 986c02d8d7..74c2dda169 100755 --- a/bindings/python/test_alpha.py +++ b/bindings/python/test_alpha.py @@ -1,4 +1,6 @@ -#!/usr/bin/env python3 +#!/usr/bin/env python + +# Capstone Python bindings, by Sibirtsev Dmitry from __future__ import print_function from capstone import * From 460e78e00afeb1a6f718edc0971b2aace951a1be Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sat, 16 Dec 2023 19:21:43 +0300 Subject: [PATCH 19/26] fix Alpha tests --- bindings/python/test_alpha.py | 2 +- tests/test_alpha.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py index 74c2dda169..eaa5c0f8ab 100755 --- a/bindings/python/test_alpha.py +++ b/bindings/python/test_alpha.py @@ -47,7 +47,7 @@ def test_class(): for insn in md.disasm(code, 0x1000): print_insn_detail(insn) print() - print("0x%x:\n" % (insn.address + insn.size)) + print("0x%x:\n" % (insn.address + insn.size)) except CsError as e: print("ERROR: %s" % e) diff --git a/tests/test_alpha.c b/tests/test_alpha.c index 8653cc7191..e94dcfdedf 100644 --- a/tests/test_alpha.c +++ b/tests/test_alpha.c @@ -95,7 +95,7 @@ static void test() printf("****************\n"); printf("Platform: %s\n", platforms[i].comment); - print_string_hex("Code:", platforms[i].code, + print_string_hex("Code: ", platforms[i].code, platforms[i].size); printf("Disasm:\n"); From 604053fc7f38fb545139cc85304c8cd192b70c62 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Sat, 16 Dec 2023 19:33:57 +0300 Subject: [PATCH 20/26] Add Alpha to cython setup --- bindings/python/setup_cython.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bindings/python/setup_cython.py b/bindings/python/setup_cython.py index 6eb74e4324..9d4de46caa 100644 --- a/bindings/python/setup_cython.py +++ b/bindings/python/setup_cython.py @@ -69,7 +69,7 @@ compile_args = ['-O3', '-fomit-frame-pointer', '-I' + HEADERS_DIR] link_args = ['-L' + LIBS_DIR] -ext_module_names = ['arm', 'arm_const', 'aarch64', 'aarch64_const', 'm68k', 'm68k_const', 'm680x', 'm680x_const', 'mips', 'mips_const', 'ppc', 'ppc_const', 'x86', 'x86_const', 'sparc', 'sparc_const', 'systemz', 'sysz_const', 'xcore', 'xcore_const', 'tms320c64x', 'tms320c64x_const', 'evm', 'evm_const', 'mos65xx', 'mos65xx_const', 'wasm', 'wasm_const', 'bpf', 'bpf_const', 'riscv', 'riscv_const', 'sh', 'sh_const', 'tricore', 'tricore_const' ] +ext_module_names = ['arm', 'arm_const', 'aarch64', 'aarch64_const', 'm68k', 'm68k_const', 'm680x', 'm680x_const', 'mips', 'mips_const', 'ppc', 'ppc_const', 'x86', 'x86_const', 'sparc', 'sparc_const', 'systemz', 'sysz_const', 'xcore', 'xcore_const', 'tms320c64x', 'tms320c64x_const', 'evm', 'evm_const', 'mos65xx', 'mos65xx_const', 'wasm', 'wasm_const', 'bpf', 'bpf_const', 'riscv', 'riscv_const', 'sh', 'sh_const', 'tricore', 'tricore_const', 'alpha', 'alpha_const' ] ext_modules = [Extension("capstone.ccapstone", ["pyx/ccapstone.pyx"], From 3f5ed4e00a6cecf8c4a49cda7fd795513f05ab6d Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 19 Dec 2023 20:49:25 +0300 Subject: [PATCH 21/26] Add copyright --- bindings/python/test_alpha.py | 4 ++-- suite/cstest/src/alpha_detail.c | 3 +++ tests/test_alpha.c | 3 +++ 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/bindings/python/test_alpha.py b/bindings/python/test_alpha.py index eaa5c0f8ab..a21344c950 100755 --- a/bindings/python/test_alpha.py +++ b/bindings/python/test_alpha.py @@ -1,6 +1,6 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 -# Capstone Python bindings, by Sibirtsev Dmitry +# Capstone Python bindings, by Dmitry Sibirtsev from __future__ import print_function from capstone import * diff --git a/suite/cstest/src/alpha_detail.c b/suite/cstest/src/alpha_detail.c index c8a8132e73..4f41783370 100644 --- a/suite/cstest/src/alpha_detail.c +++ b/suite/cstest/src/alpha_detail.c @@ -1,3 +1,6 @@ +/* Capstone testing regression */ +/* By Dmitry Sibirtsev , 2023 */ + #include "factory.h" char *get_detail_alpha(csh *p_handle, cs_mode mode, cs_insn *ins) diff --git a/tests/test_alpha.c b/tests/test_alpha.c index e94dcfdedf..20ea5a8e96 100644 --- a/tests/test_alpha.c +++ b/tests/test_alpha.c @@ -1,3 +1,6 @@ +/* Capstone Disassembler Engine */ +/* By Dmitry Sibirtsev , 2013-2019 */ + #include #include From ce4599c9d2aa756e2a4b0d97a9a8c1f5e9c2d18a Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 19 Dec 2023 20:51:15 +0300 Subject: [PATCH 22/26] Refactor Alpha files --- .gitmodules | 3 +++ arch/Alpha/AlphaGenCSFeatureName.inc | 13 ----------- arch/Alpha/AlphaMapping.c | 35 ++++++++++++++-------------- include/capstone/alpha.h | 11 --------- 4 files changed, 20 insertions(+), 42 deletions(-) delete mode 100644 arch/Alpha/AlphaGenCSFeatureName.inc diff --git a/.gitmodules b/.gitmodules index e69de29bb2..9ef326ac15 100644 --- a/.gitmodules +++ b/.gitmodules @@ -0,0 +1,3 @@ +[submodule "suite/auto-sync/vendor/tree-sitter-cpp"] + path = suite/auto-sync/vendor/tree-sitter-cpp + url = https://github.com/tree-sitter/tree-sitter-cpp.git diff --git a/arch/Alpha/AlphaGenCSFeatureName.inc b/arch/Alpha/AlphaGenCSFeatureName.inc deleted file mode 100644 index 64fbf8fc8a..0000000000 --- a/arch/Alpha/AlphaGenCSFeatureName.inc +++ /dev/null @@ -1,13 +0,0 @@ -/* Capstone Disassembly Engine, https://www.capstone-engine.org */ -/* By Nguyen Anh Quynh , 2013-2022, */ -/* Rot127 2022-2023 */ -/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */ - -/* LLVM-commit: 083d57d0731afc1746680d828bdfe2fa41f62a61 */ -/* LLVM-tag: llvmorg-3.0.0-2-g083d57d0731a */ - -/* Do not edit. */ - -/* Capstone's LLVM TableGen Backends: */ -/* https://github.com/capstone-engine/llvm-capstone */ - diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c index 9f3c1bf8c5..30ac84574d 100644 --- a/arch/Alpha/AlphaMapping.c +++ b/arch/Alpha/AlphaMapping.c @@ -84,27 +84,26 @@ void Alpha_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id) unsigned short i; i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache); - if (i != 0) { - insn->id = insns[i].mapid; + if (i == 0) { return; } + insn->id = insns[i].mapid; - if (insn->detail) { + if (insn->detail) { #ifndef CAPSTONE_DIET - memcpy(insn->detail->regs_read, insns[i].regs_use, - sizeof(insns[i].regs_use)); - insn->detail->regs_read_count = - (uint8_t)count_positive(insns[i].regs_use); - - memcpy(insn->detail->regs_write, insns[i].regs_mod, - sizeof(insns[i].regs_mod)); - insn->detail->regs_write_count = - (uint8_t)count_positive(insns[i].regs_mod); - - memcpy(insn->detail->groups, insns[i].groups, - sizeof(insns[i].groups)); - insn->detail->groups_count = - (uint8_t)count_positive8(insns[i].groups); + memcpy(insn->detail->regs_read, insns[i].regs_use, + sizeof(insns[i].regs_use)); + insn->detail->regs_read_count = + (uint8_t)count_positive(insns[i].regs_use); + + memcpy(insn->detail->regs_write, insns[i].regs_mod, + sizeof(insns[i].regs_mod)); + insn->detail->regs_write_count = + (uint8_t)count_positive(insns[i].regs_mod); + + memcpy(insn->detail->groups, insns[i].groups, + sizeof(insns[i].groups)); + insn->detail->groups_count = + (uint8_t)count_positive8(insns[i].groups); #endif - } } } diff --git a/include/capstone/alpha.h b/include/capstone/alpha.h index fde20611de..60932d0fd3 100644 --- a/include/capstone/alpha.h +++ b/include/capstone/alpha.h @@ -295,17 +295,6 @@ typedef enum alpha_insn_group { Alpha_GRP_ENDING, ///< = mark the end of the list of groups } alpha_insn_group; -typedef enum alpha_feature_t { - ALPHA_FEATURE_INVALID = 0, - // generated content begin - // clang-format off - - - // clang-format on - // generated content end - ALPHA_FEATURE_ENDING, // <-- mark the end of the list of features -} alpha_feature; - #ifdef __cplusplus } #endif From 4fae1c06659e92fc10e3db135c2d9feda611973c Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 19 Dec 2023 20:52:36 +0300 Subject: [PATCH 23/26] Add Alpha to Updater --- suite/auto-sync/Updater/ASUpdater.py | 2 +- suite/auto-sync/Updater/CppTranslator/CppTranslator.py | 2 +- suite/auto-sync/Updater/CppTranslator/Differ.py | 2 +- suite/auto-sync/Updater/CppTranslator/arch_config.json | 9 +++++++++ 4 files changed, 12 insertions(+), 3 deletions(-) diff --git a/suite/auto-sync/Updater/ASUpdater.py b/suite/auto-sync/Updater/ASUpdater.py index ffd68b39c9..9440583f1c 100755 --- a/suite/auto-sync/Updater/ASUpdater.py +++ b/suite/auto-sync/Updater/ASUpdater.py @@ -151,7 +151,7 @@ def parse_args() -> argparse.Namespace: description="Capstones architecture module updater.", ) parser.add_argument( - "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC", "AArch64"], required=True + "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC", "AArch64", "Alpha"], required=True ) parser.add_argument("-d", dest="no_clean", help="Don't clean build dir before updating.", action="store_true") parser.add_argument( diff --git a/suite/auto-sync/Updater/CppTranslator/CppTranslator.py b/suite/auto-sync/Updater/CppTranslator/CppTranslator.py index 87dde80ad5..3a2465a99a 100755 --- a/suite/auto-sync/Updater/CppTranslator/CppTranslator.py +++ b/suite/auto-sync/Updater/CppTranslator/CppTranslator.py @@ -452,7 +452,7 @@ def parse_args() -> argparse.Namespace: description="Capstones C++ to C translator for LLVM source files", ) parser.add_argument( - "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC", "AArch64"], required=True + "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC", "AArch64", "Alpha"], required=True ) parser.add_argument( "-v", diff --git a/suite/auto-sync/Updater/CppTranslator/Differ.py b/suite/auto-sync/Updater/CppTranslator/Differ.py index ce06649737..038e9829ae 100755 --- a/suite/auto-sync/Updater/CppTranslator/Differ.py +++ b/suite/auto-sync/Updater/CppTranslator/Differ.py @@ -603,7 +603,7 @@ def parse_args() -> argparse.Namespace: action="store_true", ) parser.add_argument( - "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC, AArch64"], required=True + "-a", dest="arch", help="Name of target architecture.", choices=["ARM", "PPC, AArch64", "Alpha"], required=True ) parser.add_argument( "-v", diff --git a/suite/auto-sync/Updater/CppTranslator/arch_config.json b/suite/auto-sync/Updater/CppTranslator/arch_config.json index 6ca855bdfc..714c54451a 100644 --- a/suite/auto-sync/Updater/CppTranslator/arch_config.json +++ b/suite/auto-sync/Updater/CppTranslator/arch_config.json @@ -119,5 +119,14 @@ "isSVEAddSubImm" ], "manually_edited_files": [] + }, + "Alpha": { + "files_to_translate": [], + "files_for_template_search": [ + "{CPP_INC_OUT_DIR}/AlphaGenDisassemblerTables.inc", + "{CPP_INC_OUT_DIR}/AlphaGenAsmWriter.inc" + ], + "templates_with_arg_deduction": [], + "manually_edited_files": [] } } From fdeb8c8a7950c3f07f6c92d67da95e2e116d8a2b Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Tue, 19 Dec 2023 21:08:32 +0300 Subject: [PATCH 24/26] Fix Alpha python bindings --- bindings/python/capstone/alpha_const.py | 3 --- 1 file changed, 3 deletions(-) diff --git a/bindings/python/capstone/alpha_const.py b/bindings/python/capstone/alpha_const.py index a3d05e8c5c..227acd2744 100644 --- a/bindings/python/capstone/alpha_const.py +++ b/bindings/python/capstone/alpha_const.py @@ -237,6 +237,3 @@ Alpha_GRP_JUMP = 220 Alpha_GRP_BRANCH_RELATIVE = 221 Alpha_GRP_ENDING = 222 - -ALPHA_FEATURE_INVALID = 0 -ALPHA_FEATURE_ENDING = 1 From 368de7304fea89b78ef4d29577bd41ee093c7617 Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Thu, 21 Dec 2023 13:03:30 +0300 Subject: [PATCH 25/26] Patch Differ --- suite/auto-sync/Updater/CppTranslator/Differ.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/suite/auto-sync/Updater/CppTranslator/Differ.py b/suite/auto-sync/Updater/CppTranslator/Differ.py index 038e9829ae..b3dd44f778 100755 --- a/suite/auto-sync/Updater/CppTranslator/Differ.py +++ b/suite/auto-sync/Updater/CppTranslator/Differ.py @@ -11,7 +11,7 @@ import logging as log import sys -from Configurator import Configurator +from CppTranslator.Configurator import Configurator from Helper import ( convert_loglevel, find_id_by_type, From dc33159298ba695a4a5d1982b1bcbb6b4577f0dc Mon Sep 17 00:00:00 2001 From: R33v0LT Date: Thu, 21 Dec 2023 13:03:58 +0300 Subject: [PATCH 26/26] Add Alpha into documentation --- COMPILE.TXT | 1 + COMPILE_CMAKE.TXT | 3 ++- COMPILE_MSVC.TXT | 3 ++- HACK.TXT | 1 + 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/COMPILE.TXT b/COMPILE.TXT index 76b715a0c7..17e89afc3a 100644 --- a/COMPILE.TXT +++ b/COMPILE.TXT @@ -85,6 +85,7 @@ Capstone requires no prerequisite packages, so it is easy to compile & install. /usr/include/capstone/arm.h /usr/include/capstone/arm64.h + /usr/include/capstone/alpha.h /usr/include/capstone/bpf.h /usr/include/capstone/capstone.h /usr/include/capstone/evm.h diff --git a/COMPILE_CMAKE.TXT b/COMPILE_CMAKE.TXT index 1236082c5f..82fe478a17 100644 --- a/COMPILE_CMAKE.TXT +++ b/COMPILE_CMAKE.TXT @@ -21,6 +21,7 @@ Get CMake for free from http://www.cmake.org. - CAPSTONE_ARM_SUPPORT: support ARM. Run cmake with -DCAPSTONE_ARM_SUPPORT=0 to remove ARM. - CAPSTONE_AARCH64_SUPPORT: support AARCH64. Run cmake with -DCAPSTONE_AARCH64_SUPPORT=0 to remove AARCH64. + - CAPSTONE_ALPHA_SUPPORT: support Alpha. Run cmake with -DCAPSTONE_ALPHA_SUPPORT=0 to remove Alpha. - CAPSTONE_M680X_SUPPORT: support M680X. Run cmake with -DCAPSTONE_M680X_SUPPORT=0 to remove M680X. - CAPSTONE_M68K_SUPPORT: support M68K. Run cmake with -DCAPSTONE_M68K_SUPPORT=0 to remove M68K. - CAPSTONE_MIPS_SUPPORT: support Mips. Run cmake with -DCAPSTONE_MIPS_SUPPORT=0 to remove Mips. @@ -113,7 +114,7 @@ Get CMake for free from http://www.cmake.org. Will just target the x86 architecture. The list of available architectures is: ARM, AARCH64, M68K, MIPS, PowerPC, Sparc, SystemZ, XCore, x86, TMS320C64x, M680x, EVM, MOS65XX, - WASM, BPF, RISCV. + WASM, BPF, RISCV, Alpha. (4) You can also create an installation image with cmake, by using the 'install' target. Use: diff --git a/COMPILE_MSVC.TXT b/COMPILE_MSVC.TXT index 17159ece64..33c1592d0e 100644 --- a/COMPILE_MSVC.TXT +++ b/COMPILE_MSVC.TXT @@ -32,6 +32,7 @@ versions, and Windows Driver Kit 8.1 Update 1 or newer versions are required. - CAPSTONE_HAS_ARM: support ARM. Delete this to remove ARM support. - CAPSTONE_HAS_AARCH64: support AARCH64. Delete this to remove AARCH64 support. + - CAPSTONE_HAS_ALPHA: support Alpha. Delete this to remove Alpha support. - CAPSTONE_HAS_M68K: support M68K. Delete this to remove M68K support. - CAPSTONE_HAS_MIPS: support Mips. Delete this to remove Mips support. - CAPSTONE_HAS_POWERPC: support PPC. Delete this to remove PPC support. @@ -41,7 +42,7 @@ versions, and Windows Driver Kit 8.1 Update 1 or newer versions are required. - CAPSTONE_HAS_XCORE: support XCore. Delete this to remove XCore support. - CAPSTONE_HAS_TRICORE: support TriCore. Delete this to remove TriCore support. - By default, all 9 architectures are compiled in. + By default, all 11 architectures are compiled in. Besides, Capstone also allows some more customization via following macros. diff --git a/HACK.TXT b/HACK.TXT index bb47b4d790..85249ef8e4 100644 --- a/HACK.TXT +++ b/HACK.TXT @@ -6,6 +6,7 @@ Capstone source is organized as followings. . <- core engine + README + COMPILE.TXT etc ├── arch <- code handling disasm engine for each arch │   ├── AArch64 <- AArch64 engine +│   ├── Alpha <- Alpha engine │   ├── ARM <- ARM engine │   ├── BPF <- Berkeley Packet Filter engine │   ├── EVM <- Ethereum engine