From 94363cee846aac29cdefd56a669e3c53c4edf5d1 Mon Sep 17 00:00:00 2001 From: Michael Heimpold Date: Tue, 23 Sep 2025 16:14:01 +0200 Subject: [PATCH 1/2] arm64: dts: imx93-charge-som-dc-evb: use mnemonic key code names This also switches the key from KEY_DOWN to KEY_F1. This is in preparation to use similar keys for stopping the charging process on boards with more than one connector. (While at, some whitespace is dropped) Signed-off-by: Michael Heimpold --- .../imx93-charge-som-dc-evb-V0R1.dts | 3 +- .../dts/freescale/imx93-charge-som-dc-evb.dts | 29 ++++++++++--------- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb-V0R1.dts b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb-V0R1.dts index a817490306b657..c8e5607bc879fe 100644 --- a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb-V0R1.dts +++ b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb-V0R1.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include #include "imx93-phycore-som.dtsi" #include "imx93-charge-som-V0R1.dtsi" @@ -82,7 +83,7 @@ CHSTOP_IN { label = "CHSTOP_IN"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; - linux,code = <108>; + linux,code = ; }; }; diff --git a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts index f81467d594a64f..a72deee0d51bf4 100644 --- a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts +++ b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-evb.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include #include "imx93-phycore-som.dtsi" #include "imx93-charge-som.dtsi" @@ -15,7 +16,7 @@ model = "chargebyte Charge SOM Evaluation Kit"; compatible = "chargebyte,imx93-charge-som-dc-evb", "chargebyte,imx93-charge-som", "phytec,imx93-phycore-som", "fsl,imx93"; - + aliases { rtc0 = &rv3028; rtc1 = &bbnsm_rtc; @@ -55,7 +56,7 @@ enable-active-high; regulator-boot-on; }; - + reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; @@ -82,15 +83,15 @@ CHSTOP_IN { label = "CHSTOP_IN"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; - linux,code = <108>; + linux,code = ; }; }; - + user_leds: user-leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_user_leds>; - + USER_RED { color = ; function = LED_FUNCTION_BOOT; @@ -149,7 +150,7 @@ #address-cells = <1>; #size-cells = <0>; status = "okay"; - + rv3028: rtc@52 { compatible = "microcrystal,rv3028"; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; @@ -250,7 +251,7 @@ &iomuxc { /delete-node/ pinctrl_leds; - + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e @@ -301,7 +302,7 @@ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e >; }; - + pinctrl_lpi2c1: lpi2c1grp { /* sion, drive strength: X2, slew rate: fast, pull up, open drain */ fsl,pins = < @@ -337,25 +338,25 @@ MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e // USB2_PWREN >; }; - + pinctrl_user_leds: userledgrp { fsl,pins = < MX93_PAD_GPIO_IO24__GPIO2_IO24 0x31e // USER_RED >; }; - + pinctrl_hog3: hog3grp { fsl,pins = < MX93_PAD_DAP_TCLK_SWCLK__GPIO3_IO30 0x31e // PCIe_NW_DISABLE >; }; - + pinctrl_hog4: hog4grp { fsl,pins = < MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e // PCIe_N_RESET >; }; - + pinctrl_rtc: rtcgrp { fsl,pins = < MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e // RTC_nINT @@ -374,7 +375,7 @@ MX93_PAD_ENET2_RD2__GPIO4_IO26 0x31e // CAN1_EN >; }; - + pinctrl_uart4: uart4grp { fsl,pins = < MX93_PAD_GPIO_IO15__LPUART4_RX 0x31e // drive strength: X4, slew rate: slightly fast, pull up @@ -382,7 +383,7 @@ MX93_PAD_GPIO_IO17__LPUART4_RTS_B 0x31e // drive strength: X4, slew rate: slightly fast, pull up >; }; - + pinctrl_uart5: uart5grp { fsl,pins = < MX93_PAD_DAP_TDI__LPUART5_RX 0x31e // drive strength: X4, slew rate: slightly fast, pull up From 36dceff9a1c8a7d973193f165a8bb391738c15a8 Mon Sep 17 00:00:00 2001 From: Michael Heimpold Date: Tue, 23 Sep 2025 16:16:26 +0200 Subject: [PATCH 2/2] arm64: dts: imx93-charge-som-dc-2c: various fixes/changes - use different keys for both charging stop buttons (now KEY_F1/KEY_F2) - remove the polarity hack for first ethernet: not needed because we have mosfets - fix eeprom compatible - move nvmem-layout to RTC node since we store the MAC addresses in the RTC EEPROM, not in the DT EEPROM - USB1 is dual role, not fixed host Note: untested due to lack of hardware. Signed-off-by: Michael Heimpold --- .../dts/freescale/imx93-charge-som-dc-2c.dts | 63 +++++++++---------- 1 file changed, 30 insertions(+), 33 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-2c.dts b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-2c.dts index 9ff34d239f3494..d0db15a4a70fd8 100644 --- a/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-2c.dts +++ b/arch/arm64/boot/dts/freescale/imx93-charge-som-dc-2c.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include #include "imx93-phycore-som.dtsi" #include "imx93-charge-som.dtsi" @@ -13,7 +14,7 @@ model = "chargebyte Charge SOM DC 2C"; compatible = "chargebyte,imx93-charge-som-dc-2c", "chargebyte,imx93-charge-som", "phytec,imx93-phycore-som", "fsl,imx93"; - + aliases { rtc0 = &rv3028; rtc1 = &bbnsm_rtc; @@ -27,7 +28,7 @@ regulator-min-microvolt = <3300000>; regulator-name = "CAN1_EN"; }; - + reg_can2: regulator-can { compatible = "regulator-fixed"; gpio = <&gpio_exp 39 GPIO_ACTIVE_HIGH>; @@ -64,21 +65,21 @@ switch-chstop1-in { label = "CHSTOP1_IN"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; - linux,code = <108>; + linux,code = ; }; switch-chstop2-in { label = "CHSTOP2_IN"; gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; - linux,code = <108>; + linux,code = ; }; }; - + user_leds: user-leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_user_leds>; - + led-orange { color = ; function = LED_FUNCTION_BOOT; @@ -101,10 +102,6 @@ status = "disabled"; }; -ðphy1 { - ti,leds-polarity = <0>; // active-low -}; - &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; @@ -153,19 +150,30 @@ #gpio-cells = <2>; interrupt-parent = <&gpio2>; interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - + // 5 x 8 pins (0..39) gpio-line-names = "DOUT1_EN", "DOUT2_EN", "DOUT3_EN", "DOUT4_EN", "DOUT5_EN", "DOUT6_EN", "DOUT7_EN", "DOUT8_EN", \ "DOUT9_EN", "DOUT10_EN", "DOUT11_EN", "DOUT12_EN", "DOUT13_EN", "DOUT14_EN", "DOUT15_EN", "DOUT16_EN", \ - "nDOUT1_ST", "nDOUT2_ST", "nDOUT3_ST", "nDOUT4_ST", "nDOUT5_ST", "nDOUT6_ST", "nDOUT7_ST", "nDOUT8_ST", \ - "nDOUT9_ST", "nDOUT10_ST", "nDOUT11_ST", "nDOUT12_ST", "nDOUT13_ST", "nDOUT14_ST", "nDOUT15_ST", "nDOUT16_ST", \ - "GPIO_EXP_1", "GPIO_EXP_2", "HW_REV1", "HW_REV2", "HW_REV3", "UART_MUX_IN", "CAN1_EN", "CAN2_EN"; + "nDOUT1_ST", "nDOUT2_ST", "nDOUT3_ST", "nDOUT4_ST", "nDOUT5_ST", "nDOUT6_ST", "nDOUT7_ST", "nDOUT8_ST", \ + "nDOUT9_ST", "nDOUT10_ST", "nDOUT11_ST", "nDOUT12_ST", "nDOUT13_ST", "nDOUT14_ST", "nDOUT15_ST", "nDOUT16_ST", \ + "GPIO_EXP_1", "GPIO_EXP_2", "HW_REV1", "HW_REV2", "HW_REV3", "UART_MUX_IN", "CAN1_EN", "CAN2_EN"; }; eeprom@50 { - compatible = "microchip,24fc256"; + compatible = "microchip,24c256"; reg = <0x50>; pagesize = <64>; + }; + + rv3028: rtc@52 { + compatible = "microcrystal,rv3028"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rtc>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio4>; + wakeup-source; + trickle-resistor-ohms = <3000>; nvmem-layout { compatible = "fixed-layout"; @@ -191,17 +199,6 @@ }; }; }; - - rv3028: rtc@52 { - compatible = "microcrystal,rv3028"; - reg = <0x52>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_rtc>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-parent = <&gpio4>; - wakeup-source; - trickle-resistor-ohms = <3000>; - }; }; &lpspi3 { @@ -233,7 +230,6 @@ &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; over-current-active-low; - dr_mode = "host"; status = "okay"; }; @@ -297,7 +293,7 @@ &iomuxc { /delete-node/ pinctrl_leds; - + pinctrl_lpi2c1: lpi2c1grp { /* sion, drive strength: X2, slew rate: fast, pull up, open drain */ fsl,pins = < @@ -333,7 +329,8 @@ pinctrl_gpiokeys: keygrp { fsl,pins = < - MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e // CHSTOP_IN + MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e // CHSTOP1_IN + MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e // CHSTOP2_IN >; }; @@ -344,14 +341,14 @@ // MX93_PAD_ENET1_MDIO__HSIOMIX_OTG_PWR1 not connected >; }; - + pinctrl_user_leds: userledgrp { fsl,pins = < MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e // USER_ORANGE MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e // USER_GREEN >; }; - + pinctrl_rtc: rtcgrp { fsl,pins = < MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e // RTC_nINT @@ -371,7 +368,7 @@ MX93_PAD_DAP_TDI__CAN2_TX 0x1382 >; }; - + pinctrl_uart4: uart4grp { fsl,pins = < MX93_PAD_GPIO_IO15__LPUART4_RX 0x31e // drive strength: X4, slew rate: slightly fast, pull up @@ -379,7 +376,7 @@ MX93_PAD_GPIO_IO17__LPUART4_RTS_B 0x31e // drive strength: X4, slew rate: slightly fast, pull up >; }; - + pinctrl_uart5: uart5grp { fsl,pins = < MX93_PAD_DAP_TDI__LPUART5_RX 0x31e // drive strength: X4, slew rate: slightly fast, pull up