From d6f90e7e3bad2261e02ce48c566912f5d032788e Mon Sep 17 00:00:00 2001 From: Sebastian Nickolls Date: Tue, 11 Nov 2025 14:46:52 +0000 Subject: [PATCH 1/4] Introduce TYP_SIMD to the JIT for Vector The type is experimental and will only be materialized on ARM64, when DOTNET_JitUseScalableVectorT=1. This change covers initial properties of the type and pattern matching the type during import. --- src/coreclr/jit/compiler.h | 7 +++++++ src/coreclr/jit/importer.cpp | 2 +- src/coreclr/jit/jitconfigvalues.h | 3 +++ src/coreclr/jit/simd.cpp | 10 +++++++++- src/coreclr/jit/simd.h | 2 ++ src/coreclr/jit/typelist.h | 4 ++++ 6 files changed, 26 insertions(+), 2 deletions(-) diff --git a/src/coreclr/jit/compiler.h b/src/coreclr/jit/compiler.h index 5f51bd68e138db..270f2c2392e5d4 100644 --- a/src/coreclr/jit/compiler.h +++ b/src/coreclr/jit/compiler.h @@ -9331,6 +9331,13 @@ class Compiler simdType = TYP_SIMD64; } #endif // TARGET_XARCH +#if defined(TARGET_ARM64) + else if (size == SIZE_UNKNOWN) + { + assert(JitConfig.JitUseScalableVectorT()); + simdType = TYP_SIMD; + } +#endif else { noway_assert(!"Unexpected size for SIMD type"); diff --git a/src/coreclr/jit/importer.cpp b/src/coreclr/jit/importer.cpp index 5d67351639e840..c1c8ee9867dcbd 100644 --- a/src/coreclr/jit/importer.cpp +++ b/src/coreclr/jit/importer.cpp @@ -1189,7 +1189,7 @@ var_types Compiler::impNormStructType(CORINFO_CLASS_HANDLE structHnd, CorInfoTyp CorInfoType simdBaseJitType = getBaseJitTypeAndSizeOfSIMDType(structHnd, &sizeBytes); if (simdBaseJitType != CORINFO_TYPE_UNDEF) { - assert(sizeBytes == originalSize); + assert(sizeBytes == originalSize || sizeBytes == SIZE_UNKNOWN); structType = getSIMDTypeForSize(sizeBytes); if (pSimdBaseJitType != nullptr) { diff --git a/src/coreclr/jit/jitconfigvalues.h b/src/coreclr/jit/jitconfigvalues.h index 3a9188a3e1eb0f..445c134299c72a 100644 --- a/src/coreclr/jit/jitconfigvalues.h +++ b/src/coreclr/jit/jitconfigvalues.h @@ -844,6 +844,9 @@ CONFIG_STRING(JitRawHexCodeFile, "JitRawHexCodeFile") // 3: force all frames to use the frame types that save FP/LR registers with the callee-saved registers (at the top // of the frame) and also force using the large funclet frame variation (frame 5) if possible. CONFIG_INTEGER(JitSaveFpLrWithCalleeSavedRegisters, "JitSaveFpLrWithCalleeSavedRegisters", 0) + +// Experimental support for vector length agnostic implementation of Vector +RELEASE_CONFIG_INTEGER(JitUseScalableVectorT, "JitUseScalableVectorT", 0) #endif // defined(TARGET_ARM64) #if defined(TARGET_LOONGARCH64) diff --git a/src/coreclr/jit/simd.cpp b/src/coreclr/jit/simd.cpp index 7fdbd76afb0081..594e6fe90b64e5 100644 --- a/src/coreclr/jit/simd.cpp +++ b/src/coreclr/jit/simd.cpp @@ -326,6 +326,14 @@ CorInfoType Compiler::getBaseJitTypeAndSizeOfSIMDType(CORINFO_CLASS_HANDLE typeH } JITDUMP(" Found Vector<%s>\n", varTypeName(JitType2PreciseVarType(simdBaseJitType))); + +#ifdef TARGET_ARM64 + if (compExactlyDependsOn(InstructionSet_Sve_Arm64) && JitConfig.JitUseScalableVectorT()) + { + size = SIZE_UNKNOWN; + break; + } +#endif size = getVectorTByteLength(); if (size == 0) @@ -463,7 +471,7 @@ CorInfoType Compiler::getBaseJitTypeAndSizeOfSIMDType(CORINFO_CLASS_HANDLE typeH if (simdBaseJitType != CORINFO_TYPE_UNDEF) { - assert(size == info.compCompHnd->getClassSize(typeHnd)); + assert(size == info.compCompHnd->getClassSize(typeHnd) || size == SIZE_UNKNOWN); setUsesSIMDTypes(true); } diff --git a/src/coreclr/jit/simd.h b/src/coreclr/jit/simd.h index 159f626eefa8de..78553b131be3dc 100644 --- a/src/coreclr/jit/simd.h +++ b/src/coreclr/jit/simd.h @@ -4,6 +4,8 @@ #ifndef _SIMD_H_ #define _SIMD_H_ +#define SIZE_UNKNOWN UINT8_MAX + template static bool ElementsAreSame(T* array, size_t size) { diff --git a/src/coreclr/jit/typelist.h b/src/coreclr/jit/typelist.h index 865c177bc7bc32..315018905efd0e 100644 --- a/src/coreclr/jit/typelist.h +++ b/src/coreclr/jit/typelist.h @@ -4,6 +4,8 @@ #define GCS EA_GCREF #define BRS EA_BYREF #define EPS EA_PTRSIZE +#define EAU EA_UNKNOWN +#define SZU SIZE_UNKNOWN #define PS TARGET_POINTER_SIZE #define PST (TARGET_POINTER_SIZE / sizeof(int)) @@ -63,6 +65,8 @@ DEF_TP(SIMD16 ,"simd16" , TYP_SIMD16, 16,16, 16, 4,16, VTR_FLOAT, available #if defined(TARGET_XARCH) DEF_TP(SIMD32 ,"simd32" , TYP_SIMD32, 32,32, 32, 8,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_S|VTF_VEC) DEF_TP(SIMD64 ,"simd64" , TYP_SIMD64, 64,64, 64, 16,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_S|VTF_VEC) +#elif defined(TARGET_ARM64) +DEF_TP(SIMD ,"simd" , TYP_SIMD, SZU,EAU,EAU, 0,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_VEC) #endif // TARGET_XARCH #if defined(FEATURE_MASKED_HW_INTRINSICS) DEF_TP(MASK ,"mask" , TYP_MASK, 8, 8, 8, 2, 8, VTR_MASK, availableMaskRegs, RBM_MSK_CALLEE_SAVED, RBM_MSK_CALLEE_TRASH, VTF_S) From 3f3e245fe6979cee1770781a752597d2978cffb8 Mon Sep 17 00:00:00 2001 From: Sebastian Nickolls Date: Wed, 12 Nov 2025 16:52:33 +0000 Subject: [PATCH 2/4] Rearrange feature test and make opportunistic --- src/coreclr/jit/simd.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/coreclr/jit/simd.cpp b/src/coreclr/jit/simd.cpp index 594e6fe90b64e5..3b3f6fd389ef53 100644 --- a/src/coreclr/jit/simd.cpp +++ b/src/coreclr/jit/simd.cpp @@ -328,7 +328,8 @@ CorInfoType Compiler::getBaseJitTypeAndSizeOfSIMDType(CORINFO_CLASS_HANDLE typeH JITDUMP(" Found Vector<%s>\n", varTypeName(JitType2PreciseVarType(simdBaseJitType))); #ifdef TARGET_ARM64 - if (compExactlyDependsOn(InstructionSet_Sve_Arm64) && JitConfig.JitUseScalableVectorT()) + if (JitConfig.JitUseScalableVectorT() && + compOpportunisticallyDependsOn(InstructionSet_Sve_Arm64)) { size = SIZE_UNKNOWN; break; From 470ef812a21c2aa8ba54471507363288ec0cd2c6 Mon Sep 17 00:00:00 2001 From: Sebastian Nickolls Date: Thu, 13 Nov 2025 17:03:21 +0000 Subject: [PATCH 3/4] Mark TYP_SIMD with VTF_S --- src/coreclr/jit/typelist.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/typelist.h b/src/coreclr/jit/typelist.h index 315018905efd0e..b2cf2ffa1390f4 100644 --- a/src/coreclr/jit/typelist.h +++ b/src/coreclr/jit/typelist.h @@ -66,7 +66,7 @@ DEF_TP(SIMD16 ,"simd16" , TYP_SIMD16, 16,16, 16, 4,16, VTR_FLOAT, available DEF_TP(SIMD32 ,"simd32" , TYP_SIMD32, 32,32, 32, 8,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_S|VTF_VEC) DEF_TP(SIMD64 ,"simd64" , TYP_SIMD64, 64,64, 64, 16,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_S|VTF_VEC) #elif defined(TARGET_ARM64) -DEF_TP(SIMD ,"simd" , TYP_SIMD, SZU,EAU,EAU, 0,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_VEC) +DEF_TP(SIMD ,"simd" , TYP_SIMD, SZU,EAU,EAU, 0,16, VTR_FLOAT, availableDoubleRegs, RBM_FLT_CALLEE_SAVED, RBM_FLT_CALLEE_TRASH, VTF_S|VTF_VEC) #endif // TARGET_XARCH #if defined(FEATURE_MASKED_HW_INTRINSICS) DEF_TP(MASK ,"mask" , TYP_MASK, 8, 8, 8, 2, 8, VTR_MASK, availableMaskRegs, RBM_MSK_CALLEE_SAVED, RBM_MSK_CALLEE_TRASH, VTF_S) From c22cc4634b77759e8f6b57ce208d391bd8ca6e05 Mon Sep 17 00:00:00 2001 From: Sebastian Nickolls Date: Thu, 13 Nov 2025 17:03:21 +0000 Subject: [PATCH 4/4] Set config variable to debug builds only --- src/coreclr/jit/jitconfigvalues.h | 2 +- src/coreclr/jit/simd.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/coreclr/jit/jitconfigvalues.h b/src/coreclr/jit/jitconfigvalues.h index 445c134299c72a..af4f3baca368f6 100644 --- a/src/coreclr/jit/jitconfigvalues.h +++ b/src/coreclr/jit/jitconfigvalues.h @@ -846,7 +846,7 @@ CONFIG_STRING(JitRawHexCodeFile, "JitRawHexCodeFile") CONFIG_INTEGER(JitSaveFpLrWithCalleeSavedRegisters, "JitSaveFpLrWithCalleeSavedRegisters", 0) // Experimental support for vector length agnostic implementation of Vector -RELEASE_CONFIG_INTEGER(JitUseScalableVectorT, "JitUseScalableVectorT", 0) +CONFIG_INTEGER(JitUseScalableVectorT, "JitUseScalableVectorT", 0) #endif // defined(TARGET_ARM64) #if defined(TARGET_LOONGARCH64) diff --git a/src/coreclr/jit/simd.cpp b/src/coreclr/jit/simd.cpp index da4933c59c2049..66a65af1403865 100644 --- a/src/coreclr/jit/simd.cpp +++ b/src/coreclr/jit/simd.cpp @@ -629,7 +629,7 @@ CorInfoType Compiler::getBaseJitTypeAndSizeOfSIMDType(CORINFO_CLASS_HANDLE typeH JITDUMP(" Found Vector<%s>\n", varTypeName(JitType2PreciseVarType(simdBaseJitType))); -#ifdef TARGET_ARM64 +#if defined(DEBUG) && defined(TARGET_ARM64) if (JitConfig.JitUseScalableVectorT() && compOpportunisticallyDependsOn(InstructionSet_Sve_Arm64)) {