diff --git a/src/coreclr/jit/codegenwasm.cpp b/src/coreclr/jit/codegenwasm.cpp
index 0fa2e31a889144..5d40d0b5a5dcd3 100644
--- a/src/coreclr/jit/codegenwasm.cpp
+++ b/src/coreclr/jit/codegenwasm.cpp
@@ -353,6 +353,14 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
             genCodeForNegNot(treeNode->AsOp());
             break;
 
+        case GT_IND:
+            genCodeForIndir(treeNode->AsIndir());
+            break;
+
+        case GT_STOREIND:
+            genCodeForStoreInd(treeNode->AsStoreInd());
+            break;
+
         default:
 #ifdef DEBUG
             NYIRAW(GenTree::OpName(treeNode->OperGet()));
@@ -871,6 +879,62 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree)
     genUpdateLifeStore(tree, targetReg, varDsc);
 }
 
+//------------------------------------------------------------------------
+// genCodeForIndir: Produce code for a GT_IND node.
+//
+// Arguments:
+//    tree - the GT_IND node
+//
+void CodeGen::genCodeForIndir(GenTreeIndir* tree)
+{
+    assert(tree->OperIs(GT_IND));
+
+    var_types   type = tree->TypeGet();
+    instruction ins  = ins_Load(type);
+
+    genConsumeAddress(tree->Addr());
+
+    // TODO-WASM: Memory barriers
+
+    GetEmitter()->emitIns_I(ins, emitActualTypeSize(type), 0);
+
+    genProduceReg(tree);
+}
+
+//------------------------------------------------------------------------
+// genCodeForStoreInd: Produce code for a GT_STOREIND node.
+//
+// Arguments:
+//    tree - the GT_STOREIND node
+//
+void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
+{
+    GenTree* data = tree->Data();
+    GenTree* addr = tree->Addr();
+
+    GCInfo::WriteBarrierForm writeBarrierForm = gcInfo.gcIsWriteBarrierCandidate(tree);
+    if (writeBarrierForm != GCInfo::WBF_NoBarrier)
+    {
+        NYI_WASM("write barriers in StoreInd");
+    }
+    else // A normal store, not a WriteBarrier store
+    {
+        // We must consume the operands in the proper execution order,
+        // so that liveness is updated appropriately.
+        genConsumeAddress(addr);
+        genConsumeRegs(data);
+
+        var_types   type = tree->TypeGet();
+        instruction ins  = ins_Store(type);
+
+        // TODO-WASM: Memory barriers
+
+        GetEmitter()->emitIns_I(ins, emitActualTypeSize(type), 0);
+    }
+
+    genUpdateLife(tree);
+}
+
 //------------------------------------------------------------------------
 // genCodeForCompare: Produce code for a GT_EQ/GT_NE/GT_LT/GT_LE/GT_GE/GT_GT node.
 //
diff --git a/src/coreclr/jit/instr.cpp b/src/coreclr/jit/instr.cpp
index ce915da97cc2ef..52768505b122b1 100644
--- a/src/coreclr/jit/instr.cpp
+++ b/src/coreclr/jit/instr.cpp
@@ -2104,6 +2104,14 @@ instruction CodeGenInterface::ins_Load(var_types srcType, bool aligned /*=false*
         case TYP_REF:
         case TYP_BYREF:
             return ins_Load(TYP_I_IMPL, aligned);
+        case TYP_BYTE:
+            return INS_i32_load8_s;
+        case TYP_UBYTE:
+            return INS_i32_load8_u;
+        case TYP_SHORT:
+            return INS_i32_load16_s;
+        case TYP_USHORT:
+            return INS_i32_load16_u;
         case TYP_INT:
             return INS_i32_load;
         case TYP_LONG:
@@ -2507,6 +2515,12 @@ instruction CodeGenInterface::ins_Store(var_types dstType, bool aligned /*=false
         case TYP_REF:
         case TYP_BYREF:
             return ins_Store(TYP_I_IMPL, aligned);
+        case TYP_BYTE:
+        case TYP_UBYTE:
+            return INS_i32_store8;
+        case TYP_SHORT:
+        case TYP_USHORT:
+            return INS_i32_store16;
         case TYP_INT:
             return INS_i32_store;
         case TYP_LONG:
diff --git a/src/coreclr/jit/instrswasm.h b/src/coreclr/jit/instrswasm.h
index f8562c071c30cb..1caa96339139bf 100644
--- a/src/coreclr/jit/instrswasm.h
+++ b/src/coreclr/jit/instrswasm.h
@@ -47,10 +47,17 @@ INST(i32_load,    "i32.load",    0, IF_MEMARG,  0x28)
 INST(i64_load,    "i64.load",    0, IF_MEMARG,  0x29)
 INST(f32_load,    "f32.load",    0, IF_MEMARG,  0x2A)
 INST(f64_load,    "f64.load",    0, IF_MEMARG,  0x2B)
+INST(i32_load8_s, "i32.load8_s", 0, IF_MEMARG,  0x2C)
+INST(i32_load8_u, "i32.load8_u", 0, IF_MEMARG,  0x2D)
+INST(i32_load16_s,"i32.load16_s",0, IF_MEMARG,  0x2E)
+INST(i32_load16_u,"i32.load16_u",0, IF_MEMARG,  0x2F)
+
 INST(i32_store,   "i32.store",   0, IF_MEMARG,  0x36)
 INST(i64_store,   "i64.store",   0, IF_MEMARG,  0x37)
 INST(f32_store,   "f32.store",   0, IF_MEMARG,  0x38)
 INST(f64_store,   "f64.store",   0, IF_MEMARG,  0x39)
+INST(i32_store8,  "i32.store8",  0, IF_MEMARG,  0x3A)
+INST(i32_store16, "i32.store16", 0, IF_MEMARG,  0x3B)
 
 // 5.4.7 Numeric Instructions
 // Constants