diff --git a/src/coreclr/jit/emit.cpp b/src/coreclr/jit/emit.cpp index 98f74b755e1408..8f36252fb769bc 100644 --- a/src/coreclr/jit/emit.cpp +++ b/src/coreclr/jit/emit.cpp @@ -1393,7 +1393,7 @@ float emitter::insEvaluateExecutionCost(instrDesc* id) insExecutionCharacteristics result = getInsExecutionCharacteristics(id); float throughput = result.insThroughput; float latency = result.insLatency; - unsigned memAccessKind = result.insMemoryAccessKind; + PerfScoreMemoryAccessKind memAccessKind = result.insMemoryAccessKind; // Check for PERFSCORE_THROUGHPUT_ILLEGAL and PERFSCORE_LATENCY_ILLEGAL. // Note that 0.0 throughput is allowed for pseudo-instructions in the instrDesc list that won't actually @@ -1401,7 +1401,7 @@ float emitter::insEvaluateExecutionCost(instrDesc* id) assert(throughput >= 0.0); assert(latency >= 0.0); - if (memAccessKind == PERFSCORE_MEMORY_WRITE || memAccessKind == PERFSCORE_MEMORY_READ_WRITE) + if ((memAccessKind == PerfScoreMemoryAccessKind::Write) || (memAccessKind == PerfScoreMemoryAccessKind::ReadWrite)) { // We assume that we won't read back from memory for the next WR_GENERAL cycles // Thus we normally won't pay latency costs for writes. diff --git a/src/coreclr/jit/emit.h b/src/coreclr/jit/emit.h index 039e2ccaad169e..28e61029a4c06e 100644 --- a/src/coreclr/jit/emit.h +++ b/src/coreclr/jit/emit.h @@ -2026,11 +2026,19 @@ class emitter } }; // End of struct instrDesc + enum class PerfScoreMemoryAccessKind : unsigned + { + None = 0, + Read = 1, + Write = 2, + ReadWrite = 3, + }; + #if defined(TARGET_XARCH) insFormat getMemoryOperation(instrDesc* id) const; insFormat ExtractMemoryFormat(insFormat insFmt) const; #elif defined(TARGET_ARM64) - void getMemoryOperation(instrDesc* id, unsigned* pMemAccessKind, bool* pIsLocalAccess); + void getMemoryOperation(instrDesc* id, PerfScoreMemoryAccessKind* pMemAccessKind, bool* pIsLocalAccess); #endif #if defined(DEBUG) || defined(LATE_DISASM) @@ -2212,18 +2220,11 @@ class emitter #error Unknown TARGET #endif -// Make this an enum: -// -#define PERFSCORE_MEMORY_NONE 0 -#define PERFSCORE_MEMORY_READ 1 -#define PERFSCORE_MEMORY_WRITE 2 -#define PERFSCORE_MEMORY_READ_WRITE 3 - struct insExecutionCharacteristics { - float insThroughput; - float insLatency; - unsigned insMemoryAccessKind; + float insThroughput = 0; + float insLatency = 0; + PerfScoreMemoryAccessKind insMemoryAccessKind = PerfScoreMemoryAccessKind::None; }; float insEvaluateExecutionCost(instrDesc* id); diff --git a/src/coreclr/jit/emitarm64.cpp b/src/coreclr/jit/emitarm64.cpp index 9056f8e4ca70b3..1dd23538b81be2 100644 --- a/src/coreclr/jit/emitarm64.cpp +++ b/src/coreclr/jit/emitarm64.cpp @@ -15199,11 +15199,11 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst, #if defined(DEBUG) || defined(LATE_DISASM) -void emitter::getMemoryOperation(instrDesc* id, unsigned* pMemAccessKind, bool* pIsLocalAccess) +void emitter::getMemoryOperation(instrDesc* id, PerfScoreMemoryAccessKind* pMemAccessKind, bool* pIsLocalAccess) { - unsigned memAccessKind = PERFSCORE_MEMORY_NONE; - bool isLocalAccess = false; - instruction ins = id->idIns(); + PerfScoreMemoryAccessKind memAccessKind = PerfScoreMemoryAccessKind::None; + bool isLocalAccess = false; + instruction ins = id->idIns(); if (emitInsIsLoadOrStore(ins)) { @@ -15211,17 +15211,17 @@ void emitter::getMemoryOperation(instrDesc* id, unsigned* pMemAccessKind, bool* { if (emitInsIsStore(ins)) { - memAccessKind = PERFSCORE_MEMORY_READ_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::ReadWrite; } else { - memAccessKind = PERFSCORE_MEMORY_READ; + memAccessKind = PerfScoreMemoryAccessKind::Read; } } else { assert(emitInsIsStore(ins)); - memAccessKind = PERFSCORE_MEMORY_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::Write; } insFormat insFmt = id->idInsFmt(); @@ -15354,7 +15354,7 @@ void emitter::getMemoryOperation(instrDesc* id, unsigned* pMemAccessKind, bool* default: assert(!"Logic Error"); - memAccessKind = PERFSCORE_MEMORY_NONE; + memAccessKind = PerfScoreMemoryAccessKind::None; break; } } @@ -15386,8 +15386,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins instruction ins = id->idIns(); insFormat insFmt = id->idInsFmt(); - unsigned memAccessKind; - bool isLocalAccess; + PerfScoreMemoryAccessKind memAccessKind; + bool isLocalAccess; getMemoryOperation(id, &memAccessKind, &isLocalAccess); result.insThroughput = PERFSCORE_THROUGHPUT_ILLEGAL; @@ -15395,15 +15395,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins // Initialize insLatency based upon the instruction's memAccessKind and local access values // - if (memAccessKind == PERFSCORE_MEMORY_READ) + if (memAccessKind == PerfScoreMemoryAccessKind::Read) { result.insLatency = isLocalAccess ? PERFSCORE_LATENCY_RD_STACK : PERFSCORE_LATENCY_RD_GENERAL; } - else if (memAccessKind == PERFSCORE_MEMORY_WRITE) + else if (memAccessKind == PerfScoreMemoryAccessKind::Write) { result.insLatency = isLocalAccess ? PERFSCORE_LATENCY_WR_STACK : PERFSCORE_LATENCY_WR_GENERAL; } - else if (memAccessKind == PERFSCORE_MEMORY_READ_WRITE) + else if (memAccessKind == PerfScoreMemoryAccessKind::ReadWrite) { result.insLatency = isLocalAccess ? PERFSCORE_LATENCY_RD_WR_STACK : PERFSCORE_LATENCY_RD_WR_GENERAL; } @@ -15721,7 +15721,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case IF_LS_3B: // ldp, ldpsw, ldnp, stp, stnp (load/store pair zero offset) case IF_LS_3C: // load/store pair with offset pre/post inc - if (memAccessKind == PERFSCORE_MEMORY_READ) + if (memAccessKind == PerfScoreMemoryAccessKind::Read) { // ldp, ldpsw, ldnp result.insThroughput = PERFSCORE_THROUGHPUT_1C; @@ -15742,7 +15742,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins else // store instructions { // stp, stnp - assert(memAccessKind == PERFSCORE_MEMORY_WRITE); + assert(memAccessKind == PerfScoreMemoryAccessKind::Write); result.insThroughput = PERFSCORE_THROUGHPUT_1C; } break; @@ -15756,7 +15756,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins break; case IF_LS_3E: // ARMv8.1 LSE Atomics - if (memAccessKind == PERFSCORE_MEMORY_WRITE) + if (memAccessKind == PerfScoreMemoryAccessKind::Write) { // staddb, staddlb, staddh, staddlh, stadd. staddl result.insThroughput = PERFSCORE_THROUGHPUT_2C; @@ -15764,7 +15764,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } else { - assert(memAccessKind == PERFSCORE_MEMORY_READ_WRITE); + assert(memAccessKind == PerfScoreMemoryAccessKind::ReadWrite); result.insThroughput = PERFSCORE_THROUGHPUT_3C; result.insLatency = max(PERFSCORE_LATENCY_3C, result.insLatency); } diff --git a/src/coreclr/jit/emitloongarch64.cpp b/src/coreclr/jit/emitloongarch64.cpp index 8c49d04d266148..311f84fd832896 100644 --- a/src/coreclr/jit/emitloongarch64.cpp +++ b/src/coreclr/jit/emitloongarch64.cpp @@ -5206,7 +5206,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insThroughput = PERFSCORE_THROUGHPUT_ILLEGAL; result.insLatency = PERFSCORE_LATENCY_ILLEGAL; - result.insMemoryAccessKind = PERFSCORE_MEMORY_NONE; + result.insMemoryAccessKind = PerfScoreMemoryAccessKind::None; // Calculate merge emit instructions cost. unsigned CombinedInsCnt = id->idCodeSize() / sizeof(code_t); @@ -5223,7 +5223,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } else // ins == load { // pcaddu12i + load or lu12i.w + lu32i.d + load - result.insMemoryAccessKind = PERFSCORE_MEMORY_READ; + result.insMemoryAccessKind = PerfScoreMemoryAccessKind::Read; result.insThroughput = (CombinedInsCnt == 2) ? PERFSCORE_THROUGHPUT_4C : PERFSCORE_THROUGHPUT_7C; if ((INS_ld_b <= ins) && (ins <= INS_ld_wu)) { @@ -5272,9 +5272,10 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } else if (id->idInsOpt() == INS_OPTS_RELOC) { // pcalau12i + (addi.d or ld.d) - result.insLatency = id->idIsCnsReloc() ? PERFSCORE_LATENCY_2C : PERFSCORE_LATENCY_5C; - result.insThroughput = id->idIsCnsReloc() ? PERFSCORE_THROUGHPUT_6C : PERFSCORE_THROUGHPUT_4C; - result.insMemoryAccessKind = id->idIsCnsReloc() ? PERFSCORE_MEMORY_NONE : PERFSCORE_MEMORY_READ; + result.insLatency = id->idIsCnsReloc() ? PERFSCORE_LATENCY_2C : PERFSCORE_LATENCY_5C; + result.insThroughput = id->idIsCnsReloc() ? PERFSCORE_THROUGHPUT_6C : PERFSCORE_THROUGHPUT_4C; + result.insMemoryAccessKind = + id->idIsCnsReloc() ? PerfScoreMemoryAccessKind::None : PerfScoreMemoryAccessKind::Read; } else { @@ -5290,12 +5291,13 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { if (emitInsIsLoad(ins)) { - result.insMemoryAccessKind = emitInsIsStore(ins) ? PERFSCORE_MEMORY_READ_WRITE : PERFSCORE_MEMORY_READ; + result.insMemoryAccessKind = + emitInsIsStore(ins) ? PerfScoreMemoryAccessKind::ReadWrite : PerfScoreMemoryAccessKind::Read; } else { assert(emitInsIsStore(ins)); - result.insMemoryAccessKind = PERFSCORE_MEMORY_WRITE; + result.insMemoryAccessKind = PerfScoreMemoryAccessKind::Write; } } diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp index 057518229faba1..5afa79cf28cc44 100644 --- a/src/coreclr/jit/emitriscv64.cpp +++ b/src/coreclr/jit/emitriscv64.cpp @@ -5566,7 +5566,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins insExecutionCharacteristics result; result.insThroughput = PERFSCORE_LATENCY_1C; result.insLatency = PERFSCORE_THROUGHPUT_1C; - result.insMemoryAccessKind = PERFSCORE_MEMORY_NONE; + result.insMemoryAccessKind = PerfScoreMemoryAccessKind::None; unsigned codeSize = id->idCodeSize(); assert((codeSize >= 2) && ((codeSize % 2) == 0)); @@ -5674,7 +5674,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case MajorOpcode::Amo: result.insLatency = result.insThroughput = PERFSCORE_LATENCY_5C; - result.insMemoryAccessKind = PERFSCORE_MEMORY_READ_WRITE; + result.insMemoryAccessKind = PerfScoreMemoryAccessKind::ReadWrite; break; case MajorOpcode::Branch: @@ -5726,7 +5726,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insLatency += PERFSCORE_LATENCY_1C; // assume non-stack load/stores are more likely to cache-miss result.insThroughput += immediateBuildingCost; - result.insMemoryAccessKind = isLoad ? PERFSCORE_MEMORY_READ : PERFSCORE_MEMORY_WRITE; + result.insMemoryAccessKind = isLoad ? PerfScoreMemoryAccessKind::Read : PerfScoreMemoryAccessKind::Write; break; } diff --git a/src/coreclr/jit/emitxarch.cpp b/src/coreclr/jit/emitxarch.cpp index 43d74e91d53ea7..5e044adcd32ffb 100644 --- a/src/coreclr/jit/emitxarch.cpp +++ b/src/coreclr/jit/emitxarch.cpp @@ -20327,9 +20327,9 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins // Model the memory throughput, latency, kind - float memThroughput = PERFSCORE_THROUGHPUT_ILLEGAL; - float memLatency = PERFSCORE_LATENCY_ILLEGAL; - unsigned memAccessKind = 0; + float memThroughput = PERFSCORE_THROUGHPUT_ILLEGAL; + float memLatency = PERFSCORE_LATENCY_ILLEGAL; + PerfScoreMemoryAccessKind memAccessKind = PerfScoreMemoryAccessKind::None; switch (memFmt) { @@ -20339,7 +20339,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RD; memLatency = PERFSCORE_LATENCY_RD_STACK; - memAccessKind = PERFSCORE_MEMORY_READ; + memAccessKind = PerfScoreMemoryAccessKind::Read; break; } @@ -20347,7 +20347,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_WR; memLatency = PERFSCORE_LATENCY_WR_STACK; - memAccessKind = PERFSCORE_MEMORY_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::Write; break; } @@ -20355,7 +20355,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RW; memLatency = PERFSCORE_LATENCY_RD_WR_STACK; - memAccessKind = PERFSCORE_MEMORY_READ_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::ReadWrite; break; } @@ -20365,7 +20365,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RD; memLatency = PERFSCORE_LATENCY_RD_CONST_ADDR; - memAccessKind = PERFSCORE_MEMORY_READ; + memAccessKind = PerfScoreMemoryAccessKind::Read; break; } @@ -20373,7 +20373,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_WR; memLatency = PERFSCORE_LATENCY_WR_CONST_ADDR; - memAccessKind = PERFSCORE_MEMORY_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::Write; break; } @@ -20381,7 +20381,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RW; memLatency = PERFSCORE_LATENCY_RD_WR_CONST_ADDR; - memAccessKind = PERFSCORE_MEMORY_READ_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::ReadWrite; break; } @@ -20391,7 +20391,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RD; memLatency = PERFSCORE_LATENCY_RD_GENERAL; - memAccessKind = PERFSCORE_MEMORY_READ; + memAccessKind = PerfScoreMemoryAccessKind::Read; break; } @@ -20399,7 +20399,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_WR; memLatency = PERFSCORE_LATENCY_WR_GENERAL; - memAccessKind = PERFSCORE_MEMORY_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::Write; break; } @@ -20407,7 +20407,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_RW; memLatency = PERFSCORE_LATENCY_RD_WR_GENERAL; - memAccessKind = PERFSCORE_MEMORY_READ_WRITE; + memAccessKind = PerfScoreMemoryAccessKind::ReadWrite; break; } @@ -20415,7 +20415,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { memThroughput = PERFSCORE_THROUGHPUT_ZERO; memLatency = PERFSCORE_LATENCY_ZERO; - memAccessKind = PERFSCORE_MEMORY_NONE; + memAccessKind = PerfScoreMemoryAccessKind::None; break; } @@ -20424,7 +20424,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins assert(!"Unhandled insFmt for switch (memFmt)"); memThroughput = PERFSCORE_THROUGHPUT_ZERO; memLatency = PERFSCORE_LATENCY_ZERO; - memAccessKind = PERFSCORE_MEMORY_NONE; + memAccessKind = PerfScoreMemoryAccessKind::None; break; } } @@ -20547,7 +20547,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } else { - assert(memAccessKind == PERFSCORE_MEMORY_WRITE); // _SHF form never emitted + assert(memAccessKind == PerfScoreMemoryAccessKind::Write); // _SHF form never emitted insThroughput = PERFSCORE_THROUGHPUT_2C; } break; @@ -20642,7 +20642,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins insThroughput = PERFSCORE_THROUGHPUT_1C; insLatency = PERFSCORE_LATENCY_3C; - if (memAccessKind == PERFSCORE_MEMORY_READ) + if (memAccessKind == PerfScoreMemoryAccessKind::Read) { // The reads have twice the throughput of the register to register variants insThroughput = PERFSCORE_THROUGHPUT_2X; @@ -20664,7 +20664,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins insThroughput = PERFSCORE_THROUGHPUT_1C; insLatency = PERFSCORE_LATENCY_1C; - if (memAccessKind == PERFSCORE_MEMORY_READ) + if (memAccessKind == PerfScoreMemoryAccessKind::Read) { // The reads have twice the throughput of the register to register variants insThroughput = PERFSCORE_THROUGHPUT_2X; @@ -20934,7 +20934,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { insLatency = (opSize >= EA_32BYTE) ? PERFSCORE_LATENCY_3C : PERFSCORE_LATENCY_1C; - if (memAccessKind == PERFSCORE_MEMORY_NONE) + if (memAccessKind == PerfScoreMemoryAccessKind::None) { insThroughput = PERFSCORE_THROUGHPUT_1C; } @@ -20950,7 +20950,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case INS_pinsrd: case INS_pinsrq: { - if (memAccessKind == PERFSCORE_MEMORY_NONE) + if (memAccessKind == PerfScoreMemoryAccessKind::None) { insThroughput = PERFSCORE_THROUGHPUT_2C; insLatency = PERFSCORE_LATENCY_4C; @@ -21345,7 +21345,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } else { - if (memAccessKind != PERFSCORE_MEMORY_NONE) + if (memAccessKind != PerfScoreMemoryAccessKind::None) { if (IsSimdInstruction(ins)) {