diff --git a/src/coreclr/jit/gentree.cpp b/src/coreclr/jit/gentree.cpp
index a0a8e62c337a40..4741dce96ae8cd 100644
--- a/src/coreclr/jit/gentree.cpp
+++ b/src/coreclr/jit/gentree.cpp
@@ -23127,7 +23127,7 @@ GenTree* Compiler::gtNewSimdCvtNode(
     assert(varTypeIsIntegral(simdTargetBaseType));
 
 #if defined(TARGET_XARCH)
-    assert(compIsaSupportedDebugOnly(InstructionSet_AVX512) || (simdTargetBaseType == TYP_INT));
+    assert(compIsaSupportedDebugOnly(InstructionSet_AVX512) || ((simdTargetBaseType == TYP_INT) && (simdSize != 64)));
 
     GenTree* fixupVal;
 
@@ -23258,7 +23258,7 @@ GenTree* Compiler::gtNewSimdCvtNativeNode(
     NamedIntrinsic hwIntrinsicID = NI_Illegal;
 
 #if defined(TARGET_XARCH)
-    assert(compIsaSupportedDebugOnly(InstructionSet_AVX512) || (simdTargetBaseType == TYP_INT));
+    assert(compIsaSupportedDebugOnly(InstructionSet_AVX512) || ((simdTargetBaseType == TYP_INT) && (simdSize != 64)));
 
     switch (simdSourceBaseType)
     {
diff --git a/src/coreclr/jit/hwintrinsicxarch.cpp b/src/coreclr/jit/hwintrinsicxarch.cpp
index 9c57cded52e184..aa0c8f34526d91 100644
--- a/src/coreclr/jit/hwintrinsicxarch.cpp
+++ b/src/coreclr/jit/hwintrinsicxarch.cpp
@@ -1853,6 +1853,13 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
             assert(sig->numArgs == 1);
             assert(simdBaseType == TYP_FLOAT);
 
+            if ((simdSize == 64) && !compOpportunisticallyDependsOn(InstructionSet_AVX512))
+            {
+                // Vector512 float->int conversion requires AVX-512 for the native
+                // truncation instruction. Fall back to the managed implementation.
+                break;
+            }
+
             op1     = impSIMDPopStack();
             retNode = gtNewSimdCvtNode(retType, op1, TYP_INT, simdBaseType, simdSize);
             break;
@@ -1870,6 +1877,13 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
                 break;
             }
 
+            if ((simdSize == 64) && !compOpportunisticallyDependsOn(InstructionSet_AVX512))
+            {
+                // Vector512 float->int conversion requires AVX-512 for the native
+                // truncation instruction. Fall back to the managed implementation.
+                break;
+            }
+
             op1     = impSIMDPopStack();
             retNode = gtNewSimdCvtNativeNode(retType, op1, TYP_INT, simdBaseType, simdSize);
             break;