From 5ffd8232c34c968dd79d128dfdcf3ecb872c4907 Mon Sep 17 00:00:00 2001 From: EgorBo Date: Fri, 11 Dec 2020 20:16:17 +0300 Subject: [PATCH 1/3] Remove redundant memory barrier for XAdd and XChg on arm --- src/coreclr/jit/codegenarm64.cpp | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 9bf02f45f8cd18..9794f0ba91f513 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2814,20 +2814,11 @@ void CodeGen::genLockedInstructions(GenTreeOp* treeNode) GetEmitter()->emitIns_R_R_R(INS_swpal, dataSize, dataReg, targetReg, addrReg); break; case GT_XADD: - if ((targetReg == REG_NA) || (targetReg == REG_ZR)) - { - GetEmitter()->emitIns_R_R(INS_staddl, dataSize, dataReg, addrReg); - } - else - { - GetEmitter()->emitIns_R_R_R(INS_ldaddal, dataSize, dataReg, targetReg, addrReg); - } + GetEmitter()->emitIns_R_R_R(INS_ldaddal, dataSize, dataReg, (targetReg == REG_NA) ? REG_ZR : targetReg, addrReg); break; default: assert(!"Unexpected treeNode->gtOper"); } - - instGen_MemoryBarrier(); } else { From 2ffe566dd3b259ad4dded091f67f3699c1e50275 Mon Sep 17 00:00:00 2001 From: Egor Bogatov Date: Fri, 11 Dec 2020 21:54:25 +0300 Subject: [PATCH 2/3] Update codegenarm64.cpp --- src/coreclr/jit/codegenarm64.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 9794f0ba91f513..70d21614d6863e 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2814,7 +2814,8 @@ void CodeGen::genLockedInstructions(GenTreeOp* treeNode) GetEmitter()->emitIns_R_R_R(INS_swpal, dataSize, dataReg, targetReg, addrReg); break; case GT_XADD: - GetEmitter()->emitIns_R_R_R(INS_ldaddal, dataSize, dataReg, (targetReg == REG_NA) ? REG_ZR : targetReg, addrReg); + GetEmitter()->emitIns_R_R_R(INS_ldaddal, dataSize, dataReg, (targetReg == REG_NA) ? REG_ZR : targetReg, + addrReg); break; default: assert(!"Unexpected treeNode->gtOper"); From 8f797f72e7b40db6ab6b55fb19f70a707bfc6d29 Mon Sep 17 00:00:00 2001 From: Egor Bogatov Date: Fri, 11 Dec 2020 22:36:01 +0300 Subject: [PATCH 3/3] Same for casal --- src/coreclr/jit/codegenarm64.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 70d21614d6863e..9091092228f22f 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2947,8 +2947,6 @@ void CodeGen::genCodeForCmpXchg(GenTreeCmpXchg* treeNode) noway_assert(dataReg != targetReg); } GetEmitter()->emitIns_R_R_R(INS_casal, dataSize, targetReg, dataReg, addrReg); - - instGen_MemoryBarrier(); } else {