From 54c1e900551f888222f6ef814afb766e47a9108c Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Thu, 12 Dec 2019 12:29:01 -0800 Subject: [PATCH 1/6] perfScoreUnhandledInstruction will now assert in a DEBUG or CHECKED build when it encounters an unhanded instruction --- src/coreclr/src/jit/emit.cpp | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/src/coreclr/src/jit/emit.cpp b/src/coreclr/src/jit/emit.cpp index 65e688621afe38..0509ff28c2d98a 100644 --- a/src/coreclr/src/jit/emit.cpp +++ b/src/coreclr/src/jit/emit.cpp @@ -1146,18 +1146,17 @@ float emitter::insEvaluateExecutionCost(instrDesc* id) // if we return these are updated with default values // // Notes: -// When validating that the PerfScore handles every instruction. -// the #if 0 block is changed into a #ifdef DEBUG -// We will print the instruction and instruction group +// We print the instruction and instruction group // and instead of returning we will assert // -// Otherwise we will return default latencies of 1 cycle. +// This method asserts with a debug/checked build +// and returns default latencies of 1 cycle otherwise. // void emitter::perfScoreUnhandledInstruction(instrDesc* id, insExecutionCharacteristics* pResult) { -// Change this to #ifdef DEBUG to assert on any unhandled instructions -#if 0 - printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), emitIfName(id->idInsFmt())); +#ifdef DEBUG + printf("PerfScore: unhandled instruction: %s, format %s", codeGen->genInsName(id->idIns()), + emitIfName(id->idInsFmt())); assert(!"PerfScore: unhandled instruction"); #endif pResult->insThroughput = PERFSCORE_THROUGHPUT_1C; From db05fa10b135bc737bac6bc09e2d1e28d6ca5465 Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Fri, 28 Feb 2020 12:40:38 -0800 Subject: [PATCH 2/6] Added PerfScore values for IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv --- src/coreclr/src/jit/emitarm64.cpp | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index ec49e099bd99d3..0079deb456ec9a 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -13320,6 +13320,33 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insLatency = PERFSCORE_LATENCY_1C; break; + case IF_DV_2T: // addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv + switch (ins) + { + case INS_addv: + case INS_saddlv: + case INS_uaddlv: + result.insThroughput = PERFSCORE_THROUGHPUT_1C; + result.insLatency = PERFSCORE_LATENCY_3C; + break; + + case INS_smaxv: + case INS_sminv: + case INS_umaxv: + case INS_uminv: + case INS_sha256h2: + case INS_sha256su1: + result.insThroughput = PERFSCORE_THROUGHPUT_1C; + result.insLatency = PERFSCORE_LATENCY_4C; + break; + + default: + // all other instructions + perfScoreUnhandledInstruction(id, &result); + break; + } + break; + default: // all other instructions perfScoreUnhandledInstruction(id, &result); From 9266cfe867fc967271057d38a73212e51e8fa861 Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Fri, 28 Feb 2020 15:23:50 -0800 Subject: [PATCH 3/6] Add PerfScore support for fcmeq, fcmge, fcmgt, fcmle, fcmlt, fcvtl2, fcvtn, fcvtn2, fabd --- src/coreclr/src/jit/emitarm64.cpp | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index 0079deb456ec9a..7f5469c0af51c9 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -12850,7 +12850,19 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insLatency = PERFSCORE_LATENCY_3C; break; + case INS_fcmeq: + case INS_fcmge: + case INS_fcmgt: + case INS_fcmle: + case INS_fcmlt: + result.insThroughput = PERFSCORE_THROUGHPUT_2X; + result.insLatency = PERFSCORE_LATENCY_2C; + break; + case INS_fcvtl: + case INS_fcvtl2: + case INS_fcvtn: + case INS_fcvtn2: result.insThroughput = PERFSCORE_THROUGHPUT_1C; result.insLatency = PERFSCORE_LATENCY_4C; break; @@ -12980,10 +12992,11 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins { case INS_fadd: case INS_fsub: - case INS_fmin: - case INS_fminnm: + case INS_fabd: case INS_fmax: case INS_fmaxnm: + case INS_fmin: + case INS_fminnm: case INS_fmul: case INS_fmulx: case INS_fnmul: From f52992e4af273fb4eb28253e819494da8fcc8a85 Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Mon, 2 Mar 2020 10:52:16 -0800 Subject: [PATCH 4/6] Added PerfScore support for INS_addp --- src/coreclr/src/jit/emitarm64.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index 7f5469c0af51c9..04fe7983474391 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -12892,11 +12892,15 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case IF_DV_2Q: // faddp, fmaxnmp, fmaxp, fminnmp, fminp (scalar) case IF_DV_2R: // fmaxnmv, fmaxv, fminnmv, fminv - case IF_DV_2S: // addp (scalar) result.insThroughput = PERFSCORE_THROUGHPUT_2X; result.insLatency = PERFSCORE_LATENCY_4C; break; + case IF_DV_2S: // addp (scalar) + result.insThroughput = PERFSCORE_THROUGHPUT_2X; + result.insLatency = PERFSCORE_LATENCY_3C; + break; + case IF_DV_3B: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX // faddp, fmaxnmp, fmaxp, fminnmp, fminp, addp (vector) switch (ins) @@ -12919,7 +12923,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case INS_fmaxp: case INS_fminnmp: case INS_fminp: - case INS_addp: if (id->idOpSize() == EA_16BYTE) { // Q-form @@ -13145,6 +13148,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insLatency = PERFSCORE_LATENCY_2C; break; + case INS_addp: case INS_cmtst: case INS_pmul: case INS_sabd: From dcb1007f8922e112750081d616e76ea2dc91ccbf Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Mon, 2 Mar 2020 13:34:42 -0800 Subject: [PATCH 5/6] Addded fmla and fmls --- src/coreclr/src/jit/emitarm64.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index 04fe7983474391..241435fb6fe771 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -13003,6 +13003,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case INS_fmul: case INS_fmulx: case INS_fnmul: + case INS_fmla: + case INS_fmls: result.insThroughput = PERFSCORE_THROUGHPUT_2X; result.insLatency = PERFSCORE_LATENCY_4C; break; From 6b0d3ee45a892be599472d0a6a1d61005153d16a Mon Sep 17 00:00:00 2001 From: Brian Sullivan Date: Mon, 2 Mar 2020 16:08:50 -0800 Subject: [PATCH 6/6] Update flma and fmls --- src/coreclr/src/jit/emitarm64.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index 241435fb6fe771..35bb5dc0ccea69 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -12914,6 +12914,8 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case INS_fsub: case INS_fmul: case INS_fmulx: + case INS_fmla: + case INS_fmls: result.insThroughput = PERFSCORE_THROUGHPUT_2X; result.insLatency = PERFSCORE_LATENCY_4C; break; @@ -12990,7 +12992,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins result.insLatency = PERFSCORE_LATENCY_4C; break; - case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmla, fmls, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar) + case IF_DV_3D: // fadd, fsub, fdiv, fmul, fmulx, fmin, fminnm, fmax, fmaxnm, fabd, fcmXX (scalar) switch (ins) { case INS_fadd: @@ -13003,8 +13005,6 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins case INS_fmul: case INS_fmulx: case INS_fnmul: - case INS_fmla: - case INS_fmls: result.insThroughput = PERFSCORE_THROUGHPUT_2X; result.insLatency = PERFSCORE_LATENCY_4C; break; @@ -13179,7 +13179,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins } break; - case IF_DV_3DI: // mul, mla, mls (scalar by elem) + case IF_DV_3DI: // fmul, fmulx, fmla, fmls (scalar by elem) result.insThroughput = PERFSCORE_THROUGHPUT_1C; result.insLatency = PERFSCORE_LATENCY_4C; break;