From 15210ce71f4f28df043f6eba78f343178d43dcf6 Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Thu, 7 Sep 2023 03:52:25 -0700 Subject: [PATCH 1/5] Pass the right size to check if immediate will fit or not --- src/coreclr/jit/codegenarm64.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index f99602d21d953b..55b13ee70b8063 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -335,10 +335,14 @@ bool CodeGen::genInstrWithConstant(instruction ins, break; case INS_ldrsb: - case INS_ldrsh: - case INS_ldrsw: case INS_ldrb: + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_1BYTE); + break; + case INS_ldrsh: case INS_ldrh: + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_2BYTE); + break; + case INS_ldrsw: case INS_ldr: immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break; From 0172fc3179e53e39e0462ba31dd0ca4e75784095 Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Sat, 9 Sep 2023 07:23:29 -0700 Subject: [PATCH 2/5] Revert "Pass the right size to check if immediate will fit or not" This reverts commit d7c511abce6634d65434a149e719c6f4516d6966. --- src/coreclr/jit/codegenarm64.cpp | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 55b13ee70b8063..f99602d21d953b 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -335,14 +335,10 @@ bool CodeGen::genInstrWithConstant(instruction ins, break; case INS_ldrsb: - case INS_ldrb: - immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_1BYTE); - break; case INS_ldrsh: - case INS_ldrh: - immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_2BYTE); - break; case INS_ldrsw: + case INS_ldrb: + case INS_ldrh: case INS_ldr: immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break; From e18d28dbf80f72180e6e84f1432f8b6940b56dfb Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Sat, 9 Sep 2023 07:30:30 -0700 Subject: [PATCH 3/5] review feedback --- src/coreclr/jit/codegenarm64.cpp | 12 ++++++++++-- src/coreclr/jit/codegencommon.cpp | 2 +- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index f99602d21d953b..3a1099b5a1b806 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -334,11 +334,19 @@ bool CodeGen::genInstrWithConstant(instruction ins, immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break; + case INS_ldrb: case INS_ldrsb: + assert(size == EA_1BYTE); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); + break; + + case INS_ldrh: case INS_ldrsh: + assert(size == EA_2BYTE); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); + break; + case INS_ldrsw: - case INS_ldrb: - case INS_ldrh: case INS_ldr: immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break; diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp index 07e03d3e0c2334..6d0b012e7e7580 100644 --- a/src/coreclr/jit/codegencommon.cpp +++ b/src/coreclr/jit/codegencommon.cpp @@ -4736,7 +4736,7 @@ void CodeGen::genEnregisterOSRArgsAndLocals() // Note we are always reading from the tier0 frame here // const var_types lclTyp = varDsc->GetStackSlotHomeType(); - const emitAttr size = emitActualTypeSize(lclTyp); + const emitAttr size = emitTypeSize(lclTyp); const int stkOffs = patchpointInfo->Offset(lclNum) + fieldOffset; #if defined(TARGET_AMD64) From 3cf8a923b223b9469af1b04f74ede889cfea293f Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Tue, 12 Sep 2023 11:32:36 -0700 Subject: [PATCH 4/5] fix the size to be passed to the instruction --- src/coreclr/jit/codegenarm64.cpp | 19 +++++++++++++++---- src/coreclr/jit/codegencommon.cpp | 2 +- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 3a1099b5a1b806..11fe81834af2d0 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -327,7 +327,15 @@ bool CodeGen::genInstrWithConstant(instruction ins, break; case INS_strb: + assert(size == EA_1BYTE); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_1BYTE); + break; + case INS_strh: + assert(size == EA_2BYTE); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_2BYTE); + break; + case INS_str: // reg1 is a source register for store instructions assert(tmpReg != reg1); // regTmp can not match any source register @@ -336,18 +344,21 @@ bool CodeGen::genInstrWithConstant(instruction ins, case INS_ldrb: case INS_ldrsb: - assert(size == EA_1BYTE); - immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_1BYTE); break; case INS_ldrh: case INS_ldrsh: - assert(size == EA_2BYTE); - immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_2BYTE); break; case INS_ldrsw: + assert(size == EA_4BYTE); + immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, EA_4BYTE); + break; + case INS_ldr: + assert((size == EA_4BYTE) || (size == EA_8BYTE)); immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break; diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp index 6d0b012e7e7580..07e03d3e0c2334 100644 --- a/src/coreclr/jit/codegencommon.cpp +++ b/src/coreclr/jit/codegencommon.cpp @@ -4736,7 +4736,7 @@ void CodeGen::genEnregisterOSRArgsAndLocals() // Note we are always reading from the tier0 frame here // const var_types lclTyp = varDsc->GetStackSlotHomeType(); - const emitAttr size = emitTypeSize(lclTyp); + const emitAttr size = emitActualTypeSize(lclTyp); const int stkOffs = patchpointInfo->Offset(lclNum) + fieldOffset; #if defined(TARGET_AMD64) From 2d83d82962b14c48d87735a7e9f474a598f3d819 Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Tue, 12 Sep 2023 22:58:52 -0700 Subject: [PATCH 5/5] fix the assert --- src/coreclr/jit/codegenarm64.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 11fe81834af2d0..d937cd67747e25 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -358,7 +358,7 @@ bool CodeGen::genInstrWithConstant(instruction ins, break; case INS_ldr: - assert((size == EA_4BYTE) || (size == EA_8BYTE)); + assert((size == EA_4BYTE) || (size == EA_8BYTE) || (size == EA_16BYTE)); immFitsInIns = emitter::emitIns_valid_imm_for_ldst_offset(imm, size); break;