diff --git a/qiling/debugger/qdb/arch/arch_arm.py b/qiling/debugger/qdb/arch/arch_arm.py
index 1e24eef19..ed2e797c4 100644
--- a/qiling/debugger/qdb/arch/arch_arm.py
+++ b/qiling/debugger/qdb/arch/arch_arm.py
@@ -10,16 +10,21 @@
 class ArchARM(Arch):
     def __init__(self):
         super().__init__()
-
-    @property
-    def regs(self):
-        return (
+        self._regs = (
                 "r0", "r1", "r2", "r3",
                 "r4", "r5", "r6", "r7",
                 "r8", "r9", "r10", "r11",
                 "r12", "sp", "lr", "pc",
                 )
 
+    @property
+    def regs(self):
+        return self._regs
+
+    @regs.setter
+    def regs(self, regs):
+        self._regs += regs
+
     @property
     def regs_need_swapped(self):
         return {
diff --git a/qiling/debugger/qdb/qdb.py b/qiling/debugger/qdb/qdb.py
index e4351d0ff..4914af6ed 100644
--- a/qiling/debugger/qdb/qdb.py
+++ b/qiling/debugger/qdb/qdb.py
@@ -82,11 +82,7 @@ def bp_handler(ql, address, size, bp_list):
 
         self.cur_addr = self.ql.loader.entry_point
 
-        if self.ql.arch.type == QL_ARCH.CORTEX_M:
-            self._run()
-
-        else:
-            self.init_state = self.ql.save()
+        self.init_state = self.ql.save()
 
         if self._script:
             run_qdb_script(self, self._script)
@@ -118,23 +114,6 @@ def _run(self, address: int = 0, end: int = 0, count: int = 0) -> None:
         if not address:
             address = self.cur_addr
 
-        if self.ql.arch.type == QL_ARCH.CORTEX_M and self.ql.count != 0:
-
-            while self.ql.count:
-
-                if (bp := self.bp_list.pop(self.cur_addr, None)):
-                    if isinstance(bp, TempBreakpoint):
-                        self.del_breakpoint(bp)
-                    else:
-                        qdb_print(QDB_MSG.INFO, f"hit breakpoint at 0x{self.cur_addr:08x}")
-
-                    break
-
-                self.ql.arch.step()
-                self.ql.count -= 1
-
-            return
-
         if getattr(self.ql.arch, 'is_thumb', False):
             address |= 1
 
@@ -227,13 +206,10 @@ def do_step_in(self, *args) -> Optional[bool]:
         if prophecy.where is True:
             return True
 
-        if self.ql.arch == QL_ARCH.CORTEX_M:
-            self.ql.arch.step()
-        else:
-            step = 1
-            # make sure follow branching
-            if prophecy.going is True and self.ql.arch.type == QL_ARCH.MIPS:
-                step += 1
+        step = 1
+        # make sure follow branching
+        if prophecy.going is True and self.ql.arch.type == QL_ARCH.MIPS:
+            step += 1
 
         self._run(count=step)
         self.do_context()
diff --git a/qiling/debugger/qdb/render/render.py b/qiling/debugger/qdb/render/render.py
index 3d5e67d6f..4ce64fa1c 100644
--- a/qiling/debugger/qdb/render/render.py
+++ b/qiling/debugger/qdb/render/render.py
@@ -51,6 +51,7 @@ def wrapper(*args, **kwargs):
     def __init__(self):
         self.regs_a_row = 4
         self.stack_num = 10
+        self.disasm_num = 0x10
         self.color = color
 
     def reg_diff(self, cur_regs, saved_reg_dump):
@@ -206,13 +207,14 @@ def context_asm(self) -> None:
 
         lines = {}
         past_list = []
-        from_addr = self.cur_addr - 0x10
-        to_addr = self.cur_addr + 0x10
+        from_addr = self.cur_addr - self.disasm_num
+        to_addr = self.cur_addr + self.disasm_num
 
         cur_addr = from_addr
         while cur_addr != to_addr:
             insn = self.disasm(cur_addr)
-            cur_addr += self.arch_insn_size
+            # cur_addr += self.arch_insn_size
+            cur_addr += insn.size
             if not insn:
                 continue
             past_list.append(insn)
diff --git a/qiling/debugger/qdb/render/render_arm.py b/qiling/debugger/qdb/render/render_arm.py
index 4e10ac27d..7209be2c6 100644
--- a/qiling/debugger/qdb/render/render_arm.py
+++ b/qiling/debugger/qdb/render/render_arm.py
@@ -16,10 +16,20 @@ class ContextRenderARM(ContextRender, ArchARM):
     def __init__(self, ql, predictor):
         super().__init__(ql, predictor)
         ArchARM.__init__(self)
+        self.disasm_num = 8
 
     @staticmethod
     def print_mode_info(bits):
-        print(color.GREEN, "[{cpsr[mode]} mode], Thumb: {cpsr[thumb]}, FIQ: {cpsr[fiq]}, IRQ: {cpsr[irq]}, NEG: {cpsr[neg]}, ZERO: {cpsr[zero]}, Carry: {cpsr[carry]}, Overflow: {cpsr[overflow]}".format(cpsr=ArchARM.get_flags(bits)), color.END, sep="")
+        flags = ArchARM.get_flags(bits)
+
+        print(f"[{flags.pop('mode')} mode] ", end="")
+        for key, val in flags.items():
+            if val:
+                print(f"{color.BLUE}{key.upper()} ", end="")
+            else:
+                print(f"{color.GREEN}{key.lower()} ", end="")
+
+        print(color.END)
 
     @Render.divider_printer("[ REGISTERS ]")
     def context_reg(self, saved_reg_dump):
diff --git a/qiling/debugger/qdb/render/render_x86.py b/qiling/debugger/qdb/render/render_x86.py
index 5c43d0e55..c13b92fe7 100644
--- a/qiling/debugger/qdb/render/render_x86.py
+++ b/qiling/debugger/qdb/render/render_x86.py
@@ -22,7 +22,17 @@ def context_reg(self, saved_reg_dump):
         cur_regs = self.dump_regs()
         diff_reg = self.reg_diff(cur_regs, saved_reg_dump)
         self.render_regs_dump(cur_regs, diff_reg=diff_reg)
-        print(color.GREEN, "EFLAGS: [CF: {flags[CF]}, PF: {flags[PF]}, AF: {flags[AF]}, ZF: {flags[ZF]}, SF: {flags[SF]}, OF: {flags[OF]}]".format(flags=self.get_flags(self.ql.arch.regs.eflags)), color.END, sep="")
+
+        flags = self.get_flags(self.ql.arch.regs.eflags)
+        print("EFLAGS: ", end="")
+        print(color.GREEN, end="")
+        for key, val in flags.items():
+            if val:
+                print(f"{color.BLUE}{key.upper()} ", end="")
+            else:
+                print(f"{color.GREEN}{key.lower()} ", end="")
+
+        print(color.END)
 
     @Render.divider_printer("[ DISASM ]")
     def context_asm(self):