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Set rv->compressed for instruction ecall and ebreak
The exception handler is invoked by the instructions ecall and ebreak, thus we must set rv->compressed for these instructions.
1 parent 5e94ea5 commit b2145e7

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4 files changed

+32
-27
lines changed

4 files changed

+32
-27
lines changed

‎src/decode.c‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ static inline int32_t decode_jtype_imm(const uint32_t insn)
7676
*/
7777
static inline int32_t decode_itype_imm(const uint32_t insn)
7878
{
79-
return ((int32_t) (insn & FI_IMM_11_0)) >> 20;
79+
return ((int32_t)(insn & FI_IMM_11_0)) >> 20;
8080
}
8181

8282
/* decode B-type instruction immediate.
@@ -141,47 +141,47 @@ enum {
141141
*/
142142
static inline uint16_t c_decode_rs1(const uint16_t insn)
143143
{
144-
return (uint16_t) ((insn & FC_RS1) >> 7U);
144+
return (uint16_t)((insn & FC_RS1) >> 7U);
145145
}
146146

147147
/* decode rs2 field
148148
* rs2 = inst[6:2]
149149
*/
150150
static inline uint16_t c_decode_rs2(const uint16_t insn)
151151
{
152-
return (uint16_t) ((insn & FC_RS2) >> 2U);
152+
return (uint16_t)((insn & FC_RS2) >> 2U);
153153
}
154154

155155
/* decode rd field
156156
* rd = inst[11:7]
157157
*/
158158
static inline uint16_t c_decode_rd(const uint16_t insn)
159159
{
160-
return (uint16_t) ((insn & FC_RD) >> 7U);
160+
return (uint16_t)((insn & FC_RD) >> 7U);
161161
}
162162

163163
/* decode rs1' field
164164
* rs1' = inst[9:7]
165165
*/
166166
static inline uint16_t c_decode_rs1c(const uint16_t insn)
167167
{
168-
return (uint16_t) ((insn & FC_RS1C) >> 7U);
168+
return (uint16_t)((insn & FC_RS1C) >> 7U);
169169
}
170170

171171
/* decode rs2' field
172172
* rs2' = inst[4:2]
173173
*/
174174
static inline uint16_t c_decode_rs2c(const uint16_t insn)
175175
{
176-
return (uint16_t) ((insn & FC_RS2C) >> 2U);
176+
return (uint16_t)((insn & FC_RS2C) >> 2U);
177177
}
178178

179179
/* decode rd' field
180180
* rd' = inst[4:2]
181181
*/
182182
static inline uint16_t c_decode_rdc(const uint16_t insn)
183183
{
184-
return (uint16_t) ((insn & FC_RDC) >> 2U);
184+
return (uint16_t)((insn & FC_RDC) >> 2U);
185185
}
186186

187187
/* decode C.ADDI4SPN nzuimm field
@@ -238,7 +238,7 @@ static inline int32_t c_decode_caddi_imm(const uint16_t insn)
238238
static inline int32_t c_decode_citype_imm(const uint16_t insn)
239239
{
240240
uint32_t tmp = ((insn & FCI_IMM_12) >> 7) | ((insn & FCI_IMM_6_2) >> 2);
241-
return (tmp & 0x20) ? (int32_t) (0xffffffc0 | tmp) : (int32_t) tmp;
241+
return (tmp & 0x20) ? (int32_t)(0xffffffc0 | tmp) : (int32_t) tmp;
242242
}
243243

244244
/* decode CJ-format instruction immediate
@@ -267,7 +267,7 @@ static inline int32_t c_decode_cjtype_imm(const uint16_t insn)
267267
tmp |= (0x0800 & tmp) << i;
268268

269269
/* extend to 16 bit */
270-
return (int32_t) (int16_t) tmp;
270+
return (int32_t)(int16_t) tmp;
271271
}
272272

273273
/* decode CB-format shamt field

‎src/emulate.c‎

Lines changed: 20 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -567,13 +567,13 @@ static bool emulate(riscv_t *rv, const block_t *block)
567567
* bits of the result. ADDI rd, rs1, 0 is used to implement the MV rd, rs1
568568
* assembler pseudo-instruction.
569569
*/
570-
_(addi, rv->X[ir->rd] = (int32_t) (rv->X[ir->rs1]) + ir->imm;)
570+
_(addi, rv->X[ir->rd] = (int32_t)(rv->X[ir->rs1]) + ir->imm;)
571571

572572
/* SLTI (Set on Less Than Immediate) places the value 1 in register rd if
573573
* register rs1 is less than the signextended immediate when both are
574574
* treated as signed numbers, else 0 is written to rd.
575575
*/
576-
_(slti, rv->X[ir->rd] = ((int32_t) (rv->X[ir->rs1]) < ir->imm) ? 1 : 0;)
576+
_(slti, rv->X[ir->rd] = ((int32_t)(rv->X[ir->rs1]) < ir->imm) ? 1 : 0;)
577577

578578
/* SLTIU (Set on Less Than Immediate Unsigned) places the value 1 in
579579
* register rd if register rs1 is less than the immediate when both are
@@ -612,19 +612,19 @@ static bool emulate(riscv_t *rv, const block_t *block)
612612

613613
/* ADD */
614614
_(add,
615-
rv->X[ir->rd] = (int32_t) (rv->X[ir->rs1]) + (int32_t) (rv->X[ir->rs2]);)
615+
rv->X[ir->rd] = (int32_t)(rv->X[ir->rs1]) + (int32_t)(rv->X[ir->rs2]);)
616616

617617
/* SUB: Substract */
618618
_(sub,
619-
rv->X[ir->rd] = (int32_t) (rv->X[ir->rs1]) - (int32_t) (rv->X[ir->rs2]);)
619+
rv->X[ir->rd] = (int32_t)(rv->X[ir->rs1]) - (int32_t)(rv->X[ir->rs2]);)
620620

621621
/* SLL: Shift Left Logical */
622622
_(sll, rv->X[ir->rd] = rv->X[ir->rs1] << (rv->X[ir->rs2] & 0x1f);)
623623

624624
/* SLT: Set on Less Than */
625625
_(slt, {
626626
rv->X[ir->rd] =
627-
((int32_t) (rv->X[ir->rs1]) < (int32_t) (rv->X[ir->rs2])) ? 1 : 0;
627+
((int32_t)(rv->X[ir->rs1]) < (int32_t)(rv->X[ir->rs2])) ? 1 : 0;
628628
})
629629

630630
/* SLTU: Set on Less Than Unsigned */
@@ -649,13 +649,15 @@ static bool emulate(riscv_t *rv, const block_t *block)
649649

650650
/* ECALL: Environment Call */
651651
_(ecall, {
652+
rv->compressed = false;
652653
rv->io.on_ecall(rv); /* increment the cycles csr */
653654
rv->csr_cycle++;
654655
return true;
655656
})
656657

657658
/* EBREAK: Environment Break */
658659
_(ebreak, {
660+
rv->compressed = false;
659661
rv->io.on_ebreak(rv); /* increment the cycles csr */
660662
rv->csr_cycle++;
661663
return true;
@@ -737,14 +739,14 @@ static bool emulate(riscv_t *rv, const block_t *block)
737739
_(mulh, {
738740
const int64_t a = (int32_t) rv->X[ir->rs1];
739741
const int64_t b = (int32_t) rv->X[ir->rs2];
740-
rv->X[ir->rd] = ((uint64_t) (a * b)) >> 32;
742+
rv->X[ir->rd] = ((uint64_t)(a * b)) >> 32;
741743
})
742744

743745
/* MULHSU: Multiply High Signed Unsigned */
744746
_(mulhsu, {
745747
const int64_t a = (int32_t) rv->X[ir->rs1];
746748
const uint64_t b = rv->X[ir->rs2];
747-
rv->X[ir->rd] = ((uint64_t) (a * b)) >> 32;
749+
rv->X[ir->rd] = ((uint64_t)(a * b)) >> 32;
748750
})
749751

750752
/* MULHU: Multiply High Unsigned Unsigned */
@@ -757,10 +759,11 @@ static bool emulate(riscv_t *rv, const block_t *block)
757759
_(div, {
758760
const int32_t dividend = (int32_t) rv->X[ir->rs1];
759761
const int32_t divisor = (int32_t) rv->X[ir->rs2];
760-
rv->X[ir->rd] = !divisor ? ~0U
761-
: (divisor == -1 && rv->X[ir->rs1] == 0x80000000U)
762-
? rv->X[ir->rs1] /* overflow */
763-
: (unsigned int) (dividend / divisor);
762+
rv->X[ir->rd] = !divisor
763+
? ~0U
764+
: (divisor == -1 && rv->X[ir->rs1] == 0x80000000U)
765+
? rv->X[ir->rs1] /* overflow */
766+
: (unsigned int) (dividend / divisor);
764767
})
765768

766769
/* DIVU: Divide Unsigned */
@@ -774,10 +777,11 @@ static bool emulate(riscv_t *rv, const block_t *block)
774777
_(rem, {
775778
const int32_t dividend = rv->X[ir->rs1];
776779
const int32_t divisor = rv->X[ir->rs2];
777-
rv->X[ir->rd] = !divisor ? dividend
778-
: (divisor == -1 && rv->X[ir->rs1] == 0x80000000U)
779-
? 0 /* overflow */
780-
: (dividend % divisor);
780+
rv->X[ir->rd] = !divisor
781+
? dividend
782+
: (divisor == -1 && rv->X[ir->rs1] == 0x80000000U)
783+
? 0 /* overflow */
784+
: (dividend % divisor);
781785
})
782786

783787
/* REMU: Remainder Unsigned */
@@ -1288,6 +1292,7 @@ static bool emulate(riscv_t *rv, const block_t *block)
12881292

12891293
/* C.EBREAK */
12901294
_(cebreak, {
1295+
rv->compressed = true;
12911296
rv->io.on_ebreak(rv);
12921297
/* increment the cycles csr */
12931298
rv->csr_cycle++;

‎src/map.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ static inline map_node_t *rb_parent(const map_node_t *node)
4242
*/
4343
static inline map_color_t rb_color(const map_node_t *node)
4444
{
45-
return (map_color_t) (node->parent_color & 1LU);
45+
return (map_color_t)(node->parent_color & 1LU);
4646
}
4747

4848
/*

‎src/riscv_private.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -104,11 +104,11 @@ struct riscv_internal {
104104
/* sign extend a 16 bit value */
105105
static inline uint32_t sign_extend_h(const uint32_t x)
106106
{
107-
return (int32_t) ((int16_t) x);
107+
return (int32_t)((int16_t) x);
108108
}
109109

110110
/* sign extend an 8 bit value */
111111
static inline uint32_t sign_extend_b(const uint32_t x)
112112
{
113-
return (int32_t) ((int8_t) x);
113+
return (int32_t)((int8_t) x);
114114
}

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