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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Mediatek mt8195 DSP core |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - YC Hung <yc.hung@mediatek.com> |
| 11 | + |
| 12 | +description: | |
| 13 | + Some boards from mt8195 contain a DSP core used for |
| 14 | + advanced pre- and post- audio processing. |
| 15 | +
|
| 16 | +properties: |
| 17 | + compatible: |
| 18 | + const: mediatek,mt8195-audio_dsp |
| 19 | + |
| 20 | + reg: |
| 21 | + maxItems: 5 |
| 22 | + |
| 23 | + reg-names: |
| 24 | + maxItems: 5 |
| 25 | + |
| 26 | + interrupts: |
| 27 | + maxItems: 4 |
| 28 | + |
| 29 | + interrupt-names: |
| 30 | + maxItems: 4 |
| 31 | + |
| 32 | + clocks: |
| 33 | + items: |
| 34 | + - description: mux for dsp clock |
| 35 | + - description: 26M clock |
| 36 | + - description: mux for audio dsp local bus |
| 37 | + - description: default audio dsp local bus clock source |
| 38 | + - description: clock gate for dsp clock |
| 39 | + - description: mux for dsp access external bus |
| 40 | + |
| 41 | + clock-names: |
| 42 | + items: |
| 43 | + - const: dsp_sel |
| 44 | + - const: clk26m_ck |
| 45 | + - const: audio_local_bus |
| 46 | + - const: mainpll_d7_d2 |
| 47 | + - const: scp_adsp_audiodsp |
| 48 | + - const: audio_h_sel |
| 49 | + |
| 50 | + power-domains: |
| 51 | + maxItems: 1 |
| 52 | + |
| 53 | + mboxes: |
| 54 | + maxItems: 3 |
| 55 | + |
| 56 | + mbox-names: |
| 57 | + items: |
| 58 | + - const: adsp 0 |
| 59 | + - const: adsp 1 |
| 60 | + - const: adsp 2 |
| 61 | + |
| 62 | + "#mbox-cells": |
| 63 | + const: 1 |
| 64 | + description: |
| 65 | + The first cell is the client-id, and the second cell is the signal-id. |
| 66 | + |
| 67 | + sound: |
| 68 | + maxItems: 3 |
| 69 | + |
| 70 | + memory-region: |
| 71 | + description: |
| 72 | + phandle to a node describing reserved memory (System RAM memory) |
| 73 | + used by DSP (see bindings/reserved-memory/reserved-memory.txt) |
| 74 | + maxItems: 2 |
| 75 | + |
| 76 | +required: |
| 77 | + - compatible |
| 78 | + - reg |
| 79 | + - clocks |
| 80 | + - clock-names |
| 81 | + - power-domains |
| 82 | + - mboxes |
| 83 | + - mbox-names |
| 84 | + - memory-region |
| 85 | + - "#mbox-cells" |
| 86 | + |
| 87 | +additionalProperties: false |
| 88 | + |
| 89 | +examples: |
| 90 | + - | |
| 91 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 92 | + #include <dt-bindings/interrupt-controller/irq.h> |
| 93 | +
|
| 94 | + adsp: adsp@10803000 { |
| 95 | + compatible = "mediatek,mt8195-audio_dsp"; |
| 96 | + reg = <0x10803000 0x1000>, |
| 97 | + <0x10840000 0x40000>, |
| 98 | + <0x10816000 0x1000>, |
| 99 | + <0x10817000 0x1000>, |
| 100 | + <0x10818000 0x1000>; |
| 101 | + reg-names = "cfg", "sram", "mbox0", "mbox1", "mbox2"; |
| 102 | + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>, |
| 103 | + <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>, |
| 104 | + <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>, |
| 105 | + <GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>; |
| 106 | + interrupt-names = "wdt", "mbox0", "mbox1", "mbox2"; |
| 107 | + clocks = <&topckgen 10>, //CLK_TOP_DSP_SEL |
| 108 | + <&clk26m>, |
| 109 | + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS_SEL |
| 110 | + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2 |
| 111 | + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP |
| 112 | + <&topckgen 34>; //CLK_TOP_AUDIO_H_SEL |
| 113 | + clock-names = "dsp_sel", |
| 114 | + "clk26m_ck", |
| 115 | + "audio_local_bus", |
| 116 | + "mainpll_d7_d2", |
| 117 | + "scp_adsp_audiodsp", |
| 118 | + "audio_h_sel"; |
| 119 | + memory-region = <&adsp_dma_mem_reserved>, |
| 120 | + <&adsp_mem_reserved>; |
| 121 | + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP |
| 122 | + #mbox-cells = <1>; |
| 123 | + mboxes = <&adsp 0>, <&adsp 1>, <&adsp 2>; |
| 124 | + status = "disabled"; |
| 125 | +
|
| 126 | + sound { |
| 127 | + mediatek,dptx-codec = <&dp_tx>; |
| 128 | + mediatek,hdmi-codec = <&hdmi0>; |
| 129 | + mediatek,platform = <&afe>; |
| 130 | + }; |
| 131 | + }; |
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