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dt-ndings: mediatek: mt8195: add dsp document
This patch adds document for mt8195 DSP Signed-off-by: YC Hung <yc.hung@mediatek.com>
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek mt8195 DSP core
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maintainers:
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- YC Hung <yc.hung@mediatek.com>
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description: |
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Some boards from mt8195 contain a DSP core used for
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advanced pre- and post- audio processing.
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properties:
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compatible:
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const: mediatek,mt8195-audio_dsp
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reg:
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maxItems: 5
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reg-names:
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maxItems: 5
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interrupts:
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maxItems: 4
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interrupt-names:
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maxItems: 4
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clocks:
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items:
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- description: mux for dsp clock
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- description: 26M clock
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- description: mux for audio dsp local bus
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- description: default audio dsp local bus clock source
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- description: clock gate for dsp clock
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- description: mux for dsp access external bus
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clock-names:
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items:
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- const: dsp_sel
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- const: clk26m_ck
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- const: audio_local_bus
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- const: mainpll_d7_d2
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- const: scp_adsp_audiodsp
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- const: audio_h_sel
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power-domains:
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maxItems: 1
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mboxes:
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maxItems: 3
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mbox-names:
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items:
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- const: adsp 0
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- const: adsp 1
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- const: adsp 2
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"#mbox-cells":
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const: 1
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description:
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The first cell is the client-id, and the second cell is the signal-id.
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sound:
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maxItems: 3
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memory-region:
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description:
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phandle to a node describing reserved memory (System RAM memory)
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used by DSP (see bindings/reserved-memory/reserved-memory.txt)
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maxItems: 2
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- power-domains
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- mboxes
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- mbox-names
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- memory-region
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- "#mbox-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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adsp: adsp@10803000 {
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compatible = "mediatek,mt8195-audio_dsp";
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reg = <0x10803000 0x1000>,
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<0x10840000 0x40000>,
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<0x10816000 0x1000>,
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<0x10817000 0x1000>,
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<0x10818000 0x1000>;
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reg-names = "cfg", "sram", "mbox0", "mbox1", "mbox2";
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interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>,
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<GIC_SPI 704 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupt-names = "wdt", "mbox0", "mbox1", "mbox2";
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clocks = <&topckgen 10>, //CLK_TOP_DSP_SEL
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<&clk26m>,
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<&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS_SEL
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<&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
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<&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
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<&topckgen 34>; //CLK_TOP_AUDIO_H_SEL
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clock-names = "dsp_sel",
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"clk26m_ck",
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"audio_local_bus",
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"mainpll_d7_d2",
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"scp_adsp_audiodsp",
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"audio_h_sel";
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memory-region = <&adsp_dma_mem_reserved>,
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<&adsp_mem_reserved>;
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power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
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#mbox-cells = <1>;
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mboxes = <&adsp 0>, <&adsp 1>, <&adsp 2>;
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status = "disabled";
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sound {
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mediatek,dptx-codec = <&dp_tx>;
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mediatek,hdmi-codec = <&hdmi0>;
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mediatek,platform = <&afe>;
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};
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};

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