diff --git a/include/sound/sof.h b/include/sound/sof.h index 06f5d9d015b046..4cd89661b55c1c 100644 --- a/include/sound/sof.h +++ b/include/sound/sof.h @@ -19,7 +19,6 @@ #include #include #include -#include struct snd_sof_dsp_ops; diff --git a/include/sound/sof/control.h b/include/sound/sof/control.h new file mode 100644 index 00000000000000..7c839ae73b8f33 --- /dev/null +++ b/include/sound/sof/control.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_CONTROL_H__ +#define __INCLUDE_SOUND_SOF_CONTROL_H__ + +#include +#include + +/* + * Component Mixers and Controls + */ + +/* channel positions - uses same values as ALSA */ +enum sof_ipc_chmap { + SOF_CHMAP_UNKNOWN = 0, + SOF_CHMAP_NA, /**< N/A, silent */ + SOF_CHMAP_MONO, /**< mono stream */ + SOF_CHMAP_FL, /**< front left */ + SOF_CHMAP_FR, /**< front right */ + SOF_CHMAP_RL, /**< rear left */ + SOF_CHMAP_RR, /**< rear right */ + SOF_CHMAP_FC, /**< front centre */ + SOF_CHMAP_LFE, /**< LFE */ + SOF_CHMAP_SL, /**< side left */ + SOF_CHMAP_SR, /**< side right */ + SOF_CHMAP_RC, /**< rear centre */ + SOF_CHMAP_FLC, /**< front left centre */ + SOF_CHMAP_FRC, /**< front right centre */ + SOF_CHMAP_RLC, /**< rear left centre */ + SOF_CHMAP_RRC, /**< rear right centre */ + SOF_CHMAP_FLW, /**< front left wide */ + SOF_CHMAP_FRW, /**< front right wide */ + SOF_CHMAP_FLH, /**< front left high */ + SOF_CHMAP_FCH, /**< front centre high */ + SOF_CHMAP_FRH, /**< front right high */ + SOF_CHMAP_TC, /**< top centre */ + SOF_CHMAP_TFL, /**< top front left */ + SOF_CHMAP_TFR, /**< top front right */ + SOF_CHMAP_TFC, /**< top front centre */ + SOF_CHMAP_TRL, /**< top rear left */ + SOF_CHMAP_TRR, /**< top rear right */ + SOF_CHMAP_TRC, /**< top rear centre */ + SOF_CHMAP_TFLC, /**< top front left centre */ + SOF_CHMAP_TFRC, /**< top front right centre */ + SOF_CHMAP_TSL, /**< top side left */ + SOF_CHMAP_TSR, /**< top side right */ + SOF_CHMAP_LLFE, /**< left LFE */ + SOF_CHMAP_RLFE, /**< right LFE */ + SOF_CHMAP_BC, /**< bottom centre */ + SOF_CHMAP_BLC, /**< bottom left centre */ + SOF_CHMAP_BRC, /**< bottom right centre */ + SOF_CHMAP_LAST = SOF_CHMAP_BRC, +}; + +/* control data type and direction */ +enum sof_ipc_ctrl_type { + /* per channel data - uses struct sof_ipc_ctrl_value_chan */ + SOF_CTRL_TYPE_VALUE_CHAN_GET = 0, + SOF_CTRL_TYPE_VALUE_CHAN_SET, + /* component data - uses struct sof_ipc_ctrl_value_comp */ + SOF_CTRL_TYPE_VALUE_COMP_GET, + SOF_CTRL_TYPE_VALUE_COMP_SET, + /* bespoke data - struct struct sof_abi_hdr */ + SOF_CTRL_TYPE_DATA_GET, + SOF_CTRL_TYPE_DATA_SET, +}; + +/* control command type */ +enum sof_ipc_ctrl_cmd { + SOF_CTRL_CMD_VOLUME = 0, /**< maps to ALSA volume style controls */ + SOF_CTRL_CMD_ENUM, /**< maps to ALSA enum style controls */ + SOF_CTRL_CMD_SWITCH, /**< maps to ALSA switch style controls */ + SOF_CTRL_CMD_BINARY, /**< maps to ALSA binary style controls */ +}; + +/* generic channel mapped value data */ +struct sof_ipc_ctrl_value_chan { + uint32_t channel; /**< channel map - enum sof_ipc_chmap */ + uint32_t value; +} __packed; + +/* generic component mapped value data */ +struct sof_ipc_ctrl_value_comp { + uint32_t index; /**< component source/sink/control index in control */ + union { + uint32_t uvalue; + int32_t svalue; + }; +} __packed; + +/* generic control data */ +struct sof_ipc_ctrl_data { + struct sof_ipc_reply rhdr; + uint32_t comp_id; + + /* control access and data type */ + uint32_t type; /**< enum sof_ipc_ctrl_type */ + uint32_t cmd; /**< enum sof_ipc_ctrl_cmd */ + uint32_t index; /**< control index for comps > 1 control */ + + /* control data - can either be appended or DMAed from host */ + struct sof_ipc_host_buffer buffer; + uint32_t num_elems; /**< in array elems or bytes */ + + /* reserved for future use */ + uint32_t reserved[8]; + + /* control data - add new types if needed */ + union { + /* channel values can be used by volume type controls */ + struct sof_ipc_ctrl_value_chan chanv[0]; + /* component values used by routing controls like mux, mixer */ + struct sof_ipc_ctrl_value_comp compv[0]; + /* data can be used by binary controls */ + struct sof_abi_hdr data[0]; + }; +} __packed; + +#endif diff --git a/include/sound/sof/dai-intel.h b/include/sound/sof/dai-intel.h new file mode 100644 index 00000000000000..3b960216eedb59 --- /dev/null +++ b/include/sound/sof/dai-intel.h @@ -0,0 +1,161 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_DAI_INTEL_H__ +#define __INCLUDE_SOUND_SOF_DAI_INTEL_H__ + +#include + + /* ssc1: TINTE */ +#define SOF_DAI_INTEL_SSP_QUIRK_TINTE (1 << 0) + /* ssc1: PINTE */ +#define SOF_DAI_INTEL_SSP_QUIRK_PINTE (1 << 1) + /* ssc2: SMTATF */ +#define SOF_DAI_INTEL_SSP_QUIRK_SMTATF (1 << 2) + /* ssc2: MMRATF */ +#define SOF_DAI_INTEL_SSP_QUIRK_MMRATF (1 << 3) + /* ssc2: PSPSTWFDFD */ +#define SOF_DAI_INTEL_SSP_QUIRK_PSPSTWFDFD (1 << 4) + /* ssc2: PSPSRWFDFD */ +#define SOF_DAI_INTEL_SSP_QUIRK_PSPSRWFDFD (1 << 5) + /* here is the possibility to define others aux macros */ + +#define SOF_DAI_INTEL_SSP_FRAME_PULSE_WIDTH_MAX 38 +#define SOF_DAI_INTEL_SSP_SLOT_PADDING_MAX 31 + +/* SSP clocks control settings + * + * Macros for clks_control field in sof_ipc_dai_ssp_params struct. + */ + +/* mclk 0 disable */ +#define SOF_DAI_INTEL_SSP_MCLK_0_DISABLE BIT(0) +/* mclk 1 disable */ +#define SOF_DAI_INTEL_SSP_MCLK_1_DISABLE BIT(1) +/* mclk keep active */ +#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_KA BIT(2) +/* bclk keep active */ +#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_KA BIT(3) +/* fs keep active */ +#define SOF_DAI_INTEL_SSP_CLKCTRL_FS_KA BIT(4) +/* bclk idle */ +#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_IDLE_HIGH BIT(5) + +/* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */ +struct sof_ipc_dai_ssp_params { + uint16_t reserved1; + uint16_t mclk_id; + + uint32_t mclk_rate; /* mclk frequency in Hz */ + uint32_t fsync_rate; /* fsync frequency in Hz */ + uint32_t bclk_rate; /* bclk frequency in Hz */ + + /* TDM */ + uint32_t tdm_slots; + uint32_t rx_slots; + uint32_t tx_slots; + + /* data */ + uint32_t sample_valid_bits; + uint16_t tdm_slot_width; + uint16_t reserved2; /* alignment */ + + /* MCLK */ + uint32_t mclk_direction; + + uint16_t frame_pulse_width; + uint16_t tdm_per_slot_padding_flag; + uint32_t clks_control; + uint32_t quirks; +} __packed; + +/* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */ +struct sof_ipc_dai_hda_params { + struct sof_ipc_hdr hdr; + /* TODO */ +} __packed; + +/* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */ + +/* This struct is defined per 2ch PDM controller available in the platform. + * Normally it is sufficient to set the used microphone specific enables to 1 + * and keep other parameters as zero. The customizations are: + * + * 1. If a device mixes different microphones types with different polarity + * and/or the absolute polarity matters the PCM signal from a microphone + * can be inverted with the controls. + * + * 2. If the microphones in a stereo pair do not appear in captured stream + * in desired order due to board schematics choises they can be swapped with + * the clk_edge parameter. + * + * 3. If PDM bit errors are seen in capture (poor quality) the skew parameter + * that delays the sampling time of data by half cycles of DMIC source clock + * can be tried for improvement. However there is no guarantee for this to fix + * data integrity problems. + */ +struct sof_ipc_dai_dmic_pdm_ctrl { + uint16_t id; /**< PDM controller ID */ + + uint16_t enable_mic_a; /**< Use A (left) channel mic (0 or 1)*/ + uint16_t enable_mic_b; /**< Use B (right) channel mic (0 or 1)*/ + + uint16_t polarity_mic_a; /**< Optionally invert mic A signal (0 or 1) */ + uint16_t polarity_mic_b; /**< Optionally invert mic B signal (0 or 1) */ + + uint16_t clk_edge; /**< Optionally swap data clock edge (0 or 1) */ + uint16_t skew; /**< Adjust PDM data sampling vs. clock (0..15) */ + + uint16_t reserved[3]; /**< Make sure the total size is 4 bytes aligned */ +} __packed; + +/* This struct contains the global settings for all 2ch PDM controllers. The + * version number used in configuration data is checked vs. version used by + * device driver src/drivers/dmic.c need to match. It is incremented from + * initial value 1 if updates done for the to driver would alter the operation + * of the microhone. + * + * Note: The microphone clock (pdmclk_min, pdmclk_max, duty_min, duty_max) + * parameters need to be set as defined in microphone data sheet. E.g. clock + * range 1.0 - 3.2 MHz is usually supported microphones. Some microphones are + * multi-mode capable and there may be denied mic clock frequencies between + * the modes. In such case set the clock range limits of the desired mode to + * avoid the driver to set clock to an illegal rate. + * + * The duty cycle could be set to 48-52% if not known. Generally these + * parameters can be altered within data sheet specified limits to match + * required audio application performance power. + * + * The microphone clock needs to be usually about 50-80 times the used audio + * sample rate. With highest sample rates above 48 kHz this can relaxed + * somewhat. + */ +struct sof_ipc_dai_dmic_params { + uint32_t driver_ipc_version; /**< Version (1..N) */ + + uint32_t pdmclk_min; /**< Minimum microphone clock in Hz (100000..N) */ + uint32_t pdmclk_max; /**< Maximum microphone clock in Hz (min...N) */ + + uint32_t fifo_fs_a; /**< FIFO A sample rate in Hz (8000..96000) */ + uint32_t fifo_fs_b; /**< FIFO B sample rate in Hz (8000..96000) */ + uint16_t fifo_bits_a; /**< FIFO A word length (16 or 32) */ + uint16_t fifo_bits_b; /**< FIFO B word length (16 or 32) */ + + uint16_t duty_min; /**< Min. mic clock duty cycle in % (20..80) */ + uint16_t duty_max; /**< Max. mic clock duty cycle in % (min..80) */ + + uint32_t num_pdm_active; /**< Number of active pdm controllers */ + + /* reserved for future use */ + uint32_t reserved[8]; + + /**< variable number of pdm controller config */ + struct sof_ipc_dai_dmic_pdm_ctrl pdm[0]; +} __packed; + +#endif diff --git a/include/sound/sof/dai.h b/include/sound/sof/dai.h new file mode 100644 index 00000000000000..025a5cba682e30 --- /dev/null +++ b/include/sound/sof/dai.h @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_DAI_H__ +#define __INCLUDE_SOUND_SOF_DAI_H__ + +#include +#include + +/* + * DAI Configuration. + * + * Each different DAI type will have it's own structure and IPC cmd. + */ + +#define SOF_DAI_FMT_I2S 1 /**< I2S mode */ +#define SOF_DAI_FMT_RIGHT_J 2 /**< Right Justified mode */ +#define SOF_DAI_FMT_LEFT_J 3 /**< Left Justified mode */ +#define SOF_DAI_FMT_DSP_A 4 /**< L data MSB after FRM LRC */ +#define SOF_DAI_FMT_DSP_B 5 /**< L data MSB during FRM LRC */ +#define SOF_DAI_FMT_PDM 6 /**< Pulse density modulation */ + +#define SOF_DAI_FMT_CONT (1 << 4) /**< continuous clock */ +#define SOF_DAI_FMT_GATED (0 << 4) /**< clock is gated */ + +#define SOF_DAI_FMT_NB_NF (0 << 8) /**< normal bit clock + frame */ +#define SOF_DAI_FMT_NB_IF (2 << 8) /**< normal BCLK + inv FRM */ +#define SOF_DAI_FMT_IB_NF (3 << 8) /**< invert BCLK + nor FRM */ +#define SOF_DAI_FMT_IB_IF (4 << 8) /**< invert BCLK + FRM */ + +#define SOF_DAI_FMT_CBM_CFM (0 << 12) /**< codec clk & FRM master */ +#define SOF_DAI_FMT_CBS_CFM (2 << 12) /**< codec clk slave & FRM master */ +#define SOF_DAI_FMT_CBM_CFS (3 << 12) /**< codec clk master & frame slave */ +#define SOF_DAI_FMT_CBS_CFS (4 << 12) /**< codec clk & FRM slave */ + +#define SOF_DAI_FMT_FORMAT_MASK 0x000f +#define SOF_DAI_FMT_CLOCK_MASK 0x00f0 +#define SOF_DAI_FMT_INV_MASK 0x0f00 +#define SOF_DAI_FMT_MASTER_MASK 0xf000 + +/** \brief Types of DAI */ +enum sof_ipc_dai_type { + SOF_DAI_INTEL_NONE = 0, /**< None */ + SOF_DAI_INTEL_SSP, /**< Intel SSP */ + SOF_DAI_INTEL_DMIC, /**< Intel DMIC */ + SOF_DAI_INTEL_HDA, /**< Intel HD/A */ +}; + +/* general purpose DAI configuration */ +struct sof_ipc_dai_config { + struct sof_ipc_hdr hdr; + uint32_t type; /**< DAI type - enum sof_ipc_dai_type */ + uint32_t dai_index; /**< index of this type dai */ + + /* physical protocol and clocking */ + uint16_t format; /**< SOF_DAI_FMT_ */ + uint16_t reserved16; /**< alignment */ + + /* reserved for future use */ + uint32_t reserved[8]; + + /* HW specific data */ + union { + struct sof_ipc_dai_ssp_params ssp; + struct sof_ipc_dai_dmic_params dmic; + struct sof_ipc_dai_hda_params hda; + }; +} __packed; + +#endif diff --git a/include/sound/sof/header.h b/include/sound/sof/header.h new file mode 100644 index 00000000000000..7b506877b7dec3 --- /dev/null +++ b/include/sound/sof/header.h @@ -0,0 +1,177 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_HEADER_H__ +#define __INCLUDE_SOUND_SOF_HEADER_H__ + +#include + +/** \addtogroup sof_uapi uAPI + * SOF uAPI specification. + * @{ + */ + +/* + * IPC messages have a prefixed 32 bit identifier made up as follows :- + * + * 0xGCCCNNNN where + * G is global cmd type (4 bits) + * C is command type (12 bits) + * I is the ID number (16 bits) - monotonic and overflows + * + * This is sent at the start of the IPM message in the mailbox. Messages should + * not be sent in the doorbell (special exceptions for firmware . + */ + +/* Global Message - Generic */ +#define SOF_GLB_TYPE_SHIFT 28 +#define SOF_GLB_TYPE_MASK (0xf << SOF_GLB_TYPE_SHIFT) +#define SOF_GLB_TYPE(x) ((x) << SOF_GLB_TYPE_SHIFT) + +/* Command Message - Generic */ +#define SOF_CMD_TYPE_SHIFT 16 +#define SOF_CMD_TYPE_MASK (0xfff << SOF_CMD_TYPE_SHIFT) +#define SOF_CMD_TYPE(x) ((x) << SOF_CMD_TYPE_SHIFT) + +/* Global Message Types */ +#define SOF_IPC_GLB_REPLY SOF_GLB_TYPE(0x1U) +#define SOF_IPC_GLB_COMPOUND SOF_GLB_TYPE(0x2U) +#define SOF_IPC_GLB_TPLG_MSG SOF_GLB_TYPE(0x3U) +#define SOF_IPC_GLB_PM_MSG SOF_GLB_TYPE(0x4U) +#define SOF_IPC_GLB_COMP_MSG SOF_GLB_TYPE(0x5U) +#define SOF_IPC_GLB_STREAM_MSG SOF_GLB_TYPE(0x6U) +#define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U) +#define SOF_IPC_GLB_DAI_MSG SOF_GLB_TYPE(0x8U) +#define SOF_IPC_GLB_TRACE_MSG SOF_GLB_TYPE(0x9U) + +/* + * DSP Command Message Types + */ + +/* topology */ +#define SOF_IPC_TPLG_COMP_NEW SOF_CMD_TYPE(0x001) +#define SOF_IPC_TPLG_COMP_FREE SOF_CMD_TYPE(0x002) +#define SOF_IPC_TPLG_COMP_CONNECT SOF_CMD_TYPE(0x003) +#define SOF_IPC_TPLG_PIPE_NEW SOF_CMD_TYPE(0x010) +#define SOF_IPC_TPLG_PIPE_FREE SOF_CMD_TYPE(0x011) +#define SOF_IPC_TPLG_PIPE_CONNECT SOF_CMD_TYPE(0x012) +#define SOF_IPC_TPLG_PIPE_COMPLETE SOF_CMD_TYPE(0x013) +#define SOF_IPC_TPLG_BUFFER_NEW SOF_CMD_TYPE(0x020) +#define SOF_IPC_TPLG_BUFFER_FREE SOF_CMD_TYPE(0x021) + +/* PM */ +#define SOF_IPC_PM_CTX_SAVE SOF_CMD_TYPE(0x001) +#define SOF_IPC_PM_CTX_RESTORE SOF_CMD_TYPE(0x002) +#define SOF_IPC_PM_CTX_SIZE SOF_CMD_TYPE(0x003) +#define SOF_IPC_PM_CLK_SET SOF_CMD_TYPE(0x004) +#define SOF_IPC_PM_CLK_GET SOF_CMD_TYPE(0x005) +#define SOF_IPC_PM_CLK_REQ SOF_CMD_TYPE(0x006) +#define SOF_IPC_PM_CORE_ENABLE SOF_CMD_TYPE(0x007) + +/* component runtime config - multiple different types */ +#define SOF_IPC_COMP_SET_VALUE SOF_CMD_TYPE(0x001) +#define SOF_IPC_COMP_GET_VALUE SOF_CMD_TYPE(0x002) +#define SOF_IPC_COMP_SET_DATA SOF_CMD_TYPE(0x003) +#define SOF_IPC_COMP_GET_DATA SOF_CMD_TYPE(0x004) + +/* DAI messages */ +#define SOF_IPC_DAI_CONFIG SOF_CMD_TYPE(0x001) +#define SOF_IPC_DAI_LOOPBACK SOF_CMD_TYPE(0x002) + +/* stream */ +#define SOF_IPC_STREAM_PCM_PARAMS SOF_CMD_TYPE(0x001) +#define SOF_IPC_STREAM_PCM_PARAMS_REPLY SOF_CMD_TYPE(0x002) +#define SOF_IPC_STREAM_PCM_FREE SOF_CMD_TYPE(0x003) +#define SOF_IPC_STREAM_TRIG_START SOF_CMD_TYPE(0x004) +#define SOF_IPC_STREAM_TRIG_STOP SOF_CMD_TYPE(0x005) +#define SOF_IPC_STREAM_TRIG_PAUSE SOF_CMD_TYPE(0x006) +#define SOF_IPC_STREAM_TRIG_RELEASE SOF_CMD_TYPE(0x007) +#define SOF_IPC_STREAM_TRIG_DRAIN SOF_CMD_TYPE(0x008) +#define SOF_IPC_STREAM_TRIG_XRUN SOF_CMD_TYPE(0x009) +#define SOF_IPC_STREAM_POSITION SOF_CMD_TYPE(0x00a) +#define SOF_IPC_STREAM_VORBIS_PARAMS SOF_CMD_TYPE(0x010) +#define SOF_IPC_STREAM_VORBIS_FREE SOF_CMD_TYPE(0x011) + +/* trace and debug */ +#define SOF_IPC_TRACE_DMA_PARAMS SOF_CMD_TYPE(0x001) +#define SOF_IPC_TRACE_DMA_POSITION SOF_CMD_TYPE(0x002) + +/* Get message component id */ +#define SOF_IPC_MESSAGE_ID(x) ((x) & 0xffff) + +/* maximum message size for mailbox Tx/Rx */ +#define SOF_IPC_MSG_MAX_SIZE 384 + +/* + * SOF panic codes + */ +#define SOF_IPC_PANIC_MAGIC 0x0dead000 +#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000 +#define SOF_IPC_PANIC_CODE_MASK 0x00000fff +#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0) +#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1) +#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2) +#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3) +#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4) +#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5) +#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6) +#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7) +#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8) +#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9) +#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa) + +/* + * SOF memory capabilities, add new ones at the end + */ +#define SOF_MEM_CAPS_RAM (1 << 0) +#define SOF_MEM_CAPS_ROM (1 << 1) +#define SOF_MEM_CAPS_EXT (1 << 2) /**< external */ +#define SOF_MEM_CAPS_LP (1 << 3) /**< low power */ +#define SOF_MEM_CAPS_HP (1 << 4) /**< high performance */ +#define SOF_MEM_CAPS_DMA (1 << 5) /**< DMA'able */ +#define SOF_MEM_CAPS_CACHE (1 << 6) /**< cacheable */ +#define SOF_MEM_CAPS_EXEC (1 << 7) /**< executable */ + +/* + * Command Header - Header for all IPC. Identifies IPC message. + * The size can be greater than the structure size and that means there is + * extended bespoke data beyond the end of the structure including variable + * arrays. + */ + +struct sof_ipc_hdr { + uint32_t cmd; /**< SOF_IPC_GLB_ + cmd */ + uint32_t size; /**< size of structure */ +} __packed; + +/* + * Generic reply message. Some commands override this with their own reply + * types that must include this at start. + */ +struct sof_ipc_reply { + struct sof_ipc_hdr hdr; + int32_t error; /**< negative error numbers */ +} __packed; + +/* + * Compound commands - SOF_IPC_GLB_COMPOUND. + * + * Compound commands are sent to the DSP as a single IPC operation. The + * commands are split into blocks and each block has a header. This header + * identifies the command type and the number of commands before the next + * header. + */ + +struct sof_ipc_compound_hdr { + struct sof_ipc_hdr hdr; + uint32_t count; /**< count of 0 means end of compound sequence */ +} __packed; + +/** @}*/ + +#endif diff --git a/include/sound/sof/info.h b/include/sound/sof/info.h new file mode 100644 index 00000000000000..e7c16ac90fa62c --- /dev/null +++ b/include/sound/sof/info.h @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_INFO_H__ +#define __INCLUDE_SOUND_SOF_INFO_H__ + +#include +#include + +/* + * Firmware boot and version + */ + +#define SOF_IPC_MAX_ELEMS 16 + +/* extended data types that can be appended onto end of sof_ipc_fw_ready */ +enum sof_ipc_ext_data { + SOF_IPC_EXT_DMA_BUFFER = 0, + SOF_IPC_EXT_WINDOW, +}; + +/* FW version - SOF_IPC_GLB_VERSION */ +struct sof_ipc_fw_version { + uint16_t major; + uint16_t minor; + uint16_t micro; + uint16_t build; + uint8_t date[12]; + uint8_t time[10]; + uint8_t tag[6]; + uint32_t abi_version; + + /* reserved for future use */ + uint32_t reserved[4]; +} __packed; + +/* FW ready Message - sent by firmware when boot has completed */ +struct sof_ipc_fw_ready { + struct sof_ipc_hdr hdr; + uint32_t dspbox_offset; /* dsp initiated IPC mailbox */ + uint32_t hostbox_offset; /* host initiated IPC mailbox */ + uint32_t dspbox_size; + uint32_t hostbox_size; + struct sof_ipc_fw_version version; + + /* Miscellaneous debug flags showing build/debug features enabled */ + union { + uint64_t reserved; + uint64_t build:1; + uint64_t locks:1; + uint64_t locks_verbose:1; + } debug; + + /* reserved for future use */ + uint32_t reserved[4]; +} __packed; + +/* + * Extended Firmware data. All optional, depends on platform/arch. + */ +enum sof_ipc_region { + SOF_IPC_REGION_DOWNBOX = 0, + SOF_IPC_REGION_UPBOX, + SOF_IPC_REGION_TRACE, + SOF_IPC_REGION_DEBUG, + SOF_IPC_REGION_STREAM, + SOF_IPC_REGION_REGS, + SOF_IPC_REGION_EXCEPTION, +}; + +struct sof_ipc_ext_data_hdr { + struct sof_ipc_hdr hdr; + uint32_t type; /**< SOF_IPC_EXT_ */ +} __packed; + +struct sof_ipc_dma_buffer_elem { + uint32_t type; /**< SOF_IPC_REGION_ */ + uint32_t id; /**< platform specific - used to map to host memory */ + struct sof_ipc_host_buffer buffer; +} __packed; + +/* extended data DMA buffers for IPC, trace and debug */ +struct sof_ipc_dma_buffer_data { + struct sof_ipc_ext_data_hdr ext_hdr; + uint32_t num_buffers; + + /* host files in buffer[n].buffer */ + struct sof_ipc_dma_buffer_elem buffer[]; +} __packed; + +struct sof_ipc_window_elem { + uint32_t type; /**< SOF_IPC_REGION_ */ + uint32_t id; /**< platform specific - used to map to host memory */ + uint32_t flags; /**< R, W, RW, etc - to define */ + uint32_t size; /**< size of region in bytes */ + /* offset in window region as windows can be partitioned */ + uint32_t offset; +} __packed; + +/* extended data memory windows for IPC, trace and debug */ +struct sof_ipc_window { + struct sof_ipc_ext_data_hdr ext_hdr; + uint32_t num_windows; + struct sof_ipc_window_elem window[]; +} __packed; + +#endif diff --git a/include/sound/sof/pm.h b/include/sound/sof/pm.h new file mode 100644 index 00000000000000..76a0529338999a --- /dev/null +++ b/include/sound/sof/pm.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_PM_H__ +#define __INCLUDE_SOUND_SOF_PM_H__ + +#include + +/* + * PM + */ + +/* PM context element */ +struct sof_ipc_pm_ctx_elem { + uint32_t type; + uint32_t size; + uint64_t addr; +} __packed; + +/* + * PM context - SOF_IPC_PM_CTX_SAVE, SOF_IPC_PM_CTX_RESTORE, + * SOF_IPC_PM_CTX_SIZE + */ +struct sof_ipc_pm_ctx { + struct sof_ipc_hdr hdr; + struct sof_ipc_host_buffer buffer; + uint32_t num_elems; + uint32_t size; + + /* reserved for future use */ + uint32_t reserved[8]; + + struct sof_ipc_pm_ctx_elem elems[]; +} __packed; + +/* enable or disable cores - SOF_IPC_PM_CORE_ENABLE */ +struct sof_ipc_pm_core_config { + struct sof_ipc_hdr hdr; + uint32_t enable_mask; +} __packed; + +#endif diff --git a/include/sound/sof/stream.h b/include/sound/sof/stream.h new file mode 100644 index 00000000000000..ce43e1bfdb83ed --- /dev/null +++ b/include/sound/sof/stream.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_STREAM_H__ +#define __INCLUDE_SOUND_SOF_STREAM_H__ + +#include + +/* + * Stream configuration. + */ + +#define SOF_IPC_MAX_CHANNELS 8 + +/* common sample rates for use in masks */ +#define SOF_RATE_8000 (1 << 0) /**< 8000Hz */ +#define SOF_RATE_11025 (1 << 1) /**< 11025Hz */ +#define SOF_RATE_12000 (1 << 2) /**< 12000Hz */ +#define SOF_RATE_16000 (1 << 3) /**< 16000Hz */ +#define SOF_RATE_22050 (1 << 4) /**< 22050Hz */ +#define SOF_RATE_24000 (1 << 5) /**< 24000Hz */ +#define SOF_RATE_32000 (1 << 6) /**< 32000Hz */ +#define SOF_RATE_44100 (1 << 7) /**< 44100Hz */ +#define SOF_RATE_48000 (1 << 8) /**< 48000Hz */ +#define SOF_RATE_64000 (1 << 9) /**< 64000Hz */ +#define SOF_RATE_88200 (1 << 10) /**< 88200Hz */ +#define SOF_RATE_96000 (1 << 11) /**< 96000Hz */ +#define SOF_RATE_176400 (1 << 12) /**< 176400Hz */ +#define SOF_RATE_192000 (1 << 13) /**< 192000Hz */ + +/* continuous and non-standard rates for flexibility */ +#define SOF_RATE_CONTINUOUS (1 << 30) /**< range */ +#define SOF_RATE_KNOT (1 << 31) /**< non-continuous */ + +/* stream PCM frame format */ +enum sof_ipc_frame { + SOF_IPC_FRAME_S16_LE = 0, + SOF_IPC_FRAME_S24_4LE, + SOF_IPC_FRAME_S32_LE, + SOF_IPC_FRAME_FLOAT, + /* other formats here */ +}; + +/* stream buffer format */ +enum sof_ipc_buffer_format { + SOF_IPC_BUFFER_INTERLEAVED, + SOF_IPC_BUFFER_NONINTERLEAVED, + /* other formats here */ +}; + +/* stream direction */ +enum sof_ipc_stream_direction { + SOF_IPC_STREAM_PLAYBACK = 0, + SOF_IPC_STREAM_CAPTURE, +}; + +/* stream ring info */ +struct sof_ipc_host_buffer { + uint32_t phy_addr; + uint32_t pages; + uint32_t size; + uint32_t offset; +} __packed; + +struct sof_ipc_stream_params { + struct sof_ipc_host_buffer buffer; + uint32_t direction; /**< enum sof_ipc_stream_directio */ + uint32_t frame_fmt; /**< enum sof_ipc_frame */ + uint32_t buffer_fmt; /**< enum sof_ipc_buffer_format */ + uint32_t rate; + uint16_t stream_tag; + uint16_t channels; + uint16_t sample_valid_bytes; + uint16_t sample_container_bytes; + + /* for notifying host period has completed - 0 means no period IRQ */ + uint32_t host_period_bytes; + + uint16_t chmap[SOF_IPC_MAX_CHANNELS]; /**< channel map - SOF_CHMAP_ */ +} __packed; + +/* PCM params info - SOF_IPC_STREAM_PCM_PARAMS */ +struct sof_ipc_pcm_params { + struct sof_ipc_hdr hdr; + uint32_t comp_id; + struct sof_ipc_stream_params params; +} __packed; + +/* PCM params info reply - SOF_IPC_STREAM_PCM_PARAMS_REPLY */ +struct sof_ipc_pcm_params_reply { + struct sof_ipc_reply rhdr; + uint32_t comp_id; + uint32_t posn_offset; +} __packed; + +/* free stream - SOF_IPC_STREAM_PCM_PARAMS */ +struct sof_ipc_stream { + struct sof_ipc_hdr hdr; + uint32_t comp_id; +} __packed; + +/* flags indicating which time stamps are in sync with each other */ +#define SOF_TIME_HOST_SYNC (1 << 0) +#define SOF_TIME_DAI_SYNC (1 << 1) +#define SOF_TIME_WALL_SYNC (1 << 2) +#define SOF_TIME_STAMP_SYNC (1 << 3) + +/* flags indicating which time stamps are valid */ +#define SOF_TIME_HOST_VALID (1 << 8) +#define SOF_TIME_DAI_VALID (1 << 9) +#define SOF_TIME_WALL_VALID (1 << 10) +#define SOF_TIME_STAMP_VALID (1 << 11) + +/* flags indicating time stamps are 64bit else 3use low 32bit */ +#define SOF_TIME_HOST_64 (1 << 16) +#define SOF_TIME_DAI_64 (1 << 17) +#define SOF_TIME_WALL_64 (1 << 18) +#define SOF_TIME_STAMP_64 (1 << 19) + +struct sof_ipc_stream_posn { + struct sof_ipc_reply rhdr; + uint32_t comp_id; /**< host component ID */ + uint32_t flags; /**< SOF_TIME_ */ + uint32_t wallclock_hz; /**< frequency of wallclock in Hz */ + uint32_t timestamp_ns; /**< resolution of timestamp in ns */ + uint64_t host_posn; /**< host DMA position in bytes */ + uint64_t dai_posn; /**< DAI DMA position in bytes */ + uint64_t comp_posn; /**< comp position in bytes */ + uint64_t wallclock; /**< audio wall clock */ + uint64_t timestamp; /**< system time stamp */ + uint32_t xrun_comp_id; /**< comp ID of XRUN component */ + int32_t xrun_size; /**< XRUN size in bytes */ +} __packed; + +#endif diff --git a/include/sound/sof/topology.h b/include/sound/sof/topology.h new file mode 100644 index 00000000000000..166ead19bf6d15 --- /dev/null +++ b/include/sound/sof/topology.h @@ -0,0 +1,242 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_TOPOLOGY_H__ +#define __INCLUDE_SOUND_SOF_TOPOLOGY_H__ + +#include + +/* + * Component + */ + +/* types of component */ +enum sof_comp_type { + SOF_COMP_NONE = 0, + SOF_COMP_HOST, + SOF_COMP_DAI, + SOF_COMP_SG_HOST, /**< scatter gather variant */ + SOF_COMP_SG_DAI, /**< scatter gather variant */ + SOF_COMP_VOLUME, + SOF_COMP_MIXER, + SOF_COMP_MUX, + SOF_COMP_SRC, + SOF_COMP_SPLITTER, + SOF_COMP_TONE, + SOF_COMP_SWITCH, + SOF_COMP_BUFFER, + SOF_COMP_EQ_IIR, + SOF_COMP_EQ_FIR, + SOF_COMP_FILEREAD, /**< host test based file IO */ + SOF_COMP_FILEWRITE, /**< host test based file IO */ +}; + +/* XRUN action for component */ +#define SOF_XRUN_STOP 1 /**< stop stream */ +#define SOF_XRUN_UNDER_ZERO 2 /**< send 0s to sink */ +#define SOF_XRUN_OVER_NULL 4 /**< send data to NULL */ + +/* create new generic component - SOF_IPC_TPLG_COMP_NEW */ +struct sof_ipc_comp { + struct sof_ipc_hdr hdr; + uint32_t id; + enum sof_comp_type type; + uint32_t pipeline_id; + + /* reserved for future use */ + uint32_t reserved[2]; +} __packed; + +/* + * Component Buffers + */ + +/* create new component buffer - SOF_IPC_TPLG_BUFFER_NEW */ +struct sof_ipc_buffer { + struct sof_ipc_comp comp; + uint32_t size; /**< buffer size in bytes */ + uint32_t caps; /**< SOF_MEM_CAPS_ */ +} __packed; + +/* generic component config data - must always be after struct sof_ipc_comp */ +struct sof_ipc_comp_config { + uint32_t periods_sink; /**< 0 means variable */ + uint32_t periods_source; /**< 0 means variable */ + uint32_t preload_count; /**< how many periods to preload */ + uint32_t frame_fmt; /**< SOF_IPC_FRAME_ */ + uint32_t xrun_action; + + /* reserved for future use */ + uint32_t reserved[2]; +} __packed; + +/* generic host component */ +struct sof_ipc_comp_host { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + uint32_t direction; /**< SOF_IPC_STREAM_ */ + uint32_t no_irq; /**< don't send periodic IRQ to host/DSP */ + uint32_t dmac_config; /**< DMA engine specific */ +} __packed; + +/* generic DAI component */ +struct sof_ipc_comp_dai { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + uint32_t direction; /**< SOF_IPC_STREAM_ */ + uint32_t dai_index; /**< index of this type dai */ + uint32_t type; /**< DAI type - SOF_DAI_ */ + uint32_t dmac_config; /**< DMA engine specific */ +} __packed; + +/* generic mixer component */ +struct sof_ipc_comp_mixer { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; +} __packed; + +/* volume ramping types */ +enum sof_volume_ramp { + SOF_VOLUME_LINEAR = 0, + SOF_VOLUME_LOG, + SOF_VOLUME_LINEAR_ZC, + SOF_VOLUME_LOG_ZC, +}; + +/* generic volume component */ +struct sof_ipc_comp_volume { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + uint32_t channels; + uint32_t min_value; + uint32_t max_value; + uint32_t ramp; /**< SOF_VOLUME_ */ + uint32_t initial_ramp; /**< ramp space in ms */ +} __packed; + +/* generic SRC component */ +struct sof_ipc_comp_src { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + /* either source or sink rate must be non zero */ + uint32_t source_rate; /**< source rate or 0 for variable */ + uint32_t sink_rate; /**< sink rate or 0 for variable */ + uint32_t rate_mask; /**< SOF_RATE_ supported rates */ +} __packed; + +/* generic MUX component */ +struct sof_ipc_comp_mux { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; +} __packed; + +/* generic tone generator component */ +struct sof_ipc_comp_tone { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + int32_t sample_rate; + int32_t frequency; + int32_t amplitude; + int32_t freq_mult; + int32_t ampl_mult; + int32_t length; + int32_t period; + int32_t repeats; + int32_t ramp_step; +} __packed; + +/** \brief Types of EFFECT */ +enum sof_ipc_effect_type { + SOF_EFFECT_NONE = 0, /**< None */ + SOF_EFFECT_INTEL_EQFIR, /**< Intel FIR */ + SOF_EFFECT_INTEL_EQIIR, /**< Intel IIR */ +}; + +/* general purpose EFFECT configuration */ +struct sof_ipc_comp_effect { + uint32_t type; /** sof_ipc_effect_type */ +} __packed; + +/* FIR equalizer component */ +struct sof_ipc_comp_eq_fir { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + uint32_t size; + + /* reserved for future use */ + uint32_t reserved[8]; + + unsigned char data[0]; +} __packed; + +/* IIR equalizer component */ +struct sof_ipc_comp_eq_iir { + struct sof_ipc_comp comp; + struct sof_ipc_comp_config config; + uint32_t size; + + /* reserved for future use */ + uint32_t reserved[8]; + + unsigned char data[0]; +} __packed; + +/* frees components, buffers and pipelines + * SOF_IPC_TPLG_COMP_FREE, SOF_IPC_TPLG_PIPE_FREE, SOF_IPC_TPLG_BUFFER_FREE + */ +struct sof_ipc_free { + struct sof_ipc_hdr hdr; + uint32_t id; +} __packed; + +struct sof_ipc_comp_reply { + struct sof_ipc_reply rhdr; + uint32_t id; + uint32_t offset; +} __packed; + +/* + * Pipeline + */ + +/* new pipeline - SOF_IPC_TPLG_PIPE_NEW */ +struct sof_ipc_pipe_new { + struct sof_ipc_hdr hdr; + uint32_t comp_id; /**< component id for pipeline */ + uint32_t pipeline_id; /**< pipeline id */ + uint32_t sched_id; /**< sheduling component id */ + uint32_t core; /**< core we run on */ + uint32_t deadline; /**< execution completion deadline in us*/ + uint32_t priority; /**< priority level 0 (low) to 10 (max) */ + uint32_t period_mips; /**< worst case instruction count per period */ + uint32_t frames_per_sched;/**< output frames of pipeline, 0 is variable */ + uint32_t xrun_limit_usecs; /**< report xruns greater than limit */ + + /* non zero if timer scheduled, otherwise DAI DMA irq scheduled */ + uint32_t timer_delay; +} __packed; + +/* pipeline construction complete - SOF_IPC_TPLG_PIPE_COMPLETE */ +struct sof_ipc_pipe_ready { + struct sof_ipc_hdr hdr; + uint32_t comp_id; +} __packed; + +struct sof_ipc_pipe_free { + struct sof_ipc_hdr hdr; + uint32_t comp_id; +} __packed; + +/* connect two components in pipeline - SOF_IPC_TPLG_COMP_CONNECT */ +struct sof_ipc_pipe_comp_connect { + struct sof_ipc_hdr hdr; + uint32_t source_id; + uint32_t sink_id; +} __packed; + +#endif diff --git a/include/sound/sof/trace.h b/include/sound/sof/trace.h new file mode 100644 index 00000000000000..7493059d6ef0be --- /dev/null +++ b/include/sound/sof/trace.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_TRACE_H__ +#define __INCLUDE_SOUND_SOF_TRACE_H__ + +#include +#include + +/* + * DMA for Trace + */ + +#define SOF_TRACE_FILENAME_SIZE 32 + +/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */ +struct sof_ipc_dma_trace_params { + struct sof_ipc_hdr hdr; + struct sof_ipc_host_buffer buffer; + uint32_t stream_tag; +} __packed; + +/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */ +struct sof_ipc_dma_trace_posn { + struct sof_ipc_reply rhdr; + uint32_t host_offset; /* Offset of DMA host buffer */ + uint32_t overflow; /* overflow bytes if any */ + uint32_t messages; /* total trace messages */ +} __packed; + +/* + * Commom debug + */ + +/* panic info include filename and line number */ +struct sof_ipc_panic_info { + char filename[SOF_TRACE_FILENAME_SIZE]; + uint32_t linenum; +} __packed; + +#endif diff --git a/include/sound/sof/xtensa.h b/include/sound/sof/xtensa.h new file mode 100644 index 00000000000000..e7c36a5c667d2d --- /dev/null +++ b/include/sound/sof/xtensa.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_SOUND_SOF_XTENSA_H__ +#define __INCLUDE_SOUND_SOF_XTENSA_H__ + +/* + * Architecture specific debug + */ + +/* Xtensa Firmware Oops data */ +struct sof_ipc_dsp_oops_xtensa { + uint32_t exccause; + uint32_t excvaddr; + uint32_t ps; + uint32_t epc1; + uint32_t epc2; + uint32_t epc3; + uint32_t epc4; + uint32_t epc5; + uint32_t epc6; + uint32_t epc7; + uint32_t eps2; + uint32_t eps3; + uint32_t eps4; + uint32_t eps5; + uint32_t eps6; + uint32_t eps7; + uint32_t depc; + uint32_t intenable; + uint32_t interrupt; + uint32_t sar; + uint32_t stack; +} __packed; + +#endif diff --git a/include/uapi/sound/sof-abi.h b/include/uapi/sound/sof-abi.h deleted file mode 100644 index 88c61f8c2a4a7a..00000000000000 --- a/include/uapi/sound/sof-abi.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * Copyright(c) 2018 Intel Corporation. All rights reserved. - */ - -#ifndef __INCLUDE_UAPI_ABI_H__ -#define __INCLUDE_UAPI_ABI_H__ - -#define SOF_ABI_VER(major, minor, micro) \ - (((major) << 8) | ((minor) << 4) | (micro)) -#define SOF_ABI_VERSION_MAJOR(version) (((version) >> 8) & 0xff) -#define SOF_ABI_VERSION_MINOR(version) (((version) >> 4) & 0xf) -#define SOF_ABI_VERSION_MICRO(version) ((version) & 0xf) -#define SOF_ABI_VERSION_INCOMPATIBLE(sof_ver, client_ver) \ - (SOF_ABI_VERSION_MAJOR((sof_ver)) != \ - SOF_ABI_VERSION_MAJOR((client_ver)) || \ - ( \ - SOF_ABI_VERSION_MAJOR((sof_ver)) == \ - SOF_ABI_VERSION_MAJOR((client_ver)) && \ - SOF_ABI_VERSION_MINOR((sof_ver)) != \ - SOF_ABI_VERSION_MINOR((client_ver)) \ - ) \ - ) - -#define SOF_ABI_MAJOR 1 -#define SOF_ABI_MINOR 0 -#define SOF_ABI_MICRO 0 - -#define SOF_ABI_VERSION SOF_ABI_VER(SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_MICRO) - -#define SOF_ABI_MAGIC 0x00464F53 /* "SOF\0" */ - -/* - * Header for all non IPC ABI data. Identifies data type, size and ABI. - * Used by any bespoke component data structures or binary blobs. - */ - -struct sof_abi_hdr { - uint32_t magic; /* 'S', 'O', 'F', '\0' */ - uint32_t type; /* component specific type */ - uint32_t size; /* size in bytes of data excluding this struct */ - uint32_t abi; /* SOF ABI version */ - uint32_t comp_abi; /* component specific ABI version */ - char data[0]; -} __attribute__((packed)); - -#endif diff --git a/include/uapi/sound/sof-ipc.h b/include/uapi/sound/sof-ipc.h deleted file mode 100644 index 5b042079ea9595..00000000000000 --- a/include/uapi/sound/sof-ipc.h +++ /dev/null @@ -1,991 +0,0 @@ -/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ - -/* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * Copyright(c) 2018 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - */ - -#ifndef __INCLUDE_UAPI_SOF_IPC_H__ -#define __INCLUDE_UAPI_SOF_IPC_H__ - -#include - -/* - * IPC messages have a prefixed 32 bit identifier made up as follows :- - * - * 0xGCCCNNNN where - * G is global cmd type (4 bits) - * C is command type (12 bits) - * I is the ID number (16 bits) - monotonic and overflows - * - * This is sent at the start of the IPM message in the mailbox. Messages should - * not be sent in the doorbell (special exceptions for firmware . - */ - -/* Global Message - Generic */ -#define SOF_GLB_TYPE_SHIFT 28 -#define SOF_GLB_TYPE_MASK (0xf << SOF_GLB_TYPE_SHIFT) -#define SOF_GLB_TYPE(x) ((x) << SOF_GLB_TYPE_SHIFT) - -/* Command Message - Generic */ -#define SOF_CMD_TYPE_SHIFT 16 -#define SOF_CMD_TYPE_MASK (0xfff << SOF_CMD_TYPE_SHIFT) -#define SOF_CMD_TYPE(x) ((x) << SOF_CMD_TYPE_SHIFT) - -/* Global Message Types */ -#define SOF_IPC_GLB_REPLY SOF_GLB_TYPE(0x1U) -#define SOF_IPC_GLB_COMPOUND SOF_GLB_TYPE(0x2U) -#define SOF_IPC_GLB_TPLG_MSG SOF_GLB_TYPE(0x3U) -#define SOF_IPC_GLB_PM_MSG SOF_GLB_TYPE(0x4U) -#define SOF_IPC_GLB_COMP_MSG SOF_GLB_TYPE(0x5U) -#define SOF_IPC_GLB_STREAM_MSG SOF_GLB_TYPE(0x6U) -#define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U) -#define SOF_IPC_GLB_DAI_MSG SOF_GLB_TYPE(0x8U) -#define SOF_IPC_GLB_TRACE_MSG SOF_GLB_TYPE(0x9U) - -/* - * DSP Command Message Types - */ - -/* topology */ -#define SOF_IPC_TPLG_COMP_NEW SOF_CMD_TYPE(0x001) -#define SOF_IPC_TPLG_COMP_FREE SOF_CMD_TYPE(0x002) -#define SOF_IPC_TPLG_COMP_CONNECT SOF_CMD_TYPE(0x003) -#define SOF_IPC_TPLG_PIPE_NEW SOF_CMD_TYPE(0x010) -#define SOF_IPC_TPLG_PIPE_FREE SOF_CMD_TYPE(0x011) -#define SOF_IPC_TPLG_PIPE_CONNECT SOF_CMD_TYPE(0x012) -#define SOF_IPC_TPLG_PIPE_COMPLETE SOF_CMD_TYPE(0x013) -#define SOF_IPC_TPLG_BUFFER_NEW SOF_CMD_TYPE(0x020) -#define SOF_IPC_TPLG_BUFFER_FREE SOF_CMD_TYPE(0x021) - -/* PM */ -#define SOF_IPC_PM_CTX_SAVE SOF_CMD_TYPE(0x001) -#define SOF_IPC_PM_CTX_RESTORE SOF_CMD_TYPE(0x002) -#define SOF_IPC_PM_CTX_SIZE SOF_CMD_TYPE(0x003) -#define SOF_IPC_PM_CLK_SET SOF_CMD_TYPE(0x004) -#define SOF_IPC_PM_CLK_GET SOF_CMD_TYPE(0x005) -#define SOF_IPC_PM_CLK_REQ SOF_CMD_TYPE(0x006) -#define SOF_IPC_PM_CORE_ENABLE SOF_CMD_TYPE(0x007) - -/* component runtime config - multiple different types */ -#define SOF_IPC_COMP_SET_VALUE SOF_CMD_TYPE(0x001) -#define SOF_IPC_COMP_GET_VALUE SOF_CMD_TYPE(0x002) -#define SOF_IPC_COMP_SET_DATA SOF_CMD_TYPE(0x003) -#define SOF_IPC_COMP_GET_DATA SOF_CMD_TYPE(0x004) - -/* DAI messages */ -#define SOF_IPC_DAI_CONFIG SOF_CMD_TYPE(0x001) -#define SOF_IPC_DAI_LOOPBACK SOF_CMD_TYPE(0x002) - -/* stream */ -#define SOF_IPC_STREAM_PCM_PARAMS SOF_CMD_TYPE(0x001) -#define SOF_IPC_STREAM_PCM_PARAMS_REPLY SOF_CMD_TYPE(0x002) -#define SOF_IPC_STREAM_PCM_FREE SOF_CMD_TYPE(0x003) -#define SOF_IPC_STREAM_TRIG_START SOF_CMD_TYPE(0x004) -#define SOF_IPC_STREAM_TRIG_STOP SOF_CMD_TYPE(0x005) -#define SOF_IPC_STREAM_TRIG_PAUSE SOF_CMD_TYPE(0x006) -#define SOF_IPC_STREAM_TRIG_RELEASE SOF_CMD_TYPE(0x007) -#define SOF_IPC_STREAM_TRIG_DRAIN SOF_CMD_TYPE(0x008) -#define SOF_IPC_STREAM_TRIG_XRUN SOF_CMD_TYPE(0x009) -#define SOF_IPC_STREAM_POSITION SOF_CMD_TYPE(0x00a) -#define SOF_IPC_STREAM_VORBIS_PARAMS SOF_CMD_TYPE(0x010) -#define SOF_IPC_STREAM_VORBIS_FREE SOF_CMD_TYPE(0x011) - -/* trace and debug */ -#define SOF_IPC_TRACE_DMA_PARAMS SOF_CMD_TYPE(0x001) -#define SOF_IPC_TRACE_DMA_POSITION SOF_CMD_TYPE(0x002) - -/* Get message component id */ -#define SOF_IPC_MESSAGE_ID(x) ((x) & 0xffff) - -/* maximum message size for mailbox Tx/Rx */ -#define SOF_IPC_MSG_MAX_SIZE 384 - -/* - * SOF panic codes - */ -#define SOF_IPC_PANIC_MAGIC 0x0dead000 -#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000 -#define SOF_IPC_PANIC_CODE_MASK 0x00000fff -#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0) -#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1) -#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2) -#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3) -#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4) -#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5) -#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6) -#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7) -#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8) -#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9) -#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa) - -/* - * SOF memory capabilities, add new ones at the end - */ -#define SOF_MEM_CAPS_RAM (1 << 0) -#define SOF_MEM_CAPS_ROM (1 << 1) -#define SOF_MEM_CAPS_EXT (1 << 2) /* external */ -#define SOF_MEM_CAPS_LP (1 << 3) /* low power */ -#define SOF_MEM_CAPS_HP (1 << 4) /* high performance */ -#define SOF_MEM_CAPS_DMA (1 << 5) /* DMA'able */ -#define SOF_MEM_CAPS_CACHE (1 << 6) /* cacheable */ -#define SOF_MEM_CAPS_EXEC (1 << 7) /* executable */ - -/* - * Command Header - Header for all IPC. Identifies IPC message. - * The size can be greater than the structure size and that means there is - * extended bespoke data beyond the end of the structure including variable - * arrays. - */ - -struct sof_ipc_hdr { - uint32_t cmd; /* SOF_IPC_GLB_ + cmd */ - uint32_t size; /* size of structure */ -} __attribute__((packed)); - -/* - * Generic reply message. Some commands override this with their own reply - * types that must include this at start. - */ -struct sof_ipc_reply { - struct sof_ipc_hdr hdr; - int32_t error; /* negative error numbers */ -} __attribute__((packed)); - -/* - * Compound commands - SOF_IPC_GLB_COMPOUND. - * - * Compound commands are sent to the DSP as a single IPC operation. The - * commands are split into blocks and each block has a header. This header - * identifies the command type and the number of commands before the next - * header. - */ - -struct sof_ipc_compound_hdr { - struct sof_ipc_hdr hdr; - uint32_t count; /* count of 0 means end of compound sequence */ -} __attribute__((packed)); - -/* - * DAI Configuration. - * - * Each different DAI type will have it's own structure and IPC cmd. - */ - -#define SOF_DAI_FMT_I2S 1 /* I2S mode */ -#define SOF_DAI_FMT_RIGHT_J 2 /* Right Justified mode */ -#define SOF_DAI_FMT_LEFT_J 3 /* Left Justified mode */ -#define SOF_DAI_FMT_DSP_A 4 /* L data MSB after FRM LRC */ -#define SOF_DAI_FMT_DSP_B 5 /* L data MSB during FRM LRC */ -#define SOF_DAI_FMT_PDM 6 /* Pulse density modulation */ - -#define SOF_DAI_FMT_CONT (1 << 4) /* continuous clock */ -#define SOF_DAI_FMT_GATED (0 << 4) /* clock is gated */ - -#define SOF_DAI_FMT_NB_NF (0 << 8) /* normal bit clock + frame */ -#define SOF_DAI_FMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */ -#define SOF_DAI_FMT_IB_NF (3 << 8) /* invert BCLK + nor FRM */ -#define SOF_DAI_FMT_IB_IF (4 << 8) /* invert BCLK + FRM */ - -#define SOF_DAI_FMT_CBM_CFM (0 << 12) /* codec clk & FRM master */ -#define SOF_DAI_FMT_CBS_CFM (2 << 12) /* codec clk slave & FRM master */ -#define SOF_DAI_FMT_CBM_CFS (3 << 12) /* codec clk master & frame slave */ -#define SOF_DAI_FMT_CBS_CFS (4 << 12) /* codec clk & FRM slave */ - -#define SOF_DAI_FMT_FORMAT_MASK 0x000f -#define SOF_DAI_FMT_CLOCK_MASK 0x00f0 -#define SOF_DAI_FMT_INV_MASK 0x0f00 -#define SOF_DAI_FMT_MASTER_MASK 0xf000 - - /* ssc1: TINTE */ -#define SOF_DAI_INTEL_SSP_QUIRK_TINTE (1 << 0) - /* ssc1: PINTE */ -#define SOF_DAI_INTEL_SSP_QUIRK_PINTE (1 << 1) - /* ssc2: SMTATF */ -#define SOF_DAI_INTEL_SSP_QUIRK_SMTATF (1 << 2) - /* ssc2: MMRATF */ -#define SOF_DAI_INTEL_SSP_QUIRK_MMRATF (1 << 3) - /* ssc2: PSPSTWFDFD */ -#define SOF_DAI_INTEL_SSP_QUIRK_PSPSTWFDFD (1 << 4) - /* ssc2: PSPSRWFDFD */ -#define SOF_DAI_INTEL_SSP_QUIRK_PSPSRWFDFD (1 << 5) - /* here is the possibility to define others aux macros */ - -#define SOF_DAI_INTEL_SSP_FRAME_PULSE_WIDTH_MAX 38 -#define SOF_DAI_INTEL_SSP_SLOT_PADDING_MAX 31 - -/* SSP clocks control settings - * - * Macros for clks_control field in sof_ipc_dai_ssp_params struct. - */ - -/* mclk 0 disable */ -#define SOF_DAI_INTEL_SSP_MCLK_0_DISABLE BIT(0) -/* mclk 1 disable */ -#define SOF_DAI_INTEL_SSP_MCLK_1_DISABLE BIT(1) -/* mclk keep active */ -#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_KA BIT(2) -/* bclk keep active */ -#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_KA BIT(3) -/* fs keep active */ -#define SOF_DAI_INTEL_SSP_CLKCTRL_FS_KA BIT(4) -/* bclk idle */ -#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_IDLE_HIGH BIT(5) - -/** \brief Types of DAI */ -enum sof_ipc_dai_type { - SOF_DAI_INTEL_NONE = 0, /**< None */ - SOF_DAI_INTEL_SSP, /**< Intel SSP */ - SOF_DAI_INTEL_DMIC, /**< Intel DMIC */ - SOF_DAI_INTEL_HDA, /**< Intel HD/A */ -}; - -/* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */ -struct sof_ipc_dai_ssp_params { - uint16_t mode; // FIXME: do we need this? - uint16_t mclk_id; - - uint32_t mclk_rate; /* mclk frequency in Hz */ - uint32_t fsync_rate; /* fsync frequency in Hz */ - uint32_t bclk_rate; /* bclk frequency in Hz */ - - /* TDM */ - uint32_t tdm_slots; - uint32_t rx_slots; - uint32_t tx_slots; - - /* data */ - uint32_t sample_valid_bits; - uint16_t tdm_slot_width; - uint16_t reserved2; /* alignment */ - - /* MCLK */ - uint32_t mclk_direction; - - uint16_t frame_pulse_width; - uint16_t tdm_per_slot_padding_flag; - uint32_t clks_control; - uint32_t quirks; // FIXME: is 32 bits enough ? - /* private data, e.g. for quirks */ - //uint32_t pdata[10]; // FIXME: would really need ~16 u32 -} __attribute__((packed)); - -/* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */ -struct sof_ipc_dai_hda_params { - struct sof_ipc_hdr hdr; - /* TODO */ -} __attribute__((packed)); - -/* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */ - -/* This struct is defined per 2ch PDM controller available in the platform. - * Normally it is sufficient to set the used microphone specific enables to 1 - * and keep other parameters as zero. The customizations are: - * - * 1. If a device mixes different microphones types with different polarity - * and/or the absolute polarity matters the PCM signal from a microphone - * can be inverted with the controls. - * - * 2. If the microphones in a stereo pair do not appear in captured stream - * in desired order due to board schematics choises they can be swapped with - * the clk_edge parameter. - * - * 3. If PDM bit errors are seen in capture (poor quality) the skew parameter - * that delays the sampling time of data by half cycles of DMIC source clock - * can be tried for improvement. However there is no guarantee for this to fix - * data integrity problems. - */ -struct sof_ipc_dai_dmic_pdm_ctrl { - uint16_t id; /* PDM controller ID */ - uint16_t enable_mic_a; /* Use A (left) channel mic (0 or 1)*/ - uint16_t enable_mic_b; /* Use B (right) channel mic (0 or 1)*/ - uint16_t polarity_mic_a; /* Optionally invert mic A signal (0 or 1) */ - uint16_t polarity_mic_b; /* Optionally invert mic B signal (0 or 1) */ - uint16_t clk_edge; /* Optionally swap data clock edge (0 or 1) */ - uint16_t skew; /* Adjust PDM data sampling vs. clock (0..15) */ - uint16_t pad; /* Make sure the total size is 4 bytes aligned */ -} __attribute__((packed)); - -/* This struct contains the global settings for all 2ch PDM controllers. The - * version number used in configuration data is checked vs. version used by - * device driver src/drivers/dmic.c need to match. It is incremented from - * initial value 1 if updates done for the to driver would alter the operation - * of the microhone. - * - * Note: The microphone clock (pdmclk_min, pdmclk_max, duty_min, duty_max) - * parameters need to be set as defined in microphone data sheet. E.g. clock - * range 1.0 - 3.2 MHz is usually supported microphones. Some microphones are - * multi-mode capable and there may be denied mic clock frequencies between - * the modes. In such case set the clock range limits of the desired mode to - * avoid the driver to set clock to an illegal rate. - * - * The duty cycle could be set to 48-52% if not known. Generally these - * parameters can be altered within data sheet specified limits to match - * required audio application performance power. - * - * The microphone clock needs to be usually about 50-80 times the used audio - * sample rate. With highest sample rates above 48 kHz this can relaxed - * somewhat. - */ -struct sof_ipc_dai_dmic_params { - uint32_t driver_ipc_version; /* Version (1..N) */ - uint32_t pdmclk_min; /* Minimum microphone clock in Hz (100000..N) */ - uint32_t pdmclk_max; /* Maximum microphone clock in Hz (min...N) */ - uint32_t fifo_fs_a; /* FIFO A sample rate in Hz (8000..96000) */ - uint32_t fifo_fs_b; /* FIFO B sample rate in Hz (8000..96000) */ - uint16_t fifo_bits_a; /* FIFO A word length (16 or 32) */ - uint16_t fifo_bits_b; /* FIFO B word length (16 or 32) */ - uint16_t duty_min; /* Min. mic clock duty cycle in % (20..80) */ - uint16_t duty_max; /* Max. mic clock duty cycle in % (min..80) */ - uint32_t num_pdm_active; /* Number of active pdm controllers */ - /* variable number of pdm controller config */ - struct sof_ipc_dai_dmic_pdm_ctrl pdm[0]; -} __attribute__((packed)); - -/* general purpose DAI configuration */ -struct sof_ipc_dai_config { - struct sof_ipc_hdr hdr; - enum sof_ipc_dai_type type; - uint32_t dai_index; /* index of this type dai */ - - /* physical protocol and clocking */ - uint16_t format; /* SOF_DAI_FMT_ */ - uint16_t reserved; /* alignment */ - - /* HW specific data */ - union { - struct sof_ipc_dai_ssp_params ssp; - struct sof_ipc_dai_hda_params hda; - struct sof_ipc_dai_dmic_params dmic; - }; -}; - -/* - * Stream configuration. - */ - -#define SOF_IPC_MAX_CHANNELS 8 - -/* channel positions - uses same values as ALSA */ -enum sof_ipc_chmap { - SOF_CHMAP_UNKNOWN = 0, - SOF_CHMAP_NA, /* N/A, silent */ - SOF_CHMAP_MONO, /* mono stream */ - SOF_CHMAP_FL, /* front left */ - SOF_CHMAP_FR, /* front right */ - SOF_CHMAP_RL, /* rear left */ - SOF_CHMAP_RR, /* rear right */ - SOF_CHMAP_FC, /* front centre */ - SOF_CHMAP_LFE, /* LFE */ - SOF_CHMAP_SL, /* side left */ - SOF_CHMAP_SR, /* side right */ - SOF_CHMAP_RC, /* rear centre */ - SOF_CHMAP_FLC, /* front left centre */ - SOF_CHMAP_FRC, /* front right centre */ - SOF_CHMAP_RLC, /* rear left centre */ - SOF_CHMAP_RRC, /* rear right centre */ - SOF_CHMAP_FLW, /* front left wide */ - SOF_CHMAP_FRW, /* front right wide */ - SOF_CHMAP_FLH, /* front left high */ - SOF_CHMAP_FCH, /* front centre high */ - SOF_CHMAP_FRH, /* front right high */ - SOF_CHMAP_TC, /* top centre */ - SOF_CHMAP_TFL, /* top front left */ - SOF_CHMAP_TFR, /* top front right */ - SOF_CHMAP_TFC, /* top front centre */ - SOF_CHMAP_TRL, /* top rear left */ - SOF_CHMAP_TRR, /* top rear right */ - SOF_CHMAP_TRC, /* top rear centre */ - SOF_CHMAP_TFLC, /* top front left centre */ - SOF_CHMAP_TFRC, /* top front right centre */ - SOF_CHMAP_TSL, /* top side left */ - SOF_CHMAP_TSR, /* top side right */ - SOF_CHMAP_LLFE, /* left LFE */ - SOF_CHMAP_RLFE, /* right LFE */ - SOF_CHMAP_BC, /* bottom centre */ - SOF_CHMAP_BLC, /* bottom left centre */ - SOF_CHMAP_BRC, /* bottom right centre */ - SOF_CHMAP_LAST = SOF_CHMAP_BRC, -}; - -/* common sample rates for use in masks */ -#define SOF_RATE_8000 (1 << 0) /* 8000Hz */ -#define SOF_RATE_11025 (1 << 1) /* 11025Hz */ -#define SOF_RATE_12000 (1 << 2) /* 12000Hz */ -#define SOF_RATE_16000 (1 << 3) /* 16000Hz */ -#define SOF_RATE_22050 (1 << 4) /* 22050Hz */ -#define SOF_RATE_24000 (1 << 5) /* 24000Hz */ -#define SOF_RATE_32000 (1 << 6) /* 32000Hz */ -#define SOF_RATE_44100 (1 << 7) /* 44100Hz */ -#define SOF_RATE_48000 (1 << 8) /* 48000Hz */ -#define SOF_RATE_64000 (1 << 9) /* 64000Hz */ -#define SOF_RATE_88200 (1 << 10) /* 88200Hz */ -#define SOF_RATE_96000 (1 << 11) /* 96000Hz */ -#define SOF_RATE_176400 (1 << 12) /* 176400Hz */ -#define SOF_RATE_192000 (1 << 13) /* 192000Hz */ - -/* continuous and non-standard rates for flexibility */ -#define SOF_RATE_CONTINUOUS (1 << 30) /* range */ -#define SOF_RATE_KNOT (1 << 31) /* non-continuous */ - -/* stream PCM frame format */ -enum sof_ipc_frame { - SOF_IPC_FRAME_S16_LE = 0, - SOF_IPC_FRAME_S24_4LE, - SOF_IPC_FRAME_S32_LE, - SOF_IPC_FRAME_FLOAT, - /* other formats here */ -}; - -/* stream buffer format */ -enum sof_ipc_buffer_format { - SOF_IPC_BUFFER_INTERLEAVED, - SOF_IPC_BUFFER_NONINTERLEAVED, - /* other formats here */ -}; - -/* stream direction */ -enum sof_ipc_stream_direction { - SOF_IPC_STREAM_PLAYBACK = 0, - SOF_IPC_STREAM_CAPTURE, -}; - -/* stream ring info */ -struct sof_ipc_host_buffer { - uint32_t phy_addr; - uint32_t pages; - uint32_t size; - uint32_t offset; -} __attribute__((packed)); - -struct sof_ipc_stream_params { - struct sof_ipc_host_buffer buffer; - enum sof_ipc_stream_direction direction; - enum sof_ipc_frame frame_fmt; - enum sof_ipc_buffer_format buffer_fmt; - uint32_t stream_tag; - uint32_t rate; - uint32_t channels; - uint32_t sample_valid_bytes; - uint32_t sample_container_bytes; - /* for notifying host period has completed - 0 means no period IRQ */ - uint32_t host_period_bytes; - enum sof_ipc_chmap chmap[SOF_IPC_MAX_CHANNELS]; /* channel map */ -} __attribute__((packed)); - -/* PCM params info - SOF_IPC_STREAM_PCM_PARAMS */ -struct sof_ipc_pcm_params { - struct sof_ipc_hdr hdr; - uint32_t comp_id; - struct sof_ipc_stream_params params; -} __attribute__((packed)); - -/* PCM params info reply - SOF_IPC_STREAM_PCM_PARAMS_REPLY */ -struct sof_ipc_pcm_params_reply { - struct sof_ipc_reply rhdr; - uint32_t comp_id; - uint32_t posn_offset; -} __attribute__((packed)); - -/* compressed vorbis params - SOF_IPC_STREAM_VORBIS_PARAMS */ -struct sof_ipc_vorbis_params { - struct sof_ipc_hdr hdr; - uint32_t comp_id; - struct sof_ipc_stream_params params; - /* TODO */ -} __attribute__((packed)); - -/* free stream - SOF_IPC_STREAM_PCM_PARAMS */ -struct sof_ipc_stream { - struct sof_ipc_hdr hdr; - uint32_t comp_id; -} __attribute__((packed)); - -/* flags indicating which time stamps are in sync with each other */ -#define SOF_TIME_HOST_SYNC (1 << 0) -#define SOF_TIME_DAI_SYNC (1 << 1) -#define SOF_TIME_WALL_SYNC (1 << 2) -#define SOF_TIME_STAMP_SYNC (1 << 3) - -/* flags indicating which time stamps are valid */ -#define SOF_TIME_HOST_VALID (1 << 8) -#define SOF_TIME_DAI_VALID (1 << 9) -#define SOF_TIME_WALL_VALID (1 << 10) -#define SOF_TIME_STAMP_VALID (1 << 11) - -/* flags indicating time stamps are 64bit else 3use low 32bit */ -#define SOF_TIME_HOST_64 (1 << 16) -#define SOF_TIME_DAI_64 (1 << 17) -#define SOF_TIME_WALL_64 (1 << 18) -#define SOF_TIME_STAMP_64 (1 << 19) - -struct sof_ipc_stream_posn { - struct sof_ipc_reply rhdr; - uint32_t comp_id; /* host component ID */ - uint32_t flags; /* SOF_TIME_ */ - uint32_t wallclock_hz; /* frequency of wallclock in Hz */ - uint32_t timestamp_ns; /* resolution of timestamp in ns */ - uint64_t host_posn; /* host DMA position in bytes */ - uint64_t dai_posn; /* DAI DMA position in bytes */ - uint64_t comp_posn; /* comp position in bytes */ - uint64_t wallclock; /* audio wall clock */ - uint64_t timestamp; /* system time stamp */ - uint32_t xrun_comp_id; /* comp ID of XRUN component */ - int32_t xrun_size; /* XRUN size in bytes */ -} __attribute__((packed)); - -/* - * Component Mixers and Controls - */ - -/* control data type and direction */ -enum sof_ipc_ctrl_type { - /* per channel data - uses struct sof_ipc_ctrl_value_chan */ - SOF_CTRL_TYPE_VALUE_CHAN_GET = 0, - SOF_CTRL_TYPE_VALUE_CHAN_SET, - /* component data - uses struct sof_ipc_ctrl_value_comp */ - SOF_CTRL_TYPE_VALUE_COMP_GET, - SOF_CTRL_TYPE_VALUE_COMP_SET, - /* bespoke data - struct struct sof_abi_hdr */ - SOF_CTRL_TYPE_DATA_GET, - SOF_CTRL_TYPE_DATA_SET, -}; - -/* control command type */ -enum sof_ipc_ctrl_cmd { - SOF_CTRL_CMD_VOLUME = 0, /* maps to ALSA volume style controls */ - SOF_CTRL_CMD_ENUM, /* maps to ALSA enum style controls */ - SOF_CTRL_CMD_SWITCH, /* maps to ALSA switch style controls */ - SOF_CTRL_CMD_BINARY, /* maps to ALSA binary style controls */ -}; - -/* generic channel mapped value data */ -struct sof_ipc_ctrl_value_chan { - enum sof_ipc_chmap channel; - uint32_t value; -} __attribute__((packed)); - -/* generic component mapped value data */ -struct sof_ipc_ctrl_value_comp { - uint32_t index; /* component source/sink/control index in control */ - union { - uint32_t uvalue; - int32_t svalue; - }; -} __attribute__((packed)); - -/* generic control data */ -struct sof_ipc_ctrl_data { - struct sof_ipc_reply rhdr; - uint32_t comp_id; - - /* control access and data type */ - enum sof_ipc_ctrl_type type; - enum sof_ipc_ctrl_cmd cmd; - uint32_t index; /* control index for comps > 1 control */ - - /* control data - can either be appended or DMAed from host */ - struct sof_ipc_host_buffer buffer; - uint32_t num_elems; /* in array elems or bytes */ - - /* control data - add new types if needed */ - union { - /* channel values can be used by volume type controls */ - struct sof_ipc_ctrl_value_chan chanv[0]; - /* component values used by routing controls like mux, mixer */ - struct sof_ipc_ctrl_value_comp compv[0]; - /* data can be used by binary controls */ - struct sof_abi_hdr data[0]; - }; -} __attribute__((packed)); - -/* - * Component - */ - -/* types of component */ -enum sof_comp_type { - SOF_COMP_NONE = 0, - SOF_COMP_HOST, - SOF_COMP_DAI, - SOF_COMP_SG_HOST, /* scatter gather variant */ - SOF_COMP_SG_DAI, /* scatter gather variant */ - SOF_COMP_VOLUME, - SOF_COMP_MIXER, - SOF_COMP_MUX, - SOF_COMP_SRC, - SOF_COMP_SPLITTER, - SOF_COMP_TONE, - SOF_COMP_SWITCH, - SOF_COMP_BUFFER, - SOF_COMP_EQ_IIR, - SOF_COMP_EQ_FIR, - SOF_COMP_FILEREAD, /* host test based file IO */ - SOF_COMP_FILEWRITE, /* host test based file IO */ -}; - -/* XRUN action for component */ -#define SOF_XRUN_STOP 1 /* stop stream */ -#define SOF_XRUN_UNDER_ZERO 2 /* send 0s to sink */ -#define SOF_XRUN_OVER_NULL 4 /* send data to NULL */ - -/* create new generic component - SOF_IPC_TPLG_COMP_NEW */ -struct sof_ipc_comp { - struct sof_ipc_hdr hdr; - uint32_t id; - enum sof_comp_type type; - uint32_t pipeline_id; -} __attribute__((packed)); - -/* - * Component Buffers - */ - -/* create new component buffer - SOF_IPC_TPLG_BUFFER_NEW */ -struct sof_ipc_buffer { - struct sof_ipc_comp comp; - uint32_t size; /* buffer size in bytes */ - uint32_t caps; /* SOF_MEM_CAPS_ */ -} __attribute__((packed)); - -/* generic component config data - must always be after struct sof_ipc_comp */ -struct sof_ipc_comp_config { - uint32_t periods_sink; /* 0 means variable */ - uint32_t periods_source; /* 0 means variable */ - uint32_t preload_count; /* how many periods to preload */ - enum sof_ipc_frame frame_fmt; - uint32_t xrun_action; -} __attribute__((packed)); - -/* generic host component */ -struct sof_ipc_comp_host { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - enum sof_ipc_stream_direction direction; - uint32_t no_irq; /* don't send periodic IRQ to host/DSP */ - uint32_t dmac_config; /* DMA engine specific */ -} __attribute__((packed)); - -/* generic DAI component */ -struct sof_ipc_comp_dai { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - enum sof_ipc_stream_direction direction; - uint32_t dai_index; /* index of this type dai */ - enum sof_ipc_dai_type type; - uint32_t dmac_config; /* DMA engine specific */ -} __attribute__((packed)); - -/* generic mixer component */ -struct sof_ipc_comp_mixer { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; -} __attribute__((packed)); - -/* volume ramping types */ -enum sof_volume_ramp { - SOF_VOLUME_LINEAR = 0, - SOF_VOLUME_LOG, - SOF_VOLUME_LINEAR_ZC, - SOF_VOLUME_LOG_ZC, -}; - -/* generic volume component */ -struct sof_ipc_comp_volume { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - uint32_t channels; - uint32_t min_value; - uint32_t max_value; - enum sof_volume_ramp ramp; - uint32_t initial_ramp; /* ramp space in ms */ -} __attribute__((packed)); - -/* generic SRC component */ -struct sof_ipc_comp_src { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - /* either source or sink rate must be non zero */ - uint32_t source_rate; /* source rate or 0 for variable */ - uint32_t sink_rate; /* sink rate or 0 for variable */ - uint32_t rate_mask; /* SOF_RATE_ supported rates */ -} __attribute__((packed)); - -/* generic MUX component */ -struct sof_ipc_comp_mux { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; -} __attribute__((packed)); - -/* generic tone generator component */ -struct sof_ipc_comp_tone { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - int32_t sample_rate; - int32_t frequency; - int32_t amplitude; - int32_t freq_mult; - int32_t ampl_mult; - int32_t length; - int32_t period; - int32_t repeats; - int32_t ramp_step; -} __attribute__((packed)); - -/* FIR equalizer component */ -struct sof_ipc_comp_eq_fir { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - uint32_t size; - unsigned char data[0]; -} __attribute__((packed)); - -/* IIR equalizer component */ -struct sof_ipc_comp_eq_iir { - struct sof_ipc_comp comp; - struct sof_ipc_comp_config config; - uint32_t size; - unsigned char data[0]; -} __attribute__((packed)); - -/** \brief Types of EFFECT */ -enum sof_ipc_effect_type { - SOF_EFFECT_NONE = 0, /**< None */ - SOF_EFFECT_INTEL_EQFIR, /**< Intel FIR */ - SOF_EFFECT_INTEL_EQIIR, /**< Intel IIR */ -}; - -/* general purpose EFFECT configuration */ -struct sof_ipc_comp_effect { - enum sof_ipc_effect_type type; -} __attribute__((packed)); - -/* frees components, buffers and pipelines - * SOF_IPC_TPLG_COMP_FREE, SOF_IPC_TPLG_PIPE_FREE, SOF_IPC_TPLG_BUFFER_FREE - */ -struct sof_ipc_free { - struct sof_ipc_hdr hdr; - uint32_t id; -} __attribute__((packed)); - -struct sof_ipc_comp_reply { - struct sof_ipc_reply rhdr; - uint32_t id; - uint32_t offset; -} __attribute__((packed)); - -/* - * Pipeline - */ - -/* new pipeline - SOF_IPC_TPLG_PIPE_NEW */ -struct sof_ipc_pipe_new { - struct sof_ipc_hdr hdr; - uint32_t comp_id; /* component id for pipeline */ - uint32_t pipeline_id; /* pipeline id */ - uint32_t sched_id; /* sheduling component id */ - uint32_t core; /* core we run on */ - uint32_t deadline; /* execution completion deadline in us*/ - uint32_t priority; /* priority level 0 (low) to 10 (max) */ - uint32_t mips; /* worst case instruction count per period */ - uint32_t frames_per_sched;/* output frames of pipeline, 0 is variable */ - uint32_t xrun_limit_usecs; /* report xruns greater than limit */ - - /* non zero if timer scheduled, otherwise DAI DMA irq scheduled */ - uint32_t timer_delay; -} __attribute__((packed)); - -/* pipeline construction complete - SOF_IPC_TPLG_PIPE_COMPLETE */ -struct sof_ipc_pipe_ready { - struct sof_ipc_hdr hdr; - uint32_t comp_id; -} __attribute__((packed)); - -struct sof_ipc_pipe_free { - struct sof_ipc_hdr hdr; - uint32_t comp_id; -} __attribute__((packed)); - -/* connect two components in pipeline - SOF_IPC_TPLG_COMP_CONNECT */ -struct sof_ipc_pipe_comp_connect { - struct sof_ipc_hdr hdr; - uint32_t source_id; - uint32_t sink_id; -} __attribute__((packed)); - -/* - * PM - */ - -/* PM context element */ -struct sof_ipc_pm_ctx_elem { - uint32_t type; - uint32_t size; - uint64_t addr; -} __attribute__((packed)); - -/* - * PM context - SOF_IPC_PM_CTX_SAVE, SOF_IPC_PM_CTX_RESTORE, - * SOF_IPC_PM_CTX_SIZE - */ -struct sof_ipc_pm_ctx { - struct sof_ipc_hdr hdr; - struct sof_ipc_host_buffer buffer; - uint32_t num_elems; - uint32_t size; - struct sof_ipc_pm_ctx_elem elems[]; -}; - -/* enable or disable cores - SOF_IPC_PM_CORE_ENABLE */ -struct sof_ipc_pm_core_config { - struct sof_ipc_hdr hdr; - uint32_t enable_mask; -}; - -/* - * Firmware boot and version - */ - -#define SOF_IPC_MAX_ELEMS 16 - -/* extended data types that can be appended onto end of sof_ipc_fw_ready */ -enum sof_ipc_ext_data { - SOF_IPC_EXT_DMA_BUFFER = 0, - SOF_IPC_EXT_WINDOW, -}; - -/* FW version - SOF_IPC_GLB_VERSION */ -struct sof_ipc_fw_version { - uint16_t major; - uint16_t minor; - uint16_t build; - uint8_t date[12]; - uint8_t time[10]; - uint8_t tag[6]; - uint16_t abi_version; - /* Make sure the total size is 4 bytes aligned */ -} __attribute__((packed)); - -/* FW ready Message - sent by firmware when boot has completed */ -struct sof_ipc_fw_ready { - struct sof_ipc_hdr hdr; - uint32_t dspbox_offset; /* dsp initiated IPC mailbox */ - uint32_t hostbox_offset; /* host initiated IPC mailbox */ - uint32_t dspbox_size; - uint32_t hostbox_size; - struct sof_ipc_fw_version version; -} __attribute__((packed)); - -/* - * Extended Firmware data. All optional, depends on platform/arch. - */ - -enum sof_ipc_region { - SOF_IPC_REGION_DOWNBOX = 0, - SOF_IPC_REGION_UPBOX, - SOF_IPC_REGION_TRACE, - SOF_IPC_REGION_DEBUG, - SOF_IPC_REGION_STREAM, - SOF_IPC_REGION_REGS, - SOF_IPC_REGION_EXCEPTION, -}; - -struct sof_ipc_ext_data_hdr { - struct sof_ipc_hdr hdr; - enum sof_ipc_ext_data type; /* SOF_IPC_EXT_ */ -}; - -struct sof_ipc_dma_buffer_elem { - enum sof_ipc_region type; - uint32_t id; /* platform specific - used to map to host memory */ - struct sof_ipc_host_buffer buffer; -}; - -/* extended data DMA buffers for IPC, trace and debug */ -struct sof_ipc_dma_buffer_data { - struct sof_ipc_ext_data_hdr ext_hdr; - uint32_t num_buffers; - /* host files in buffer[n].buffer */ - struct sof_ipc_dma_buffer_elem buffer[]; -} __attribute__((packed)); - -struct sof_ipc_window_elem { - enum sof_ipc_region type; - uint32_t id; /* platform specific - used to map to host memory */ - uint32_t flags; /* R, W, RW, etc - to define */ - uint32_t size; /* size of region in bytes */ - /* offset in window region as windows can be partitioned */ - uint32_t offset; -}; - -/* extended data memory windows for IPC, trace and debug */ -struct sof_ipc_window { - struct sof_ipc_ext_data_hdr ext_hdr; - uint32_t num_windows; - struct sof_ipc_window_elem window[]; -} __attribute__((packed)); - -/* - * DMA for Trace - */ - -/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */ -struct sof_ipc_dma_trace_params { - struct sof_ipc_hdr hdr; - struct sof_ipc_host_buffer buffer; - uint32_t stream_tag; -} __attribute__((packed)); - -/* DMA for Trace params info - SOF_IPC_DEBUG_DMA_PARAMS */ -struct sof_ipc_dma_trace_posn { - struct sof_ipc_reply rhdr; - uint32_t host_offset; /* Offset of DMA host buffer */ - uint32_t overflow; /* overflow bytes if any */ - uint32_t messages; /* total trace messages */ -} __attribute__((packed)); - -/* - * Architecture specific debug - */ - -/* Xtensa Firmware Oops data */ -struct sof_ipc_dsp_oops_xtensa { - uint32_t exccause; - uint32_t excvaddr; - uint32_t ps; - uint32_t epc1; - uint32_t epc2; - uint32_t epc3; - uint32_t epc4; - uint32_t epc5; - uint32_t epc6; - uint32_t epc7; - uint32_t eps2; - uint32_t eps3; - uint32_t eps4; - uint32_t eps5; - uint32_t eps6; - uint32_t eps7; - uint32_t depc; - uint32_t intenable; - uint32_t interrupt; - uint32_t sar; - uint32_t stack; -} __attribute__((packed)); - -/* - * Commom debug - */ - -/* panic info include filename and line number */ -struct sof_ipc_panic_info { - char filename[32]; - uint32_t linenum; -} __attribute__((packed)); - -#endif diff --git a/include/uapi/sound/sof/abi.h b/include/uapi/sound/sof/abi.h new file mode 100644 index 00000000000000..48bd898d953ed4 --- /dev/null +++ b/include/uapi/sound/sof/abi.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +/** + * SOF ABI versioning is based on Semantic Versioning where we have a given + * MAJOR.MINOR.PATCH version number. See https://semver.org/ + * + * Rules for incrementing or changing version :- + * + * 1) Increment MAJOR version if you make incompatible API changes. MINOR and + * PATCH should be reset to 0. + * + * 2) Increment MINOR version if you add backwards compatible features or + * changes. PATCH should be reset to 0. + * + * 3) Increment PATCH version if you add backwards compatible bug fixes. + */ + +#ifndef __INCLUDE_UAPI_SOUND_SOF_ABI_H__ +#define __INCLUDE_UAPI_SOUND_SOF_ABI_H__ + +/* SOF ABI version major, minor and patch numbers */ +#define SOF_ABI_MAJOR 2 +#define SOF_ABI_MINOR 0 +#define SOF_ABI_PATCH 0 + +/* SOF ABI version number. Format within 32bit word is MMmmmppp */ +#define SOF_ABI_MAJOR_SHIFT 24 +#define SOF_ABI_MAJOR_MASK 0xff +#define SOF_ABI_MINOR_SHIFT 12 +#define SOF_ABI_MINOR_MASK 0xfff +#define SOF_ABI_PATCH_SHIFT 0 +#define SOF_ABI_PATCH_MASK 0xfff + +#define SOF_ABI_VER(major, minor, patch) \ + (((major) << SOF_ABI_MAJOR_SHIFT) | \ + ((minor) << SOF_ABI_MINOR_SHIFT) | \ + ((patch) << SOF_ABI_PATCH_SHIFT)) + +#define SOF_ABI_VERSION_MAJOR(version) \ + (((version) >> SOF_ABI_MAJOR_SHIFT) & SOF_ABI_MAJOR_MASK) +#define SOF_ABI_VERSION_MINOR(version) \ + (((version) >> SOF_ABI_MINOR_SHIFT) & SOF_ABI_MINOR_MASK) +#define SOF_ABI_VERSION_PATCH(version) \ + (((version) >> SOF_ABI_PATCH_SHIFT) & SOF_ABI_PATCH_MASK) + +#define SOF_ABI_VERSION_INCOMPATIBLE(sof_ver, client_ver) \ + (SOF_ABI_VERSION_MAJOR((sof_ver)) != \ + SOF_ABI_VERSION_MAJOR((client_ver)) \ + ) + +#define SOF_ABI_VERSION SOF_ABI_VER(SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH) + +/* SOF ABI magic number "SOF\0". */ +#define SOF_ABI_MAGIC 0x00464F53 + +#endif + diff --git a/include/uapi/sound/sof-eq.h b/include/uapi/sound/sof/eq.h similarity index 91% rename from include/uapi/sound/sof-eq.h rename to include/uapi/sound/sof/eq.h index bd82fea5206ed0..9567d4abea703f 100644 --- a/include/uapi/sound/sof-eq.h +++ b/include/uapi/sound/sof/eq.h @@ -4,26 +4,21 @@ * redistributing this file, you may do so under either license. * * Copyright(c) 2018 Intel Corporation. All rights reserved. - * - * Author: Seppo Ingalsuo */ -#ifndef EQ_H -#define EQ_H +#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_EQ_H__ +#define __INCLUDE_UAPI_SOUND_SOF_USER_EQ_H__ /* FIR EQ type */ -/* Component will reject non-matching configuration. The version number need - * to be incremented with any ABI changes in function fir_cmd(). - */ -#define SOF_EQ_FIR_ABI_VERSION 1 - #define SOF_EQ_FIR_IDX_SWITCH 0 #define SOF_EQ_FIR_MAX_SIZE 4096 /* Max size allowed for coef data in bytes */ #define SOF_EQ_FIR_MAX_LENGTH 192 /* Max length for individual filter */ +#define SOF_EQ_FIR_MAX_RESPONSES 8 /* A blob can define max 8 FIR EQs */ + /* * eq_fir_configuration data structure contains this information * uint32_t size @@ -59,14 +54,22 @@ struct sof_eq_fir_config { uint32_t size; uint16_t channels_in_config; uint16_t number_of_responses; + + /* reserved */ + uint32_t reserved[4]; + int16_t data[]; -}; +} __packed; struct sof_eq_fir_coef_data { int16_t length; /* Number of FIR taps */ int16_t out_shift; /* Amount of right shifts at output */ + + /* reserved */ + uint32_t reserved[4]; + int16_t coef[]; /* FIR coefficients */ -}; +} __packed; /* In the struct above there's two words (length, shift) before the actual * FIR coefficients. This information is used in parsing of the config blob. @@ -75,11 +78,6 @@ struct sof_eq_fir_coef_data { /* IIR EQ type */ -/* Component will reject non-matching configuration. The version number need - * to be incremented with any ABI changes in function fir_cmd(). - */ -#define SOF_EQ_IIR_ABI_VERSION 1 - #define SOF_EQ_IIR_IDX_SWITCH 0 #define SOF_EQ_IIR_MAX_SIZE 1024 /* Max size allowed for coef data in bytes */ @@ -125,14 +123,22 @@ struct sof_eq_iir_config { uint32_t size; uint32_t channels_in_config; uint32_t number_of_responses; + + /* reserved */ + uint32_t reserved[4]; + int32_t data[]; /* eq_assign[channels], eq 0, eq 1, ... */ -}; +} __packed; struct sof_eq_iir_header_df2t { uint32_t num_sections; uint32_t num_sections_in_series; + + /* reserved */ + uint32_t reserved[4]; + int32_t biquads[]; /* Repeated biquad coefficients */ -}; +} __packed; struct sof_eq_iir_biquad_df2t { int32_t a2; /* Q2.30 */ @@ -142,7 +148,7 @@ struct sof_eq_iir_biquad_df2t { int32_t b0; /* Q2.30 */ int32_t output_shift; /* Number of right shifts */ int32_t output_gain; /* Q2.14 */ -}; +} __packed; /* A full 22th order equalizer with 11 biquads cover octave bands 1-11 in * in the 0 - 20 kHz bandwidth. @@ -155,4 +161,4 @@ struct sof_eq_iir_biquad_df2t { /* The number of int32_t words in sof_eq_iir_biquad_df2t */ #define SOF_EQ_IIR_NBIQUAD_DF2T 7 -#endif /* EQ_H */ +#endif diff --git a/include/uapi/sound/sof-fw.h b/include/uapi/sound/sof/fw.h similarity index 95% rename from include/uapi/sound/sof-fw.h rename to include/uapi/sound/sof/fw.h index e55ea88ee69607..c82e094f865b9f 100644 --- a/include/uapi/sound/sof-fw.h +++ b/include/uapi/sound/sof/fw.h @@ -37,7 +37,7 @@ struct snd_sof_blk_hdr { enum snd_sof_fw_blk_type type; uint32_t size; /* bytes minus this header */ uint32_t offset; /* offset from base */ -} __attribute__((packed)); +} __packed; /* * Firmware file is made up of 1 .. N different modules types. The module @@ -52,7 +52,7 @@ struct snd_sof_mod_hdr { enum snd_sof_fw_mod_type type; uint32_t size; /* bytes minus this header */ uint32_t num_blocks; /* number of blocks */ -} __attribute__((packed)); +} __packed; /* * Firmware file header. @@ -62,6 +62,6 @@ struct snd_sof_fw_header { uint32_t file_size; /* size of file minus this header */ uint32_t num_modules; /* number of modules */ uint32_t abi; /* version of header format */ -} __attribute__((packed)); +} __packed; #endif diff --git a/include/uapi/sound/sof/header.h b/include/uapi/sound/sof/header.h new file mode 100644 index 00000000000000..e69daec521fb93 --- /dev/null +++ b/include/uapi/sound/sof/header.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_HEADER_H__ +#define __INCLUDE_UAPI_SOUND_SOF_USER_HEADER_H__ + +/* + * Header for all non IPC ABI data. + * + * Identifies data type, size and ABI. + * Used by any bespoke component data structures or binary blobs. + */ +struct sof_abi_hdr { + uint32_t magic; /**< 'S', 'O', 'F', '\0' */ + uint32_t type; /**< component specific type */ + uint32_t size; /**< size in bytes of data excl. this struct */ + uint32_t abi; /**< SOF ABI version */ + uint32_t reserved[4]; /**< reserved for future use */ + uint32_t data[0]; /**< Component data - opaque to core */ +} __packed; + +#endif diff --git a/include/uapi/sound/sof/manifest.h b/include/uapi/sound/sof/manifest.h new file mode 100644 index 00000000000000..c130518961c83b --- /dev/null +++ b/include/uapi/sound/sof/manifest.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_MANIFEST_H__ +#define __INCLUDE_UAPI_SOUND_SOF_USER_MANIFEST_H__ + +/* start offset for base FW module */ +#define SOF_MAN_ELF_TEXT_OFFSET 0x2000 + +/* FW Extended Manifest Header id = $AE1 */ +#define SOF_MAN_EXT_HEADER_MAGIC 0x31454124 + +/* module type load type */ +#define SOF_MAN_MOD_TYPE_BUILTIN 0 +#define SOF_MAN_MOD_TYPE_MODULE 1 + +struct sof_man_module_type { + uint32_t load_type:4; /* SOF_MAN_MOD_TYPE_ */ + uint32_t auto_start:1; + uint32_t domain_ll:1; + uint32_t domain_dp:1; + uint32_t rsvd_:25; +}; + +/* segment flags.type */ +#define SOF_MAN_SEGMENT_TEXT 0 +#define SOF_MAN_SEGMENT_RODATA 1 +#define SOF_MAN_SEGMENT_DATA 1 +#define SOF_MAN_SEGMENT_BSS 2 +#define SOF_MAN_SEGMENT_EMPTY 15 + +union sof_man_segment_flags { + uint32_t ul; + struct { + uint32_t contents:1; + uint32_t alloc:1; + uint32_t load:1; + uint32_t readonly:1; + uint32_t code:1; + uint32_t data:1; + uint32_t _rsvd0:2; + uint32_t type:4; /* MAN_SEGMENT_ */ + uint32_t _rsvd1:4; + uint32_t length:16; /* of segment in pages */ + } r; +} __packed; + +/* + * Module segment descriptor. Used by ROM - Immutable. + */ +struct sof_man_segment_desc { + union sof_man_segment_flags flags; + uint32_t v_base_addr; + uint32_t file_offset; +} __packed; + +/* + * The firmware binary can be split into several modules. + */ + +#define SOF_MAN_MOD_ID_LEN 4 +#define SOF_MAN_MOD_NAME_LEN 8 +#define SOF_MAN_MOD_SHA256_LEN 32 +#define SOF_MAN_MOD_ID {'$', 'A', 'M', 'E'} + +/* + * Each module has an entry in the FW header. Used by ROM - Immutable. + */ +struct sof_man_module { + uint8_t struct_id[SOF_MAN_MOD_ID_LEN]; /* SOF_MAN_MOD_ID */ + uint8_t name[SOF_MAN_MOD_NAME_LEN]; + uint8_t uuid[16]; + struct sof_man_module_type type; + uint8_t hash[SOF_MAN_MOD_SHA256_LEN]; + uint32_t entry_point; + uint16_t cfg_offset; + uint16_t cfg_count; + uint32_t affinity_mask; + uint16_t instance_max_count; /* max number of instances */ + uint16_t instance_bss_size; /* instance (pages) */ + struct sof_man_segment_desc segment[3]; +} __packed; + +/* + * Each module has a configuration in the FW header. Used by ROM - Immutable. + */ +struct sof_man_mod_config { + uint32_t par[4]; /* module parameters */ + uint32_t is_pages; /* actual size of instance .bss (pages) */ + uint32_t cps; /* cycles per second */ + uint32_t ibs; /* input buffer size (bytes) */ + uint32_t obs; /* output buffer size (bytes) */ + uint32_t module_flags; /* flags, reserved for future use */ + uint32_t cpc; /* cycles per single run */ + uint32_t obls; /* output block size, reserved for future use */ +} __packed; + +/* + * FW Manifest Header + */ + +#define SOF_MAN_FW_HDR_FW_NAME_LEN 8 +#define SOF_MAN_FW_HDR_ID {'$', 'A', 'M', '1'} +#define SOF_MAN_FW_HDR_NAME "ADSPFW" +#define SOF_MAN_FW_HDR_FLAGS 0x0 +#define SOF_MAN_FW_HDR_FEATURES 0xff + +/* + * The firmware has a standard header that is checked by the ROM on firmware + * loading. preload_page_count is used by DMA code loader and is entire + * image size on CNL. i.e. CNL: total size of the binary’s .text and .rodata + * Used by ROM - Immutable. + */ +struct sof_man_fw_header { + uint8_t header_id[4]; + uint32_t header_len; + uint8_t name[SOF_MAN_FW_HDR_FW_NAME_LEN]; + /* number of pages of preloaded image loaded by driver */ + uint32_t preload_page_count; + uint32_t fw_image_flags; + uint32_t feature_mask; + uint16_t major_version; + uint16_t minor_version; + uint16_t hotfix_version; + uint16_t build_version; + uint32_t num_module_entries; + uint32_t hw_buf_base_addr; + uint32_t hw_buf_length; + /* target address for binary loading as offset in IMR - must be == base offset */ + uint32_t load_offset; +} __packed; + +/* + * Firmware manifest descriptor. This can contain N modules and N module + * configs. Used by ROM - Immutable. + */ +struct sof_man_fw_desc { + struct sof_man_fw_header header; + + /* Warning - hack for module arrays. For some unknown reason the we + * have a variable size array of struct man_module followed by a + * variable size array of struct mod_config. These should have been + * merged into a variable array of a parent structure. We have to hack + * around this in many places.... + * + * struct sof_man_module man_module[]; + * struct sof_man_mod_config mod_config[]; + */ + +} __packed; + +/* + * Component Descriptor. Used by ROM - Immutable. + */ +struct sof_man_component_desc { + uint32_t reserved[2]; /* all 0 */ + uint32_t version; + uint8_t hash[SOF_MAN_MOD_SHA256_LEN]; + uint32_t base_offset; + uint32_t limit_offset; + uint32_t attributes[4]; +} __packed; + +/* + * Audio DSP extended metadata. Used by ROM - Immutable. + */ +struct sof_man_adsp_meta_file_ext { + uint32_t ext_type; /* always 17 for ADSP extension */ + uint32_t ext_len; + uint32_t imr_type; + uint8_t reserved[16]; /* all 0 */ + struct sof_man_component_desc comp_desc[1]; +} __packed; + +/* + * Module Manifest for rimage module metadata. Not used by ROM. + */ +struct sof_man_module_manifest { + struct sof_man_module module; + uint32_t text_size; +} __packed; + +#endif diff --git a/include/uapi/sound/sof-topology.h b/include/uapi/sound/sof/tokens.h similarity index 100% rename from include/uapi/sound/sof-topology.h rename to include/uapi/sound/sof/tokens.h diff --git a/include/uapi/sound/sof-tone.h b/include/uapi/sound/sof/tone.h similarity index 62% rename from include/uapi/sound/sof-tone.h rename to include/uapi/sound/sof/tone.h index ce258cd7ef70ec..2a5503aa94e40c 100644 --- a/include/uapi/sound/sof-tone.h +++ b/include/uapi/sound/sof/tone.h @@ -1,14 +1,13 @@ /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ /* - * This file is provided under a dual BSD/GPLv2 license. When using or - * redistributing this file, you may do so under either license. - * - * Copyright(c) 2018 Intel Corporation. All rights reserved. - * Author: Seppo Ingalsuo - */ +* This file is provided under a dual BSD/GPLv2 license. When using or +* redistributing this file, you may do so under either license. +* +* Copyright(c) 2018 Intel Corporation. All rights reserved. +*/ -#ifndef TONE_H -#define TONE_H +#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_TONE_H__ +#define __INCLUDE_UAPI_SOUND_SOF_USER_TONE_H__ /* Component will reject non-matching configuration. The version number need * to be incremented with any ABI changes in function fir_cmd(). @@ -24,4 +23,4 @@ #define SOF_TONE_IDX_REPEATS 6 #define SOF_TONE_IDX_LIN_RAMP_STEP 7 -#endif /* TONE_ABI_H */ +#endif diff --git a/include/uapi/sound/sof/trace.h b/include/uapi/sound/sof/trace.h new file mode 100644 index 00000000000000..606add4d951f91 --- /dev/null +++ b/include/uapi/sound/sof/trace.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note)) OR BSD-3-Clause) */ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * Copyright(c) 2018 Intel Corporation. All rights reserved. + */ + +#ifndef __INCLUDE_UAPI_SOUND_SOF_USER_TRACE_H__ +#define __INCLUDE_UAPI_SOUND_SOF_USER_TRACE_H__ + +/* + * Host system time. + * + * This property is used by the driver to pass down information about + * current system time. It is expressed in us. + * FW translates timestamps (in log entries, probe pockets) to this time + * domain. + * + * (cavs: SystemTime). + */ +struct system_time { + uint32_t val_l; /* Lower dword of current host time value */ + uint32_t val_u; /* Upper dword of current host time value */ +} __packed; + +/* trace event classes - high 8 bits*/ +#define TRACE_CLASS_IRQ (1 << 24) +#define TRACE_CLASS_IPC (2 << 24) +#define TRACE_CLASS_PIPE (3 << 24) +#define TRACE_CLASS_HOST (4 << 24) +#define TRACE_CLASS_DAI (5 << 24) +#define TRACE_CLASS_DMA (6 << 24) +#define TRACE_CLASS_SSP (7 << 24) +#define TRACE_CLASS_COMP (8 << 24) +#define TRACE_CLASS_WAIT (9 << 24) +#define TRACE_CLASS_LOCK (10 << 24) +#define TRACE_CLASS_MEM (11 << 24) +#define TRACE_CLASS_MIXER (12 << 24) +#define TRACE_CLASS_BUFFER (13 << 24) +#define TRACE_CLASS_VOLUME (14 << 24) +#define TRACE_CLASS_SWITCH (15 << 24) +#define TRACE_CLASS_MUX (16 << 24) +#define TRACE_CLASS_SRC (17 << 24) +#define TRACE_CLASS_TONE (18 << 24) +#define TRACE_CLASS_EQ_FIR (19 << 24) +#define TRACE_CLASS_EQ_IIR (20 << 24) +#define TRACE_CLASS_SA (21 << 24) +#define TRACE_CLASS_DMIC (22 << 24) +#define TRACE_CLASS_POWER (23 << 24) +#define TRACE_CLASS_IDC (24 << 24) +#define TRACE_CLASS_CPU (25 << 24) + +#define LOG_ENABLE 1 /* Enable logging */ +#define LOG_DISABLE 0 /* Disable logging */ + +#define LOG_LEVEL_CRITICAL 1 /* (FDK fatal) */ +#define LOG_LEVEL_VERBOSE 2 + +/* + * Layout of a log fifo. + */ +struct log_buffer_layout { + uint32_t read_ptr; /*read pointer */ + uint32_t write_ptr; /* write pointer */ + uint32_t buffer[0]; /* buffer */ +} __packed; + +/* + * Log buffer status reported by FW. + */ +struct log_buffer_status { + uint32_t core_id; /* ID of core that logged to other half */ +} __packed; + +#define TRACE_ID_LENGTH 12 + +/* + * Log entry header. + * + * The header is followed by an array of arguments (uint32_t[]). + * Number of arguments is specified by the params_num field of log_entry + */ +struct log_entry_header { + uint32_t id_0 : TRACE_ID_LENGTH; /* e.g. Pipeline ID */ + uint32_t id_1 : TRACE_ID_LENGTH; /* e.g. Component ID */ + uint32_t core_id : 8; /* Reporting core's id */ + + uint64_t timestamp; /* Timestamp (in dsp ticks) */ + uint32_t log_entry_address; /* Address of log entry in ELF */ +} __packed; + +#endif diff --git a/sound/soc/sof/compressed.c b/sound/soc/sof/compressed.c index e747293fe4fac2..7cc35dda0979cc 100644 --- a/sound/soc/sof/compressed.c +++ b/sound/soc/sof/compressed.c @@ -17,7 +17,6 @@ #include #include #include -#include #include "sof-priv.h" #define DRV_NAME "sof-audio" diff --git a/sound/soc/sof/control.c b/sound/soc/sof/control.c index 7b72361c3baee1..e08f7e007d293b 100644 --- a/sound/soc/sof/control.c +++ b/sound/soc/sof/control.c @@ -17,7 +17,6 @@ #include #include #include -#include #include "sof-priv.h" static inline u32 mixer_to_ipc(unsigned int value, u32 *volume_map, int size) @@ -327,7 +326,6 @@ int snd_sof_bytes_ext_put(struct snd_kcontrol *kcontrol, /* set the ABI header values */ cdata->data->magic = SOF_ABI_MAGIC; cdata->data->abi = SOF_ABI_VERSION; - cdata->data->comp_abi = SOF_ABI_VERSION; /* notify DSP of mixer updates */ snd_sof_ipc_set_comp_data(sdev->ipc, scontrol, SOF_IPC_COMP_SET_DATA, @@ -386,7 +384,6 @@ int snd_sof_bytes_ext_get(struct snd_kcontrol *kcontrol, /* set the ABI header values */ cdata->data->magic = SOF_ABI_MAGIC; cdata->data->abi = SOF_ABI_VERSION; - cdata->data->comp_abi = SOF_ABI_VERSION; /* get all the component data from DSP */ ret = snd_sof_ipc_get_comp_data(sdev->ipc, scontrol, diff --git a/sound/soc/sof/debug.c b/sound/soc/sof/debug.c index 793d6ac3cf0fe5..f1a95902279fb5 100644 --- a/sound/soc/sof/debug.c +++ b/sound/soc/sof/debug.c @@ -21,7 +21,6 @@ #include #include #include -#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/hw-spi.c b/sound/soc/sof/hw-spi.c index 75b8ff857dc7ce..637ca57a9c76c8 100644 --- a/sound/soc/sof/hw-spi.c +++ b/sound/soc/sof/hw-spi.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/intel/bdw.c b/sound/soc/sof/intel/bdw.c index 0a0892afaffd77..ff20528951a5da 100644 --- a/sound/soc/sof/intel/bdw.c +++ b/sound/soc/sof/intel/bdw.c @@ -24,6 +24,9 @@ #include #include +#include +#include + #include "../sof-priv.h" #include "../ops.h" #include "shim.h" diff --git a/sound/soc/sof/intel/byt.c b/sound/soc/sof/intel/byt.c index 292eed4eeead43..67d7ba513bdc85 100644 --- a/sound/soc/sof/intel/byt.c +++ b/sound/soc/sof/intel/byt.c @@ -22,7 +22,8 @@ #include #include #include -#include +#include +#include #include "../sof-priv.h" #include "../ops.h" diff --git a/sound/soc/sof/intel/hda-dsp.c b/sound/soc/sof/intel/hda-dsp.c index 8311c1bb455075..4d7028ff7a9c09 100644 --- a/sound/soc/sof/intel/hda-dsp.c +++ b/sound/soc/sof/intel/hda-dsp.c @@ -31,7 +31,7 @@ #include #include #include -#include + #include "../sof-priv.h" #include "../ops.h" #include "hda.h" diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 5451ba0cfc72dc..7e1e6e8c63804b 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "../sof-priv.h" #include "../ops.h" diff --git a/sound/soc/sof/intel/hsw.c b/sound/soc/sof/intel/hsw.c index 2299686db32c50..b7e475ab99abaf 100644 --- a/sound/soc/sof/intel/hsw.c +++ b/sound/soc/sof/intel/hsw.c @@ -25,6 +25,8 @@ #include #include +#include +#include #include "../sof-priv.h" #include "../ops.h" #include "shim.h" diff --git a/sound/soc/sof/ipc.c b/sound/soc/sof/ipc.c index 4ee63ce4dd2b11..fa95209ce64715 100644 --- a/sound/soc/sof/ipc.c +++ b/sound/soc/sof/ipc.c @@ -30,7 +30,6 @@ #include #include #include -#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/loader.c b/sound/soc/sof/loader.c index 3bbbd3c0e0398b..f1a5bb6d08437a 100644 --- a/sound/soc/sof/loader.c +++ b/sound/soc/sof/loader.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/ops.c b/sound/soc/sof/ops.c index 48ea9ac32620b5..37b114356d312b 100644 --- a/sound/soc/sof/ops.c +++ b/sound/soc/sof/ops.c @@ -14,7 +14,6 @@ #include #include #include -#include #include "ops.h" #include "sof-priv.h" diff --git a/sound/soc/sof/ops.h b/sound/soc/sof/ops.h index 78bca5ad419f2d..1912994a1c94cb 100644 --- a/sound/soc/sof/ops.h +++ b/sound/soc/sof/ops.h @@ -16,7 +16,6 @@ #include #include #include -#include #include "sof-priv.h" /* init */ diff --git a/sound/soc/sof/pcm.c b/sound/soc/sof/pcm.c index f873c9bffac6b1..b60ef603121718 100644 --- a/sound/soc/sof/pcm.c +++ b/sound/soc/sof/pcm.c @@ -25,7 +25,6 @@ #include #include #include -#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/sof-priv.h b/sound/soc/sof/sof-priv.h index a4e6624d317088..531fed526c5a2f 100644 --- a/sound/soc/sof/sof-priv.h +++ b/sound/soc/sof/sof-priv.h @@ -19,8 +19,16 @@ #include #include #include -#include -#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include #include diff --git a/sound/soc/sof/topology.c b/sound/soc/sof/topology.c index 51d7294b974654..9af530bb45dc9a 100644 --- a/sound/soc/sof/topology.c +++ b/sound/soc/sof/topology.c @@ -22,8 +22,7 @@ #include #include #include -#include -#include +#include #include "sof-priv.h" #define COMP_ID_UNASSIGNED 0xffffffff @@ -329,7 +328,6 @@ static int sof_control_load_bytes(struct snd_soc_component *scomp, cdata->data->size = control->priv.size; cdata->data->magic = SOF_ABI_MAGIC; cdata->data->abi = SOF_ABI_VERSION; - cdata->data->comp_abi = SOF_ABI_VERSION; } return 0; @@ -428,7 +426,7 @@ static const struct sof_topology_token sched_tokens[] = { {SOF_TKN_SCHED_PRIORITY, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, offsetof(struct sof_ipc_pipe_new, priority), 0}, {SOF_TKN_SCHED_MIPS, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, - offsetof(struct sof_ipc_pipe_new, mips), 0}, + offsetof(struct sof_ipc_pipe_new, period_mips), 0}, {SOF_TKN_SCHED_CORE, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, offsetof(struct sof_ipc_pipe_new, core), 0}, {SOF_TKN_SCHED_FRAMES, SND_SOC_TPLG_TUPLE_TYPE_WORD, get_token_u32, @@ -1120,7 +1118,7 @@ static int sof_widget_load_pipeline(struct snd_soc_component *scomp, dev_dbg(sdev->dev, "pipeline %s: deadline %d pri %d mips %d core %d frames %d\n", swidget->widget->name, pipeline->deadline, pipeline->priority, - pipeline->mips, pipeline->core, pipeline->frames_per_sched); + pipeline->period_mips, pipeline->core, pipeline->frames_per_sched); swidget->private = (void *)pipeline; diff --git a/sound/soc/sof/trace.c b/sound/soc/sof/trace.c index 5aeb6ea3c58b2b..5db0aaca3bf0fb 100644 --- a/sound/soc/sof/trace.c +++ b/sound/soc/sof/trace.c @@ -21,8 +21,6 @@ #include #include #include -#include -#include #include "sof-priv.h" #include "ops.h" diff --git a/sound/soc/sof/xtensa/core.c b/sound/soc/sof/xtensa/core.c index 5ca9185f5afdf5..330146fe70f3e3 100644 --- a/sound/soc/sof/xtensa/core.c +++ b/sound/soc/sof/xtensa/core.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "../sof-priv.h" #include "../ops.h"