App: Overlays: Add DRC component build to TGL, TGL-H, ACE

singalsu · lgirdwood · commit 619477a186c5 · 2023-07-25T15:48:08.000+01:00
This patch adds CONFIG_COMP_DRC=y for IPC4 Intel platform
builds.

Signed-off-by: Seppo Ingalsuo &lt;seppo.ingalsuo@linux.intel.com&gt;
diff --git a/app/boards/intel_adsp_ace15_mtpm.conf b/app/boards/intel_adsp_ace15_mtpm.conf
@@ -7,8 +7,8 @@ CONFIG_INTEL_DMIC_NHLT=n
 CONFIG_INTEL_SSP=n
 CONFIG_INTEL_ALH=n
 CONFIG_COMP_SRC=y
-
 CONFIG_COMP_SRC_IPC4_FULL_MATRIX=y
+CONFIG_COMP_DRC=y
 
 # power settings
 CONFIG_PM=y
diff --git a/app/overlays/tgl-h/ipc4_overlay.conf b/app/overlays/tgl-h/ipc4_overlay.conf
@@ -11,6 +11,7 @@ CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S32_C32=y
 CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S24_C32=y
 CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S16_C32=y
 CONFIG_COMP_VOLUME_WINDOWS_FADE=y
+CONFIG_COMP_DRC=y
 
 # route SOF logs to Zephyr logging subsystem
 CONFIG_SOF_LOG_LEVEL_INF=y
diff --git a/app/overlays/tgl/ipc4_overlay.conf b/app/overlays/tgl/ipc4_overlay.conf
@@ -11,6 +11,7 @@ CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S32_C32=y
 CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S24_C32=y
 CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S16_C32=y
 CONFIG_COMP_VOLUME_WINDOWS_FADE=y
+CONFIG_COMP_DRC=y
 
 # route SOF logs to Zephyr logging subsystem
 CONFIG_SOF_LOG_LEVEL_INF=y
