Commit 728d96d
intel: ssp: drain RX fifo when starting
If DMA transaction is ongoing when RX is enabled, this can lead
to stuck communication between DMA and SSP (DMA service request
not seen by the DMA).
To avoid this, flush the RX fifo before enabling SSP RX.
Link: #7548
Suggested-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
(cherry picked from commit 4a4d8d2)1 parent 58c0e7e commit 728d96d
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