diff --git a/scripts/xtensa-build-all.sh b/scripts/xtensa-build-all.sh index 61ce8708903e..25647d0197b5 100755 --- a/scripts/xtensa-build-all.sh +++ b/scripts/xtensa-build-all.sh @@ -106,6 +106,7 @@ WORKDIR="$pwd" for j in ${PLATFORMS[@]} do HAVE_ROM='no' + DEFCONFIG_PATCH='' if [ $j == "byt" ] then PLATFORM="baytrail" @@ -128,15 +129,19 @@ do then PLATFORM="broadwell" ARCH="xtensa" + XTENSA_CORE="LX4_langwell_audio_17_8" ROOT="$pwd/../xtensa-root/xtensa-hsw-elf" HOST="xtensa-hsw-elf" + XTENSA_TOOLS_VERSION="RG-2017.8-linux" fi if [ $j == "hsw" ] then PLATFORM="haswell" ARCH="xtensa" + XTENSA_CORE="LX4_langwell_audio_17_8" ROOT="$pwd/../xtensa-root/xtensa-hsw-elf" HOST="xtensa-hsw-elf" + XTENSA_TOOLS_VERSION="RG-2017.8-linux" fi if [ $j == "apl" ] then @@ -207,22 +212,22 @@ do fi if [ $j == "sue" ] then - PLATFORM="suecreek" + PLATFORM="suecreek" ARCH="xtensa" - XTENSA_CORE="X6H3CNL_2016_4_linux" - ROOT="$pwd/../xtensa-root/xtensa-cnl-elf" - HOST="xtensa-cnl-elf" - XTENSA_TOOLS_VERSION="RF-2016.4-linux" + XTENSA_CORE="X6H3CNL_2017_8" + ROOT="$pwd/../xtensa-root/xtensa-cnl-elf" + HOST="xtensa-cnl-elf" + XTENSA_TOOLS_VERSION="RG-2017.8-linux" HAVE_ROM='yes' fi if [ $j == "icl" ] then PLATFORM="icelake" ARCH="xtensa-smp" - XTENSA_CORE="X6H3CNL_2016_4_linux" + XTENSA_CORE="X6H3CNL_2017_8" ROOT="$pwd/../xtensa-root/xtensa-cnl-elf" HOST="xtensa-cnl-elf" - XTENSA_TOOLS_VERSION="RF-2016.4-linux" + XTENSA_TOOLS_VERSION="RG-2017.8-linux" HAVE_ROM='yes' fi if [ $j == "jsl" ] @@ -269,6 +274,11 @@ do export XTENSA_SYSTEM=$XTENSA_BUILDS_DIR/$XTENSA_CORE/config PATH=$XTENSA_TOOLS_DIR/XtensaTools/bin:$OLDPATH COMPILER="xcc" + + if [ $j == "byt" ] || [ $j == "cht" ] || [ $j == "sue" ] + then + DEFCONFIG_PATCH="_xcc" + fi else TOOLCHAIN=$HOST PATH=$pwd/../$HOST/bin:$OLDPATH @@ -289,7 +299,7 @@ do ${PRIVATE_KEY_OPTION} \ .. - make ${PLATFORM}_defconfig + make ${PLATFORM}${DEFCONFIG_PATCH}_defconfig if [[ "x$MAKE_MENUCONFIG" == "xyes" ]] then diff --git a/src/arch/xtensa/configs/baytrail_xcc_defconfig b/src/arch/xtensa/configs/baytrail_xcc_defconfig new file mode 100644 index 000000000000..6710e05ca0be --- /dev/null +++ b/src/arch/xtensa/configs/baytrail_xcc_defconfig @@ -0,0 +1,8 @@ +CONFIG_BAYTRAIL=y +CONFIG_COMP_TEST_KEYPHRASE=n +CONFIG_COMP_KPB=n +CONFIG_COMP_SEL=n +CONFIG_COMP_MUX=n +CONFIG_COMP_FIR=n +CONFIG_COMP_IIR=n +CONFIG_OPTIMIZE_FOR_SIZE=y diff --git a/src/arch/xtensa/configs/cherrytrail_xcc_defconfig b/src/arch/xtensa/configs/cherrytrail_xcc_defconfig new file mode 100644 index 000000000000..8d53bf6586cd --- /dev/null +++ b/src/arch/xtensa/configs/cherrytrail_xcc_defconfig @@ -0,0 +1,8 @@ +CONFIG_CHERRYTRAIL=y +CONFIG_COMP_TEST_KEYPHRASE=n +CONFIG_COMP_KPB=n +CONFIG_COMP_SEL=n +CONFIG_COMP_MUX=n +CONFIG_COMP_FIR=n +CONFIG_COMP_IIR=n +CONFIG_OPTIMIZE_FOR_SIZE=y diff --git a/src/arch/xtensa/configs/suecreek_xcc_defconfig b/src/arch/xtensa/configs/suecreek_xcc_defconfig new file mode 100644 index 000000000000..9650a159ad4a --- /dev/null +++ b/src/arch/xtensa/configs/suecreek_xcc_defconfig @@ -0,0 +1,7 @@ +CONFIG_SUECREEK=y +CONFIG_CAVS_DMIC=y +CONFIG_CAVS_SSP=y +CONFIG_CORE_COUNT=4 +CONFIG_LP_MEMORY_BANKS=1 +CONFIG_HP_MEMORY_BANKS=47 +CONFIG_OPTIMIZE_FOR_SIZE=y diff --git a/src/arch/xtensa/include/arch/string.h b/src/arch/xtensa/include/arch/string.h index 8474245fbfc7..11c55452b643 100644 --- a/src/arch/xtensa/include/arch/string.h +++ b/src/arch/xtensa/include/arch/string.h @@ -36,7 +36,7 @@ int memset_s(void *dest, size_t dest_size, int memcpy_s(void *dest, size_t dest_size, const void *src, size_t src_size); -#if __XCC__ && !CONFIG_LIBRARY +#if __XCC__ && XCHAL_HAVE_HIFI3 && !CONFIG_LIBRARY void *__vec_memcpy(void *dst, const void *src, size_t len); void *__vec_memset(void *dest, int data, size_t src_size); #endif @@ -54,7 +54,7 @@ static inline int arch_memcpy_s(void *dest, size_t dest_size, if (src_size > dest_size) return -EINVAL; -#if __XCC__ && !CONFIG_LIBRARY +#if __XCC__ && XCHAL_HAVE_HIFI3 && !CONFIG_LIBRARY __vec_memcpy(dest, src, src_size); #else memcpy(dest, src, src_size); @@ -72,7 +72,7 @@ static inline int arch_memset_s(void *dest, size_t dest_size, if (count > dest_size) return -EINVAL; -#if __XCC__ && !CONFIG_LIBRARY +#if __XCC__ && XCHAL_HAVE_HIFI3 && !CONFIG_LIBRARY if (!__vec_memset(dest, data, count)) return -ENOMEM; #else diff --git a/src/platform/haswell/haswell.x.in b/src/platform/haswell/haswell.x.in index 2d8d7530d9f7..8ff8618d5bb2 100644 --- a/src/platform/haswell/haswell.x.in +++ b/src/platform/haswell/haswell.x.in @@ -156,7 +156,7 @@ ENTRY(_ResetVector) _rom_store_table = 0; /* ABI0 does not use Window base */ -PROVIDE(_memmap_vecbase_reset = XCHAL_VECBASE_RESET_PADDR); +PROVIDE(_memmap_vecbase_reset = SOF_MEM_VECBASE_TEXT_BASE); /* Various memory-map dependent cache attribute settings: */ _memmap_cacheattr_wb_base = 0x44024000; diff --git a/src/platform/suecreek/include/platform/lib/memory.h b/src/platform/suecreek/include/platform/lib/memory.h index 523d7c79ca20..6b50977ade97 100644 --- a/src/platform/suecreek/include/platform/lib/memory.h +++ b/src/platform/suecreek/include/platform/lib/memory.h @@ -382,12 +382,12 @@ /* code loader */ #define BOOT_LDR_TEXT_ENTRY_BASE (BOOT_LDR_MANIFEST_BASE + \ BOOT_LDR_MANIFEST_SIZE) -#define BOOT_LDR_TEXT_ENTRY_SIZE 0x400 +#define BOOT_LDR_TEXT_ENTRY_SIZE 0x200 #define BOOT_LDR_LIT_BASE (BOOT_LDR_TEXT_ENTRY_BASE + \ BOOT_LDR_TEXT_ENTRY_SIZE) -#define BOOT_LDR_LIT_SIZE 0x400 +#define BOOT_LDR_LIT_SIZE 0x200 #define BOOT_LDR_TEXT_BASE (BOOT_LDR_LIT_BASE + BOOT_LDR_LIT_SIZE) -#define BOOT_LDR_TEXT_SIZE 0x800 +#define BOOT_LDR_TEXT_SIZE 0xC00 #define BOOT_LDR_DATA_BASE (BOOT_LDR_TEXT_BASE + \ BOOT_LDR_TEXT_SIZE) #define BOOT_LDR_DATA_SIZE 0x1000