diff --git a/tools/topology/CMakeLists.txt b/tools/topology/CMakeLists.txt index 82e3715a5667..65daafbf998e 100644 --- a/tools/topology/CMakeLists.txt +++ b/tools/topology/CMakeLists.txt @@ -28,6 +28,8 @@ set(TPLGS "sof-hda-generic\;sof-hda-generic-4ch\;-DCHANNELS=4\;-DPPROC=volume" "sof-hda-generic\;sof-hda-generic-eq-2ch\;-DCHANNELS=2\;-DPPROC=eq-volume" "sof-hda-generic\;sof-hda-generic-eq-4ch\;-DCHANNELS=4\;-DPPROC=eq-volume" + "sof-hda-generic-kwd\;sof-hda-generic-2ch-kwd\;-DCHANNELS=2" + "sof-hda-generic-kwd\;sof-hda-generic-4ch-kwd\;-DCHANNELS=4" "sof-hda-generic-idisp\;sof-hda-generic-idisp\;-DCHANNELS=0" "sof-hda-generic-idisp\;sof-hda-generic-idisp-2ch\;-DCHANNELS=2" "sof-hda-generic-idisp\;sof-hda-generic-idisp-4ch\;-DCHANNELS=4" diff --git a/tools/topology/platform/intel/intel-generic-dmic-kwd.m4 b/tools/topology/platform/intel/intel-generic-dmic-kwd.m4 new file mode 100644 index 000000000000..2c93e995418b --- /dev/null +++ b/tools/topology/platform/intel/intel-generic-dmic-kwd.m4 @@ -0,0 +1,141 @@ +# +# Topology for digital microphones array +# + +include(`platform/intel/dmic.m4') + +# variable that need to be defined in upper m4 +# define(CHANNELS, `4') define channel for the dmic +ifdef(`CHANNELS',`',`errprint(note: Need to define channel number for intel-generic-dmic-kwd +)') +# define(KFBM_TYPE, `vol-kfbm') define kfbm type, available type: vol-kfbm/kfbm +ifdef(`KFBM_TYPE',`',`errprint(note: Need to define kfbm type for intel-generic-dmic-kwd, available type: vol-kfbm/kfbm +)') +# define(DMIC_PCM_48k_ID, `99') +ifdef(`DMIC_PCM_48k_ID',`',`errprint(note: Need to define dmic48k pcm id for intel-generic-dmic-kwd +)') +# define(DMIC_PIPELINE_48k_ID, `4') +ifdef(`DMIC_PIPELINE_48k_ID',`',`errprint(note: Need to define dmic48k pipeline id for intel-generic-dmic-kwd +)') +# define(DMIC_DAI_LINK_48k_ID, `1') +ifdef(`DMIC_DAI_LINK_48k_ID',`',`errprint(note: Need to define dmic48k dai id for intel-generic-dmic-kwd +)') + +# define(DMIC_PCM_16k_ID, `7') +ifdef(`DMIC_PCM_16k_ID',`',`errprint(note: Need to define dmic16k pcm id for intel-generic-dmic-kwd +)') +# define(DMIC_PIPELINE_16k_ID, `9') +ifdef(`DMIC_PIPELINE_16k_ID',`',`errprint(note: Need to define dmic16k pipeline id for intel-generic-dmic-kwd +)') +# define(DMIC_PIPELINE_KWD_ID, `10') +ifdef(`DMIC_PIPELINE_KWD_ID',`',`errprint(note: Need to define kwd pipeline id for intel-generic-dmic-kwd +)') +# define(DMIC_DAI_LINK_16k_ID, `2') +ifdef(`DMIC_DAI_LINK_16k_ID',`',`errprint(note: Need to define dmic16k dai id for intel-generic-dmic-kwd +)') + +# define(KWD_PIPE_SCH_DEADLINE_US, 20000) +ifdef(`KWD_PIPE_SCH_DEADLINE_US',`',`errprint(note: Need to define schedule for intel-generic-dmic-kwd +)') + +# +# Define the pipelines +# + +dnl PIPELINE_PCM_ADD(pipeline, +dnl pipe id, pcm, max channels, format, +dnl period, priority, core, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate, +dnl time_domain, sched_comp) + +# Passthrough capture pipeline using max channels defined by CHANNELS. + +# Set 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, + DMIC_PIPELINE_48k_ID, DMIC_PCM_48k_ID, CHANNELS, s32le, + 1000, 0, 0, 48000, 48000, 48000) + +# +# KWD configuration +# + +# Passthrough capture pipeline 7 on PCM 7 using max 2 channels. +# Schedule 20000us deadline on core 0 with priority 0 +PIPELINE_PCM_DAI_ADD(sof/pipe-KFBM_TYPE-capture.m4, + DMIC_PIPELINE_16k_ID, DMIC_PCM_16k_ID, 2, s24le, + KWD_PIPE_SCH_DEADLINE_US, 0, 0, DMIC, 1, s32le, 3, + 16000, 16000, 16000) + + + +# +# DAIs configuration +# + +dnl DAI_ADD(pipeline, +dnl pipe id, dai type, dai_index, dai_be, +dnl buffer, periods, format, +dnl deadline, priority, core, time_domain) + +# capture DAI is DMIC 0 using 2 periods +# Buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + DMIC_PIPELINE_48k_ID, DMIC, 0, dmic01, + concat(`PIPELINE_SINK_', DMIC_PIPELINE_48k_ID), 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# capture DAI is DMIC 1 using 3 periods +# Buffers use s32le format, with 320 frame per 20000us on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + DMIC_PIPELINE_16k_ID, DMIC, 1, dmic16k, + `PIPELINE_SINK_'DMIC_PIPELINE_16k_ID, 3, s32le, + KWD_PIPE_SCH_DEADLINE_US, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) +dnl PCM_CAPTURE_ADD(name, pipeline, capture) +PCM_CAPTURE_ADD(DMIC48kHz, DMIC_PCM_48k_ID, concat(`PIPELINE_PCM_', DMIC_PIPELINE_48k_ID)) + +# keyword detector pipe +dnl PIPELINE_ADD(pipeline, +dnl pipe id, max channels, format, +dnl period, priority, core, +dnl sched_comp, time_domain, +dnl pcm_min_rate, pcm_max_rate, pipeline_rate) +PIPELINE_ADD(sof/pipe-detect.m4, + DMIC_PIPELINE_KWD_ID, 2, s24le, + KWD_PIPE_SCH_DEADLINE_US, 1, 0, + `PIPELINE_SCHED_COMP_'DMIC_PIPELINE_16k_ID, + SCHEDULE_TIME_DOMAIN_TIMER, + 16000, 16000, 16000) + +# Connect pipelines together +SectionGraph."pipe-sof-generic-keyword-detect" { + index "0" + + lines [ + # keyword detect + dapm(`PIPELINE_SINK_'DMIC_PIPELINE_KWD_ID, `PIPELINE_SOURCE_'DMIC_PIPELINE_16k_ID) + dapm(`PIPELINE_PCM_'DMIC_PIPELINE_16k_ID, `PIPELINE_DETECT_'DMIC_PIPELINE_KWD_ID) + ] +} + +# +# BE configurations - overrides config in ACPI if present +# + +dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config) +ifelse(CHANNELS, 4, +`DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, dmic01, + DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000, + DMIC_WORD_LENGTH(s32le), 200, DMIC, 0, + PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))', +`DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, dmic01, + DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000, + DMIC_WORD_LENGTH(s32le), 200, DMIC, 0, + PDM_CONFIG(DMIC, 0, STEREO_PDM0)))') + +# dmic16k (ID: 2) +DAI_CONFIG(DMIC, 1, DMIC_DAI_LINK_16k_ID, dmic16k, + DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000, + DMIC_WORD_LENGTH(s32le), 400, DMIC, 1, + PDM_CONFIG(DMIC, 1, STEREO_PDM0))) diff --git a/tools/topology/sof-hda-generic-kwd.m4 b/tools/topology/sof-hda-generic-kwd.m4 new file mode 100644 index 000000000000..0bc24d74445c --- /dev/null +++ b/tools/topology/sof-hda-generic-kwd.m4 @@ -0,0 +1,197 @@ +# Topology for SKL+ HDA Generic machine +# + +# Include topology builder +include(`utils.m4') +include(`dai.m4') +include(`pipeline.m4') + +# Include TLV library +include(`common/tlv.m4') + +# Include Token library +include(`sof/tokens.m4') + +# Include bxt DSP configuration +include(`platform/intel/bxt.m4') + + + + + +# +# Define the pipelines +# +# PCM0 <---> volume (pipe 1,2) <----> HDA Analog (HDA Analog playback/capture) +# PCM1 <---> volume (pipe 3,4) <----> HDA Digital (HDA Digital playback/capture) +# PCM3 ----> volume (pipe 7) -----> iDisp1 (HDMI/DP playback, BE link 3) +# PCM4 ----> Volume (pipe 8) -----> iDisp2 (HDMI/DP playback, BE link 4) +# PCM5 ----> volume (pipe 9) -----> iDisp3 (HDMI/DP playback, BE link 5) +# PCM6 <---- Volume (pipe 10) <----- DMIC01 +# PCM7 <---- KWD (pipe 11/12) <----- DMIC16K (KWD) +# + +# Define pipeline id for intel-generic-dmic-kwd.m4 +# to generate dmic setting with kwd when we have dmic +# define kfbm without volume +# define pcm to 6,7, pipeline to 10,11,12 and dai id to 6,7 +ifelse(CHANNELS, `0', , +` +define(KFBM_TYPE, `kfbm') +define(DMIC_PCM_48k_ID, `6') +define(DMIC_PCM_16k_ID, `7') +define(DMIC_PIPELINE_48k_ID, `10') +define(DMIC_PIPELINE_16k_ID, `11') +define(DMIC_PIPELINE_KWD_ID, `12') +define(DMIC_DAI_LINK_48k_ID, `6') +define(DMIC_DAI_LINK_16k_ID, `7') +define(KWD_PIPE_SCH_DEADLINE_US, 20000) + +include(`platform/intel/intel-generic-dmic-kwd.m4') +' +) + +# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, + 1, 0, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, + 2, 0, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, + 3, 1, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency capture pipeline 4 on PCM 1 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, + 4, 1, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency playback pipeline 7 on PCM 3 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, + 7, 3, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency playback pipeline 8 on PCM 4 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, + 8, 4, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# Low Latency playback pipeline 9 on PCM 5 using max 2 channels of s24le. +# 1000us deadline on core 0 with priority 0 +PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, + 9, 5, 2, s24le, + 1000, 0, 0, + 48000, 48000, 48000) + +# +# DAIs configuration +# + +# playback DAI is HDA Analog using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 1, HDA, 0, Analog Playback and Capture, + PIPELINE_SOURCE_1, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# capture DAI is HDA Analog using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + 2, HDA, 1, Analog Playback and Capture, + PIPELINE_SINK_2, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# playback DAI is HDA Digital using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 3, HDA, 2, Digital Playback and Capture, + PIPELINE_SOURCE_3, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# capture DAI is HDA Digital using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + 4, HDA, 3, Digital Playback and Capture, + PIPELINE_SINK_4, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# playback DAI is iDisp1 using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 7, HDA, 4, iDisp1, + PIPELINE_SOURCE_7, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# playback DAI is iDisp2 using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 8, HDA, 5, iDisp2, + PIPELINE_SOURCE_8, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +# playback DAI is iDisp3 using 2 periods +# Dai buffers use s32le format, 1000us deadline on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 9, HDA, 6, iDisp3, + PIPELINE_SOURCE_9, 2, s32le, + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) + +PCM_DUPLEX_ADD(HDA Analog, 0, PIPELINE_PCM_1, PIPELINE_PCM_2) +PCM_DUPLEX_ADD(HDA Digital, 1, PIPELINE_PCM_3, PIPELINE_PCM_4) +PCM_PLAYBACK_ADD(HDMI1, 3, PIPELINE_PCM_7) +PCM_PLAYBACK_ADD(HDMI2, 4, PIPELINE_PCM_8) +PCM_PLAYBACK_ADD(HDMI3, 5, PIPELINE_PCM_9) + +# +# BE configurations - overrides config in ACPI if present +# + +# HDA outputs +DAI_CONFIG(HDA, 0, 4, Analog Playback and Capture) +DAI_CONFIG(HDA, 1, 5, Digital Playback and Capture) +# 3 HDMI/DP outputs (ID: 3,4,5) +DAI_CONFIG(HDA, 4, 1, iDisp1) +DAI_CONFIG(HDA, 5, 2, iDisp2) +DAI_CONFIG(HDA, 6, 3, iDisp3) + + +VIRTUAL_DAPM_ROUTE_IN(codec0_in, HDA, 1, IN, 1) +VIRTUAL_DAPM_ROUTE_IN(codec1_in, HDA, 3, IN, 2) +VIRTUAL_DAPM_ROUTE_OUT(codec0_out, HDA, 0, OUT, 3) +VIRTUAL_DAPM_ROUTE_OUT(codec1_out, HDA, 2, OUT, 4) + +# codec2 is not supported in dai links but it exists +# in dapm routes, so hack this one to HDA1 +VIRTUAL_DAPM_ROUTE_IN(codec2_in, HDA, 3, IN, 5) +VIRTUAL_DAPM_ROUTE_OUT(codec2_out, HDA, 2, OUT, 6) + +VIRTUAL_DAPM_ROUTE_OUT(iDisp1_out, HDA, 4, OUT, 7) +VIRTUAL_DAPM_ROUTE_OUT(iDisp2_out, HDA, 5, OUT, 8) +VIRTUAL_DAPM_ROUTE_OUT(iDisp3_out, HDA, 6, OUT, 9) + +VIRTUAL_WIDGET(iDisp3 Tx, out_drv, 0) +VIRTUAL_WIDGET(iDisp2 Tx, out_drv, 1) +VIRTUAL_WIDGET(iDisp1 Tx, out_drv, 2) +VIRTUAL_WIDGET(Analog CPU Playback, out_drv, 3) +VIRTUAL_WIDGET(Digital CPU Playback, out_drv, 4) +VIRTUAL_WIDGET(Alt Analog CPU Playback, out_drv, 5) +VIRTUAL_WIDGET(Analog CPU Capture, input, 6) +VIRTUAL_WIDGET(Digital CPU Capture, input, 7) +VIRTUAL_WIDGET(Alt Analog CPU Capture, input, 8) diff --git a/tools/topology/sof-tgl-max98373-rt5682.m4 b/tools/topology/sof-tgl-max98373-rt5682.m4 index c47500886621..ebc120fb45bf 100644 --- a/tools/topology/sof-tgl-max98373-rt5682.m4 +++ b/tools/topology/sof-tgl-max98373-rt5682.m4 @@ -20,17 +20,38 @@ include(`platform/intel/dmic.m4') DEBUG_START + + # # Define the pipelines # # PCM0 ---> volume ----> SSP1 (Speaker - max98373) # PCM1 <---> volume <----> SSP0 (Headset - ALC5682) -# PCM99 <---- volume <---- DMIC01 (dmic0 capture) # PCM2 ----> volume -----> iDisp1 # PCM3 ----> volume -----> iDisp2 # PCM4 ----> volume -----> iDisp3 # PCM5 ----> volume -----> iDisp4 - +# PCM99 <---- volume <---- DMIC01 (dmic 48k capture) +# PCM100 <---- kpb <---- DMIC16K (dmic 16k capture) + +# Define pipeline id for intel-generic-dmic-kwd.m4 +# to generate dmic setting with kwd when we have dmic +# define channel +define(CHANNELS, `4') +# define kfbm with volume +define(KFBM_TYPE, `vol-kfbm') +# define pcm, pipeline and dai id +define(DMIC_PCM_48k_ID, `99') +define(DMIC_PIPELINE_48k_ID, `4') +define(DMIC_DAI_LINK_48k_ID, `1') +define(DMIC_PCM_16k_ID, `100') +define(DMIC_PIPELINE_16k_ID, `9') +define(DMIC_PIPELINE_KWD_ID, `10') +define(DMIC_DAI_LINK_16k_ID, `2') +# define pcm, pipeline and dai id +define(KWD_PIPE_SCH_DEADLINE_US, 20000) +# include the generic dmic with kwd +include(`platform/intel/intel-generic-dmic-kwd.m4') dnl PIPELINE_PCM_ADD(pipeline, dnl pipe id, pcm, max channels, format, @@ -57,13 +78,6 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4, 1000, 0, 0, 48000, 48000, 48000) -# Passthrough capture pipeline 4 on PCM 99 using max 4 channels. -# Schedule 48 frames per 1000us deadline on core 0 with priority 0 -PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4, - 4, 99, 4, s32le, - 1000, 0, 0, - 48000, 48000, 48000) - # Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s32le. # Schedule 48 frames per 1000us deadline on core 0 with priority 0 PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4, @@ -122,13 +136,6 @@ DAI_ADD(sof/pipe-dai-capture.m4, PIPELINE_SINK_3, 2, s24le, 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) -# capture DAI is DMIC01 using 2 periods -# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 -DAI_ADD(sof/pipe-dai-capture.m4, - 4, DMIC, 0, dmic01, - PIPELINE_SINK_4, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) - # playback DAI is iDisp1 using 2 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, @@ -163,7 +170,6 @@ DAI_ADD(sof/pipe-dai-playback.m4, dnl PCM_PLAYBACK_ADD(name, pcm_id, playback) PCM_PLAYBACK_ADD(max373-spk, 0, PIPELINE_PCM_1) PCM_DUPLEX_ADD(Headset, 1, PIPELINE_PCM_2, PIPELINE_PCM_3) -PCM_CAPTURE_ADD(DMIC, 99, PIPELINE_PCM_4) PCM_PLAYBACK_ADD(HDMI1, 2, PIPELINE_PCM_5) PCM_PLAYBACK_ADD(HDMI2, 3, PIPELINE_PCM_6) PCM_PLAYBACK_ADD(HDMI3, 4, PIPELINE_PCM_7) @@ -195,12 +201,6 @@ DAI_CONFIG(SSP, 0, 0, SSP0-Codec, SSP_TDM(2, 25, 3, 3), SSP_CONFIG_DATA(SSP, 0, 24))) -# dmic01 (ID: 1) -DAI_CONFIG(DMIC, 0, 1, dmic01, - DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000, - DMIC_WORD_LENGTH(s32le), 400, DMIC, 0, - PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1))) - # 4 HDMI/DP outputs (ID: 3,4,5,6) DAI_CONFIG(HDA, 0, 3, iDisp1) DAI_CONFIG(HDA, 1, 4, iDisp2) diff --git a/tools/topology/sof/pipe-kfbm-capture.m4 b/tools/topology/sof/pipe-kfbm-capture.m4 index ae80af04f4d8..1f7a094c38e3 100644 --- a/tools/topology/sof/pipe-kfbm-capture.m4 +++ b/tools/topology/sof/pipe-kfbm-capture.m4 @@ -88,7 +88,7 @@ indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), N_PCMC(PCM_ID)) # PCM Configuration # dnl PCM_CAPTURE_LP_ADD(name, pipeline, capture) -PCM_CAPTURE_LP_ADD(DMIC16k, PIPELINE_ID, N_STS(PCM_ID)) +PCM_CAPTURE_LP_ADD(DMIC16k, PCM_ID, N_STS(PCM_ID)) PCM_CAPABILITIES(N_STS(PCM_ID), `S32_LE,S24_LE,S16_LE', 16000, 16000, 2, PIPELINE_CHANNELS, 2, 160, 192, 256000, 256000, 1280000) diff --git a/tools/topology/sof/pipe-vol-kfbm-capture.m4 b/tools/topology/sof/pipe-vol-kfbm-capture.m4 new file mode 100644 index 000000000000..d198678e8bce --- /dev/null +++ b/tools/topology/sof/pipe-vol-kfbm-capture.m4 @@ -0,0 +1,122 @@ +# Passthrough Capture Pipeline with KPBM and PCM +# +# Pipeline Endpoints for connection are :- +# +# host PCM_C <-+- KPBM 0 <-- B1 <-- Volume 0 <-- B0 <-- source DAI0 +# | +# Others <--+ + +# Include topology builder +include(`utils.m4') +include(`buffer.m4') +include(`pcm.m4') +include(`pga.m4') +include(`dai.m4') +include(`kpbm.m4') +include(`mixercontrol.m4') +include(`bytecontrol.m4') +include(`pipeline.m4') + +dnl Soun Trigger Stream Name) +define(`N_STS', `Sound Trigger Capture '$1) + +# +# Controls +# + +# kpbm initial parameters, aligned with struct sof_kpb_config +CONTROLBYTES_PRIV(KPB_priv, +` bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,' +` 0x18,0x00,0x00,0x00,0x00,0x10,0x00,0x03,' +` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,' +` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,' +` 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,' +` 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,' +` 0x80,0x3e,0x00,0x00,0x10,0x00,0x00,0x00"' +) + +# KPB Bytes control with max value of 255 +C_CONTROLBYTES(KPB, PIPELINE_ID, + CONTROLBYTES_OPS(bytes, 258 binds the mixer control to bytes get/put handlers, 258, 258), + CONTROLBYTES_EXTOPS(258 binds the mixer control to bytes get/put handlers, 258, 258), + , , , + CONTROLBYTES_MAX(, 304), + , + KPB_priv) + +# Volume Mixer control with max value of 80 +C_CONTROLMIXER(KWD Capture Volume, PIPELINE_ID, + CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256), + CONTROLMIXER_MAX(, 80), + false, + CONTROLMIXER_TLV(TLV 80 steps from -50dB to +30dB for 1dB, vtlv_m50s1), + Channel register and shift for Front Left/Right, + LIST(` ', KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1))) + +# +# Volume configuration +# + +W_VENDORTUPLES(capture_pga_tokens, sof_volume_tokens, +LIST(` ', `SOF_TKN_VOLUME_RAMP_STEP_TYPE "0"' + ` ', `SOF_TKN_VOLUME_RAMP_STEP_MS "250"')) + +W_DATA(capture_pga_conf, capture_pga_tokens) + +# +# Components and Buffers +# + +# Host "Passthrough Capture" PCM +# with 0 sink and 2 source periods +W_PCM_CAPTURE(PCM_ID, Sound Trigger Capture, 0, 2, 2) + +# "Volume" has x source and 2 sink periods +W_PGA(0, PIPELINE_FORMAT, 2, DAI_PERIODS, capture_pga_conf, LIST(` ', "PIPELINE_ID KWD Capture Volume")) + +# "KPBM" has 2 source and 2 sink periods +W_KPBM(0, PIPELINE_FORMAT, 2, 2, PIPELINE_ID, LIST(` ', "KPB")) + +# Capture Buffers +W_BUFFER(0, COMP_BUFFER_SIZE(DAI_PERIODS, + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), + PLATFORM_DAI_MEM_CAP) +# Capture Buffers +W_BUFFER(1, COMP_BUFFER_SIZE(2, + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), + PLATFORM_HOST_MEM_CAP) +# Capture Buffers +W_BUFFER(2, COMP_BUFFER_SIZE(2, + COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)), + PLATFORM_HOST_MEM_CAP) + +# +# Pipeline Graph +# +# host PCM_C <-- B2 <--+- KPBM 0 <-- B1 <-- volume 0 <-- B0 <-- source DAI0 +# | +# Others <-- + +P_GRAPH(pipe-kpbm-capture-PIPELINE_ID, PIPELINE_ID, + LIST(` ', + `dapm(N_PCMC(PCM_ID), N_BUFFER(2))', + `dapm(N_BUFFER(2), N_KPBM(0, PIPELINE_ID))', + `dapm(N_KPBM(0, PIPELINE_ID), N_BUFFER(1))', + `dapm(N_BUFFER(1), N_PGA(0, PIPELINE_ID))', + `dapm(N_PGA(0, PIPELINE_ID), N_BUFFER(0))')) + +# +# Pipeline Source and Sinks +# +indir(`define', concat(`PIPELINE_SINK_', PIPELINE_ID), N_BUFFER(0)) +indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_KPBM(0, PIPELINE_ID)) +indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), N_PCMC(PCM_ID)) + +# +# PCM Configuration +# +dnl PCM_CAPTURE_LP_ADD(name, pipeline, capture) +PCM_CAPTURE_LP_ADD(DMIC16k, PCM_ID, N_STS(PCM_ID)) + +PCM_CAPABILITIES(N_STS(PCM_ID), `S32_LE,S24_LE,S16_LE', 16000, 16000, 2, PIPELINE_CHANNELS, 2, 160, 192, 256000, 256000, 1280000) +