From 6b34542c7bc762e50120d8874f09944330e4cd55 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 09:18:49 -0700 Subject: [PATCH 1/8] ipc4: Clean up toolchain definitions __packed and __aligned are defined in compiler_attributes.h, which wasn't included, and when building for Zephyr that needs to include the zephyr/toolchain.h header which is the original source of those macros. Transitive headers were saving this, but building for posix/fuzzing works differently. Signed-off-by: Andy Ross --- src/include/ipc4/notification.h | 1 + xtos/include/sof/compiler_attributes.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/src/include/ipc4/notification.h b/src/include/ipc4/notification.h index d4bfeaf3826c..658cbcc50ce1 100644 --- a/src/include/ipc4/notification.h +++ b/src/include/ipc4/notification.h @@ -25,6 +25,7 @@ #include #include +#include /* ipc4 notification msg */ enum sof_ipc4_notification_type { diff --git a/xtos/include/sof/compiler_attributes.h b/xtos/include/sof/compiler_attributes.h index 3eb5a45e1a7b..30ccaff1fe15 100644 --- a/xtos/include/sof/compiler_attributes.h +++ b/xtos/include/sof/compiler_attributes.h @@ -7,6 +7,8 @@ #ifdef __ZEPHYR__ +#include + /* Get __sparse_cache and __sparse_force definitions if __CHECKER__ is defined */ #include From 3b578ce66770f249bb48af87e60d0e3c8d01c655 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 09:46:12 -0700 Subject: [PATCH 2/8] base_fw: Add missing header CLK_MAX_CPU_HZ is defined in platform/lib/clk.h, unmasked by posix work that lacks the same transitive headers. Signed-off-by: Andy Ross --- src/audio/base_fw.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/audio/base_fw.c b/src/audio/base_fw.c index 0531e7a60b68..50264c6c3f58 100644 --- a/src/audio/base_fw.c +++ b/src/audio/base_fw.c @@ -11,6 +11,7 @@ #include #include #include +#include #if CONFIG_ACE_V1X_ART_COUNTER || CONFIG_ACE_V1X_RTC_COUNTER #include From dd9d36c4811ec2178b86dfce08b2da3c0de28deb Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 11:40:39 -0700 Subject: [PATCH 3/8] init.c: Missing header This calls mailbox APIs when building for IPC4, but was missing the header Signed-off-by: Andy Ross --- src/init/init.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/init/init.c b/src/init/init.c index 713679635d55..7a0de9cb1cd5 100644 --- a/src/init/init.c +++ b/src/init/init.c @@ -32,6 +32,7 @@ #include #if CONFIG_IPC_MAJOR_4 #include +#include #endif #ifdef CONFIG_ZEPHYR_LOG #include From 7fd020a8faf389a43fb6569879e5f509c0204cf8 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 13:30:38 -0700 Subject: [PATCH 4/8] base_fw: No Intel register reads in non-platform code This was trying to read hardware registers, which obviously doesn't work on other platforms. Stub with zeros for now. Longer term: this whole message ("basefw_mem_state_info") might want some rework. In addition to being heavily hardware-specific, it seems like a comparatively large block without self-describing data (e.g. id/val pairs), nor with a struct definition to specify it, nor with any documentation that I can find. Signed-off-by: Andy Ross --- src/audio/base_fw.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/audio/base_fw.c b/src/audio/base_fw.c index 50264c6c3f58..e4806b081b7f 100644 --- a/src/audio/base_fw.c +++ b/src/audio/base_fw.c @@ -18,6 +18,11 @@ #include #endif +/* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */ +#if defined(CONFIG_SOC_SERIES_INTEL_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) +# define INTEL_ADSP 1 +#endif + LOG_MODULE_REGISTER(basefw, CONFIG_SOF_LOG_LEVEL); /* 0e398c32-5ade-ba4b-93b1-c50432280ee4 */ @@ -197,8 +202,13 @@ static int basefw_mem_state_info(uint32_t *data_offset, char *data) index = 0; tuple_data[index++] = info.free_phys_mem_pages; tuple_data[index++] = info.ebb_state_dword_count; - for (i = 0; i < info.ebb_state_dword_count; i++) + for (i = 0; i < info.ebb_state_dword_count; i++) { +#ifdef INTEL_ADSP tuple_data[index + i] = io_reg_read(SHIM_HSPGCTL(i)); +#else + tuple_data[index + i] = 0; +#endif + } index += info.ebb_state_dword_count; tuple_data[index++] = info.page_alloc_struct.page_alloc_count; @@ -222,7 +232,11 @@ static int basefw_mem_state_info(uint32_t *data_offset, char *data) index = 0; tuple_data[index++] = info.free_phys_mem_pages; tuple_data[index++] = info.ebb_state_dword_count; +#ifdef INTEL_ADSP tuple_data[index++] = io_reg_read(LSPGCTL); +#else + tuple_data[index++] = 0; +#endif tuple_data[index++] = info.page_alloc_struct.page_alloc_count; ptr = (uint16_t *)(tuple_data + index); for (i = 0; i < info.page_alloc_struct.page_alloc_count; i++) From 2f5d048321802bde2e33195f90f27a51da49d32b Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 09:47:20 -0700 Subject: [PATCH 5/8] ipc4: Clean up Intel/rimage dependencies The component model for IPC4 seems to be based on an array of manifest headers at the start of the firmware image. Those are rimage data, and not all platforms (in particular the fuzzer) are packing their output with rimage. Just stub this for now. In the source tree as it exists, there don't seem to be any extra components to build, nor is there any support I can see at the linker/rimage level to get them included anyway. Signed-off-by: Andy Ross --- src/ipc/ipc4/helper.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/src/ipc/ipc4/helper.c b/src/ipc/ipc4/helper.c index a58e0f252c9f..a6aaa658f0fa 100644 --- a/src/ipc/ipc4/helper.c +++ b/src/ipc/ipc4/helper.c @@ -20,8 +20,14 @@ #include #include #include -#ifdef __ZEPHYR__ -#include /* for IMR_BOOT_LDR_MANIFEST_BASE */ + +/* TODO: Remove platform-specific code, see https://github.com/thesofproject/sof/issues/7549 */ +#if defined(CONFIG_SOC_SERIES_INTEL_ACE) || defined(CONFIG_INTEL_ADSP_CAVS) +#define RIMAGE_MANIFEST 1 +#endif + +#ifdef RIMAGE_MANIFEST +#include #endif #include @@ -685,11 +691,20 @@ const struct comp_driver *ipc4_get_drv(uint8_t *uuid) const struct comp_driver *ipc4_get_comp_drv(int module_id) { - struct sof_man_fw_desc *desc = (struct sof_man_fw_desc *)IMR_BOOT_LDR_MANIFEST_BASE; + struct sof_man_fw_desc *desc = NULL; const struct comp_driver *drv; struct sof_man_module *mod; int entry_index; +#ifdef RIMAGE_MANIFEST + desc = (struct sof_man_fw_desc *)IMR_BOOT_LDR_MANIFEST_BASE; +#else + /* Non-rimage platforms have no component facility yet. This + * needs to move to the platform layer. + */ + return NULL; +#endif + uint32_t lib_idx = LIB_MANAGER_GET_LIB_ID(module_id); if (lib_idx == 0) { From 01d700060fec6f6509aa9c6ed5ad8d9303e62569 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 11:41:21 -0700 Subject: [PATCH 6/8] platform/posix: Update for IPC4 Add new APIs needed for CONFIG_IPC_MAJOR_4=y builds. Note that many of these are fairly Intel-specific, meaning they probably don't belong in the platform layer. But in this case (fuzzing) it's probably worthwhile to enable as much code as possible vs. refactoring for purity. Future IPC4 hardware platforms will need to do that refactoring for us anyway. Signed-off-by: Andy Ross --- .../posix/include/platform/drivers/alh.h | 6 ++++++ src/platform/posix/include/platform/lib/clk.h | 9 +++++++++ src/platform/posix/include/platform/lib/dai.h | 7 +++++++ .../posix/include/platform/lib/mailbox.h | 18 ++++++++++++++++++ .../posix/include/platform/lib/memory.h | 5 +++++ src/platform/posix/include/platform/platform.h | 2 ++ src/platform/posix/ipc.c | 17 +++++++++++++++++ 7 files changed, 64 insertions(+) create mode 100644 src/platform/posix/include/platform/drivers/alh.h diff --git a/src/platform/posix/include/platform/drivers/alh.h b/src/platform/posix/include/platform/drivers/alh.h new file mode 100644 index 000000000000..c53613144dfd --- /dev/null +++ b/src/platform/posix/include/platform/drivers/alh.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2023 Google LLC. All rights reserved. + * Author: Andy Ross + */ +/* empty file, must be included but defines no needed APIs */ + diff --git a/src/platform/posix/include/platform/lib/clk.h b/src/platform/posix/include/platform/lib/clk.h index 2e17b20bdb7d..3c9ff3b96950 100644 --- a/src/platform/posix/include/platform/lib/clk.h +++ b/src/platform/posix/include/platform/lib/clk.h @@ -2,3 +2,12 @@ * Copyright(c) 2022 Google LLC. All rights reserved. * Author: Andy Ross */ + +#define CLK_MAX_CPU_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC +#define CPU_LPRO_FREQ_IDX 1 + +/* This is not a platform function, it's defined in src/lib/clk.c. + * But the declaration has historically been in the platform layer, so + * it's repeated here. + */ +uint32_t clock_get_freq(int clock); diff --git a/src/platform/posix/include/platform/lib/dai.h b/src/platform/posix/include/platform/lib/dai.h index 2e17b20bdb7d..02b58fb55681 100644 --- a/src/platform/posix/include/platform/lib/dai.h +++ b/src/platform/posix/include/platform/lib/dai.h @@ -2,3 +2,10 @@ * Copyright(c) 2022 Google LLC. All rights reserved. * Author: Andy Ross */ + +#define DAI_NUM_ALH_BI_DIR_LINKS_GROUP 4 +#define DAI_NUM_HDA_IN 10 +#define DAI_NUM_HDA_OUT 9 +#define DAI_NUM_SSP_BASE 6 +#define DAI_NUM_ALH_BI_DIR_LINKS 16 + diff --git a/src/platform/posix/include/platform/lib/mailbox.h b/src/platform/posix/include/platform/lib/mailbox.h index 376e3c319bba..3a42e93f6ea2 100644 --- a/src/platform/posix/include/platform/lib/mailbox.h +++ b/src/platform/posix/include/platform/lib/mailbox.h @@ -7,4 +7,22 @@ #include +static inline uint32_t mailbox_sw_reg_read(size_t offset) +{ + return 0; +} + +static inline uint64_t mailbox_sw_reg_read64(size_t offset) +{ + return 0; +} + +static inline void mailbox_sw_reg_write(size_t offset, uint32_t src) +{ +} + +static inline void mailbox_sw_regs_write(size_t offset, const void *src, size_t bytes) +{ +} + #endif /* PLATFORM_POSIX_LIB_MAILBOX_H */ diff --git a/src/platform/posix/include/platform/lib/memory.h b/src/platform/posix/include/platform/lib/memory.h index 50ea8ffc091e..1118cda6c8d0 100644 --- a/src/platform/posix/include/platform/lib/memory.h +++ b/src/platform/posix/include/platform/lib/memory.h @@ -39,6 +39,11 @@ static inline void *platform_shared_get(void *ptr, int bytes) return ptr; } +#define SRAM_BANK_SIZE 0x10000 +#define EBB_BANKS_IN_SEGMENT 32 +#define PLATFORM_HPSRAM_EBB_COUNT 32 +#define PLATFORM_LPSRAM_EBB_COUNT 1 + #define SHARED_DATA /**/ #endif /* PLATFORM_HOST_PLATFORM_MEMORY_H */ diff --git a/src/platform/posix/include/platform/platform.h b/src/platform/posix/include/platform/platform.h index 5c9c264d54e5..aae9ac4be4f9 100644 --- a/src/platform/posix/include/platform/platform.h +++ b/src/platform/posix/include/platform/platform.h @@ -24,6 +24,8 @@ #define PLATFORM_DEFAULT_DELAY 12 +#define HW_CFG_VERSION 0x010000 + struct sof; void posix_dma_init(struct sof *sof); diff --git a/src/platform/posix/ipc.c b/src/platform/posix/ipc.c index 8a1f800cb158..bebc58f5a57b 100644 --- a/src/platform/posix/ipc.c +++ b/src/platform/posix/ipc.c @@ -184,3 +184,20 @@ int platform_ipc_init(struct ipc *ipc) return 0; } + +/* Quirky handling of 8 byte messages due to the Intel IPC mechanism + * that has two out-of-band words on the controller hardware that + * avoid the need for shared memory. + */ +int ipc_platform_compact_read_msg(struct ipc_cmd_hdr *hdr, int words) +{ + uint32_t *chdr = (uint32_t *)hdr; + + if (words != 2) + return 0; + + chdr[0] = ((uint32_t *)posix_hostbox)[0]; + chdr[1] = ((uint32_t *)posix_hostbox)[1]; + + return 2; /* number of words read */ +} From c199a613212aa22e98392f822ca2bb2519852cb2 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 25 Apr 2023 16:33:45 -0700 Subject: [PATCH 7/8] platform/posix: IPC4 updates Don't use the IPC3 protocol whiteboxing for IPC4, the formats are different. Also IPC4 seems to send a LOT of zero-length empty replies. Those are causing spurious errors (memcmp_s fails when you pass it a null destination pointer, even when the length is zero), where the Intel IPC driver will just drop them. Suppress handling to match behavior, though this is probably a buglet worth investigating. Signed-off-by: Andy Ross --- src/platform/posix/ipc.c | 62 ++++++++++++++++++++++------------------ 1 file changed, 34 insertions(+), 28 deletions(-) diff --git a/src/platform/posix/ipc.c b/src/platform/posix/ipc.c index bebc58f5a57b..8c3e7fdcafd7 100644 --- a/src/platform/posix/ipc.c +++ b/src/platform/posix/ipc.c @@ -69,6 +69,7 @@ static void fuzz_isr(const void *arg) memmove(&fuzz_in[0], &fuzz_in[n + 1], rem); fuzz_in_sz = rem; +#ifdef CONFIG_IPC_MAJOR_3 // One special case: a first byte of 0xff (which is in the // otherwise-ignored size value at the front of the command -- // we rewrite those) is interpreted as a "component new" @@ -129,32 +130,48 @@ static void fuzz_isr(const void *arg) struct comp_driver_info *di = drvs[comp_idx % ndrvs]; memcpy(cmd->ext.uuid, di->drv->uid, sizeof(cmd->ext.uuid)); } +#endif posix_ipc_isr(NULL); } -// This API is a little confounded by its history. The job of this -// function is to get a newly-received IPC message header (!) into the -// comp_data buffer on the IPC object, the rest of the message -// (including the header!) into the mailbox region (obviously on Intel -// that's a shared memory region where data was already written by the -// host kernel) and then call ipc_cmd() with the same pointer. With -// IPC3, this copy is done inside mailbox_validate(). +// This API is... confounded by its history. With IPC3, the job of +// this function is to get a newly-received IPC message header (!) +// into the comp_data buffer on the IPC object, the rest of the +// message (including the header!) into the mailbox region (obviously +// on Intel that's a shared memory region where data was already +// written by the host kernel) and then call ipc_cmd() with the same +// pointer. With IPC3, this copy is done inside mailbox_validate(). // -// On IPC4 all of this is a noop and the platform is responsible for -// what memory to use and what pointer to pass to ipc_cmd(). We do -// this compatibly by starting with the message in comp_data and -// copying it into the hostbox unconditionally. +// On IPC4, the header is copied out by calling +// ipc_compact_read_msg(), which then calls back into our code via +// ipc_platform_compact_read_msg(), writing 8 bytes unconditionally on +// the header object it receives, which is then returned here, and +// then passed to ipc_cmd(). enum task_state ipc_platform_do_cmd(struct ipc *ipc) { struct ipc_cmd_hdr *hdr; +#ifdef CONFIG_IPC_MAJOR_4 + hdr = ipc_compact_read_msg(); +#else memcpy(posix_hostbox, global_ipc->comp_data, SOF_IPC_MSG_MAX_SIZE); hdr = mailbox_validate(); +#endif + ipc_cmd(hdr); return SOF_TASK_STATE_COMPLETED; } +int ipc_platform_compact_read_msg(struct ipc_cmd_hdr *hdr, int words) +{ + if (words != 2) + return 0; + + memcpy(hdr, global_ipc->comp_data, 8); + return 2; +} + // Re-raise the interrupt if there's still fuzz data to process void ipc_platform_complete_cmd(struct ipc *ipc) { @@ -168,6 +185,12 @@ void ipc_platform_complete_cmd(struct ipc *ipc) int ipc_platform_send_msg(const struct ipc_msg *msg) { + // IPC4 will send zero-length messages with a null buffer + // pointer, which otherwise gets detected as an error by + // memcpy_s underneath mailbox_dspbox_write() + if (IS_ENABLED(CONFIG_IPC_MAJOR_4) && msg->tx_size == 0) + return 0; + // There is no host, just write to the mailbox to validate the buffer mailbox_dspbox_write(0, msg->tx_data, msg->tx_size); return 0; @@ -184,20 +207,3 @@ int platform_ipc_init(struct ipc *ipc) return 0; } - -/* Quirky handling of 8 byte messages due to the Intel IPC mechanism - * that has two out-of-band words on the controller hardware that - * avoid the need for shared memory. - */ -int ipc_platform_compact_read_msg(struct ipc_cmd_hdr *hdr, int words) -{ - uint32_t *chdr = (uint32_t *)hdr; - - if (words != 2) - return 0; - - chdr[0] = ((uint32_t *)posix_hostbox)[0]; - chdr[1] = ((uint32_t *)posix_hostbox)[1]; - - return 2; /* number of words read */ -} From f2e782a0cade1b08ff185f08bde25dfb707c6f63 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Wed, 26 Apr 2023 18:31:31 -0700 Subject: [PATCH 8/8] ipc4: Quiet errors when fuzzing Fuzzing produces (by design) an endless flood of protocol errors. Quiet the top level ones when in use, because otherwise the log output takes up most of the CPU time available that we'd rather spend on fuzzing. Same trick from IPC3. Signed-off-by: Andy Ross --- src/ipc/ipc4/handler.c | 117 ++++++++++++++++++++++------------------- 1 file changed, 64 insertions(+), 53 deletions(-) diff --git a/src/ipc/ipc4/handler.c b/src/ipc/ipc4/handler.c index bc03ee6ab37b..91d9c2ba937f 100644 --- a/src/ipc/ipc4/handler.c +++ b/src/ipc/ipc4/handler.c @@ -42,6 +42,17 @@ #include #include +/* Command format errors during fuzzing are reported for virtually all + * commands, and the resulting flood of logging becomes a severe + * performance penalty (i.e. we get a lot less fuzzing done per CPU + * cycle). + */ +#ifdef CONFIG_ARCH_POSIX_LIBFUZZER +#define ipc_cmd_err(...) +#else +#define ipc_cmd_err(...) tr_err(__VA_ARGS__) +#endif + LOG_MODULE_DECLARE(ipc, CONFIG_SOF_LOG_LEVEL); struct ipc4_msg_data { @@ -127,25 +138,25 @@ static int ipc4_pcm_params(struct ipc_comp_dev *pcm_dev) /* sanity check comp */ if (!pcm_dev->cd->pipeline) { - tr_err(&ipc_tr, "ipc: comp %d pipeline not found", pcm_dev->id); + ipc_cmd_err(&ipc_tr, "ipc: comp %d pipeline not found", pcm_dev->id); return -EINVAL; } /* configure pipeline audio params */ err = ipc4_pipeline_params(pcm_dev->cd->pipeline, pcm_dev->cd); if (err < 0) { - tr_err(&ipc_tr, "ipc: pipe %d comp %d params failed %d", - pcm_dev->cd->pipeline->pipeline_id, - pcm_dev->cd->pipeline->comp_id, err); + ipc_cmd_err(&ipc_tr, "ipc: pipe %d comp %d params failed %d", + pcm_dev->cd->pipeline->pipeline_id, + pcm_dev->cd->pipeline->comp_id, err); goto error; } /* prepare pipeline audio params */ err = pipeline_prepare(pcm_dev->cd->pipeline, pcm_dev->cd); if (err < 0) { - tr_err(&ipc_tr, "ipc: pipe %d comp %d prepare failed %d", - pcm_dev->cd->pipeline->pipeline_id, - pcm_dev->cd->pipeline->comp_id, err); + ipc_cmd_err(&ipc_tr, "ipc: pipe %d comp %d prepare failed %d", + pcm_dev->cd->pipeline->pipeline_id, + pcm_dev->cd->pipeline->comp_id, err); goto error; } @@ -154,9 +165,9 @@ static int ipc4_pcm_params(struct ipc_comp_dev *pcm_dev) error: reset_err = pipeline_reset(pcm_dev->cd->pipeline, pcm_dev->cd); if (reset_err < 0) - tr_err(&ipc_tr, "ipc: pipe %d comp %d reset failed %d", - pcm_dev->cd->pipeline->pipeline_id, - pcm_dev->cd->pipeline->comp_id, reset_err); + ipc_cmd_err(&ipc_tr, "ipc: pipe %d comp %d reset failed %d", + pcm_dev->cd->pipeline->pipeline_id, + pcm_dev->cd->pipeline->comp_id, reset_err); return err; } @@ -228,7 +239,7 @@ static int set_pipeline_state(struct ipc_comp_dev *ppl_icd, uint32_t cmd, host = ipc_get_comp_by_id(ipc, host_id); if (!host) { - tr_err(&ipc_tr, "ipc: comp host with ID %d not found", host_id); + ipc_cmd_err(&ipc_tr, "ipc: comp host with ID %d not found", host_id); return IPC4_INVALID_RESOURCE_ID; } } @@ -251,7 +262,7 @@ static int set_pipeline_state(struct ipc_comp_dev *ppl_icd, uint32_t cmd, cmd = COMP_TRIGGER_PRE_RELEASE; break; default: - tr_err(&ipc_tr, "ipc: current status %d", status); + ipc_cmd_err(&ipc_tr, "ipc: current status %d", status); return IPC4_INVALID_REQUEST; } break; @@ -270,15 +281,15 @@ static int set_pipeline_state(struct ipc_comp_dev *ppl_icd, uint32_t cmd, case COMP_STATE_PAUSED: ret = pipeline_trigger(host->cd->pipeline, host->cd, COMP_TRIGGER_STOP); if (ret < 0) { - tr_err(&ipc_tr, "ipc: comp %d trigger 0x%x failed %d", - ppl_icd->id, cmd, ret); + ipc_cmd_err(&ipc_tr, "ipc: comp %d trigger 0x%x failed %d", + ppl_icd->id, cmd, ret); return IPC4_PIPELINE_STATE_NOT_SET; } if (ret == PPL_STATUS_SCHEDULED) *delayed = true; break; default: - tr_err(&ipc_tr, "ipc: invalid status %d for RESET", status); + ipc_cmd_err(&ipc_tr, "ipc: invalid status %d for RESET", status); return IPC4_INVALID_REQUEST; } @@ -317,14 +328,14 @@ static int set_pipeline_state(struct ipc_comp_dev *ppl_icd, uint32_t cmd, case SOF_IPC4_PIPELINE_STATE_SAVED: case SOF_IPC4_PIPELINE_STATE_ERROR_STOP: default: - tr_err(&ipc_tr, "ipc: unsupported trigger cmd 0x%x", cmd); + ipc_cmd_err(&ipc_tr, "ipc: unsupported trigger cmd 0x%x", cmd); return IPC4_INVALID_REQUEST; } /* trigger the component */ ret = pipeline_trigger(host->cd->pipeline, host->cd, cmd); if (ret < 0) { - tr_err(&ipc_tr, "ipc: comp %d trigger 0x%x failed %d", ppl_icd->id, cmd, ret); + ipc_cmd_err(&ipc_tr, "ipc: comp %d trigger 0x%x failed %d", ppl_icd->id, cmd, ret); ret = IPC4_PIPELINE_STATE_NOT_SET; } else if (ret == PPL_STATUS_SCHEDULED) { *delayed = true; @@ -345,7 +356,7 @@ static void ipc_compound_pre_start(int msg_id) static void ipc_compound_post_start(uint32_t msg_id, int ret, bool delayed) { if (ret) { - tr_err(&ipc_tr, "failed to process msg %d status %d", msg_id, ret); + ipc_cmd_err(&ipc_tr, "failed to process msg %d status %d", msg_id, ret); atomic_set(&msg_data.delayed_reply, 0); return; } @@ -358,7 +369,7 @@ static void ipc_compound_post_start(uint32_t msg_id, int ret, bool delayed) static void ipc_compound_msg_done(uint32_t msg_id, int error) { if (!atomic_read(&msg_data.delayed_reply)) { - tr_err(&ipc_tr, "unexpected delayed reply"); + ipc_cmd_err(&ipc_tr, "unexpected delayed reply"); return; } @@ -379,7 +390,7 @@ static int ipc_wait_for_compound_msg(void) k_sleep(Z_TIMEOUT_US(250)); if (!try_count--) { - tr_err(&ipc_tr, "failed to wait schedule thread"); + ipc_cmd_err(&ipc_tr, "failed to wait schedule thread"); return IPC4_FAILURE; } } @@ -421,7 +432,7 @@ static int ipc4_set_pipeline_state(struct ipc4_message_request *ipc4) ppl_icd = ipc_get_comp_by_ppl_id(ipc, COMP_TYPE_PIPELINE, ppl_id[i]); if (!ppl_icd) { - tr_err(&ipc_tr, "ipc: comp %d not found", ppl_id[i]); + ipc_cmd_err(&ipc_tr, "ipc: comp %d not found", ppl_id[i]); return IPC4_INVALID_RESOURCE_ID; } @@ -536,8 +547,8 @@ static int ipc4_process_ipcgtw_cmd(struct ipc4_message_request *ipc4) if (msg_reply.tx_data) { msg_reply.tx_size = reply_size; } else { - tr_err(&ipc_tr, "failed to allocate %u bytes for msg_reply.tx_data", - reply_size); + ipc_cmd_err(&ipc_tr, "failed to allocate %u bytes for msg_reply.tx_data", + reply_size); msg_reply.extension = 0; return IPC4_OUT_OF_MEMORY; } @@ -545,7 +556,7 @@ static int ipc4_process_ipcgtw_cmd(struct ipc4_message_request *ipc4) return err < 0 ? IPC4_FAILURE : IPC4_SUCCESS; #else - tr_err(&ipc_tr, "CONFIG_IPC4_GATEWAY is disabled"); + ipc_cmd_err(&ipc_tr, "CONFIG_IPC4_GATEWAY is disabled"); return IPC4_UNAVAILABLE; #endif } @@ -563,7 +574,7 @@ static int ipc4_process_glb_message(struct ipc4_message_request *ipc4) case SOF_IPC4_GLB_PERF_MEASUREMENTS_CMD: case SOF_IPC4_GLB_LOAD_MULTIPLE_MODULES: case SOF_IPC4_GLB_UNLOAD_MULTIPLE_MODULES: - tr_err(&ipc_tr, "not implemented ipc message type %d", type); + ipc_cmd_err(&ipc_tr, "not implemented ipc message type %d", type); ret = IPC4_UNAVAILABLE; break; @@ -586,7 +597,7 @@ static int ipc4_process_glb_message(struct ipc4_message_request *ipc4) case SOF_IPC4_GLB_GET_PIPELINE_CONTEXT_SIZE: case SOF_IPC4_GLB_SAVE_PIPELINE: case SOF_IPC4_GLB_RESTORE_PIPELINE: - tr_err(&ipc_tr, "not implemented ipc message type %d", type); + ipc_cmd_err(&ipc_tr, "not implemented ipc message type %d", type); ret = IPC4_UNAVAILABLE; break; @@ -597,13 +608,13 @@ static int ipc4_process_glb_message(struct ipc4_message_request *ipc4) break; #endif case SOF_IPC4_GLB_INTERNAL_MESSAGE: - tr_err(&ipc_tr, "not implemented ipc message type %d", type); + ipc_cmd_err(&ipc_tr, "not implemented ipc message type %d", type); ret = IPC4_UNAVAILABLE; break; /* Notification (FW to SW driver) */ case SOF_IPC4_GLB_NOTIFICATION: - tr_err(&ipc_tr, "not implemented ipc message type %d", type); + ipc_cmd_err(&ipc_tr, "not implemented ipc message type %d", type); ret = IPC4_UNAVAILABLE; break; @@ -612,7 +623,7 @@ static int ipc4_process_glb_message(struct ipc4_message_request *ipc4) break; default: - tr_err(&ipc_tr, "unsupported ipc message type %d", type); + ipc_cmd_err(&ipc_tr, "unsupported ipc message type %d", type); ret = IPC4_UNAVAILABLE; break; } @@ -649,9 +660,9 @@ static int ipc4_init_module_instance(struct ipc4_message_request *ipc4) dev = comp_new_ipc4(&module_init); if (!dev) { - tr_err(&ipc_tr, "error: failed to init module %x : %x", - (uint32_t)module_init.primary.r.module_id, - (uint32_t)module_init.primary.r.instance_id); + ipc_cmd_err(&ipc_tr, "error: failed to init module %x : %x", + (uint32_t)module_init.primary.r.module_id, + (uint32_t)module_init.primary.r.instance_id); return IPC4_MOD_NOT_INITIALIZED; } @@ -762,7 +773,7 @@ static int ipc4_get_large_config_module_instance(struct ipc4_message_request *ip msg_reply.tx_size = data_offset; msg_reply.tx_data = response_buffer; } else { - tr_err(&ipc_tr, "error: failed to allocate tx_data"); + ipc_cmd_err(&ipc_tr, "error: failed to allocate tx_data"); ret = IPC4_OUT_OF_MEMORY; } @@ -810,9 +821,9 @@ static int ipc4_set_large_config_module_instance(struct ipc4_message_request *ip config.extension.r.data_off_size, (const char *)MAILBOX_HOSTBOX_BASE); if (ret < 0) { - tr_err(&ipc_tr, "failed to set large_config_module_instance %x : %x", - (uint32_t)config.primary.r.module_id, - (uint32_t)config.primary.r.instance_id); + ipc_cmd_err(&ipc_tr, "failed to set large_config_module_instance %x : %x", + (uint32_t)config.primary.r.module_id, + (uint32_t)config.primary.r.instance_id); ret = IPC4_INVALID_RESOURCE_ID; } @@ -835,9 +846,9 @@ static int ipc4_delete_module_instance(struct ipc4_message_request *ipc4) comp_id = IPC4_COMP_ID(module.primary.r.module_id, module.primary.r.instance_id); ret = ipc_comp_free(ipc, comp_id); if (ret < 0) { - tr_err(&ipc_tr, "failed to delete module instance %x : %x", - (uint32_t)module.primary.r.module_id, - (uint32_t)module.primary.r.instance_id); + ipc_cmd_err(&ipc_tr, "failed to delete module instance %x : %x", + (uint32_t)module.primary.r.module_id, + (uint32_t)module.primary.r.instance_id); ret = IPC4_INVALID_RESOURCE_ID; } @@ -861,7 +872,7 @@ static int ipc4_module_process_d0ix(struct ipc4_message_request *ipc4) /* only module 0 can be used to set d0ix state */ if (d0ix.primary.r.module_id || d0ix.primary.r.instance_id) { - tr_err(&ipc_tr, "invalid resource id %x : %x", module_id, instance_id); + ipc_cmd_err(&ipc_tr, "invalid resource id %x : %x", module_id, instance_id); return IPC4_INVALID_RESOURCE_ID; } @@ -890,7 +901,7 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4) /* only module 0 can be used to set dx state */ if (module_id || instance_id) { - tr_err(&ipc_tr, "invalid resource id %x : %x", module_id, instance_id); + ipc_cmd_err(&ipc_tr, "invalid resource id %x : %x", module_id, instance_id); return IPC4_INVALID_RESOURCE_ID; } @@ -903,8 +914,8 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4) /* check if core enable mask is valid */ if (dx_info.core_mask > MASK(CONFIG_CORE_COUNT - 1, 0)) { - tr_err(&ipc_tr, "ipc4_module_process_dx: CONFIG_CORE_COUNT: %d < core enable mask: %d", - CONFIG_CORE_COUNT, dx_info.core_mask); + ipc_cmd_err(&ipc_tr, "ipc4_module_process_dx: CONFIG_CORE_COUNT: %d < core enable mask: %d", + CONFIG_CORE_COUNT, dx_info.core_mask); return IPC4_ERROR_INVALID_PARAM; } @@ -912,7 +923,7 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4) if ((dx_info.core_mask & BIT(PLATFORM_PRIMARY_CORE_ID)) && (dx_info.dx_mask & BIT(PLATFORM_PRIMARY_CORE_ID))) { /* core0 can't be activated more, it's already active since we got here */ - tr_err(&ipc_tr, "Core0 is already active"); + ipc_cmd_err(&ipc_tr, "Core0 is already active"); return IPC4_BAD_STATE; } @@ -924,13 +935,13 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4) if (dx_info.dx_mask & BIT(core_id)) { ret = cpu_enable_core(core_id); if (ret != 0) { - tr_err(&ipc_tr, "failed to enable core %d", core_id); + ipc_cmd_err(&ipc_tr, "failed to enable core %d", core_id); return IPC4_FAILURE; } } else { cpu_disable_core(core_id); if (cpu_is_core_enabled(core_id)) { - tr_err(&ipc_tr, "failed to disable core %d", core_id); + ipc_cmd_err(&ipc_tr, "failed to disable core %d", core_id); return IPC4_FAILURE; } } @@ -939,13 +950,13 @@ static int ipc4_module_process_dx(struct ipc4_message_request *ipc4) /* Deactivating primary core if requested. */ if (dx_info.core_mask & BIT(PLATFORM_PRIMARY_CORE_ID)) { if (cpu_enabled_cores() & ~BIT(PLATFORM_PRIMARY_CORE_ID)) { - tr_err(&ipc_tr, "secondary cores 0x%x still active", - cpu_enabled_cores()); + ipc_cmd_err(&ipc_tr, "secondary cores 0x%x still active", + cpu_enabled_cores()); return IPC4_BUSY; } if (is_any_ppl_active()) { - tr_err(&ipc_tr, "some pipelines are still active"); + ipc_cmd_err(&ipc_tr, "some pipelines are still active"); return IPC4_BUSY; } @@ -1130,16 +1141,16 @@ void ipc_cmd(struct ipc_cmd_hdr *_hdr) case SOF_IPC4_MESSAGE_TARGET_FW_GEN_MSG: err = ipc4_process_glb_message(in); if (err) - tr_err(&ipc_tr, "ipc4: FW_GEN_MSG failed with err %d", err); + ipc_cmd_err(&ipc_tr, "ipc4: FW_GEN_MSG failed with err %d", err); break; case SOF_IPC4_MESSAGE_TARGET_MODULE_MSG: err = ipc4_process_module_message(in); if (err) - tr_err(&ipc_tr, "ipc4: MODULE_MSG failed with err %d", err); + ipc_cmd_err(&ipc_tr, "ipc4: MODULE_MSG failed with err %d", err); break; default: /* should not reach here as we only have 2 message types */ - tr_err(&ipc_tr, "ipc4: invalid target %d", target); + ipc_cmd_err(&ipc_tr, "ipc4: invalid target %d", target); err = IPC4_UNKNOWN_MESSAGE_TYPE; } @@ -1161,7 +1172,7 @@ void ipc_cmd(struct ipc_cmd_hdr *_hdr) return; if (ipc_wait_for_compound_msg() != 0) { - tr_err(&ipc_tr, "ipc4: failed to send delayed reply"); + ipc_cmd_err(&ipc_tr, "ipc4: failed to send delayed reply"); err = IPC4_FAILURE; }