From 81c1c0a08af8f132501fa62e496fe247321d8b2f Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Mon, 15 Apr 2024 14:31:34 +0300 Subject: [PATCH] platform: remove drivers/interrupt.h for Intel platforms The interrupt.h interface is no longer used by any Intel platform as all drivers have been replaced with native Zephyr drivers, so these definitions are no longer needed. Signed-off-by: Kai Vehmanen --- .../intel/ace/include/ace/drivers/interrupt.h | 17 -- .../cavs/include/cavs/drivers/interrupt.h | 31 ---- .../include/platform/drivers/interrupt.h | 36 ---- .../include/platform/drivers/interrupt.h | 156 ------------------ zephyr/include/rtos/interrupt.h | 11 +- 5 files changed, 1 insertion(+), 250 deletions(-) delete mode 100644 src/platform/intel/ace/include/ace/drivers/interrupt.h delete mode 100644 src/platform/intel/cavs/include/cavs/drivers/interrupt.h delete mode 100644 src/platform/meteorlake/include/platform/drivers/interrupt.h delete mode 100644 src/platform/tigerlake/include/platform/drivers/interrupt.h diff --git a/src/platform/intel/ace/include/ace/drivers/interrupt.h b/src/platform/intel/ace/include/ace/drivers/interrupt.h deleted file mode 100644 index 4b580e4e8a9f..000000000000 --- a/src/platform/intel/ace/include/ace/drivers/interrupt.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2022 Intel Corporation. All rights reserved. - */ - -#ifdef __PLATFORM_DRIVERS_INTERRUPT_H__ - -#ifndef __ACE_DRIVERS_INTERRUPT_H__ -#define __ACE_DRIVERS_INTERRUPT_H__ - -#endif /* __ACE_DRIVERS_INTERRUPT_H__ */ - -#else - -#error "This file shouldn't be included from outside of platform/drivers/interrupt.h" - -#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */ diff --git a/src/platform/intel/cavs/include/cavs/drivers/interrupt.h b/src/platform/intel/cavs/include/cavs/drivers/interrupt.h deleted file mode 100644 index 3f2831450b61..000000000000 --- a/src/platform/intel/cavs/include/cavs/drivers/interrupt.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2019 Intel Corporation. All rights reserved. - * - * Author: Tomasz Lauda - */ - -#ifdef __PLATFORM_DRIVERS_INTERRUPT_H__ - -#ifndef __CAVS_DRIVERS_INTERRUPT_H__ -#define __CAVS_DRIVERS_INTERRUPT_H__ - -#include - -extern const char irq_name_level2[]; -extern const char irq_name_level3[]; -extern const char irq_name_level4[]; -extern const char irq_name_level5[]; - -static inline void platform_interrupt_on_wakeup(void) -{ - platform_clock_on_wakeup(); -} - -#endif /* __CAVS_DRIVERS_INTERRUPT_H__ */ - -#else - -#error "This file shouldn't be included from outside of platform/drivers/interrupt.h" - -#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */ diff --git a/src/platform/meteorlake/include/platform/drivers/interrupt.h b/src/platform/meteorlake/include/platform/drivers/interrupt.h deleted file mode 100644 index 4bea8d844a7b..000000000000 --- a/src/platform/meteorlake/include/platform/drivers/interrupt.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2022 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Rander Wang - */ - -#ifdef __SOF_DRIVERS_INTERRUPT_H__ - -#ifndef __PLATFORM_DRIVERS_INTERRUPT_H__ -#define __PLATFORM_DRIVERS_INTERRUPT_H__ - -#if !defined(__ASSEMBLER__) && !defined(LINKER) - -#include - -#include - -#endif - -/* Required by sof/drivers/interrupt.h */ -#define PLATFORM_IRQ_CHILDREN 32 - -/* Required by zephyr/wrapper.c */ -#define IRQ_NUM_EXT_LEVEL2 4 /* level 2 */ -#define IRQ_NUM_EXT_LEVEL5 16 /* level 5 */ - -#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/drivers/interrupt.h" - -#endif /* __SOF_DRIVERS_INTERRUPT_H__ */ diff --git a/src/platform/tigerlake/include/platform/drivers/interrupt.h b/src/platform/tigerlake/include/platform/drivers/interrupt.h deleted file mode 100644 index 199e0fd8d65e..000000000000 --- a/src/platform/tigerlake/include/platform/drivers/interrupt.h +++ /dev/null @@ -1,156 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2017 Intel Corporation. All rights reserved. - * - * Author: Liam Girdwood - * Keyon Jie - * Rander Wang - */ - -#ifdef __SOF_DRIVERS_INTERRUPT_H__ - -#ifndef __PLATFORM_DRIVERS_INTERRUPT_H__ -#define __PLATFORM_DRIVERS_INTERRUPT_H__ - -#if !defined(__ASSEMBLER__) && !defined(LINKER) -#include -#include - -#endif - -#define PLATFORM_IRQ_HW_NUM XCHAL_NUM_INTERRUPTS -#define PLATFORM_IRQ_FIRST_CHILD PLATFORM_IRQ_HW_NUM -#define PLATFORM_IRQ_CHILDREN 32 - -/* IRQ numbers - wrt Tensilica DSP */ -#if CONFIG_XT_INTERRUPT_LEVEL_1 - -#define IRQ_NUM_SOFTWARE0 0 /* level 1 */ -#define IRQ_NUM_TIMER1 1 /* level 1 */ -#define IRQ_NUM_EXT_LEVEL1 2 /* level 1 */ -#define IRQ_NUM_SOFTWARE1 3 /* level 1 */ - -#define IRQ_MASK_SOFTWARE0 BIT(IRQ_NUM_SOFTWARE0) -#define IRQ_MASK_TIMER1 BIT(IRQ_NUM_TIMER1) -#define IRQ_MASK_EXT_LEVEL1 BIT(IRQ_NUM_EXT_LEVEL1) -#define IRQ_MASK_SOFTWARE1 BIT(IRQ_NUM_SOFTWARE1) - -#endif - -#if CONFIG_XT_INTERRUPT_LEVEL_2 - -#define IRQ_NUM_SOFTWARE2 4 /* level 2 */ -#define IRQ_NUM_TIMER2 5 /* level 2 */ -#define IRQ_NUM_EXT_LEVEL2 6 /* level 2 */ -#define IRQ_NUM_SOFTWARE3 7 /* level 2 */ - -/* IRQ Level 2 bits */ -#define IRQ_BIT_LVL2_HP_GP_DMA0(x) (x + 24) -#define IRQ_BIT_LVL2_WALL_CLK1 23 -#define IRQ_BIT_LVL2_WALL_CLK0 22 -#define IRQ_BIT_LVL2_L2_MEMERR 21 -#define IRQ_BIT_LVL2_SHA256 16 -#define IRQ_BIT_LVL2_L2_CACHE 15 -#define IRQ_BIT_LVL2_IDC 8 -#define IRQ_BIT_LVL2_HOST_IPC 7 -#define IRQ_BIT_LVL2_CSME_IPC 6 -#define IRQ_BIT_LVL2_PMC_IPC 5 - -/* Priority 2 Peripheral IRQ mappings */ -#define IRQ_EXT_HP_GPDMA_LVL2 IRQ_BIT_LVL2_HP_GP_DMA0(0) -#define IRQ_EXT_IDC_LVL2 IRQ_BIT_LVL2_IDC -#define IRQ_EXT_IPC_LVL2 IRQ_BIT_LVL2_HOST_IPC -#define IRQ_EXT_TSTAMP1_LVL2 IRQ_BIT_LVL2_WALL_CLK1 -#define IRQ_EXT_TSTAMP0_LVL2 IRQ_BIT_LVL2_WALL_CLK0 -#define IRQ_EXT_MERR_LVL2 IRQ_BIT_LVL2_L2_MEMERR -#define IRQ_EXT_L2CACHE_LVL2 IRQ_BIT_LVL2_L2_CACHE -#define IRQ_EXT_SHA256_LVL2 IRQ_BIT_LVL2_SHA256 - -#define IRQ_MASK_SOFTWARE2 BIT(IRQ_NUM_SOFTWARE2) -#define IRQ_MASK_TIMER2 BIT(IRQ_NUM_TIMER2) -#define IRQ_MASK_EXT_LEVEL2 BIT(IRQ_NUM_EXT_LEVEL2) -#define IRQ_MASK_SOFTWARE3 BIT(IRQ_NUM_SOFTWARE3) - -#endif - -#if CONFIG_XT_INTERRUPT_LEVEL_3 - -#define IRQ_NUM_SOFTWARE4 8 /* level 3 */ -#define IRQ_NUM_TIMER3 9 /* level 3 */ -#define IRQ_NUM_EXT_LEVEL3 10 /* level 3 */ -#define IRQ_NUM_SOFTWARE5 11 /* level 3 */ - -/* IRQ Level 3 bits */ -#define IRQ_BIT_LVL3_CODE_LOADER 31 -#define IRQ_BIT_LVL3_HOST_STREAM_OUT(x) (16 + x) -#define IRQ_BIT_LVL3_HOST_STREAM_IN(x) (0 + x) - -/* Priority 3 Peripheral IRQ mappings */ -#define IRQ_EXT_CODE_DMA_LVL3 IRQ_BIT_LVL3_CODE_LOADER -#define IRQ_EXT_HOST_DMA_IN_LVL3(channel) IRQ_BIT_LVL3_HOST_STREAM_IN(channel) -#define IRQ_EXT_HOST_DMA_OUT_LVL3(channel) IRQ_BIT_LVL3_HOST_STREAM_OUT(channel) - -#define IRQ_MASK_SOFTWARE4 BIT(IRQ_NUM_SOFTWARE4) -#define IRQ_MASK_TIMER3 BIT(IRQ_NUM_TIMER3) -#define IRQ_MASK_EXT_LEVEL3 BIT(IRQ_NUM_EXT_LEVEL3) -#define IRQ_MASK_SOFTWARE5 BIT(IRQ_NUM_SOFTWARE5) - -#endif - -#if CONFIG_XT_INTERRUPT_LEVEL_4 - -#define IRQ_NUM_SOFTWARE6 12 /* level 4 */ -#define IRQ_NUM_EXT_LEVEL4 13 /* level 4 */ -#define IRQ_NUM_SOFTWARE7 14 /* level 4 */ - -/* IRQ Level 4 bits */ -#define IRQ_BIT_LVL4_LINK_STREAM_OUT(x) (16 + x) -#define IRQ_BIT_LVL4_LINK_STREAM_IN(x) (0 + x) - -/* Priority 4 Peripheral IRQ mappings */ -#define IRQ_EXT_LINK_DMA_IN_LVL4(channel) IRQ_BIT_LVL4_LINK_STREAM_IN(channel) -#define IRQ_EXT_LINK_DMA_OUT_LVL4(channel) IRQ_BIT_LVL4_LINK_STREAM_OUT(channel) - -#define IRQ_MASK_SOFTWARE6 BIT(IRQ_NUM_SOFTWARE6) -#define IRQ_MASK_EXT_LEVEL4 BIT(IRQ_NUM_EXT_LEVEL4) -#define IRQ_MASK_SOFTWARE7 BIT(IRQ_NUM_SOFTWARE7) - -#endif - -#if CONFIG_XT_INTERRUPT_LEVEL_5 - -#define IRQ_NUM_SOFTWARE8 15 /* level 5 */ -#define IRQ_NUM_EXT_LEVEL5 16 /* level 5 */ -#define IRQ_NUM_EXT_LEVEL6 17 /* level 5 */ -#define IRQ_NUM_EXT_LEVEL7 18 /* level 5 */ -#define IRQ_NUM_SOFTWARE9 19 /* level 5 */ - -/* IRQ Level 5 bits */ -#define IRQ_BIT_LVL5_LP_GP_DMA1 15 -#define IRQ_BIT_LVL5_LP_GP_DMA0 16 -#define IRQ_BIT_LVL5_DMIC(x) 8 -#define IRQ_BIT_LVL5_SSP(x) (0 + x) - -/* Priority 5 Peripheral IRQ mappings */ -#define IRQ_EXT_LP_GPDMA0_LVL5(channel) IRQ_BIT_LVL5_LP_GP_DMA0 -#define IRQ_EXT_LP_GPDMA1_LVL5(channel) IRQ_BIT_LVL5_LP_GP_DMA0 -#define IRQ_EXT_SSPx_LVL5(x) IRQ_BIT_LVL5_SSP(x) -#define IRQ_EXT_DMIC_LVL5(x) IRQ_BIT_LVL5_DMIC(x) - -#define IRQ_MASK_SOFTWARE8 BIT(IRQ_NUM_SOFTWARE8) -#define IRQ_MASK_EXT_LEVEL5 BIT(IRQ_NUM_EXT_LEVEL5) -#define IRQ_MASK_EXT_LEVEL6 BIT(IRQ_NUM_EXT_LEVEL6) -#define IRQ_MASK_EXT_LEVEL7 BIT(IRQ_NUM_EXT_LEVEL7) -#define IRQ_MASK_SOFTWARE9 BIT(IRQ_NUM_SOFTWARE9) - -#endif - -#define IRQ_NUM_NMI 20 /* level 7 */ - -#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/drivers/interrupt.h" - -#endif /* __SOF_DRIVERS_INTERRUPT_H__ */ diff --git a/zephyr/include/rtos/interrupt.h b/zephyr/include/rtos/interrupt.h index b9559c89b431..1a75d1eea1a4 100644 --- a/zephyr/include/rtos/interrupt.h +++ b/zephyr/include/rtos/interrupt.h @@ -19,12 +19,6 @@ #include -#ifdef CONFIG_CAVS -/* to be removed once driver upstream in Zephyr */ -#define __SOF_DRIVERS_INTERRUPT_H__ -#include -#endif /* CONFIG_CAVS */ - extern struct tr_ctx zephyr_tr; static inline int interrupt_register(uint32_t irq, void(*handler)(void *arg), void *arg) @@ -49,12 +43,9 @@ static inline void interrupt_unregister(uint32_t irq, const void *arg) irq_disable(irq); } -/* - * CAVS IRQs are multilevel - */ static inline int interrupt_get_irq(unsigned int irq, const char *cascade) { -#if defined(CONFIG_LIBRARY) || defined(CONFIG_ACE) || \ +#if defined(CONFIG_LIBRARY) || defined(CONFIG_ACE) || defined(CONFIG_CAVS) || \ defined(CONFIG_ZEPHYR_POSIX) || defined(CONFIG_ARM64) return irq; #else