diff --git a/src/platform/ace30/include/platform/lib/cpu.h b/src/platform/ace30/include/platform/lib/cpu.h deleted file mode 100644 index 19590911ea99..000000000000 --- a/src/platform/ace30/include/platform/lib/cpu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2022-2024 Intel Corporation. - */ - -/** - * \file - * \brief DSP core parameters. - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -#include - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/src/platform/imx93_a55/include/platform/lib/cpu.h b/src/platform/imx93_a55/include/platform/lib/cpu.h deleted file mode 100644 index 7a92a59b574f..000000000000 --- a/src/platform/imx93_a55/include/platform/lib/cpu.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2023 NXP - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -/* note: although the core assigned to the inmate - * might not have the ID = 0 according to Linux, - * Zephyr will still index its cores starting from 0. - */ -#define PLATFORM_PRIMARY_CORE_ID 0 - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/src/platform/imx95/include/platform/lib/cpu.h b/src/platform/imx95/include/platform/lib/cpu.h deleted file mode 100644 index 54fd25cf4b37..000000000000 --- a/src/platform/imx95/include/platform/lib/cpu.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2024 NXP - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -#define PLATFORM_PRIMARY_CORE_ID 0 - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/src/platform/intel/ace/include/ace/lib/cpu.h b/src/platform/intel/ace/include/ace/lib/cpu.h deleted file mode 100644 index b4d0b88f112f..000000000000 --- a/src/platform/intel/ace/include/ace/lib/cpu.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2022 Intel Corporation. All rights reserved. - */ - -/** - * \file ace/lib/cpu.h - * \brief DSP parameters, common for cAVS platforms. - */ - -#ifdef __PLATFORM_LIB_CPU_H__ - -#ifndef __ACE_LIB_CPU_H__ -#define __ACE_LIB_CPU_H__ - -/** \brief Id of primary DSP core */ -#define PLATFORM_PRIMARY_CORE_ID 0 - -#endif /* __ACE_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of platform/lib/cpu.h" - -#endif /* __PLATFORM_LIB_CPU_H__ */ diff --git a/src/platform/intel/cavs/include/cavs/lib/cpu.h b/src/platform/intel/cavs/include/cavs/lib/cpu.h deleted file mode 100644 index 6adf613271d0..000000000000 --- a/src/platform/intel/cavs/include/cavs/lib/cpu.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2019 Intel Corporation. All rights reserved. - * - * Author: Bartosz Kokoszko - */ - -/** - * \file cavs/lib/cpu.h - * \brief DSP parameters, common for cAVS platforms. - */ - -#ifdef __PLATFORM_LIB_CPU_H__ - -#ifndef __CAVS_LIB_CPU_H__ -#define __CAVS_LIB_CPU_H__ - -/** \brief Id of primary DSP core */ -#define PLATFORM_PRIMARY_CORE_ID 0 - -#endif /* __CAVS_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of platform/lib/cpu.h" - -#endif /* __PLATFORM_LIB_CPU_H__ */ diff --git a/src/platform/lunarlake/include/platform/lib/cpu.h b/src/platform/lunarlake/include/platform/lib/cpu.h deleted file mode 100644 index 5abe9a99d57e..000000000000 --- a/src/platform/lunarlake/include/platform/lib/cpu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2023 Intel Corporation. All rights reserved. - */ - -/** - * \file - * \brief DSP core parameters. - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -#include - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/src/platform/meteorlake/include/platform/lib/cpu.h b/src/platform/meteorlake/include/platform/lib/cpu.h deleted file mode 100644 index 989fb61bf093..000000000000 --- a/src/platform/meteorlake/include/platform/lib/cpu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2022 Intel Corporation. All rights reserved. - */ - -/** - * \file - * \brief DSP core parameters. - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -#include - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/src/platform/tigerlake/include/platform/lib/cpu.h b/src/platform/tigerlake/include/platform/lib/cpu.h deleted file mode 100644 index 8cd110966e66..000000000000 --- a/src/platform/tigerlake/include/platform/lib/cpu.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * - * Copyright(c) 2019 Intel Corporation. All rights reserved. - * - * Author: Tomasz Lauda - */ - -/** - * \file - * \brief DSP core parameters. - */ - -#ifdef __SOF_LIB_CPU_H__ - -#ifndef __PLATFORM_LIB_CPU_H__ -#define __PLATFORM_LIB_CPU_H__ - -#include - -#endif /* __PLATFORM_LIB_CPU_H__ */ - -#else - -#error "This file shouldn't be included from outside of sof/lib/cpu.h" - -#endif /* __SOF_LIB_CPU_H__ */ diff --git a/zephyr/include/sof/lib/cpu.h b/zephyr/include/sof/lib/cpu.h index 349ad2af15d2..c23405e85121 100644 --- a/zephyr/include/sof/lib/cpu.h +++ b/zephyr/include/sof/lib/cpu.h @@ -14,7 +14,15 @@ #ifndef __SOF_LIB_CPU_H__ #define __SOF_LIB_CPU_H__ -#include +/** + * \brief Id of primary DSP core + * + * SOF IPC protocols make a distinction between primary + * and secondary cores. In Zephyr, primary core id concept + * is not present in public OS interface, but in implementation + * zero is the boot core (see z_smp_init() in Zephyr). + */ +#define PLATFORM_PRIMARY_CORE_ID 0 #if !defined(__ASSEMBLER__) && !defined(LINKER)