From 4c7813d63a1e2d007a8a4b022684552955fa6c9f Mon Sep 17 00:00:00 2001 From: Madhavan Srinivasan Date: Wed, 8 Jul 2015 14:51:05 +0530 Subject: [PATCH] [PATCH v3 1/7]powerpc/powernv: Data structure and macros definition Create new header file "nest-pmu.h" to add the data structures and macros needed for the nest pmu support. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/nest-pmu.h | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/powerpc/perf/nest-pmu.h diff --git a/arch/powerpc/perf/nest-pmu.h b/arch/powerpc/perf/nest-pmu.h new file mode 100644 index 00000000000000..ecb5d266d5a28f --- /dev/null +++ b/arch/powerpc/perf/nest-pmu.h @@ -0,0 +1,53 @@ +/* + * Nest Performance Monitor counter support for POWER8 processors. + * + * Copyright (C) 2015 Madhavan Srinivasan, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#define P8_NEST_MAX_CHIPS 32 +#define P8_NEST_MAX_PMUS 32 +#define P8_NEST_MAX_PMU_NAME_LEN 256 +#define P8_NEST_MAX_EVENTS_SUPPORTED 256 +#define P8_NEST_ENGINE_START 1 +#define P8_NEST_ENGINE_STOP 0 + +/* + * Structure to hold per chip specific memory address + * information for nest pmus. Nest Counter data are exported + * in per-chip reserved memory region by the PORE Engine. + */ +struct perchip_nest_info { + uint32_t chip_id; + uint64_t pbase; + uint64_t vbase; + uint32_t size; +}; + +/* + * Place holder for nest pmu events and values. + */ +struct nest_ima_events { + const char *ev_name; + const char *ev_value; +}; + +/* + * Device tree parser code detects nest pmu support and + * registers new nest pmus. This structure will + * hold the pmu functions and attrs for each nest pmu and + * will be referenced at the time of pmu registration. + */ +struct nest_pmu { + struct pmu pmu; + const struct attribute_group *attr_groups[4]; +};