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spec: rv2 as DWordBL in CPU due to STORE#297

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RobinJadoul wants to merge 2 commits into
spec/arr-exprfrom
spec/cpu-store-rv2-bytes
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spec: rv2 as DWordBL in CPU due to STORE#297
RobinJadoul wants to merge 2 commits into
spec/arr-exprfrom
spec/cpu-store-rv2-bytes

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@RobinJadoul
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This is a (temporary, for now) change to the CPU to have rv2 available as DWordBL so that the MEMW interaction on the STORE path can work correctly.

It already builds on top of the array expressions to clean up the signatures for all MEMW calls from the CPU along the way.

@RobinJadoul RobinJadoul self-assigned this Feb 6, 2026
@RobinJadoul RobinJadoul added bug Something isn't working spec Updates and improvements to the spec document labels Feb 6, 2026
@RobinJadoul RobinJadoul force-pushed the spec/cpu-store-rv2-bytes branch 2 times, most recently from 8c27a0f to f980217 Compare February 9, 2026 10:47
This is a (temporary, for now) change to the CPU
to have `rv2` available as `DWordBL` so that the
`MEMW` interaction on the `STORE` path can work correctly.

It already builds on top of the array expressions to
clean up the signatures for all MEMW calls from the CPU along the way.
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there are some changes in here that are not expected given the title of the PR...

Comment thread spec/src/cpu.toml
Comment on lines +656 to +657
input = [1, ["*", 2, "rs1"], ["arr", ["idx", ["cast", "rv1", "DWordWL"], 0], ["idx", "rv1", 2], 0, 0, 0, 0, 0, 0], ["+", "timestamp", ["cast", 0, "DWordWL"]], 1, 0, 0]
output = ["arr", ["idx", ["cast", "rv1", "DWordWL"], 0], ["idx", "rv1", 2], 0, 0, 0, 0, 0, 0]
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While I agree that pushing rv1 into the array this way is correct, I'd be inclined to apply cast to the second appearance of "rv1" in either array as well, just to make it easier to read.

Comment thread spec/src/cpu.toml
Comment on lines +759 to +765
constraint = "$#`arg2[:4]` = (1 - #`STORE` - #`LOAD`) dot #`rv2[:4]` + (1 - #`BEQ` - #`BLT`) dot #`imm[0]`$"
poly = ["-", ["idx", ["cast", "arg2", "DWordWL"], 0], ["*", ["-", 1, "STORE", "LOAD"], ["idx", ["cast", "rv2", "DWordWL"], 0]], ["*", ["-", 1, "BEQ", "BLT"], ["idx", "imm", 0]]]

[[constraints.ext]]
kind = "arith"
constraint = "$#`arg2[4:]` = (1 - #`STORE` - #`LOAD`) dot ((1 - #`word_instr`) dot #`rv2[2]` + #`signed` dot #`arg2_sign_bit` dot (2^(32) - 1)) + (1 - #`BEQ` - #`BLT`) dot #`imm[1]`$"
poly = ["-", ["idx", ["cast", "arg2", "DWordWL"], 1], ["*", ["-", 1, "STORE", "LOAD"], ["not", "word_instr"], ["idx", "rv2", 2]], ["*", ["-", 1, "STORE", "LOAD"], "signed", "arg2_sign_bit", ["-", ["^", 2, 32], 1]], ["*", ["-", 1, "BEQ", "BLT"], ["idx", "imm", 1]]]
constraint = "$#`arg2[4:]` = (1 - #`STORE` - #`LOAD`) dot ((1 - #`word_instr`) dot #`rv2[4:]` + #`signed` dot #`arg2_sign_bit` dot (2^(32) - 1)) + (1 - #`BEQ` - #`BLT`) dot #`imm[1]`$"
poly = ["-", ["idx", ["cast", "arg2", "DWordWL"], 1], ["*", ["-", 1, "STORE", "LOAD"], ["not", "word_instr"], ["idx", ["cast", "rv2", "DWordWL"], 1]], ["*", ["-", 1, "STORE", "LOAD"], "signed", "arg2_sign_bit", ["-", ["^", 2, 32], 1]], ["*", ["-", 1, "BEQ", "BLT"], ["idx", "imm", 1]]]
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I believe we decided to move away from slicing. Shall we use this opportunity to remove the slices in these two constraints?

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I mostly mind them in the "formal" polys, less so in the descriptive constraint

@erik-3milabs
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I take it this can be closed, as it is superseded by #308, right?

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