alert_L module for handling oob alerts

Documentation/devicetree/bindings/misc/amd,apml-alertl.yaml

@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/amd,apml-alertl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: >
+  Sideband Remote Management Interface (SB-RMI) compliant
+  AMD APML Alert_L GPIO.
+
+maintainers:
+  - Akshay Gupta <Akshay.Gupta@amd.com>
+
+description: |
+  Processors from AMD provide APML ALERT_L for BMC users to
+  monitor events.
+  APML Alert_L is asserted in multiple events,
+  - Machine Check Exception occurs within the system
+  - The processor alerts the SBI on system fatal error event
+  - Set by hardware as a result of a 0x71/0x72/0x73 command completion
+  - Set by firmware to indicate the completion of a mailbox operation
+  - High/Low Temperature Alert
+
+  APML Alert_L module define uevents to notify userspace of the
+  alert event.
+
+properties:
+  compatible:
+    const: apml-alertl
+
+  gpio:
+    maxItems: 1
+    description: |
+     GPIO specifier for APML Alert_L line. Specify GPIO controller, GPIO pin
+     and polarity.
+
+  sbrmi:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: ref amd,sbrmi.yaml
+
+  sbtsi:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: ref amd,sbtsi.yaml
+
+required:
+  - compatible
+  - gpio
+  - sbrmi
+  - sbtsi
+
+additionalProperties: false
+
+examples:
+  - |
+    /* Alert_L associated with Socket 0 */
+    alertl_sock0 {
+        compatible = "apml-alertl";
+        status = "okay";
+        gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
+        sbrmi = <&sbrmi_p0_iod0>;
+        sbtsi = <&sbtsi_p0_iod0>;
+    };
+...

arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-congo.dts

@@ -907,6 +907,17 @@
 #endif
 };
 
+/ {
+	/* Alert_L associated with socket 0 */
+	alertl_sock0 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p0_iod0>;
+		sbtsi = <&sbtsi_p0_iod0>;
+	};
+};
+
 #ifdef I3C_HUB
 
 #define JESD300_SPD_I3C_MODE(bus, index, addr) \

arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-kenya.dts

@@ -597,6 +597,17 @@
 #endif
 };
 
+/ {
+	/* Alert_L associated with socket 0 */
+	alertl_sock0 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p0_iod0>;
+		sbtsi = <&sbtsi_p0_iod0>;
+	};
+};
+
 #ifdef I3C_HUB
 
 #define JESD300_SPD_I3C_MODE(bus, index, addr) \

arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-morocco.dts

@@ -1015,6 +1015,26 @@
 #endif
 };
 
+/ {
+	/* Alert_L associated with socket 0 */
+	alertl_sock0 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p0_iod0>;
+		sbtsi = <&sbtsi_p0_iod0>;
+	};
+
+	/* Alert_L associated with socket 1 */
+	alertl_sock1 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 104 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p1_iod0>;
+		sbtsi = <&sbtsi_p1_iod0>;
+	};
+};
+
 #ifdef I3C_HUB
 
 #define JESD300_SPD_I3C_MODE(bus, index, addr) \

arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-nigeria.dts

@@ -782,6 +782,26 @@
 #endif
 };
 
+/ {
+	/* Alert_L associated with socket 0 */
+	alertl_sock0 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p0_iod0>;
+		sbtsi = <&sbtsi_p0_iod0>;
+	};
+
+	/* Alert_L associated with socket 1 */
+	alertl_sock1 {
+		compatible = "apml-alertl";
+		status = "okay";
+		gpios = <&ltpi0_gpio 104 GPIO_ACTIVE_LOW>;
+		sbrmi = <&sbrmi_p1_iod0>;
+		sbtsi = <&sbtsi_p1_iod0>;
+	};
+};
+
 #ifdef I3C_HUB
 
 #define JESD300_SPD_I3C_MODE(bus, index, addr) \

drivers/misc/amd-apml/Kconfig

@@ -24,3 +24,19 @@ config APML_SBTSI
 
       This driver can also be built as a module. If so, the module will
       be called apml_sbtsi.
+
+config APML_ALERTL
+    tristate "Emulated apml alertl interface driver over i3c bus"
+    depends on APML_SBRMI && APML_SBTSI
+    default n
+    help
+      This driver provides support for AMD APML Alert_L interface,
+      enabling alert notification from AMD SoCs to a BMC (Baseboard
+      Management Controller) over I2C/I3C bus.
+
+      The driver monitors RAS and thermal events by handling alerts
+      from SBRMI and SBTSI devices, and reports these events to userspace
+      via uevents. Device configuration is managed via device tree bindings.
+
+      This driver can also be built as a module. If so, the module will
+      be called apml_alertl.ko.

drivers/misc/amd-apml/Makefile

@@ -6,3 +6,4 @@
 
 obj-$(CONFIG_APML_SBRMI)	+= sbrmi.o sbrmi-common.o
 obj-$(CONFIG_APML_SBTSI)	+= apml_sbtsi.o
+obj-$(CONFIG_APML_ALERTL)	+= apml_alertl.o