sync: SG2042/SG2044/TH1520 v6.18.y patchset #17
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A subsequent commit will add a new function `bindgen-option` to `scripts/Kconfig.include`. The bindgen backend requires the `--target` option for cross compiling, but variable `BINDGEN_TARGET` in `rust/Makefile` cannot be exported to `scripts/Kconfig.include`. Therefore, move this variable to a separate new `Makefile.rust` file and include it from `scripts/Makefile` to make the exported variable available for use in Kconfig. Place the include in the `need-compiler` branch to avoid including it in irrelevant make targets. Since the new file name is `Makefile.rust`, it matches an existing MAINTAINERS rule `scripts/*rust*`, so no modification to the MAINTAINERS file is needed. Signed-off-by: Asuna Yang <SpriteOvO@gmail.com> Link: https://lore.kernel.org/r/20251204-gcc-rust-v5-v5-1-2d4f20d86c24@gmail.com Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Generate a friendly fatal error if the target triplet is undefined for bindgen, rather than having the compiler generate obscure error messages during the build stage. This piece of code is copied from `scripts/Makefile.clang`. Before this commit, error messages might look like: error: unknown argument: '-mno-riscv-attribute' error: unsupported argument 'medany' to option '-mcmodel=' for target 'unknown' error: unsupported option '-march=' for target '' error: unsupported option '-mno-save-restore' for target '' error: unknown target triple 'unknown' panicked at bindgen/ir/context.rs:562:15: libclang error; possible causes include: - Invalid flag syntax - Unrecognized flags - Invalid flag arguments - File I/O errors - Host vs. target architecture mismatch Acked-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Asuna Yang <SpriteOvO@gmail.com> Link: https://lore.kernel.org/r/20251204-gcc-rust-v5-v5-2-2d4f20d86c24@gmail.com Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
… options Add a new `bindgen-backend-option` Kconfig function to test whether the bindgen backend supports a given flag. A subsequent commit will use this function to test for RISC-V extension flags. Signed-off-by: Asuna Yang <SpriteOvO@gmail.com> Link: https://lore.kernel.org/r/20251204-gcc-rust-v5-v5-3-2d4f20d86c24@gmail.com Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
… + rust builds Commit 33549fc ("RISC-V: disallow gcc + rust builds") disabled GCC + Rust builds for RISC-V due to differences in extension handling compared to LLVM. This commit enables GCC + Rust builds again. Add `bindgen-option` conditions for the availability of libclang to the RISC-V extension Kconfig symbols that depend on the `cc-option` function. For Zicsr/Zifencei special handling, since LLVM/Clang always enables these two extensions, either don't pass them to `-march`, or pass them explicitly and Rust bindgen libclang must recognize them. Clang does not support `-mno-riscv-attribute` flag, filter it out to resolve error: unknown argument: '-mno-riscv-attribute'. Define `BINDGEN_TARGET_riscv` to pass the target triplet to Rust bindgen libclang for RISC-V to resolve error: unsupported argument 'medany' to option '-mcmodel=' for target 'unknown'. Update the documentation, GCC + Rust builds for RISC-V are now maintained. Acked-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Asuna Yang <SpriteOvO@gmail.com> Link: https://lore.kernel.org/r/20251204-gcc-rust-v5-v5-4-2d4f20d86c24@gmail.com Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Sophgo SG2042's MSI driver lacks 32-bit MSI support. Added a msi64 parameter to skip the limitation and force 64-bit MSI. Link: https://lore.kernel.org/r/20251220163338.3852399-1-gaohan@iscas.ac.cn Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…bit MSI restriction Sophgo SG2042 MSI driver does not support 32-bit MSI. Introduce an 'msi64' kernel parameter to bypass NO_MSI64 for ATI/HDMI. Link: https://lore.kernel.org/r/20251220170501.3972438-1-gaohan@iscas.ac.cn Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
poly1305-core.S is an auto-generated file, so it should be ignored. Fixes: bef9c75 ("lib/crypto: riscv/poly1305: Import OpenSSL/CRYPTOGAMS implementation") Cc: stable@vger.kernel.org Signed-off-by: Charles Mirabile <cmirabil@redhat.com> Link: https://lore.kernel.org/r/20251212184717.133701-1-cmirabil@redhat.com Signed-off-by: Eric Biggers <ebiggers@kernel.org> (cherry picked from commit 5a0b188) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
This reverts commit 2fba856.
The RISC-V Svpbmt privileged extension provides support for overriding
page memory coherency attributes, and, along with vendor extensions like
Xtheadmae, supports pgprot_{writecombine,noncached} on RISC-V.
Adapt the codepath that maps ttm_write_combined to pgprot_writecombine
and ttm_noncached to pgprot_noncached to RISC-V, to allow proper page
access attributes.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Tested-by: Han Gao <rabenda.cn@gmail.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://lore.kernel.org/r/20251020053523.731353-1-uwu@icenowy.me
(cherry picked from commit 4f9ffd2)
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…EVB_V2" This reverts commit cee37bb.
…EVB_V1" This reverts commit 5f6021f.
…Box" This reverts commit 8857c2e.
This reverts commit defa6ff.
This reverts commit 831ecc4.
This reverts commit 84fe19a.
This reverts commit 32703ca.
This reverts commit 4cda6dc.
Add PCIe controller nodes in DTS for Sophgo SG2042. Default they are disabled. Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/b34d819cd763482e0ecbc5c5ea721f0101d1f844.1760929111.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit 4e27aca) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable PCIe controllers for PioneerBox, which uses SG2042 SoC. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/ec474c5eefb79626dd6a4d65454da9109aaf2f4d.1760929111.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit b85ad0d) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable PCIe controllers for Sophgo SG2042_EVB_V1.X board, which uses SG2042 SoC. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/1ad96631cc9d9d7403a2bed5585d856fa101a2ef.1760929111.git.unicorn_wang@outlook.com Tested-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit c6c2150) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable PCIe controllers for Sophgo SG2042_EVB_V2.0 board, which uses SG2042 SoC. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/50a753f9b8cbd5a90b5b2df737f87fc77a9b33a7.1760929111.git.unicorn_wang@outlook.com Tested-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit 579d652) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Add SPI NOR controller node for SG2042 Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-1-b5d9024fe1c8@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit 59dc89f) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable SPI NOR node for PioneerBox device tree According to PioneerBox schematic, SPI-NOR Flash cannot support QSPI due to hardware design. Thus spi-(tx|rx)-bus-width must be set to 1. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Tested-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-2-b5d9024fe1c8@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit f49314c) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable SPI NOR node for SG2042_EVB_V1 device tree According to SG2042_EVB_V1 schematic, SPI-NOR Flash cannot support QSPI due to hardware design. Thus spi-(tx|rx)-bus-width must be set to 1. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-3-b5d9024fe1c8@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit 11f4d84) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Enable SPI NOR node for SG2042_EVB_V2 device tree According to SG2042_EVB_V2 schematic, SPI-NOR Flash cannot support QSPI due to hardware design. Thus spi-(tx|rx)-bus-width must be set to 1. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-4-b5d9024fe1c8@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn> (cherry picked from commit af5eb17) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…tion As the ethernet controller of SG2044 and SG2042 only supports RGMII phy. Add phy-mode property to restrict the value. Also, since SG2042 has internal rx delay in its mac, make only "rgmii-txid" and "rgmii-id" valid for phy-mode. Fixes: e281c48 ("dt-bindings: net: sophgo,sg2044-dwmac: Add support for Sophgo SG2042 dwmac") Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251114003805.494387-2-inochiama@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> (cherry picked from commit 6b1aa3c) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…ernal mac delay The "phy-mode" property of devicetree indicates whether the PCB has delay now, which means the mac needs to modify the PHY mode based on whether there is an internal delay in the mac. This modification is similar for many ethernet drivers. To simplify code, define the helper phy_fix_phy_mode_for_mac_delays(speed, mac_txid, mac_rxid) to fix PHY mode based on whether mac adds internal delay. Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20251114003805.494387-3-inochiama@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> (cherry picked from commit 24afd78) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
As the SG2042 has an internal rx delay, the delay should be removed when initializing the mac, otherwise the phy will be misconfigurated. Fixes: 543009e ("net: stmmac: dwmac-sophgo: Add support for Sophgo SG2042 SoC") Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Tested-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20251114003805.494387-4-inochiama@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> (cherry picked from commit db37c6e) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…pport" This reverts commit 472d9c0.
T-HEAD C920 has a V2 iteration, which supports Sscompmf. The V2 iteration supports the same perf events as V1. Reuse T-HEAD c900-legacy JSON file for T-HEAD C920V2. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Paul Walmsley <pjw@kernel.org> Signed-off-by: Namhyung Kim <namhyung@kernel.org> (cherry picked from commit c957328) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Introduce a PWM driver for the T-HEAD TH1520 SoC, written in Rust and utilizing the safe PWM abstractions from the preceding commit. The driver implements the pwm::PwmOps trait using the modern waveform API (round_waveform_tohw, write_waveform, etc.) to support configuration of period, duty cycle, and polarity for the TH1520's PWM channels. Resource management is handled using idiomatic Rust patterns. The PWM chip object is allocated via pwm::Chip::new and its registration with the PWM core is managed by the pwm::Registration RAII guard. This ensures pwmchip_remove is always called when the driver unbinds, preventing resource leaks. Device managed resources are used for the MMIO region, and the clock lifecycle is correctly managed in the driver's private data Drop implementation. The driver's core logic is written entirely in safe Rust, with no unsafe blocks, except for the Send and Sync implementations for the driver data, which are explained in the comments. Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://patch.msgid.link/20251016-rust-next-pwm-working-fan-for-sending-v16-4-a5df2405d2bd@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit e03724a) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Add the Device Tree binding documentation for the T-HEAD TH1520 SoC PWM controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://patch.msgid.link/20251016-rust-next-pwm-working-fan-for-sending-v16-5-a5df2405d2bd@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit a367b64) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
We do our best to keep the repository `rustfmt`-clean [1], thus run the tool to fix the formatting issue. A trailing empty comment [2] is added in order to preserve the wanted style for imports (otherwise the tool will compact the first two items). Link: https://rust-for-linux.com/contributing#submit-checklist-addendum [1] Link: https://docs.kernel.org/rust/coding-guidelines.html#style-formatting [2] Fixes: d8046cd ("rust: pwm: Add complete abstraction layer") Fixes: 7b3dce8 ("rust: pwm: Add Kconfig and basic data structures") Fixes: e03724a ("pwm: Add Rust driver for T-HEAD TH1520 SoC") Signed-off-by: Miguel Ojeda <ojeda@kernel.org> Link: https://patch.msgid.link/20251029182502.783392-1-ojeda@kernel.org Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit 6fe9e91) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
…init Clippy warns about redundant struct field initialization when the field name and the variable name are the same (e.g., `status: status`). No functional change. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Link: https://patch.msgid.link/20251028-pwm_fixes-v1-4-25a532d31998@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit 26dcb42) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
The `pwm_th1520` Rust driver calls C functions from the `PWM` namespace, triggering `modpost` warnings due to missing namespace import declarations in its `.modinfo` section. Fix these warnings and simplify the module declaration by switching from the generic `kernel::module_platform_driver!` macro to the newly introduced PWM-specific `kernel::module_pwm_platform_driver!` macro. The new macro automatically handles the required `imports_ns: ["PWM"]` declaration. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Troy Mitchell <troy.mitchell@linux.dev> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Link: https://patch.msgid.link/20251028-pwm_fixes-v1-3-25a532d31998@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit 9075cee) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
In chacha_zvkb, avoid using the s0 register, which is the frame pointer, by reallocating KEY0 to t5. This makes stack traces available if e.g. a crash happens in chacha_zvkb. No frame pointer maintenance is otherwise required since this is a leaf function. Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Fixes: bb54668 ("crypto: riscv - add vector crypto accelerated ChaCha20") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20251202-riscv-chacha_zvkb-fp-v2-1-7bd00098c9dc@iscas.ac.cn Signed-off-by: Eric Biggers <ebiggers@kernel.org> (cherry picked from commit 4316932) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
The driver fails to build on configurations lacking COMMON_CLK (missing clk::Clk) or HAS_IOMEM (incomplete `pwm_chip` struct on UML). Add dependencies on ARCH_THEAD and HAS_IOMEM, and add COMMON_CLK to ensure correct compilation and platform targeting. Reported-by: Markus Probst <markus.probst@gmail.com> Closes: https://lore.kernel.org/all/a66b337528d700ae92d7940a04c59206e06a8495.camel@posteo.de/ Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202512020957.PqnHfe7C-lkp@intel.com/ Fixes: e03724a ("pwm: Add Rust driver for T-HEAD TH1520 SoC") Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://patch.msgid.link/20251209-fix_deps_pwm-v1-1-f7ed8bd1bd3d@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> (cherry picked from commit 3c18000) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
This reverts commit d6d5cd5.
This reverts commit cfb8f13.
This reverts commit 25001ec.
This reverts commit bc360e5.
This reverts commit aed0eb5.
…evicetree" This reverts commit 3e33b86.
The th1520 support xtheadvector [1] so it can be included in the devicetree. Also include vlenb for the cpu. And set vlenb=16 [2]. This can be tested by passing the "mitigations=off" kernel parameter. Link: https://lore.kernel.org/linux-riscv/20241113-xtheadvector-v11-4-236c22791ef9@rivosinc.com/ [1] Link: https://lore.kernel.org/linux-riscv/aCO44SAoS2kIP61r@ghost/ [2] Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org> (cherry picked from commit aef6dc0) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Existing rv64 hardware conforms to the rva20 profile. Ziccrse is an additional extension required by the rva20 profile, so th1520 has this extension. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org> (cherry picked from commit bcc3b9c) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
th1520 support Zfh ISA extension. It supports the same RISC-V extensions as SG2042. commit cb074be ("riscv: dts: sophgo: add zfh for sg2042") Signed-off-by: Han Gao <rabenda.cn@gmail.com> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org> (cherry picked from commit fac4be7) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Add the Device Tree node for the T-HEAD TH1520 SoC's PWM controller. Reviewed-by: Drew Fustini <fustini@kernel.org> Tested-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Drew Fustini <fustini@kernel.org> (cherry picked from commit b6b00b2) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
This reverts commit 33d8371.
This reverts commit 27dc939.
This reverts commit 4f8fb3f.
This reverts commit 419d3c1.
Add Device Tree nodes to enable a PWM controlled fan and it's associated thermal management for the Lichee Pi 4A board. This enables temperature-controlled active cooling for the Lichee Pi 4A board based on SoC temperature. Reviewed-by: Drew Fustini <fustini@kernel.org> Tested-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Signed-off-by: Drew Fustini <fustini@kernel.org> (cherry picked from commit a9fb9c7) Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Lichee Pi 4A board features a HDMI Type-A connector connected to the HDMI TX controller of TH1520 SoC. Add a device tree node describing the connector, connect it to the HDMI controller, and enable everything on this display pipeline. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Link: https://lore.kernel.org/r/20251124105226.2860845-8-uwu@icenowy.me Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
From: revyos@2bd7874 Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
From: revyos@ef4ac92 Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
From: revyos@b41720b Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
From: revyos@9f2a969 Signed-off-by: Jisheng Zhang <jszhang@kernel.org> [esmil: fix gpio references] Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> [ Han Gao: remove audio_i2c ] Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
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