fix SG2042 using AMD R5 220/230 graphics cards & PCI/ASPM: Avoid L0s and L1 on Sophgo 2042/4 PCIe & fix riscv64 kexec#18

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RevySR wants to merge 7 commits intoAOSC-Tracking:aosc/v6.18.2from

RevySR:aosc/rv/v6.18.y

Commits on Dec 30, 2025

FROMLIST: PCI/MSI: Conservatively generalize no_64bit_msi into msi_addr_mask

dramforever
authored and
RevySR
committed
FROMLIST: PCI/MSI: Check msi_addr_mask in msi_verify_entries()

dramforever
authored and
RevySR
committed
FROMLIST: drm/radeon: Raise msi_addr_mask to 40 bits for pre-Bonaire

dramforever
authored and
RevySR
committed
FROMLIST: ALSA: hda/intel: Raise msi_addr_mask to dma_bits

dramforever
authored and
RevySR
committed
FROMLIST: PCI/ASPM: Avoid L0s and L1 on Sophgo 2042 PCIe [1f1c:2042] Root Ports

inochisa
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RevySR
committed
FROMLIST: PCI/ASPM: Avoid L0s and L1 on Sophgo 2044 PCIe [1f1c:2044] Root Ports

inochisa
authored and
RevySR
committed
FROMLIST: riscv: boot: Always make Image from vmlinux, not vmlinux.unstripped

dramforever
authored and
RevySR
committed