PCI_IN_13 requires that out-of-range "memory space" accesses must result in an Unsupported Request (UR) completion status, rather than requiring a specific returned data pattern (e.g., all 1s). Unlike configuration space accesses, PCIe memory accesses are not required to return a defined data value. Returning a defined data value is only required for configuration space accesses. Therefore, the test should check the completion status register (UR) rather than the returned data (all 1s).
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if (value != PCIE_UNKNOWN_RESPONSE) |
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if (value != PCIE_UNKNOWN_RESPONSE) |
Rule:
- PCI_IN_13 PHB in conjunction with Root Port must recognize transactions received on the primary side of the Root Port PCI-PCI bridge, targeting 32-bit memory or 64-bit memory spaces of devices and switches that are on the secondary side of the bridge:
- Where the address falls within the 32-bit memory or 64-bit memory windows specified in the type 1 header registers, the transactions must be forwarded to the secondary side (See Section 6.26.2 [1], Chapter 4 [13]).
- Where the address of the request does not fall within the 32-bit memory or 64-bit memory windows that are specified in the type 1 header registers, the Root Port must respond with unsupported request (See Section 6.26.2 [1], Chapter 4 [13]).
PCI_IN_13 requires that out-of-range "memory space" accesses must result in an Unsupported Request (UR) completion status, rather than requiring a specific returned data pattern (e.g., all 1s). Unlike configuration space accesses, PCIe memory accesses are not required to return a defined data value. Returning a defined data value is only required for configuration space accesses. Therefore, the test should check the completion status register (UR) rather than the returned data (all 1s).
sysarch-acs/test_pool/pcie/p004.c
Line 234 in 4500989
sysarch-acs/test_pool/pcie/p005.c
Line 267 in 4500989
Rule: