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Quantae


πŸ“– Overview

Quantae is a comprehensive operating systems project spanning two phases, implementing CPU process scheduling algorithms and memory management for a simulated OS. The project demonstrates how a real operating system kernel manages process lifecycle, IPC, and virtual memory.

Project Goals

  • Phase 1: Implement multiple CPU scheduling algorithms (RR, HPF, FCFS 2 CPUs) to compare performance metrics.
  • Phase 2: Integrate memory management with the schedulerβ€”introducing page tables, memory requests, blocked queues, and memory-induced process blocking.

πŸ—‚οΈ Project Structure

Quantae/
β”œβ”€β”€ phase1_code/                   # Phase 1: CPU Scheduling Algorithms
β”‚   β”œβ”€β”€ schedulerRR.c              # Round-Robin scheduler
β”‚   β”œβ”€β”€ schedulerHPF.c             # Highest Priority First scheduler
β”‚   β”œβ”€β”€ schedulerCPU2.c            # FCFS 2 CPUs scheduler
β”‚   β”œβ”€β”€ process_generator.c        # Phase 1 driver for loading processes
β”‚   β”œβ”€β”€ process.c / process.h      # Child process execution
β”‚   β”œβ”€β”€ queue.c / queue.h          # Process queue data structure
β”‚   β”œβ”€β”€ clk.c                      # Simulated system clock
β”‚   β”œβ”€β”€ logger.c / logger.h        # Event logging for analysis
β”‚   β”œβ”€β”€ test_generator.c           # Random workload generator
β”‚   β”œβ”€β”€ process.h                  # PCB (Process Control Block) definition
β”‚   β”œβ”€β”€ headers.h                  # Shared constants and IPC keys
β”‚   β”œβ”€β”€ Makefile                   # Build configuration
β”‚   β”œβ”€β”€ scheduler.log              # Simulation output log
β”‚   β”œβ”€β”€ scheduler.perf             # Simulation performance metrics
β”‚   β”œβ”€β”€ scheduler2.log             # Simulation output log (2nd CPU)
β”‚   └── scheduler2.perf            # Simulation performance metrics (2nd CPU)
β”‚
β”œβ”€β”€ phase2_code/                   # Phase 2: Memory Management Integration
β”‚   β”œβ”€β”€ scheduler.c                # Enhanced scheduler with memory support
β”‚   β”œβ”€β”€ mmu.c / mmu.h              # Memory Management Unit (page tables, requests)
β”‚   β”œβ”€β”€ process_generator.c        # Phase 2 driver
β”‚   β”œβ”€β”€ clk.c                      # Simulated clock
β”‚   β”œβ”€β”€ process.c / process.h      # Enhanced process with memory requests
β”‚   β”œβ”€β”€ queue.c / queue.h          # Enhanced queue for blocked processes
β”‚   β”œβ”€β”€ logger.c / logger.h        # Enhanced logging
β”‚   β”œβ”€β”€ headers.h                  # Shared definitions
β”‚   β”œβ”€β”€ test_generator.c           # Random workload generator
β”‚   β”œβ”€β”€ requests_i.txt             # Per-process memory request traces
β”‚   β”œβ”€β”€ processes.txt              # Input process list (user-defined)
β”‚   β”œβ”€β”€ Makefile                   # Build configuration
β”‚   └── memory.log                 # Simulation memory actions log
β”‚
β”œβ”€β”€ README.md
└── Final Test Cases.txt           # Comprehensive test suite documentation

πŸ“ˆ Block Diagram

Block Diagram


πŸ“Š Project Phases

Phase 1: CPU Scheduling Algorithms

The first phase focuses on implementing and comparing different CPU scheduling strategies in a simulated environment.

Implemented Algorithms

Algorithm File Description
Round-Robin (RR) schedulerRR.c Time-sliced execution with fixed quantum; processes rotate in ready queue
Highest Priority First (HPF) schedulerHPF.c Non-preemptive; always runs the highest-priority ready process
FCFS 2 CPUs schedulerCPU2.c FCFS with dual CPUs; distributes processes across two independent queues with load balancing via work stealing to reduce imbalance and improve overall utilization.

Key Features

  • Process Generator: Reads processes.txt and sends processes to scheduler at their arrival times
  • Simulated Clock: clk.c provides a synchronized global time for all components
  • IPC Communication: Uses UNIX message queues and semaphores for inter-process communication
  • Event Logging: Records all process state transitions (start, preemption, finish) with timestamps
  • Performance Metrics: Computes turnaround time, weighted turnaround time, and CPU utilization

Phase 2: Memory Management Integration

Phase 2 extends the scheduler with virtual memory management, introducing page tables, memory requests, and process blocking due to memory I/O.

New Components

Component File Purpose
MMU mmu.c / mmu.h Manages page tables, frame allocation, and memory request handling
Memory Requests requests_*.txt Per-process traces of memory access patterns (read/write)
Blocked Queue Enhanced scheduler Manages processes waiting for memory operations to complete
Enhanced Scheduler scheduler.c Coordinate CPU scheduling with memory request handling

Key Improvements

  • Page Table Management: Each process gets allocated a page table frame upon start
  • Memory Requests Handling: Processes issue memory read/write requests that may block execution
  • Blocked Queue: Separate queue for processes waiting on memory I/O
  • Simulated Page Faults: System models realistic memory access delays
  • R-bit Clearing: Periodic clearing of reference bits (R-bits) based on a parameter K

Processing Flow

  1. Process Arrival β†’ Scheduler receives via message queue
  2. Memory Initialization β†’ MMU allocates page table frame
  3. CPU Execution β†’ RR scheduling with quantum-based preemption
  4. Memory Request β†’ Process issues R/W at scheduled time
  5. Blocking β†’ If memory busy, process moves to blocked queue
  6. Resumption β†’ Process returns to ready queue when memory operation completes
  7. Completion β†’ Process finishes when remaining time reaches zero

πŸ”¬ Key Components (Phase 2)

process_generator.c

Main simulation driver:

  • Parses processes.txt
  • Validates process fields
  • Creates IPC resources (message queue, semaphores)
  • Forks clock and scheduler
  • Sends processes to scheduler at arrival times
  • Logs all events

scheduler.c

Core scheduling logic with memory integration:

  • Ready queue and blocked queue management
  • RR quantum enforcement
  • Process fork/exec and state transitions
  • Calls to mmu.c for memory operations
  • Loads per-process memory request files (requests_*.txt)
  • Processes memory requests and manages blocking

mmu.c

Memory Management Unit simulation:

  • Initializes page tables for each process
  • Loads memory request traces from per-process files
  • Simulates page allocation and frame assignment
  • Tracks memory operations and request completion

clk.c

Simulated system clock shared across all processes:

  • Uses signal-based time advancement
  • Accessed via getClk() for process synchronization
  • Initialized/destroyed by process generator

process.c

Child process behavior:

  • Executes scheduled process logic
  • Issues memory requests at scheduled relative times
  • Communicates with scheduler via IPC
  • Implements R-bit functionality for memory tracking

▢️ Build & Run

Phase 1 (CPU Scheduling Only)

cd phase1_code
make build
./process_generator.out

Or with a custom process file:

./process_generator.out custom_processes.txt

Phase 2 (With Memory Management)

cd phase2_code
make build

Run the simulation:

./process_generator.out

Or with a custom process file:

./process_generator.out custom_processes.txt

Generate Random Workload

./test_generator.out
# Follow prompts to specify number of processes

Makefile Targets

Target Action
make build Compile all executables
make clean Remove all .out binaries
make all Clean and rebuild
make run Execute process_generator.out

Quantae β€” A two-phase OS simulation project exploring CPU scheduling and memory management.

About

This project is a simulation of core operating system components, combining CPU scheduling and memory management concepts into a unified system. It is implemented in C and runs on a Linux environment using inter-process communication (IPC).

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