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@NuDAQ

Nuetrino DAQ System

Nuetrino DAQ System

This is the group root page.

Important Notice: For newcomers, you will be added to the relevant repository list within one day, making it visible to you. You may contact the repository or organization owner to request adding: albert.cheung@cern.ch.

You may read the Specification for more details about the system. You can also have Albert add you to Overleaf Repository to read the latest version.

Manege a Repository

You can import or create a repository under this organization as the creator.

If you are certain that the repository's contents need to be shared with collaborators, or work that may need to be handed over in the future, please create it under this organization with either private or public visibility. Otherwise, feel free to use your own GitHub repository.

Share

For private or unfinished content, you can use the .public repository for sharing. All members will be added to this repository immediately. You can make any changes, treating it simply as a staging area.

Publish

Some repositories are intended for public access or release. These repositories will be explicitly marked. They adhere to stricter development guidelines, such as prohibiting direct modifications to the main branch. For these repositories: With great power comes great responsibility.

Here is a list of those repositories:

Repository Link
AI-Trigger-System (Private for now) https://github.com/NuDAQ/AI-Trigger-System
CNN-Core-Wrapper https://github.com/NuDAQ/CNN-Core-Wrapper
CNN-Core-Generator https://github.com/NuDAQ/CNN-Core-Generator
pico4NuDAQ https://github.com/NuDAQ/pico4NuDAQ
iDMA https://github.com/NuDAQ/iDMA
axi https://github.com/NuDAQ/axi

Popular repositories Loading

  1. .github .github Public

  2. axi axi Public

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

    SystemVerilog

  3. iDMA iDMA Public

    A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

    SystemVerilog

  4. pico4NuDAQ pico4NuDAQ Public

    PicoRV32 - A Size-Optimized RISC-V CPU

    Verilog

  5. CNN-Core-Generator CNN-Core-Generator Public

    A CNN Core Wrapper and Code on ARIANNA Trigger System. ['cnn-core' in Bender.]

    Ada

  6. CNN-Core-Wrapper CNN-Core-Wrapper Public

    A CNN Core Wrapper for ARIANNA Trigger System.

    C

Repositories

Showing 6 of 6 repositories

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