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RISC-V Single and Double Precision Floating Point extension#303

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dANW34V3R merged 70 commits intodevfrom
RISCV_F
Dec 13, 2023
Merged

RISC-V Single and Double Precision Floating Point extension#303
dANW34V3R merged 70 commits intodevfrom
RISCV_F

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@dANW34V3R
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@dANW34V3R dANW34V3R commented Mar 28, 2023

This PR adds support for the F and D extensions as well as a dummy implementation of the Zicsr extension which is required by the former. The CSR extension cannot be completed as Capstone does not fully support disassembly of these instructions. Once a Capstone update is performed SimEng can be updated. Many spelling updates have also been performed.

Note: 8 tests are expected to fail as these rely on the correct rounding mode being set

…dresses correctly so all implementations are left blank
Comment thread test/regression/riscv/instructions/float.cc Outdated
Comment thread test/regression/riscv/instructions/float.cc
FinnWilkinson
FinnWilkinson previously approved these changes Dec 12, 2023
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There are some minor consistency issues with CoreInstance changes, but as this class is soon being changed / removed its not worth blocking this PR for them

FinnWilkinson
FinnWilkinson previously approved these changes Dec 12, 2023
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@JosephMoore25 JosephMoore25 left a comment

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Looks good, nice work. Two minor comments that should take minimal time for consistency and then I'm happy to approve

Comment thread src/include/simeng/CoreInstance.hh
Comment thread src/include/simeng/CoreInstance.hh
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In agreeance with @FinnWilkinson approval comment but the upcoming SimInfo PR will change those changes so best to re-discuss implementation on that PR or on the future CoreInstance PR.

Comment thread docs/sphinx/developer/arch/supported/riscv.rst Outdated
jj16791
jj16791 previously approved these changes Dec 13, 2023
JosephMoore25
JosephMoore25 previously approved these changes Dec 13, 2023
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Looks good overall, nice work

FinnWilkinson
FinnWilkinson previously approved these changes Dec 13, 2023
@dANW34V3R dANW34V3R merged commit 3cb5f56 into dev Dec 13, 2023
@dANW34V3R dANW34V3R deleted the RISCV_F branch February 26, 2024 14:46
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Add RISC-V floating point support

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