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Correct CSRRW State Change#364

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dANW34V3R merged 3 commits intodevfrom
RV-frm-fix
Dec 20, 2023
Merged

Correct CSRRW State Change#364
dANW34V3R merged 3 commits intodevfrom
RV-frm-fix

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Closes #359

This PR fixes issue #359 causing CloverLeaf compiled with GCC 12.2 to produce Inf for all floating point values. At beginning of the program execution fsflags Ra is called repeatedly. This is a pseudoinstruction for csrrw x0, fflags, Ra which discards the result in the zero register.

The code in the execution handler blindly updated the first value held in the destination register span without checking if it is valid first which is not the case when the only destination is X0. This caused overwriting of registers incorrectly. A simple check is introduced to fix this.

Also in this PR:

  • More accurate dummy value returned for the fsrm instruction
  • Removal of unused variables in execute

@dANW34V3R dANW34V3R changed the base branch from main to dev December 18, 2023 22:23
@FinnWilkinson FinnWilkinson added bug Something isn't working 0.9.6 Part of SimEng Release 0.9.6 labels Dec 19, 2023
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#rerun tests

@dANW34V3R dANW34V3R merged commit 75cfc3c into dev Dec 20, 2023
@dANW34V3R dANW34V3R deleted the RV-frm-fix branch February 26, 2024 14:47
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CloverLeaf RISC-V Infinity Issue

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