Skip to content

Add atomic loads and stores#1077

Merged
dschuff merged 8 commits intomasterfrom
atomicloadstore
Jun 28, 2017
Merged

Add atomic loads and stores#1077
dschuff merged 8 commits intomasterfrom
atomicloadstore

Conversation

@dschuff
Copy link
Member

@dschuff dschuff commented Jun 28, 2017

Add IR, wast and binary support for atomic loads and stores.

Currently all IR generated by means other than parsing wast and binary files always generates non-atomic accesses, and optimizations have not yet been made aware of atomics, so they are certainly not ready to be used yet.

// If control flow reaches the point of the WASM_UNREACHABLE(), the program is
// undefined.
#if __has_builtin(__builtin_unreachable)
#if __has_builtin(__builtin_unreachable) && defined(NDEBUG)
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

what does this change do?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It means that it uses __builtin_unreachable only in release mode, and aborts in debug mode. Makes catching bugs easier.

if (maybeVisitConst(curr, code)) break;
if (maybeVisitLoad(curr, code)) break;
if (maybeVisitStore(curr, code)) break;
if (maybeVisitLoad(curr, code, /*isAtomc=*/false)) break;
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

typos in Atomic

@dschuff dschuff merged commit e2c08d4 into master Jun 28, 2017
@dschuff dschuff deleted the atomicloadstore branch June 28, 2017 19:06
@kripken
Copy link
Member

kripken commented Jul 4, 2017

I think we might need some followup work here:

  • This PR added a property to loads and stores. We need to make hashing, copying and equality checking work with that. This could be a silent error, so it's worrying.
  • The new atomic expression type needs support for those things as well. Also possible that it needs support in some of the optimization passes. This should cause aborts, so it's less worrying.

@dschuff
Copy link
Member Author

dschuff commented Jul 5, 2017

Yes, we definitely need followup work. I probably should have said more about my current plan in a bug or something. But anyway, yeah this is definitely the beginning of adding atomic/shared mem support.
This PR (and the upcoming ones to add atomicrmw/cmpxchg etc) focus on getting the instructions in, and round-tripping via text and binary format. Then we definitely need to look at optimizations and such. Certainly many optimizations will need to treat atomic loads/stores differently, and atomicrmw and friends will be completely different IR instructions. Concurrently we can add asm2wasm/s2wasm support to actually use them.

@dschuff dschuff mentioned this pull request Jul 10, 2017
10 tasks
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants