Llama reimplementation with fused transaction sequence

[andrej]

Added

• Python code that automatically generates a fused MLIR operator from an "invocation plan" of smaller operators using aiex.configure and aiex.run
• llama_npu.py implementation that makes use of that fusion. goal: all operators end-to-end run on NPU, no involvement of CPU whatsoever
• A couple of new operators needed to run everything on NPU: strided_copy and repeat -- not yet very optimized
• new simple baseline CPU llama implementation

Changed

• streamlined some of the compilation infrastructure where I ran into limitations
• added masking option with run-time parameter to softmax

Removed

• old llama implementation

To-Do

• offload everything in prefill too -- there are still some CPU operations there
• fuse prefill together too
• upgrade actions runner to use XRT after Add Python binding for ELF-initialized hardware context Xilinx/XRT#9560, which this relies on
• upgrade this repository to use MLIR-AIE after Also inline locks in aiex.run lowering + codegen performance improvements Xilinx/mlir-aie#2831, which this relies on
• figure out something about patching? currently, patching the fused transaction sequence for decode slows everything down a lot because we re-instantiate a new xrt::elf for every token. proper solution would be to use new scratchpad memory firmware feature to read run-time parameters from DDR
• re-test all the other operators after refactoring compilation infrastructure, might have broken

PR Merge Checklist

1. The PR is rebased on the latest devel commit and pointing to devel.
2. Your PR has been reviewed and approved.
3. All checks are passing.