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Summary

  • esp32: Explicitly fail on boot-up for unsupported ESP32 versions:

    • ESP32 is supported on NuttX starting from chip revision 3.0. This, however, didn't prevent the user from using older chip revisions, which caused unexpected behaviors. This commit checks chip revision before finishing booting NuttX.
  • esp32/hardware/esp32_efuse.h: Update macros for registers:

    • Remove duplicated configs from esp32_soc.h;
    • Add missing header files from APB registers;
    • Add missing macro definitions from EFUSE;
    • Update related code to use the new macros;
  • esp32/hardware: Rename efuse_reg.h to esp32_efuse.h.

Impact

Prevent users to use unsupported older versions of ESP32.

Testing

Internal CI testing + ESP32 from different versions.

This commit is intended to update the EFUSE's register content and
update related configs:
 - Remove duplicated configs from `esp32_soc.h`;
 - Add missing header files from APB registers;
 - Add missing macro definitions from EFUSE;
 - Update related code to use the new macros;
ESP32 is supported on NuttX starting from chip revision 3.0. This,
however, didn't prevent the user from using older chip revisions,
which caused unexpected behaviors. This commit checks chip revision
before finishing booting NuttX.
Espressif's MCUboot should be built from sources.
@xiaoxiang781216 xiaoxiang781216 merged commit 282feec into apache:master Jan 21, 2024
@masayuki2009
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@tmedicci

I noticed that my esp32-devkitc board does not boot withi this PR.
The esptool says that the board has ESP32-D0WD (revision v1.0).
Is it no longer supported?

esptool.py v3.3.3
Serial port /dev/serial/by-id/usb-Silicon_Labs_CP2102N_USB_to_UART_Bridge_Controller_18c6af91956ee911b0ad8811cd81828a-if00-port0
Connecting....
Chip is ESP32-D0WD (revision v1.0)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None
Crystal is 40MHz
MAC: fc:f5:c4:45:a8:9c
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 921600
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Flash will be erased from 0x00001000 to 0x00007fff...
Flash will be erased from 0x00008000 to 0x00008fff...
Flash will be erased from 0x00010000 to 0x00066fff...
Compressed 26288 bytes to 16480...
Writing at 0x00001000... (50 %)
Writing at 0x0000762a... (100 %)
Wrote 26288 bytes (16480 compressed) at 0x00001000 in 0.7 seconds (effective 311.5 kbit/s)...
Hash of data verified.
Compressed 3072 bytes to 69...
Writing at 0x00008000... (100 %)
Wrote 3072 bytes (69 compressed) at 0x00008000 in 0.1 seconds (effective 399.1 kbit/s)...
Hash of data verified.
Compressed 355168 bytes to 174997...
Writing at 0x00010000... (9 %)
Writing at 0x00019c8d... (18 %)
Writing at 0x0002823a... (27 %)
Writing at 0x00035802... (36 %)
Writing at 0x00040794... (45 %)
Writing at 0x00045e1f... (54 %)
Writing at 0x0004b80a... (63 %)
Writing at 0x000511d8... (72 %)
Writing at 0x00056bcc... (81 %)
Writing at 0x0005c825... (90 %)
Writing at 0x00062bf6... (100 %)
Wrote 355168 bytes (174997 compressed) at 0x00010000 in 3.1 seconds (effective 929.0 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

$ picocom -q -b 115200  /dev/serial/by-id/usb-Silicon_Labs_CP2102N_USB_to_UART_Bridge_Controller_18c6af91956ee911b0ad8811cd81828a-if00-port0

@masayuki2009
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@tmedicci

Also, esp32-devkitc:elf does not work with qemu-esp-develop-8.1.3-20231206.

/home/ishikawa/opensource/QEMU/qemu-esp-develop-8.1.3-20231206/build/qemu-system-xtensa -nographic -M esp32 -smp 2 -drive file=./nuttx/nuttx.merged.bin,if=mtd,format=raw
==1776403==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Adding SPI flash device
ets Jul 29 2019 12:21:46

rst:0x1 (POWERON_RESET),boot:0x12 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6952
load:0x40078000,len:15488
load:0x40080400,len:4
ho 8 tail 4 room 4
load:0x40080404,len:3752
entry 0x40080648
I (1048) boot: ESP-IDF v5.1-dev-3972-g1559b6309f 2nd stage bootloader
I (1059) boot: compile time Mar 15 2023 12:14:05
I (1118) boot: chip revision: v0.0
I (1141) boot.esp32: SPI Speed      : 40MHz
I (1143) boot.esp32: SPI Mode       : DIO
I (1144) boot.esp32: SPI Flash Size : 4MB
I (1183) boot: Enabling RNG early entropy source...
I (1243) boot: Partition Table:
I (1244) boot: ## Label            Usage          Type ST Offset   Length
I (1246) boot:  0 factory          factory app      00 00 00010000 00100000
I (1263) boot: End of partition table
I (1283) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=29890h (170128) map
I (1548) esp_image: segment 1: paddr=000398b8 vaddr=3ffb15f0 size=00278h (   632) load
I (1590) esp_image: segment 2: paddr=00039b38 vaddr=40080000 size=025a0h (  9632) load
I (1652) esp_image: segment 3: paddr=0003c0e0 vaddr=00000000 size=03f38h ( 16184)
I (1713) esp_image: segment 4: paddr=00040020 vaddr=400d0020 size=26b1ch (158492) map
I (1964) boot: Loaded app from partition at offset 0x10000
I (1966) boot: Disabling RNG early entropy source...
ERROR: NuttX supports ESP32 chip revision >= v3.0 (chip revision is v0.0)
xtensa_user_panic: User Exception: EXCCAUSE=001c task:
xtensa_user_panic: User Exception: EXCCAUSE=001c task:

@tmedicci
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@tmedicci

I noticed that my esp32-devkitc board does not boot withi this PR. The esptool says that the board has ESP32-D0WD (revision v1.0). Is it no longer supported?

esptool.py v3.3.3
Serial port /dev/serial/by-id/usb-Silicon_Labs_CP2102N_USB_to_UART_Bridge_Controller_18c6af91956ee911b0ad8811cd81828a-if00-port0
Connecting....
Chip is ESP32-D0WD (revision v1.0)
Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None
Crystal is 40MHz
MAC: fc:f5:c4:45:a8:9c
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 921600
Changed.
Configuring flash size...
Auto-detected Flash size: 4MB
Flash will be erased from 0x00001000 to 0x00007fff...
Flash will be erased from 0x00008000 to 0x00008fff...
Flash will be erased from 0x00010000 to 0x00066fff...
Compressed 26288 bytes to 16480...
Writing at 0x00001000... (50 %)
Writing at 0x0000762a... (100 %)
Wrote 26288 bytes (16480 compressed) at 0x00001000 in 0.7 seconds (effective 311.5 kbit/s)...
Hash of data verified.
Compressed 3072 bytes to 69...
Writing at 0x00008000... (100 %)
Wrote 3072 bytes (69 compressed) at 0x00008000 in 0.1 seconds (effective 399.1 kbit/s)...
Hash of data verified.
Compressed 355168 bytes to 174997...
Writing at 0x00010000... (9 %)
Writing at 0x00019c8d... (18 %)
Writing at 0x0002823a... (27 %)
Writing at 0x00035802... (36 %)
Writing at 0x00040794... (45 %)
Writing at 0x00045e1f... (54 %)
Writing at 0x0004b80a... (63 %)
Writing at 0x000511d8... (72 %)
Writing at 0x00056bcc... (81 %)
Writing at 0x0005c825... (90 %)
Writing at 0x00062bf6... (100 %)
Wrote 355168 bytes (174997 compressed) at 0x00010000 in 3.1 seconds (effective 929.0 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

$ picocom -q -b 115200  /dev/serial/by-id/usb-Silicon_Labs_CP2102N_USB_to_UART_Bridge_Controller_18c6af91956ee911b0ad8811cd81828a-if00-port0

Hi @masayuki2009! Chip revisions before the v3.0 require a lot of workarounds to fix all the known issues and we don't aim to fully support them on NuttX (you can check https://www.espressif.com/sites/default/files/documentation/esp32_chip_revision_v3_0_user_guide_en.pdf as a reference). This limitation was already true, we just made it clear with this MR because we have received some bug reports regarding old chips.

You can ignore the check by setting -DESP32_IGNORE_CHIP_REVISION_CHECK while building the firmware, just like: make EXTRAFLAGS="-DESP32_IGNORE_CHIP_REVISION_CHECK".

@tmedicci
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@tmedicci

Also, esp32-devkitc:elf does not work with qemu-esp-develop-8.1.3-20231206.

/home/ishikawa/opensource/QEMU/qemu-esp-develop-8.1.3-20231206/build/qemu-system-xtensa -nographic -M esp32 -smp 2 -drive file=./nuttx/nuttx.merged.bin,if=mtd,format=raw
==1776403==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Adding SPI flash device
ets Jul 29 2019 12:21:46

rst:0x1 (POWERON_RESET),boot:0x12 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6952
load:0x40078000,len:15488
load:0x40080400,len:4
ho 8 tail 4 room 4
load:0x40080404,len:3752
entry 0x40080648
I (1048) boot: ESP-IDF v5.1-dev-3972-g1559b6309f 2nd stage bootloader
I (1059) boot: compile time Mar 15 2023 12:14:05
I (1118) boot: chip revision: v0.0
I (1141) boot.esp32: SPI Speed      : 40MHz
I (1143) boot.esp32: SPI Mode       : DIO
I (1144) boot.esp32: SPI Flash Size : 4MB
I (1183) boot: Enabling RNG early entropy source...
I (1243) boot: Partition Table:
I (1244) boot: ## Label            Usage          Type ST Offset   Length
I (1246) boot:  0 factory          factory app      00 00 00010000 00100000
I (1263) boot: End of partition table
I (1283) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=29890h (170128) map
I (1548) esp_image: segment 1: paddr=000398b8 vaddr=3ffb15f0 size=00278h (   632) load
I (1590) esp_image: segment 2: paddr=00039b38 vaddr=40080000 size=025a0h (  9632) load
I (1652) esp_image: segment 3: paddr=0003c0e0 vaddr=00000000 size=03f38h ( 16184)
I (1713) esp_image: segment 4: paddr=00040020 vaddr=400d0020 size=26b1ch (158492) map
I (1964) boot: Loaded app from partition at offset 0x10000
I (1966) boot: Disabling RNG early entropy source...
ERROR: NuttX supports ESP32 chip revision >= v3.0 (chip revision is v0.0)
xtensa_user_panic: User Exception: EXCCAUSE=001c task:
xtensa_user_panic: User Exception: EXCCAUSE=001c task:

Are you using Espressif's port of QEMU?

It is possible to set virtual refuses to make it behave as a chip revision > 3.0: https://github.com/espressif/esp-toolchain-docs/blob/main/qemu/esp32/README.md#emulating-esp32-eco3

@masayuki2009
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@tmedicci

Are you using Espressif's port of QEMU?

Yes.

It is possible to set virtual refuses to make it behave as a chip revision > 3.0: https://github.com/espressif/esp-toolchain-docs/blob/main/qemu/esp32/README.md#emulating-esp32-eco3

Thanks for the information.
Let me try it later.

@tmedicci
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@tmedicci

Are you using Espressif's port of QEMU?

Yes.

It is possible to set virtual refuses to make it behave as a chip revision > 3.0: https://github.com/espressif/esp-toolchain-docs/blob/main/qemu/esp32/README.md#emulating-esp32-eco3

Thanks for the information. Let me try it later.

you can use this as the content of the bin file to the virtual refuses ;)

@masayuki2009
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@tmedicci
Thanks, I confirmed that QEMU works with this PR.

@yamt
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yamt commented May 11, 2024

ESP32 is supported on NuttX starting from chip revision 3.0.

what problems does older esp32 versions have?
i have been using nuttx on a board like the following and haven't noticed any problems.

I (56) boot: ESP-IDF v4.4 2nd stage bootloader
I (56) boot: compile time 19:32:08
I (56) boot: chip revision: 1
I (59) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (66) boot.esp32: SPI Speed      : 40MHz
I (71) boot.esp32: SPI Mode       : DIO
I (76) boot.esp32: SPI Flash Size : 4MB
I (80) boot: Enabling RNG early entropy source...
I (86) boot: Partition Table:
I (89) boot: ## Label            Usage          Type ST Offset   Length
I (96) boot:  0 factory          factory app      00 00 00010000 00100000
I (104) boot: End of partition table

@acassis
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acassis commented May 11, 2024

ESP32 is supported on NuttX starting from chip revision 3.0.

what problems does older esp32 versions have? i have been using nuttx on a board like the following and haven't noticed any problems.

I (56) boot: ESP-IDF v4.4 2nd stage bootloader
I (56) boot: compile time 19:32:08
I (56) boot: chip revision: 1
I (59) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (66) boot.esp32: SPI Speed      : 40MHz
I (71) boot.esp32: SPI Mode       : DIO
I (76) boot.esp32: SPI Flash Size : 4MB
I (80) boot: Enabling RNG early entropy source...
I (86) boot: Partition Table:
I (89) boot: ## Label            Usage          Type ST Offset   Length
I (96) boot:  0 factory          factory app      00 00 00010000 00100000
I (104) boot: End of partition table

Probably because you are using recent ESP32 chips (ECO 3), the issue on happens on pretty old silicon versions.

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6 participants