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Fix armv7-a L2CC and apply the code to the sabre-6quad board #2309
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Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary: - This commit adds L2CC to nsh/defconfig - Also adds EXAMPLES_HELLO, TESTING_GETPRIME and TESTING_OSTEST Impact: - sabre-6quad:nsh only Testing: - Tested with both QEMU and dev board Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary: - This commit adds L2CC to smp/defconfig - Also adds CLOCK_MONOTONIC Impact: - sabre-6quad:smp only Testing: - Tested with both QEMU and dev board Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary: - Remove unnecessary d-cache operation to make boot fast Impact: - armv7-a SMP only Testing: - Tested with sabre-6quad:smp (QEMU and dev board) Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
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Hmmm, the following error happenned but the error does not relate to this PR. |
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LGTM |
xiaoxiang781216
approved these changes
Nov 16, 2020
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@btashton |
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Sure I'll go through these tonight there are a few more as well. I already did this for these two, but if you add the label they will show up in my query so I won't miss them. |
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This was referenced Nov 19, 2020
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Summary
Impact
Testing