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10 changes: 10 additions & 0 deletions src/tir/transforms/lower_tvm_builtin.cc
Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,16 @@ class BuiltinLower : public StmtExprMutator {
op = stmt.as<AllocateNode>();
// Get constant allocation bound.
int64_t nbytes = GetVectorBytes(op->dtype);
if (device_type_.defined()) {
if (const auto* dev_type = device_type_.as<IntImmNode>()) {
if (dev_type->value == kDLCPU) {
int32_t constant_size = op->constant_allocation_size();
if (constant_size > 0 && constant_size * nbytes < runtime::kMaxStackAlloca) {
return stmt;
}
}
}
}
PrimExpr total_bytes = make_const(op->extents[0].dtype(), nbytes);
for (size_t i = 0; i < op->extents.size(); ++i) {
total_bytes = total_bytes * op->extents[i];
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6 changes: 3 additions & 3 deletions vta/tutorials/frontend/deploy_classification.py
Original file line number Diff line number Diff line change
Expand Up @@ -191,7 +191,7 @@
env.WGT_WIDTH,
start_name=pack_dict[model][0],
stop_name=pack_dict[model][1],
device_annot=(env.TARGET == "intelfocl" or env.TARGET == "sim"),
device_annot=(env.TARGET == "intelfocl"),
)
else:
relay_prog = mod["main"]
Expand All @@ -203,7 +203,7 @@
relay_prog, target=target, params=params, target_host=env.target_host
)
else:
if env.TARGET == "intelfocl" or env.TARGET == "sim":
if env.TARGET == "intelfocl":
# multiple targets to run both on cpu and vta
target = {"cpu": env.target_vta_cpu, "ext_dev": target}
with vta.build_config(opt_level=3, disabled_pass={"AlterOpLayout"}):
Expand All @@ -221,7 +221,7 @@
remote.upload(temp.relpath("graphlib.tar"))
lib = remote.load_module("graphlib.tar")

if env.TARGET == "intelfocl" or env.TARGET == "sim":
if env.TARGET == "intelfocl":
ctxes = [remote.ext_dev(0), remote.cpu(0)]
m = graph_runtime.create(graph, lib, ctxes)
else:
Expand Down