Issue8717 x86 dws conv2d schedule #9092

sergio-grovety · 2021-09-23T13:59:10Z

Issue #8717
Add x86 schedule for depthwise_conv2d_nhwc
use x86 depthwise_conv2d_nhwc schedule for arm_cpu

- Improved implementaion of gemm function for conv2d - Removed %4 restriction for channels - Added test case to verify SMLAD intrinsic speed acceleration Signed-off-by: Sergey Smirnov <Sergey@grovety.com>

…-grovety/tvm into update-arm-simd-intrinsic

areusch · 2021-09-23T22:37:22Z

python/tvm/topi/x86/depthwise_conv2d.py

    return s


+def schedule_depthwise_conv2d_nhwc(outs):


@junrushao1994 @mbrookhart is this location ok? i believe this schedule is generic. could you take a look at it?

It looks like x86 always packs depthwise conv to NCHWc, so this will never get hit on an x86 machine. That makes it feel a little misplaced. Any reason not to put it here? https://github.com/apache/tvm/blob/main/python/tvm/topi/generic/conv2d.py
I think that's where a lot of the multi-CPU specialization ends up, i.e, all of the int8 kernels for ARM and X86 go through there.

areusch · 2021-09-23T22:37:53Z

@sergey-grovety could you add a test to exercise this schedule?

…-grovety/tvm into issue8717-x86-DwsConv2d-schedule

…m 2466816.

areusch

thanks @sergey-grovety i'd like to get @mbrookhart or @junrushao1994 's feedback on schedule placement, then we can merge this.

apps/microtvm/reference-vm/zephyr/base-box/base_box_test.sh

areusch · 2021-09-27T18:38:24Z

tests/micro/zephyr/test_zephyr_armv7m.py

+        if file["path"] in {"CMSIS/DSP/Include", "CMSIS/DSP/Include/dsp", "CMSIS/NN/Include"}:
+            include_trees.update({file["path"]: file["sha"]})
+
+    for path, sha in include_trees.items():


do you mind factoring this into a helper function in python/tvm/contrib/download.py? it's fairly complex so would prefer if we can reuse it if needed.

tests/micro/zephyr/test_zephyr_armv7m.py

…m/sergey-grovety/tvm into issue8717-x86-DwsConv2d-schedule" This reverts commit e927567, reversing changes made to 0ccb5a0.

This reverts commit 32ede71. fix format move schedule_depthwise_conv2d_nhwc to generic conv2d, add test for schedule_depthwise_conv2d_nhwc fix test_export_model_library_format_workspace use x86 depthwise_conv2d_nhwc schedule for arm_cpu Add x86 schedule for depthwise_conv2d_nhwc # Conflicts: # python/tvm/relay/op/strategy/arm_cpu.py

…chedule_depthwise_conv2d_nhwc fix format Revert "fix test_export_model_library_format_workspace" added a missing comma

…7-x86-DwsConv2d-schedule

…_nhwc

areusch

thanks @sergey-grovety!

areusch · 2021-09-30T23:28:08Z

Merging due to separate reports of problems with WinMacBuild.

* [microTVM] Update support for ARMv7m intrinsic - Improved implementaion of gemm function for conv2d - Removed %4 restriction for channels - Added test case to verify SMLAD intrinsic speed acceleration Signed-off-by: Sergey Smirnov <Sergey@grovety.com> * [microTVM] Update support for ARMv7m intrinsic - Improved implementaion of gemm function for conv2d - Removed %4 restriction for channels - Added test case to verify SMLAD intrinsic speed acceleration Signed-off-by: Sergey Smirnov <Sergey@grovety.com> * Issue 8717 Add schedule for depthwise_conv2d_nhwc * Implemented discussed changes. * Removed unnecessary test files. * Formatting fixed. * Formatting fixed2. * Formatting fixed3. * Formatting fixed4. * Formatting fixed5. * Fixed test time result checking. * Check rebuild. * Formatting fixed. * Formatting fixed. * Add default DepthwiseConv2D schedule in NHWC layout for arm cpu * Fixed micro model library test. Checking size reduced to 16 bytes from 2466816. * Revert "Merge branch 'update-arm-simd-intrinsic' of https://github.com/sergey-grovety/tvm into issue8717-x86-DwsConv2d-schedule" This reverts commit e927567, reversing changes made to 0ccb5a0. * Revert "fix test_export_model_library_format_workspace" This reverts commit 32ede71. fix format move schedule_depthwise_conv2d_nhwc to generic conv2d, add test for schedule_depthwise_conv2d_nhwc fix test_export_model_library_format_workspace use x86 depthwise_conv2d_nhwc schedule for arm_cpu Add x86 schedule for depthwise_conv2d_nhwc # Conflicts: # python/tvm/relay/op/strategy/arm_cpu.py * move schedule_depthwise_conv2d_nhwc to generic conv2d, add test for schedule_depthwise_conv2d_nhwc fix format Revert "fix test_export_model_library_format_workspace" added a missing comma * Revert wrong merge changes * empty commit to force pipeline restart * Add condition to use compute_at for generic schedule_depthwise_conv2d_nhwc Co-authored-by: Sergey Smirnov <Sergey.Smirnov@mir.dev> Co-authored-by: Alex-grovety <Alexey.Yazev@mir.dev>

sergio-grovety and others added 18 commits September 12, 2021 12:11

[microTVM] Update support for ARMv7m intrinsic

a362004

- Improved implementaion of gemm function for conv2d - Removed %4 restriction for channels - Added test case to verify SMLAD intrinsic speed acceleration Signed-off-by: Sergey Smirnov <Sergey@grovety.com>

Merge branch 'apache:main' into update-arm-simd-intrinsic

13dee66

[microTVM] Update support for ARMv7m intrinsic

0ea201e

- Improved implementaion of gemm function for conv2d - Removed %4 restriction for channels - Added test case to verify SMLAD intrinsic speed acceleration Signed-off-by: Sergey Smirnov <Sergey@grovety.com>

Merge branch 'update-arm-simd-intrinsic' of https://github.com/sergey…

1d4288a

…-grovety/tvm into update-arm-simd-intrinsic

Issue 8717 Add schedule for depthwise_conv2d_nhwc

6d7bdaa

Implemented discussed changes.

36aa10d

Removed unnecessary test files.

605cb1b

Formatting fixed.

8dc5a3c

Formatting fixed2.

4cdf12c

Formatting fixed3.

5288a52

Formatting fixed4.

f844d74

Formatting fixed5.

47e3db2

Fixed test time result checking.

84ac766

Check rebuild.

c265113

Formatting fixed.

83a86dd

Formatting fixed.

3d8b944

Merge branch 'update-arm-simd-intrinsic' of https://github.com/sergey…

af04a38

…-grovety/tvm into update-arm-simd-intrinsic

Add default DepthwiseConv2D schedule in NHWC layout for arm cpu

0ccb5a0

sergio-grovety requested review from Huyuwei, Laurawly, MarisaKirisame, anijain2305, jcf94, jroesch, junrushao, jwfromm, kevinthesun, masahi, mbrookhart and slyubomirsky as code owners September 23, 2021 13:59

sergio-grovety requested review from ZihengJiang, vinx13, wweic, yzhliu and zhiics as code owners September 23, 2021 13:59

Alex-grovety mentioned this pull request Sep 23, 2021

Fusion of operations and cast in mobilenet v1 conv2d causing large feature maps #8717

Closed

areusch reviewed Sep 23, 2021

View reviewed changes

sergio-grovety added 2 commits September 24, 2021 05:05

Merge branch 'update-arm-simd-intrinsic' of https://github.com/sergey…

e927567

…-grovety/tvm into issue8717-x86-DwsConv2d-schedule

Fixed micro model library test. Checking size reduced to 16 bytes fro…

80f936e

…m 2466816.

sergio-grovety requested review from comaniac, merrymercy and tqchen as code owners September 27, 2021 10:25

areusch reviewed Sep 27, 2021

View reviewed changes

Sergey Smirnov added 2 commits September 28, 2021 15:44

Revert "Merge branch 'update-arm-simd-intrinsic' of https://github.co…

11c688f

…m/sergey-grovety/tvm into issue8717-x86-DwsConv2d-schedule" This reverts commit e927567, reversing changes made to 0ccb5a0.

sergio-grovety mentioned this pull request Sep 28, 2021

[microTVM] Update support for ARMv7m intrinsic #8990

Merged

sergio-grovety force-pushed the issue8717-x86-DwsConv2d-schedule branch from 47dbcb8 to e64aea9 Compare September 28, 2021 20:11

Sergey Smirnov and others added 5 commits September 29, 2021 10:51

move schedule_depthwise_conv2d_nhwc to generic conv2d, add test for s…

3c19f9c

…chedule_depthwise_conv2d_nhwc fix format Revert "fix test_export_model_library_format_workspace" added a missing comma

Revert wrong merge changes

456a365

Merge remote-tracking branch 'origin/preview-issue8717' into issue871…

6c04d38

…7-x86-DwsConv2d-schedule

empty commit to force pipeline restart

918f0c8

Add condition to use compute_at for generic schedule_depthwise_conv2d…

bb79260

…_nhwc

areusch approved these changes Sep 30, 2021

View reviewed changes

areusch merged commit 12330ca into apache:main Sep 30, 2021

sergio-grovety deleted the issue8717-x86-DwsConv2d-schedule branch October 26, 2022 09:20

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Issue8717 x86 dws conv2d schedule #9092

Issue8717 x86 dws conv2d schedule #9092

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sergio-grovety commented Sep 23, 2021

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areusch Sep 23, 2021

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Issue8717 x86 dws conv2d schedule #9092

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sergio-grovety commented Sep 23, 2021

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