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Merged
pull merged 33 commits into from
Dec 3, 2020
Merged

[pull] master from torvalds:master #335

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fbdae7d
ASoC: Intel: bytcr_rt5640: Fix HP Pavilion x2 Detachable quirks
jwrdegoede Nov 18, 2020
92666d4
ALSA: hda/realtek - Fixed Dell AIO wrong sound tone
KailangYang Nov 19, 2020
b182496
ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state
Nov 23, 2020
eeacd80
ALSA: hda/realtek: Enable headset of ASUS UX482EG & B9400CEA with ALC294
starnight Nov 24, 2020
3fba05a
ASoC: wm_adsp: fix error return code in wm_adsp_load()
Nov 23, 2020
aa4cb89
ASoC: rt5682: change SAR voltage threshold
shumingfan Nov 26, 2020
e5782a5
ALSA: hda/realtek - Add new codec supported for ALC897
KailangYang Nov 27, 2020
402d584
ALSA: usb-audio: US16x08: fix value count for level meters
marcan Nov 27, 2020
5ef5bee
Merge tag 'asoc-fix-v5.10-rc5' of https://git.kernel.org/pub/scm/linu…
tiwai Nov 27, 2020
242d990
ALSA: hda/generic: Add option to enforce preferred_dacs pairs
tiwai Nov 27, 2020
c84bfed
ALSA: hda/realtek: Fix bass speaker DAC assignment on Asus Zephyrus G14
tiwai Nov 27, 2020
aeedad2
ALSA: hda/realtek: Add mute LED quirk to yet another HP x360 model
tiwai Nov 28, 2020
ca1314d
arm64: syscall: exit userspace before unmasking exceptions
mrutland-arm Nov 30, 2020
114e0a6
arm64: mark idle code as noinstr
mrutland-arm Nov 30, 2020
da19267
arm64: entry: mark entry code as noinstr
mrutland-arm Nov 30, 2020
2f911d4
arm64: entry: move enter_from_user_mode to entry-common.c
mrutland-arm Nov 30, 2020
3cb5ed4
arm64: entry: prepare ret_to_user for function call
mrutland-arm Nov 30, 2020
105fc33
arm64: entry: move el1 irq/nmi logic to C
mrutland-arm Nov 30, 2020
2352904
arm64: entry: fix non-NMI user<->kernel transitions
mrutland-arm Nov 30, 2020
1ec2f2c
arm64: ptrace: prepare for EL1 irq/rcu tracking
mrutland-arm Nov 30, 2020
7cd1ea1
arm64: entry: fix non-NMI kernel<->kernel transitions
mrutland-arm Nov 30, 2020
f0cd5ac
arm64: entry: fix NMI {user, kernel}->kernel transitions
mrutland-arm Nov 30, 2020
2a9b3e6
arm64: entry: fix EL1 debug transitions
mrutland-arm Nov 30, 2020
9e5344e
arm64: mte: Fix typo in macro definition
fvincenzo Nov 30, 2020
24aed09
bootconfig: Load size and checksum in the footer as le32
mhiramat Nov 20, 2020
e868435
tools/bootconfig: Store size and checksum in footer as le32
mhiramat Nov 20, 2020
0522749
docs: bootconfig: Add the endianness of fields
mhiramat Nov 20, 2020
98701a2
vdpa: mlx5: fix vdpa/vhost dependencies
rddunlap Nov 28, 2020
2c60274
vhost_vdpa: return -EFAULT if copy_to_user() fails
Dec 2, 2020
8a02ec8
Merge tag 'trace-v5.10-rc6-bootconfig' of git://git.kernel.org/pub/sc…
torvalds Dec 2, 2020
bb95d60
Merge tag 'sound-5.10-rc7' of git://git.kernel.org/pub/scm/linux/kern…
torvalds Dec 2, 2020
2c6ffa9
Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/gi…
torvalds Dec 2, 2020
3bb61aa
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/…
torvalds Dec 2, 2020
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4 changes: 3 additions & 1 deletion Documentation/admin-guide/bootconfig.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -140,7 +140,9 @@ Since the boot configuration file is loaded with initrd, it will be added
to the end of the initrd (initramfs) image file with padding, size,
checksum and 12-byte magic word as below.

[initrd][bootconfig][padding][size(u32)][checksum(u32)][#BOOTCONFIG\n]
[initrd][bootconfig][padding][size(le32)][checksum(le32)][#BOOTCONFIG\n]

The size and checksum fields are unsigned 32bit little endian value.

When the boot configuration is added to the initrd image, the total
file size is aligned to 4 bytes. To fill the gap, null characters
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3 changes: 3 additions & 0 deletions arch/arm64/include/asm/daifflags.h
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Expand Up @@ -128,6 +128,9 @@ static inline void local_daif_inherit(struct pt_regs *regs)
{
unsigned long flags = regs->pstate & DAIF_MASK;

if (interrupts_enabled(regs))
trace_hardirqs_on();

/*
* We can't use local_daif_restore(regs->pstate) here as
* system_has_prio_mask_debugging() won't restore the I bit if it can
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5 changes: 5 additions & 0 deletions arch/arm64/include/asm/exception.h
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Expand Up @@ -31,7 +31,12 @@ static inline u32 disr_to_esr(u64 disr)
return esr;
}

asmlinkage void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs);
asmlinkage void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs);
asmlinkage void enter_from_user_mode(void);
asmlinkage void exit_to_user_mode(void);
void arm64_enter_nmi(struct pt_regs *regs);
void arm64_exit_nmi(struct pt_regs *regs);
void do_mem_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs);
void do_undefinstr(struct pt_regs *regs);
void do_bti(struct pt_regs *regs);
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4 changes: 4 additions & 0 deletions arch/arm64/include/asm/ptrace.h
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Expand Up @@ -193,6 +193,10 @@ struct pt_regs {
/* Only valid when ARM64_HAS_IRQ_PRIO_MASKING is enabled. */
u64 pmr_save;
u64 stackframe[2];

/* Only valid for some EL1 exceptions. */
u64 lockdep_hardirqs;
u64 exit_rcu;
};

static inline bool in_syscall(struct pt_regs const *regs)
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2 changes: 1 addition & 1 deletion arch/arm64/include/asm/sysreg.h
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Expand Up @@ -987,7 +987,7 @@
#define SYS_TFSR_EL1_TF0_SHIFT 0
#define SYS_TFSR_EL1_TF1_SHIFT 1
#define SYS_TFSR_EL1_TF0 (UL(1) << SYS_TFSR_EL1_TF0_SHIFT)
#define SYS_TFSR_EL1_TF1 (UK(2) << SYS_TFSR_EL1_TF1_SHIFT)
#define SYS_TFSR_EL1_TF1 (UL(1) << SYS_TFSR_EL1_TF1_SHIFT)

/* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
#define SYS_MPIDR_SAFE_VAL (BIT(31))
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