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RISC-V support #292

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RISC-V support #292

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3171650
riscv: Identify SiFive IDCODE and call stub to probe.
gsmcmullin Sep 25, 2017
907eec5
Add GD32V103 target.
UweBonnes May 10, 2020
6ed3e9a
riscv: low-level DTM/DM access implemented
gsmcmullin Sep 25, 2017
0a95daa
riscv: Read words from system ram.
gsmcmullin Sep 26, 2017
fe42f98
riscv: Fix reading registers
gsmcmullin Sep 26, 2017
c717443
riscv: Fixes around halt/resume, implement stepping
gsmcmullin Sep 27, 2017
2ae7647
riscv: Fix register writes
gsmcmullin Sep 27, 2017
f106419
riscv: Report architecture as rv32
gsmcmullin Sep 27, 2017
f2328f3
riscv: Implement reset
gsmcmullin Sep 27, 2017
da93f10
riscv: Implement break- and watchpoints
gsmcmullin Sep 27, 2017
7e6dbf3
riscv: Implement single register reads
gsmcmullin Sep 29, 2017
616f72a
riscv: Improve macro naming
gsmcmullin Sep 29, 2017
5b1a022
riscv: Catch exceptions in ram stubs
gsmcmullin Sep 29, 2017
240fd56
riscv: Implement byte and halfword memory access
gsmcmullin Sep 30, 2017
5ebb2ed
riscv: Fix breakpoints
gsmcmullin Sep 30, 2017
25c8839
riscv: Implement byte and halfword memory access
gsmcmullin Sep 30, 2017
af2d374
riscv: Implement byte and halfword memory writes
gsmcmullin Oct 1, 2017
2f4ceba
riscv: Clean up reset
gsmcmullin Oct 1, 2017
d3447e1
libftdi: Add HiFive 1 FTDI cable definition
gsmcmullin Oct 4, 2017
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1 change: 1 addition & 0 deletions src/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@ SRC = \
platform.c \
remote.c \
rp.c \
riscv.c \
sam3x.c \
sam4l.c \
samd.c \
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8 changes: 8 additions & 0 deletions src/platforms/hosted/ftdi_bmp.c
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Expand Up @@ -164,6 +164,14 @@ cable_desc_t cable_desc[] = {
.name = "ftdiswd",
.description = "FTDISWD"
},
{
.vendor = 0x0403,
.product = 0x6010,
.interface = INTERFACE_A,
.init.data_low = PIN3,
.init.ddr_low = PIN4 | PIN3 | PIN1 | PIN0,
.name = "hifive1"
},
{
.vendor = 0x15b1,
.product = 0x0003,
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7 changes: 7 additions & 0 deletions src/target/jtag_devs.c
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Expand Up @@ -22,11 +22,18 @@
#include "jtag_scan.h"
#include "adiv5.h"
#include "jtag_devs.h"
#include "riscv.h"

jtag_dev_descr_t dev_descr[] = {
{.idcode = 0x0BA00477, .idmask = 0x0FFF0FFF,
.descr = "ARM Limited: ADIv5 JTAG-DP port.",
.handler = adiv5_jtag_dp_handler},
{.idcode = 0x10e31913, .idmask = 0xFFFFFFFF,
.descr = "SiFive: E310-G000.",
.handler = riscv_jtag_handler},
{.idcode = 0x1000563d, .idmask = 0xFFFFFFFF,
.descr = "Sipeed RV32.",
.handler = riscv_jtag_handler},
{.idcode = 0x06410041, .idmask = 0x0FFFFFFF,
.descr = "ST Microelectronics: STM32, Medium density."},
{.idcode = 0x06412041, .idmask = 0x0FFFFFFF,
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