winch(x64): SIMD

[saulecabrera]

Winch is missing support for most of finished WebAssembly proposals. The goal of this issue is to track support for the SIMD proposal

• v128.load8x8_s @jeffcharles
• v128.load8x8_u @jeffcharles
• v128.load16x4_s @jeffcharles
• v128.load16x4_u @jeffcharles
• v128.load32x2_s @jeffcharles
• v128.load32x2_u @jeffcharles
• v128.load8_splat @jeffcharles
• v128.load16_splat @jeffcharles
• v128.load32_splat @jeffcharles
• v128.load64_splat @jeffcharles
• i8x16.shuffle @jeffcharles
• i8x16.swizzle @jeffcharles
• i8x16.splat @jeffcharles
• i16x8.splat @jeffcharles
• i32x4.splat @jeffcharles
• i64x2.splat @jeffcharles
• f32x4.splat @jeffcharles
• f64x2.splat @jeffcharles
• i8x16.extract_lane_s @jeffcharles
• i8x16.extract_lane_u @jeffcharles
• i8x16.replace_lane @jeffcharles
• i16x8.extract_lane_s @jeffcharles
• i16x8.extract_lane_u @jeffcharles
• i16x8.replace_lane @jeffcharles
• i32x4.extract_lane @jeffcharles
• i32x4.replace_lane @jeffcharles
• i64x2.extract_lane @jeffcharles
• i64x2.replace_lane @jeffcharles
• f32x4.extract_lane @jeffcharles
• f32x4.replace_lane @jeffcharles
• f64x2.extract_lane @jeffcharles
• f64x2.replace_lane @jeffcharles
• i8x16.eq@jeffcharles
• i8x16.ne@jeffcharles
• i8x16.lt_s@jeffcharles
• i8x16.lt_u @jeffcharles
• i8x16.gt_s @jeffcharles
• i8x16.gt_u @jeffcharles
• i8x16.le_s @jeffcharles
• i8x16.le_u @jeffcharles
• i8x16.ge_s @jeffcharles
• i8x16.ge_u @jeffcharles
• i16x8.eq @jeffcharles
• i16x8.ne @jeffcharles
• i16x8.lt_s @jeffcharles
• i16x8.lt_u @jeffcharles
• i16x8.gt_s @jeffcharles
• i16x8.gt_u @jeffcharles
• i16x8.le_s @jeffcharles
• i16x8.le_u @jeffcharles
• i16x8.ge_s @jeffcharles
• i16x8.ge_u @jeffcharles
• i32x4.eq @jeffcharles
• i32x4.ne @jeffcharles
• i32x4.lt_s @jeffcharles
• i32x4.lt_u @jeffcharles
• i32x4.gt_s @jeffcharles
• i32x4.gt_u @jeffcharles
• i32x4.le_s @jeffcharles
• i32x4.le_u @jeffcharles
• i32x4.ge_s @jeffcharles
• i32x4.ge_u @jeffcharles
• f32x4.eq @jeffcharles
• f32x4.ne @jeffcharles
• f32x4.lt @jeffcharles
• f32x4.gt @jeffcharles
• f32x4.le @jeffcharles
• f32x4.ge @jeffcharles
• f64x2.eq @jeffcharles
• f64x2.ne @jeffcharles
• f64x2.lt @jeffcharles
• f64x2.gt @jeffcharles
• f64x2.le @jeffcharles
• f64x2.ge @jeffcharles
• f64x2.abs @jeffcharles
• f64x2.add @jeffcharles
• f64x2.ceil @jeffcharles
• f64x2.div @jeffcharles
• f64x2.floor @jeffcharles
• f64x2.max @jeffcharles
• f64x2.min @jeffcharles
• f64x2.mul @jeffcharles
• f64x2.nearest @jeffcharles
• f64x2.neg @jeffcharles
• f64x2.pmax @jeffcharles
• f64x2.pmin @jeffcharles
• f64x2.sqrt @jeffcharles
• f64x2.sub @jeffcharles
• f64x2.trunc @jeffcharles
• i64x2.ne @jeffcharles
• i64x2.lt_s @jeffcharles
• i64x2.gt_s @jeffcharles
• i64x2.le_s @jeffcharles
• i64x2.ge_s @jeffcharles
• v128.not @MarinPostma
• v128.and @MarinPostma
• v128.andnot @MarinPostma
• v128.or @MarinPostma
• v128.xor @MarinPostma
• v128.bitselect @MarinPostma
• v128.any_true @MarinPostma
• v128.load8_lane @MarinPostma
• v128.load16_lane @MarinPostma
• v128.load32_lane @MarinPostma
• v128.load64_lane @MarinPostma
• v128.store8_lane @MarinPostma
• v128.store16_lane @MarinPostma
• v128.store32_lane @MarinPostma
• v128.store64_lane @MarinPostma
• v128.load32_zero @MarinPostma
• v128.load64_zero @MarinPostma
• f32x4.demote_f64x2_zero @jeffcharles
• f64x2.promote_low_f32x4 @jeffcharles
• i8x16.abs @jeffcharles
• i8x16.neg @MarinPostma
• i8x16.all_true @jeffcharles
• i8x16.bitmask @jeffcharles
• i8x16.narrow_i16x8_s @jeffcharles
• i8x16.narrow_i16x8_u @jeffcharles
• i8x16.shl @MarinPostma
• i8x16.shr_s @MarinPostma
• i8x16.shr_u @MarinPostma
• i8x16.add @MarinPostma
• i8x16.add_sat_s @MarinPostma
• i8x16.add_sat_u @MarinPostma
• i8x16.sub @MarinPostma
• i8x16.sub_sat_s @MarinPostma
• i8x16.sub_sat_u @MarinPostma
• i8x16.min_s@MarinPostma
• i8x16.min_u @MarinPostma
• i8x16.max_s @MarinPostma
• i8x16.max_u @MarinPostma
• i8x16.avgr_u @jeffcharles
• i16x8.abs @jeffcharles
• i16x8.neg @MarinPostma
• i16x8.all_true @jeffcharles
• i16x8.bitmask @jeffcharles
• i16x8.narrow_i32x4_s @jeffcharles
• i16x8.narrow_i32x4_u @jeffcharles
• i16x8.extend_low_i8x16_s @jeffcharles
• i16x8.extend_high_i8x16_s @jeffcharles
• i16x8.extend_low_i8x16_u @jeffcharles
• i16x8.extend_high_i8x16_u @jeffcharles
• i16x8.shl @MarinPostma
• i16x8.shr_s @MarinPostma
• i16x8.shr_u @MarinPostma
• i16x8.add @MarinPostma
• i16x8.add_sat_s @MarinPostma
• i16x8.add_sat_u @MarinPostma
• i16x8.sub @MarinPostma
• i16x8.sub_sat_s @MarinPostma
• i16x8.sub_sat_u @MarinPostma
• i16x8.mul @MarinPostma
• i16x8.min_s @MarinPostma
• i16x8.min_u @MarinPostma
• i16x8.max_s @MarinPostma
• i16x8.max_u @MarinPostma
• i16x8.avgr_u @jeffcharles
• i16x8.q15mulr_sat_s @jeffcharles
• i32x4.abs @jeffcharles
• i32x4.neg @MarinPostma
• i32x4.all_true @jeffcharles
• i32x4.bitmask @jeffcharles
• i32x4.extend_low_i16x8_s @jeffcharles
• i32x4.extend_high_i16x8_s @jeffcharles
• i32x4.extend_low_i16x8_u @jeffcharles
• i32x4.extend_high_i16x8_u @jeffcharles
• i32x4.shl @MarinPostma
• i32x4.shr_s @MarinPostma
• i32x4.shr_u @MarinPostma
• i32x4.add @MarinPostma
• i32x4.sub @MarinPostma
• i32x4.mul @MarinPostma
• i32x4.min_s @MarinPostma
• i32x4.min_u @MarinPostma
• i32x4.max_s @MarinPostma
• i32x4.max_u @MarinPostma
• i32x4.dot_i16x8_s @jeffcharles
• i64x2.eq
• i64x2.abs @jeffcharles
• i64x2.neg @MarinPostma
• i64x2.all_true @jeffcharles
• i64x2.bitmask @jeffcharles
• i64x2.shl @MarinPostma
• i64x2.shr_s @MarinPostma
• i64x2.shr_u @MarinPostma
• i64x2.add @MarinPostma
• i64x2.sub @MarinPostma
• i64x2.mul @MarinPostma
• i64x2.extend_low_i32x4_s @jeffcharles
• i64x2.extend_high_i32x4_s @jeffcharles
• i64x2.extend_low_i32x4_u @jeffcharles
• i64x2.extend_high_i32x4_u @jeffcharles
• i16x8.extmul_low_i8x16_s @MarinPostma
• i16x8.extmul_high_i8x16_s @MarinPostma
• i16x8.extmul_low_i8x16_u@MarinPostma
• i16x8.extmul_high_i8x16_u @MarinPostma
• i32x4.extmul_low_i16x8_s @MarinPostma
• i32x4.extmul_high_i16x8_s @MarinPostma
• i32x4.extmul_low_i16x8_u @MarinPostma
• i32x4.extmul_high_i16x8_u @MarinPostma
• i64x2.extmul_low_i32x4_s @MarinPostma
• i64x2.extmul_high_i32x4_s @MarinPostma
• i64x2.extmul_low_i32x4_u @MarinPostma
• i64x2.extmul_high_i32x4_u @MarinPostma
• i8x16.popcnt @jeffcharles
• i16x8.extadd_pairwise_i8x16_s @MarinPostma
• i16x8.extadd_pairwise_i8x16_u @MarinPostma
• i32x4.extadd_pairwise_i16x8_s @MarinPostma
• i32x4.extadd_pairwise_i16x8_u @MarinPostma
• f32x4.abs @jeffcharles
• f32x4.neg @jeffcharles
• f32x4.sqrt @jeffcharles
• f32x4.add @jeffcharles
• f32x4.sub @jeffcharles
• f32x4.mul @jeffcharles
• f32x4.div @jeffcharles
• f32x4.min @jeffcharles
• f32x4.max @jeffcharles
• f32x4.pmin @jeffcharles
• f32x4.pmax @jeffcharles
• f32x4.ceil @jeffcharles
• f32x4.floor @jeffcharles
• f32x4.trunc @jeffcharles
• f32x4.nearest @jeffcharles
• i32x4.trunc_sat_f32x4_s @jeffcharles
• i32x4.trunc_sat_f32x4_u @jeffcharles
• f32x4.convert_i32x4_s @jeffcharles
• f32x4.convert_i32x4_u @jeffcharles
• f64x2.convert_low_i32x4_s @jeffcharles
• f64x2.convert_low_i32x4_u @jeffcharles
• i32x4.trunc_sat_f64x2_s_zero @jeffcharles
• i32x4.trunc_sat_f64x2_u_zero @jeffcharles
• Enable fuzzing

[elliottt]

Once we're working SIMD support, the cranelift Winch calling convention will need to be updated with whatever mechanism we choose. There's a TODO in the x64 abi introduced in #8210 that points out where we'll need to handle this for return values.