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Merged
saulecabrera merged 7 commits into from
May 15, 2025
Merged

winch: Implement check_stack for aarch64 #10763

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664323f
winch: Implement check_stack for aarch64
graydon May 10, 2025
5f32e5f
winch: update aarch64 snapshot tests for check_stack change
graydon May 11, 2025
0835013
winch: address review comments on aarch64 check_stack
graydon May 13, 2025
be76596
winch: update aarch64 snapshot tests: check_stack uses unsigned compare
graydon May 13, 2025
c12c3f2
winch: update aarch64 snapshot tests: stack grows down
graydon May 15, 2025
b96b360
winch: aarch64 check_stack correct direction and alignment
graydon May 15, 2025
08b2402
winch: aarch64 enable stack_stack wast checks
graydon May 15, 2025
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20 changes: 11 additions & 9 deletions cranelift/codegen/src/isa/aarch64/inst/emit.rs
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Expand Up @@ -107,13 +107,8 @@ fn machreg_to_gpr_or_vec(m: Reg) -> u32 {
u32::from(m.to_real_reg().unwrap().hw_enc() & 31)
}

pub(crate) fn enc_arith_rrr(
bits_31_21: u32,
bits_15_10: u32,
rd: Writable<Reg>,
rn: Reg,
rm: Reg,
) -> u32 {
/// Encode a 3-register aeithmeric instruction.
pub fn enc_arith_rrr(bits_31_21: u32, bits_15_10: u32, rd: Writable<Reg>, rn: Reg, rm: Reg) -> u32 {
(bits_31_21 << 21)
| (bits_15_10 << 10)
| machreg_to_gpr(rd.to_reg())
Expand Down Expand Up @@ -204,7 +199,13 @@ fn enc_test_bit_and_branch(
| machreg_to_gpr(reg)
}

fn enc_move_wide(op: MoveWideOp, rd: Writable<Reg>, imm: MoveWideConst, size: OperandSize) -> u32 {
/// Encode a move-wide instruction.
pub fn enc_move_wide(
op: MoveWideOp,
rd: Writable<Reg>,
imm: MoveWideConst,
size: OperandSize,
) -> u32 {
assert!(imm.shift <= 0b11);
let op = match op {
MoveWideOp::MovN => 0b00,
Expand All @@ -218,7 +219,8 @@ fn enc_move_wide(op: MoveWideOp, rd: Writable<Reg>, imm: MoveWideConst, size: Op
| machreg_to_gpr(rd.to_reg())
}

fn enc_movk(rd: Writable<Reg>, imm: MoveWideConst, size: OperandSize) -> u32 {
/// Encode a move-keep immediate instruction.
pub fn enc_movk(rd: Writable<Reg>, imm: MoveWideConst, size: OperandSize) -> u32 {
assert!(imm.shift <= 0b11);
0x72800000
| size.sf_bit() << 31
Expand Down
2 changes: 1 addition & 1 deletion crates/cranelift/src/compiler.rs
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Expand Up @@ -225,7 +225,7 @@ impl wasmtime_environ::Compiler for Compiler {
// check to all functions for how much native stack is remaining. The
// `VMContext` pointer is the first argument to all functions, and the
// first field of this structure is `*const VMStoreContext` and the
// first field of that is the stack limit. Note that the stack limit in
// third field of that is the stack limit. Note that the stack limit in
// this case means "if the stack pointer goes below this, trap". Each
// function which consumes stack space or isn't a leaf function starts
// off by loading the stack limit, checking it against the stack
Expand Down
5 changes: 0 additions & 5 deletions crates/test-util/src/wast.rs
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Expand Up @@ -418,11 +418,6 @@ impl WastTest {
if config.compiler == Compiler::Winch {
if cfg!(target_arch = "aarch64") {
let unsupported = [
// Missing stack checks (#8321)
"spec_testsuite/call.wast",
"spec_testsuite/fac.wast",
"spec_testsuite/skip-stack-guard-page.wast",
"misc_testsuite/stack_overflow.wast",
// Fails intermittently
"misc_testsuite/table_copy_on_imported_tables.wast",
// Segfault
Expand Down
10 changes: 9 additions & 1 deletion tests/disas/winch/aarch64/br/as_br_if_cond.wat
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Expand Up @@ -10,7 +10,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x58
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
Expand All @@ -21,3 +28,4 @@
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 58: .byte 0x1f, 0xc1, 0x00, 0x00
10 changes: 9 additions & 1 deletion tests/disas/winch/aarch64/br/as_br_value.wat
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Expand Up @@ -10,7 +10,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x60
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
Expand All @@ -23,3 +30,4 @@
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 60: .byte 0x1f, 0xc1, 0x00, 0x00
10 changes: 9 additions & 1 deletion tests/disas/winch/aarch64/br/as_if_cond.wat
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Expand Up @@ -15,7 +15,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x60
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
Expand All @@ -28,3 +35,4 @@
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 60: .byte 0x1f, 0xc1, 0x00, 0x00
20 changes: 14 additions & 6 deletions tests/disas/winch/aarch64/br/as_if_else.wat
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Expand Up @@ -15,7 +15,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x18
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x80
;; 2c: mov x9, x0
;; sub x28, x28, #0x18
;; mov sp, x28
;; stur x0, [x28, #0x10]
Expand All @@ -24,15 +31,16 @@
;; stur w3, [x28]
;; ldur w0, [x28, #4]
;; tst w0, w0
;; b.eq #0x44
;; b #0x3c
;; 3c: ldur w0, [x28]
;; b #0x4c
;; 44: mov x16, #4
;; b.eq #0x60
;; b #0x58
;; 58: ldur w0, [x28]
;; b #0x68
;; 60: mov x16, #4
;; mov w0, w16
;; add x28, x28, #0x18
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 80: .byte 0x1f, 0xc1, 0x00, 0x00
20 changes: 14 additions & 6 deletions tests/disas/winch/aarch64/br/as_if_then.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x18
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x80
;; 2c: mov x9, x0
;; sub x28, x28, #0x18
;; mov sp, x28
;; stur x0, [x28, #0x10]
Expand All @@ -24,15 +31,16 @@
;; stur w3, [x28]
;; ldur w0, [x28, #4]
;; tst w0, w0
;; b.eq #0x48
;; b #0x3c
;; 3c: mov x16, #3
;; b.eq #0x64
;; b #0x58
;; 58: mov x16, #3
;; mov w0, w16
;; b #0x4c
;; 48: ldur w0, [x28]
;; b #0x68
;; 64: ldur w0, [x28]
;; add x28, x28, #0x18
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 80: .byte 0x1f, 0xc1, 0x00, 0x00
10 changes: 9 additions & 1 deletion tests/disas/winch/aarch64/br/as_loop_first.wat
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Expand Up @@ -11,7 +11,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x60
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
Expand All @@ -24,3 +31,4 @@
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 60: .byte 0x1f, 0xc1, 0x00, 0x00
14 changes: 11 additions & 3 deletions tests/disas/winch/aarch64/br/br_jump.wat
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Expand Up @@ -18,7 +18,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x20
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x8c
;; 2c: mov x9, x0
;; sub x28, x28, #0x18
;; mov sp, x28
;; stur x0, [x28, #0x10]
Expand All @@ -35,10 +42,11 @@
;; stur w16, [x28]
;; add x28, x28, #4
;; mov sp, x28
;; b #0x3c
;; 58: add x28, x28, #0x18
;; b #0x58
;; 74: add x28, x28, #0x18
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 8c: .byte 0x1f, 0xc1, 0x00, 0x00
22 changes: 15 additions & 7 deletions tests/disas/winch/aarch64/br_if/as_br_if_cond.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -10,24 +10,32 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x80
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
;; stur x1, [x28]
;; mov x16, #1
;; mov w0, w16
;; tst w0, w0
;; b.ne #0x4c
;; b #0x38
;; 38: mov x16, #1
;; b.ne #0x68
;; b #0x54
;; 54: mov x16, #1
;; mov w0, w16
;; tst w0, w0
;; b.ne #0x4c
;; b #0x4c
;; 4c: add x28, x28, #0x10
;; b.ne #0x68
;; b #0x68
;; 68: add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 80: .byte 0x1f, 0xc1, 0x00, 0x00
16 changes: 12 additions & 4 deletions tests/disas/winch/aarch64/br_if/as_br_value.wat
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x10
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x74
;; 2c: mov x9, x0
;; sub x28, x28, #0x10
;; mov sp, x28
;; stur x0, [x28, #8]
Expand All @@ -20,11 +27,12 @@
;; mov x16, #1
;; mov w0, w16
;; tst w1, w1
;; b.ne #0x40
;; b #0x40
;; 40: add x28, x28, #0x10
;; b.ne #0x5c
;; b #0x5c
;; 5c: add x28, x28, #0x10
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 74: .byte 0x1f, 0xc1, 0x00, 0x00
26 changes: 17 additions & 9 deletions tests/disas/winch/aarch64/br_if/as_if_cond.wat
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Expand Up @@ -16,7 +16,14 @@
;; mov x29, sp
;; str x28, [sp, #-0x10]!
;; mov x28, sp
;; mov x9, x0
;; ldur x16, [x0, #8]
;; ldur x16, [x16, #0x10]
;; mov x17, #0
;; movk x17, #0x18
;; add x16, x16, x17
;; cmp sp, x16
;; b.lo #0x94
;; 2c: mov x9, x0
;; sub x28, x28, #0x18
;; mov sp, x28
;; stur x0, [x28, #0x10]
Expand All @@ -26,19 +33,20 @@
;; mov x16, #1
;; mov w0, w16
;; tst w1, w1
;; b.ne #0x60
;; b #0x40
;; 40: tst w0, w0
;; b.eq #0x58
;; b #0x4c
;; 4c: mov x16, #2
;; b.ne #0x7c
;; b #0x5c
;; 5c: tst w0, w0
;; b.eq #0x74
;; b #0x68
;; 68: mov x16, #2
;; mov w0, w16
;; b #0x60
;; 58: mov x16, #3
;; b #0x7c
;; 74: mov x16, #3
;; mov w0, w16
;; add x28, x28, #0x18
;; mov sp, x28
;; mov sp, x28
;; ldr x28, [sp], #0x10
;; ldp x29, x30, [sp], #0x10
;; ret
;; 94: .byte 0x1f, 0xc1, 0x00, 0x00
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