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Add new MachInst backend and ARM64 support.#1494

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cfallin merged 12 commits intobytecodealliance:masterfrom
cfallin:arm64-merge
Apr 16, 2020
Merged

Add new MachInst backend and ARM64 support.#1494
cfallin merged 12 commits intobytecodealliance:masterfrom
cfallin:arm64-merge

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@cfallin cfallin commented Apr 9, 2020

This PR contributes a new backend framework built around MachInsts (machine instructions) contained in VCode (virtual-registerized code) containers. Furthermore, it contains a working ARM64 backend built in this new framework. The new framework is properly connected into the main Cranelift compilation pipeline, and the appropriate integrations have been made so that wasmtime can run basic Wasm tests correctly on ARM64 hardware.

This patch sequence contains code written by Julian Seward jseward@acm.org and Benjamin Bouvier public@benj.me, originally developed on a side-branch before rebasing and condensing into this patch series. See the arm64 branch at https://github.com/cfallin/wasmtime for original development history.

This patch also contains code written by Joey Gouly joey.gouly@arm.com and contributed to the above branch. These contributions are "Copyright (c) 2020, Arm Limited."

Closes #1174 and #1075.

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Yay! I'll make another pass through this, but here are some initial comments to start with:

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There are some unnecessary string allocations.

cfallin and others added 9 commits April 11, 2020 17:50
- Add a `simple_legalize()` function that invokes a predetermined set of
  legalizations, without depending on the details of the current
  backend design. This will be used by the new backend pipeline.

- Separate out `has_side_effect()` from the DCE pass. This will be used
  by the new backends' lowering code.

- Add documentation for the `Arm64Call` relocation type.
This removes the old ARM64 backend completely, leaving only an empty
`arm64` module. The tree at this state will not build with the `arm64`
feature enabled, but that feature has to be enabled explicitly (it is
not default). Subsequent patches will fill in the new backend.
This patch adds the MachInst, or Machine Instruction, infrastructure.
This is the machine-independent portion of the new backend design. It
contains the implementation of the "vcode" (virtual-registerized code)
container, the top-level lowering algorithm and compilation pipeline,
and the trait definitions that the machine backends will fill in.

This backend infrastructure is included in the compilation of the
`codegen` crate, but it is not yet tied into the public APIs; that patch
will come last, after all the other pieces are filled in.

This patch contains code written by Julian Seward <jseward@acm.org> and
Benjamin Bouvier <public@benj.me>, originally developed on a side-branch
before rebasing and condensing into this patch series. See the `arm64`
branch at `https://github.com/cfallin/wasmtime` for original development
history.

Co-authored-by: Julian Seward <jseward@acm.org>
Co-authored-by: Benjamin Bouvier <public@benj.me>
This patch provides the bottom layer of the ARM64 backend: it defines
the `Inst` type, which represents a single machine instruction, and
defines emission routines to produce machine code from a `VCode`
container of `Insts`. The backend cannot produce `Inst`s with just this
patch; that will come with later parts.

This patch contains code written by Julian Seward <jseward@acm.org> and
Benjamin Bouvier <public@benj.me>, originally developed on a side-branch
before rebasing and condensing into this patch series. See the `arm64`
branch at `https://github.com/cfallin/wasmtime` for original development
history.

This patch also contains code written by Joey Gouly
<joey.gouly@arm.com> and contributed to the above branch. These
contributions are "Copyright (c) 2020, Arm Limited."

Finally, a contribution from Joey Gouly contains the following notice:

    This is a port of VIXL's Assembler::IsImmLogical.

    Arm has the original copyright on the VIXL code this was ported from
    and is relicensing it under Apache 2 for Cranelift.

Co-authored-by: Julian Seward <jseward@acm.org>
Co-authored-by: Benjamin Bouvier <public@benj.me>
Co-authored-by: Joey Gouly <joey.gouly@arm.com>
This patch provides an ARM64 implementation of the ABI-related traits
required by the new backend infrasturcture. It will be used by the
lowering code, when that is in place in a subsequent patch.

This patch contains code written by Julian Seward <jseward@acm.org> and
Benjamin Bouvier <public@benj.me>, originally developed on a side-branch
before rebasing and condensing into this patch series. See the `arm64`
branch at `https://github.com/cfallin/wasmtime` for original development
history.

This patch also contains code written by Joey Gouly
<joey.gouly@arm.com> and contributed to the above branch. These
contributions are "Copyright (c) 2020, Arm Limited."

Co-authored-by: Julian Seward <jseward@acm.org>
Co-authored-by: Benjamin Bouvier <public@benj.me>
Co-authored-by: Joey Gouly <joey.gouly@arm.com>
This patch adds the lowering implementation that translates Cranelift IR
(CLIF) function bodies to VCode<Inst>, i.e., ARM64 machine instructions.

This patch contains code written by Julian Seward <jseward@acm.org> and
Benjamin Bouvier <public@benj.me>, originally developed on a side-branch
before rebasing and condensing into this patch series. See the `arm64`
branch at `https://github.com/cfallin/wasmtime` for original development
history.

This patch also contains code written by Joey Gouly
<joey.gouly@arm.com> and contributed to the above branch. These
contributions are "Copyright (c) 2020, Arm Limited."

Co-authored-by: Julian Seward <jseward@acm.org>
Co-authored-by: Benjamin Bouvier <public@benj.me>
Co-authored-by: Joey Gouly <joey.gouly@arm.com>
This patch ties together the previously-committed pieces to implement
the `MachBackend` trait for ARM64.
This patch ties together the new backend infrastructure with the
existing Cranelift codegen APIs.

With all patches in this series up to this patch applied, the ARM64
compiler is now functional and can be used. Two uses of this
functionality -- filecheck-based tests and integration into wasmtime --
will come in subsequent patches.
This commit adds a few odds and ends required to build wasmtime on ARM64
with the new backend. In particular, it adds:

- Support for the `Arm64Call` relocation type.
- Support for fetching the trap PC when a signal is received.
- A hook for `SIGTRAP`, which is sent by the `brk` opcode (in contrast to
  x86's `SIGILL`).

With the patch sequence up to and including this patch applied,
`wasmtime` can now compile and successfully execute code on arm64. Not
all tests pass yet, but basic Wasm/WASI tests work correctly.
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cfallin commented Apr 12, 2020

Thanks @sunfishcode and @bjorn3 for the comments -- I think I've addressed everything, except for the open questions in the unresolved comments above.

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I have done another review pass. I have done all files up to isa/aarch64/inst/regs.rs. I will review the rest another time.

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And I am finally done with reviewing for now.

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cfallin commented Apr 14, 2020

Thanks @sunfishcode and @bjorn3 for the further review comments! I think I've addressed everything except for the open questions in unresolved threads above. Happy to take further review comments, of course.

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This is very exciting! I think this is ready to land, and we can discuss and iterate from there!

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cfallin commented Apr 15, 2020

Alright, I think I've addressed all comments, finally. Let's wait to see if the latest CI run succeeds; then, @sunfishcode, if you're OK with it, I can hit the Merge button (or feel free to do so yourself if that's the custom here). Thanks for all the review work!

- Undo temporary changes to default features (`all-arch`) and a
  signal-handler test.
- Remove `SIGTRAP` handler: no longer needed now that we've found an
  "undefined opcode" option on ARM64.
- Rename pp.rs to pretty_print.rs in machinst/.
- Only use empty stack-probe on non-x86. As per a comment in
  rust-lang/compiler-builtins [1], LLVM only supports stack probes on
  x86 and x86-64. Thus, on any other CPU architecture, we cannot refer
  to `__rust_probestack`, because it does not exist.
- Rename arm64 to aarch64.
- Use `target` directive in vcode filetests.
- Run the flags verifier, but without encinfo, when using new backends.
- Clean up warning overrides.
- Fix up use of casts: use u32::from(x) and siblings when possible,
  u32::try_from(x).unwrap() when not, to avoid silent truncation.
- Take immutable `Function` borrows as input; we don't actually
  mutate the input IR.
- Lots of other miscellaneous cleanups.

[1] https://github.com/rust-lang/compiler-builtins/blob/cae3e6ea23739166504f9f9fb50ec070097979d4/src/probestack.rs#L39
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cfallin commented Apr 16, 2020

@sunfishcode actually, I don't have permissions to merge, so please feel do hit the big green button when you're happy!

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cfallin commented Apr 16, 2020

(Actually, I take that back, Till just added me. Let me know if you're happy with the final version and I'll merge.)

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cfallin commented Apr 16, 2020

As per IM with @sunfishcode, merging now!

use crate::isa::enc_tables::Encodings;
#[cfg(feature = "unwind")]
use crate::isa::fde::RegisterMappingError;
#[cfg(feature = "unwind")]
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Unfortunately I just caught this. I believe this accidentally moved the #[cfg(feature = "unwind")].

I have an existing PR that this merged conflicted with, so I'll correct it there.

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Yikes, that was likely a rebase failure on my part. Sorry about that. (I suppose I got lucky as unwind is enabled by default.) Thanks for fixing!

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Build new instruction selector / machine-code emission backend

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