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23 changes: 15 additions & 8 deletions cranelift/codegen/src/isa/x64/abi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -468,9 +468,9 @@ impl ABIMachineSpec for X64ABIMachineSpec {

if flags.unwind_info() && setup_frame {
// Emit unwind info: start the frame. The frame (from unwind
// consumers' point of view) starts at clobbbers, just below
// the FP and return address. Spill slots and stack slots are
// part of our actual frame but do not concern the unwinder.
// consumers' point of view) starts at clobbers, just below the FP
// and return address. Spill slots and stack slots are part of our
// actual frame but do not concern the unwinder.
insts.push(Inst::Unwind {
inst: UnwindInst::DefineNewFrame {
offset_downward_to_clobbers: clobbered_size,
Expand Down Expand Up @@ -732,12 +732,19 @@ impl ABIMachineSpec for X64ABIMachineSpec {
}

fn is_frame_setup_needed(
_is_leaf: bool,
_stack_args_size: u32,
_num_clobbered_callee_saves: usize,
_frame_storage_size: u32,
is_leaf: bool,
stack_args_size: u32,
num_clobbered_callee_saves: usize,
frame_storage_size: u32,
) -> bool {
true
(!is_leaf
// The function arguments that are passed on the stack are addressed
// relative to the Frame Pointer.
|| stack_args_size > 0
|| num_clobbered_callee_saves > 0
|| frame_storage_size > 0)
// TODO
&& !cfg!(target_os = "macos")
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Maybe my suggestion at #4469 (comment) would work? "non-leaf" could be used by default and "always" could be used on macOS.

}
}

Expand Down
9 changes: 7 additions & 2 deletions cranelift/codegen/src/isa/x64/inst/unwind/systemv.rs
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,12 @@ mod tests {
_ => panic!("expected unwind information"),
};

assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 17, lsda: None, instructions: [(1, CfaOffset(16)), (1, Offset(Register(6), -16)), (4, CfaRegister(Register(6)))] }");
if cfg!(target_os = "macos") {
// TODO
assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 9, lsda: None, instructions: [] }");
} else {
assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 17, lsda: None, instructions: [(1, CfaOffset(16)), (1, Offset(Register(6), -16)), (4, CfaRegister(Register(6)))] }");
}
}

fn create_function(call_conv: CallConv, stack_slot: Option<StackSlotData>) -> Function {
Expand Down Expand Up @@ -169,7 +174,7 @@ mod tests {
_ => panic!("expected unwind information"),
};

assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 22, lsda: None, instructions: [(1, CfaOffset(16)), (1, Offset(Register(6), -16)), (4, CfaRegister(Register(6)))] }");
assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 10, lsda: None, instructions: [] }");
}

fn create_multi_return_function(call_conv: CallConv) -> Function {
Expand Down
97 changes: 42 additions & 55 deletions cranelift/codegen/src/isa/x64/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -343,32 +343,28 @@ mod test {
// command on it:
// > objdump -b binary -D <file> -m i386:x86-64 -M intel
//
// 0: 55 push rbp
// 1: 48 89 e5 mov rbp,rsp
// 4: 48 89 fe mov rsi,rdi
// 7: 81 c6 34 12 00 00 add esi,0x1234
// d: 85 f6 test esi,esi
// f: 0f 84 1c 00 00 00 je 0x31
// 15: 49 89 f0 mov r8,rsi
// 18: 48 89 f0 mov rax,rsi
// 1b: 81 e8 34 12 00 00 sub eax,0x1234
// 21: 44 01 c0 add eax,r8d
// 24: 85 f6 test esi,esi
// 26: 0f 85 05 00 00 00 jne 0x31
// 2c: 48 89 ec mov rsp,rbp
// 2f: 5d pop rbp
// 30: c3 ret
// 31: 49 89 f0 mov r8,rsi
// 34: 41 81 c0 34 12 00 00 add r8d,0x1234
// 3b: 45 85 c0 test r8d,r8d
// 3e: 0f 85 ed ff ff ff jne 0x31
// 44: e9 cf ff ff ff jmp 0x18
// 0: 48 89 fe mov rsi,rdi
// 3: 81 c6 34 12 00 00 add esi,0x1234
// 9: 85 f6 test esi,esi
// b: 0f 84 18 00 00 00 je 0x29
// 11: 49 89 f0 mov r8,rsi
// 14: 48 89 f0 mov rax,rsi
// 17: 81 e8 34 12 00 00 sub eax,0x1234
// 1d: 44 01 c0 add eax,r8d
// 20: 85 f6 test esi,esi
// 22: 0f 85 01 00 00 00 jne 0x29
// 28: c3 ret
// 29: 49 89 f0 mov r8,rsi
// 2c: 41 81 c0 34 12 00 00 add r8d,0x1234
// 33: 45 85 c0 test r8d,r8d
// 36: 0f 85 ed ff ff ff jne 0x29
// 3c: e9 d3 ff ff ff jmp 0x14

let golden = vec![
85, 72, 137, 229, 72, 137, 254, 129, 198, 52, 18, 0, 0, 133, 246, 15, 132, 28, 0, 0, 0,
73, 137, 240, 72, 137, 240, 129, 232, 52, 18, 0, 0, 68, 1, 192, 133, 246, 15, 133, 5,
0, 0, 0, 72, 137, 236, 93, 195, 73, 137, 240, 65, 129, 192, 52, 18, 0, 0, 69, 133, 192,
15, 133, 237, 255, 255, 255, 233, 207, 255, 255, 255,
72, 137, 254, 129, 198, 52, 18, 0, 0, 133, 246, 15, 132, 24, 0, 0, 0, 73, 137, 240, 72,
137, 240, 129, 232, 52, 18, 0, 0, 68, 1, 192, 133, 246, 15, 133, 1, 0, 0, 0, 195, 73,
137, 240, 65, 129, 192, 52, 18, 0, 0, 69, 133, 192, 15, 133, 237, 255, 255, 255, 233,
211, 255, 255, 255,
];

assert_eq!(code, &golden[..]);
Expand Down Expand Up @@ -448,39 +444,30 @@ mod test {
// command on it:
// > objdump -b binary -D <file> -m i386:x86-64 -M intel
//
// 0: 55 push rbp
// 1: 48 89 e5 mov rbp,rsp
// 4: 83 ff 02 cmp edi,0x2
// 7: 0f 83 27 00 00 00 jae 0x34
// d: 44 8b d7 mov r10d,edi
// 10: 41 b9 00 00 00 00 mov r9d,0x0
// 16: 4d 0f 43 d1 cmovae r10,r9
// 1a: 4c 8d 0d 0b 00 00 00 lea r9,[rip+0xb] # 0x2c
// 21: 4f 63 54 91 00 movsxd r10,DWORD PTR [r9+r10*4+0x0]
// 26: 4d 01 d1 add r9,r10
// 29: 41 ff e1 jmp r9
// 2c: 12 00 adc al,BYTE PTR [rax]
// 2e: 00 00 add BYTE PTR [rax],al
// 30: 1c 00 sbb al,0x0
// 32: 00 00 add BYTE PTR [rax],al
// 34: b8 03 00 00 00 mov eax,0x3
// 39: 48 89 ec mov rsp,rbp
// 3c: 5d pop rbp
// 3d: c3 ret
// 3e: b8 01 00 00 00 mov eax,0x1
// 43: 48 89 ec mov rsp,rbp
// 46: 5d pop rbp
// 47: c3 ret
// 48: b8 02 00 00 00 mov eax,0x2
// 4d: 48 89 ec mov rsp,rbp
// 50: 5d pop rbp
// 51: c3 ret
// 0: 83 ff 02 cmp edi,0x2
// 3: 0f 83 27 00 00 00 jae 0x30
// 9: 44 8b d7 mov r10d,edi
// c: 41 b9 00 00 00 00 mov r9d,0x0
// 12: 4d 0f 43 d1 cmovae r10,r9
// 16: 4c 8d 0d 0b 00 00 00 lea r9,[rip+0xb] # 0x28
// 1d: 4f 63 54 91 00 movsxd r10,DWORD PTR [r9+r10*4+0x0]
// 22: 4d 01 d1 add r9,r10
// 25: 41 ff e1 jmp r9
// 28: 0e (bad)
// 29: 00 00 add BYTE PTR [rax],al
// 2b: 00 14 00 add BYTE PTR [rax+rax*1],dl
// 2e: 00 00 add BYTE PTR [rax],al
// 30: b8 03 00 00 00 mov eax,0x3
// 35: c3 ret
// 36: b8 01 00 00 00 mov eax,0x1
// 3b: c3 ret
// 3c: b8 02 00 00 00 mov eax,0x2
// 41: c3 ret

let golden = vec![
85, 72, 137, 229, 131, 255, 2, 15, 131, 39, 0, 0, 0, 68, 139, 215, 65, 185, 0, 0, 0, 0,
77, 15, 67, 209, 76, 141, 13, 11, 0, 0, 0, 79, 99, 84, 145, 0, 77, 1, 209, 65, 255,
225, 18, 0, 0, 0, 28, 0, 0, 0, 184, 3, 0, 0, 0, 72, 137, 236, 93, 195, 184, 1, 0, 0, 0,
72, 137, 236, 93, 195, 184, 2, 0, 0, 0, 72, 137, 236, 93, 195,
131, 255, 2, 15, 131, 39, 0, 0, 0, 68, 139, 215, 65, 185, 0, 0, 0, 0, 77, 15, 67, 209,
76, 141, 13, 11, 0, 0, 0, 79, 99, 84, 145, 0, 77, 1, 209, 65, 255, 225, 14, 0, 0, 0,
20, 0, 0, 0, 184, 3, 0, 0, 0, 195, 184, 1, 0, 0, 0, 195, 184, 2, 0, 0, 0, 195,
];

assert_eq!(code, &golden[..]);
Expand Down
4 changes: 0 additions & 4 deletions cranelift/filetests/filetests/egraph/not_a_load.clif
Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,8 @@ function u0:1302(i64) -> i64 system_v {
return v0
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; atomically { 64_bits_at_[%r9]) Add= %r10; %rax = old_value_at_[%r9]; %r11, %rflags = trash }
; movq %rdi, %rax
; movq %rbp, %rsp
; popq %rbp
; ret

37 changes: 0 additions & 37 deletions cranelift/filetests/filetests/isa/x64/amode-opt.clif
Original file line number Diff line number Diff line change
Expand Up @@ -8,12 +8,8 @@ block0(v0: i64, v1: i64):
return v3
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq 0(%rdi,%rsi,1), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_add_imm(i64) -> i64 {
Expand All @@ -24,12 +20,8 @@ block0(v0: i64):
return v3
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq 42(%rdi), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_add_imm_order(i64) -> i64 {
Expand All @@ -40,12 +32,8 @@ block0(v0: i64):
return v3
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq 42(%rdi), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_add_uext_imm(i64) -> i64 {
Expand All @@ -57,12 +45,8 @@ block0(v0: i64):
return v4
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq 42(%rdi), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_reg_reg_imm(i64, i64) -> i64 {
Expand All @@ -74,12 +58,8 @@ block0(v0: i64, v1: i64):
return v5
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq 320(%rdi,%rsi,1), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_reg_reg_imm_negative(i64, i64) -> i64 {
Expand All @@ -91,12 +71,8 @@ block0(v0: i64, v1: i64):
return v5
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq -1(%rdi,%rsi,1), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_reg_reg_imm_scaled(i64, i64) -> i64 {
Expand All @@ -109,15 +85,10 @@ block0(v0: i64, v1: i64):
return v6
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq -1(%rdi,%rsi,8), %rax
; movq %rbp, %rsp
; popq %rbp
; ret


function %amode_reg_reg_imm_uext_scaled(i64, i32) -> i64 {
block0(v0: i64, v1: i32):
v2 = iconst.i64 -1
Expand All @@ -129,13 +100,9 @@ block0(v0: i64, v1: i32):
return v7
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movl %esi, %ecx
; movq -1(%rdi,%rcx,8), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %amode_reg_reg_imm_uext_scaled_add(i64, i32, i32) -> i64 {
Expand All @@ -150,13 +117,9 @@ block0(v0: i64, v1: i32, v2: i32):
return v9
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq %rsi, %r8
; addl %r8d, %edx, %r8d
; movq -1(%rdi,%r8,4), %rax
; movq %rbp, %rsp
; popq %rbp
; ret

4 changes: 0 additions & 4 deletions cranelift/filetests/filetests/isa/x64/basic.clif
Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,8 @@ block0(v0: i32, v1: i32):
return v2
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq %rdi, %rax
; addl %eax, %esi, %eax
; movq %rbp, %rsp
; popq %rbp
; ret

16 changes: 0 additions & 16 deletions cranelift/filetests/filetests/isa/x64/bitcast.clif
Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,8 @@ block0(v0: f32):
return v1
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movd %xmm0, %eax
; movq %rbp, %rsp
; popq %rbp
; ret

function %f2(i32) -> f32 {
Expand All @@ -21,12 +17,8 @@ block0(v0: i32):
return v1
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movd %edi, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret

function %f3(f64) -> i64 {
Expand All @@ -35,12 +27,8 @@ block0(v0: f64):
return v1
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq %xmm0, %rax
; movq %rbp, %rsp
; popq %rbp
; ret

function %f4(i64) -> f64 {
Expand All @@ -49,11 +37,7 @@ block0(v0: i64):
return v1
}

; pushq %rbp
; movq %rsp, %rbp
; block0:
; movq %rdi, %xmm0
; movq %rbp, %rsp
; popq %rbp
; ret

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