I did actually try next this time.
$ ./cstool/cstool -d arm64 '\x20\x1d\x18\x4e'
0 20 1d 18 4e mov v0.d[1], x9
ID: 488 (mov)
op_count: 2
operands[0].type: REG = v0
operands[0].access: READ | WRITE
Vector Index: 1
operands[1].type: REG = x9
operands[1].access: READ
Registers read: v0 x9
Registers modified: v0
Groups: neon
$ ./cstool/cstool -d arm64 '\x20\x04\x18\x6e'
0 20 04 18 6e mov v0.d[1], v1.d[0]
ID: 488 (mov)
op_count: 2
operands[0].type: REG = v0
operands[0].access: READ | WRITE
Vector Index: 1
operands[1].type: REG = v1
operands[1].access: READ
Vector Index: 0
Registers read: v0 v1
Registers modified: v0
Groups: neon
I saw the similar issue #1452 and tried adding arm64_op_addVectorArrSpecifier calls for AArch64_INSvi64gpr & co., but I'm not sure if that is the right place to do it, and that call alone will not set the VAS for the first operand.
I did actually try
nextthis time.I saw the similar issue #1452 and tried adding
arm64_op_addVectorArrSpecifiercalls forAArch64_INSvi64gpr& co., but I'm not sure if that is the right place to do it, and that call alone will not set the VAS for the first operand.